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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/
Dxylon,logicvc-display.yaml25 In version 3 of the controller, each layer has fixed memory offset and address
103 xylon,background-layer:
106 The last layer is used to display a black background (C_USE_BACKGROUND).
107 The layer must still be registered.
126 "^layer@[0-9]+$":
133 xylon,layer-depth:
135 description: Layer depth (C_LAYER_X_DATA_WIDTH).
137 xylon,layer-colorspace:
143 description: Layer colorspace (C_LAYER_X_TYPE).
145 xylon,layer-alpha-mode:
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/kernel/linux/linux-6.6/drivers/gpu/drm/logicvc/
Dlogicvc_layer.c87 struct logicvc_layer *layer = logicvc_layer(drm_plane); in logicvc_plane_atomic_check() local
111 ret = logicvc_layer_buffer_find_setup(logicvc, layer, new_state, in logicvc_plane_atomic_check()
123 layer->index != (logicvc->config.layers_count - 1) && in logicvc_plane_atomic_check()
140 struct logicvc_layer *layer = logicvc_layer(drm_plane); in logicvc_plane_atomic_update() local
149 u32 index = layer->index; in logicvc_plane_atomic_update()
152 /* Layer dimensions */ in logicvc_plane_atomic_update()
167 logicvc_layer_buffer_find_setup(logicvc, layer, new_state, in logicvc_plane_atomic_update()
170 /* Layer memory offsets */ in logicvc_plane_atomic_update()
180 /* Layer position */ in logicvc_plane_atomic_update()
185 /* Vertical position must be set last to sync layer register changes. */ in logicvc_plane_atomic_update()
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/kernel/linux/linux-5.10/drivers/media/platform/davinci/
Dvpbe_display.c41 struct vpbe_layer *layer);
62 struct vpbe_layer *layer) in vpbe_isr_even_field() argument
64 if (layer->cur_frm == layer->next_frm) in vpbe_isr_even_field()
67 layer->cur_frm->vb.vb2_buf.timestamp = ktime_get_ns(); in vpbe_isr_even_field()
68 vb2_buffer_done(&layer->cur_frm->vb.vb2_buf, VB2_BUF_STATE_DONE); in vpbe_isr_even_field()
70 layer->cur_frm = layer->next_frm; in vpbe_isr_even_field()
74 struct vpbe_layer *layer) in vpbe_isr_odd_field() argument
80 if (list_empty(&layer->dma_queue) || in vpbe_isr_odd_field()
81 (layer->cur_frm != layer->next_frm)) { in vpbe_isr_odd_field()
91 layer->next_frm = list_entry(layer->dma_queue.next, in vpbe_isr_odd_field()
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/kernel/linux/linux-6.6/drivers/gpu/drm/xlnx/
Dzynqmp_disp.c82 * struct zynqmp_disp_layer_dma - DMA channel for one data plane of a layer
94 * struct zynqmp_disp_layer_info - Static layer information
106 * struct zynqmp_disp_layer - Display layer
107 * @id: Layer ID
109 * @info: Static layer information
187 /* List of video layer formats */
292 /* List of graphics layer formats */
367 static bool zynqmp_disp_layer_is_video(const struct zynqmp_disp_layer *layer) in zynqmp_disp_layer_is_video() argument
369 return layer->id == ZYNQMP_DPSUB_LAYER_VID; in zynqmp_disp_layer_is_video()
373 * zynqmp_disp_avbuf_set_format - Set the input format for a layer
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/kernel/linux/linux-6.6/drivers/net/ethernet/microchip/sparx5/
Dsparx5_qos.c79 static u32 sparx5_lg_get_leak_time(struct sparx5 *sparx5, u32 layer, u32 group) in sparx5_lg_get_leak_time() argument
83 value = spx5_rd(sparx5, HSCH_HSCH_TIMER_CFG(layer, group)); in sparx5_lg_get_leak_time()
87 static void sparx5_lg_set_leak_time(struct sparx5 *sparx5, u32 layer, u32 group, in sparx5_lg_set_leak_time() argument
91 HSCH_HSCH_TIMER_CFG(layer, group)); in sparx5_lg_set_leak_time()
94 static u32 sparx5_lg_get_first(struct sparx5 *sparx5, u32 layer, u32 group) in sparx5_lg_get_first() argument
98 value = spx5_rd(sparx5, HSCH_HSCH_LEAK_CFG(layer, group)); in sparx5_lg_get_first()
102 static u32 sparx5_lg_get_next(struct sparx5 *sparx5, u32 layer, u32 group, in sparx5_lg_get_next() argument
112 static u32 sparx5_lg_get_last(struct sparx5 *sparx5, u32 layer, u32 group) in sparx5_lg_get_last() argument
116 itr = sparx5_lg_get_first(sparx5, layer, group); in sparx5_lg_get_last()
119 next = sparx5_lg_get_next(sparx5, layer, group, itr); in sparx5_lg_get_last()
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/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
Dsun4i_layer.c20 struct sun4i_layer *layer = plane_to_sun4i_layer(plane); in sun4i_backend_layer_reset() local
35 plane->state->zpos = layer->id; in sun4i_backend_layer_reset()
69 struct sun4i_layer *layer = plane_to_sun4i_layer(plane); in sun4i_backend_layer_atomic_disable() local
70 struct sun4i_backend *backend = layer->backend; in sun4i_backend_layer_atomic_disable()
72 sun4i_backend_layer_enable(backend, layer->id, false); in sun4i_backend_layer_atomic_disable()
87 struct sun4i_layer *layer = plane_to_sun4i_layer(plane); in sun4i_backend_layer_atomic_update() local
88 struct sun4i_backend *backend = layer->backend; in sun4i_backend_layer_atomic_update()
91 sun4i_backend_cleanup_layer(backend, layer->id); in sun4i_backend_layer_atomic_update()
99 sun4i_backend_update_layer_frontend(backend, layer->id, in sun4i_backend_layer_atomic_update()
103 sun4i_backend_update_layer_formats(backend, layer->id, plane); in sun4i_backend_layer_atomic_update()
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Dsun8i_ui_layer.c106 DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n", in sun8i_ui_layer_update_coord()
133 DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n", in sun8i_ui_layer_update_coord()
135 DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); in sun8i_ui_layer_update_coord()
160 DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n", in sun8i_ui_layer_update_coord()
162 DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); in sun8i_ui_layer_update_coord()
224 DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]); in sun8i_ui_layer_update_buffer()
241 struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); in sun8i_ui_layer_atomic_check() local
256 if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) { in sun8i_ui_layer_atomic_check()
269 struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); in sun8i_ui_layer_atomic_disable() local
271 struct sun8i_mixer *mixer = layer->mixer; in sun8i_ui_layer_atomic_disable()
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Dsun8i_ui_layer.h17 #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(base, layer) \ argument
18 ((base) + 0x20 * (layer) + 0x0)
19 #define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(base, layer) \ argument
20 ((base) + 0x20 * (layer) + 0x4)
21 #define SUN8I_MIXER_CHAN_UI_LAYER_COORD(base, layer) \ argument
22 ((base) + 0x20 * (layer) + 0x8)
23 #define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(base, layer) \ argument
24 ((base) + 0x20 * (layer) + 0xc)
25 #define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(base, layer) \ argument
26 ((base) + 0x20 * (layer) + 0x10)
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/kernel/linux/linux-6.6/Documentation/networking/caif/
Dlinux_caif.rst31 * CAIF Socket Layer and GPRS IP Interface.
33 * CAIF Link Layer, implemented as NET devices.
54 +--> ! HSI ! ! TTY ! ! USB ! <- Link Layer (Net Devices)
63 CAIF Core Protocol Layer
66 CAIF Core layer implements the CAIF protocol as defined by ST-Ericsson.
68 each layer described in the specification is implemented as a separate layer.
69 The architecture is inspired by the design patterns "Protocol Layer" and
78 - Layered architecture (a la Streams), each layer in the CAIF
80 - Clients must call configuration function to add PHY layer.
81 - Clients must implement CAIF layer to consume/produce
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/kernel/linux/linux-5.10/Documentation/networking/caif/
Dlinux_caif.rst31 * CAIF Socket Layer and GPRS IP Interface.
33 * CAIF Link Layer, implemented as NET devices.
54 +--> ! HSI ! ! TTY ! ! USB ! <- Link Layer (Net Devices)
63 CAIF Core Protocol Layer
66 CAIF Core layer implements the CAIF protocol as defined by ST-Ericsson.
68 each layer described in the specification is implemented as a separate layer.
69 The architecture is inspired by the design patterns "Protocol Layer" and
78 - Layered architecture (a la Streams), each layer in the CAIF
80 - Clients must call configuration function to add PHY layer.
81 - Clients must implement CAIF layer to consume/produce
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/kernel/linux/linux-6.6/drivers/gpu/drm/sun4i/
Dsun4i_layer.c69 struct sun4i_layer *layer = plane_to_sun4i_layer(plane); in sun4i_backend_layer_atomic_disable() local
70 struct sun4i_backend *backend = layer->backend; in sun4i_backend_layer_atomic_disable()
72 sun4i_backend_layer_enable(backend, layer->id, false); in sun4i_backend_layer_atomic_disable()
89 struct sun4i_layer *layer = plane_to_sun4i_layer(plane); in sun4i_backend_layer_atomic_update() local
90 struct sun4i_backend *backend = layer->backend; in sun4i_backend_layer_atomic_update()
93 sun4i_backend_cleanup_layer(backend, layer->id); in sun4i_backend_layer_atomic_update()
101 sun4i_backend_update_layer_frontend(backend, layer->id, in sun4i_backend_layer_atomic_update()
105 sun4i_backend_update_layer_formats(backend, layer->id, plane); in sun4i_backend_layer_atomic_update()
106 sun4i_backend_update_layer_buffer(backend, layer->id, plane); in sun4i_backend_layer_atomic_update()
109 sun4i_backend_update_layer_coord(backend, layer->id, plane); in sun4i_backend_layer_atomic_update()
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Dsun8i_ui_layer.c125 DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n", in sun8i_ui_layer_update_coord()
127 DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); in sun8i_ui_layer_update_coord()
152 DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n", in sun8i_ui_layer_update_coord()
154 DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); in sun8i_ui_layer_update_coord()
216 DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]); in sun8i_ui_layer_update_buffer()
235 struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); in sun8i_ui_layer_atomic_check() local
251 if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) { in sun8i_ui_layer_atomic_check()
267 struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); in sun8i_ui_layer_atomic_disable() local
269 struct sun8i_mixer *mixer = layer->mixer; in sun8i_ui_layer_atomic_disable()
271 sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false, 0, in sun8i_ui_layer_atomic_disable()
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/kernel/linux/linux-6.6/include/net/caif/
Dcaif_layer.h36 * enum caif_ctrlcmd - CAIF Stack Control Signaling sent in layer.ctrlcmd().
47 * @CAIF_CTRLCMD_INIT_RSP: Called initially when the layer below
55 * @_CAIF_CTRLCMD_PHYIF_FLOW_OFF_IND: CAIF Link layer temporarily cannot
57 * @_CAIF_CTRLCMD_PHYIF_FLOW_ON_IND: Called if CAIF Link layer is able
59 * @_CAIF_CTRLCMD_PHYIF_DOWN_IND: Called if CAIF Link layer is going
63 * They are used for signaling originating from the modem or CAIF Link Layer.
80 * to the CAIF Link Layer or modem.
88 * @_CAIF_MODEMCMD_PHYIF_USEFULL: Notify physical layer that it is in use
90 * @_CAIF_MODEMCMD_PHYIF_USELESS: Notify physical layer that it is
115 * struct cflayer - CAIF Stack layer.
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Dcaif_dev.h52 * @client_layer: User implementation of client layer. This layer
55 * @ifindex: Link layer interface index used for this connection.
60 * the struct cflayer. This layer represents the Client layer and holds
75 * @client_layer: Client layer to be disconnected.
83 * @adapt_layer: Client layer using CAIF Stack.
84 * @hold: Function provided by client layer increasing ref-count
85 * @put: Function provided by client layer decreasing ref-count
100 * @client_layer: Client layer to be removed.
102 * This function must be called from client layer in order to free memory.
109 * struct caif_enroll_dev - Enroll a net-device as a CAIF Link layer
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/kernel/linux/linux-5.10/include/net/caif/
Dcaif_layer.h36 * enum caif_ctrlcmd - CAIF Stack Control Signaling sent in layer.ctrlcmd().
47 * @CAIF_CTRLCMD_INIT_RSP: Called initially when the layer below
55 * @_CAIF_CTRLCMD_PHYIF_FLOW_OFF_IND: CAIF Link layer temporarily cannot
57 * @_CAIF_CTRLCMD_PHYIF_FLOW_ON_IND: Called if CAIF Link layer is able
59 * @_CAIF_CTRLCMD_PHYIF_DOWN_IND: Called if CAIF Link layer is going
63 * They are used for signaling originating from the modem or CAIF Link Layer.
80 * to the CAIF Link Layer or modem.
88 * @_CAIF_MODEMCMD_PHYIF_USEFULL: Notify physical layer that it is in use
90 * @_CAIF_MODEMCMD_PHYIF_USELESS: Notify physical layer that it is
115 * struct cflayer - CAIF Stack layer.
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Dcaif_dev.h52 * @client_layer: User implementation of client layer. This layer
55 * @ifindex: Link layer interface index used for this connection.
60 * the struct cflayer. This layer represents the Client layer and holds
75 * @client_layer: Client layer to be disconnected.
83 * @adapt_layer: Client layer using CAIF Stack.
84 * @hold: Function provided by client layer increasing ref-count
85 * @put: Function provided by client layer decreasing ref-count
100 * @client_layer: Client layer to be removed.
102 * This function must be called from client layer in order to free memory.
109 * struct caif_enroll_dev - Enroll a net-device as a CAIF Link layer
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/kernel/linux/linux-5.10/drivers/gpu/drm/xlnx/
Dzynqmp_disp.c95 * enum zynqmp_disp_id - Layer identifier
96 * @ZYNQMP_DISP_LAYER_VID: Video layer
97 * @ZYNQMP_DISP_LAYER_GFX: Graphics layer
105 * enum zynqmp_disp_layer_mode - Layer mode
115 * struct zynqmp_disp_layer_dma - DMA channel for one data plane of a layer
127 * struct zynqmp_disp_layer_info - Static layer information
139 * struct zynqmp_disp_layer - Display layer (DRM plane)
141 * @id: Layer ID
143 * @info: Static layer information
257 /* List of video layer formats */
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/kernel/linux/linux-5.10/drivers/gpu/drm/atmel-hlcdc/
Datmel_hlcdc_dc.h132 * Atmel HLCDC Layer registers layout structure
134 * Each HLCDC layer has its own register organization and a given register
137 * This structure stores common registers layout for a given layer and is
138 * used by HLCDC layer code to choose the appropriate register to write to
153 * @general_config: general layer config register
202 * Atmel HLCDC layer types
215 * This structure list all the formats supported by a given layer.
226 * Atmel HLCDC Layer description structure
228 * This structure describes the capabilities provided by a given layer.
230 * @name: layer name
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/kernel/linux/linux-6.6/drivers/gpu/drm/atmel-hlcdc/
Datmel_hlcdc_dc.h132 * Atmel HLCDC Layer registers layout structure
134 * Each HLCDC layer has its own register organization and a given register
137 * This structure stores common registers layout for a given layer and is
138 * used by HLCDC layer code to choose the appropriate register to write to
153 * @general_config: general layer config register
202 * Atmel HLCDC layer types
215 * This structure list all the formats supported by a given layer.
226 * Atmel HLCDC Layer description structure
228 * This structure describes the capabilities provided by a given layer.
230 * @name: layer name
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/kernel/linux/linux-6.6/drivers/media/dvb-frontends/
Dmb86a20s.c377 unsigned layer) in mb86a20s_get_modulation() argument
381 [0] = 0x86, /* Layer A */ in mb86a20s_get_modulation()
382 [1] = 0x8a, /* Layer B */ in mb86a20s_get_modulation()
383 [2] = 0x8e, /* Layer C */ in mb86a20s_get_modulation()
386 if (layer >= ARRAY_SIZE(reg)) in mb86a20s_get_modulation()
388 rc = mb86a20s_writereg(state, 0x6d, reg[layer]); in mb86a20s_get_modulation()
409 unsigned layer) in mb86a20s_get_fec() argument
414 [0] = 0x87, /* Layer A */ in mb86a20s_get_fec()
415 [1] = 0x8b, /* Layer B */ in mb86a20s_get_fec()
416 [2] = 0x8f, /* Layer C */ in mb86a20s_get_fec()
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/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Dmb86a20s.c377 unsigned layer) in mb86a20s_get_modulation() argument
381 [0] = 0x86, /* Layer A */ in mb86a20s_get_modulation()
382 [1] = 0x8a, /* Layer B */ in mb86a20s_get_modulation()
383 [2] = 0x8e, /* Layer C */ in mb86a20s_get_modulation()
386 if (layer >= ARRAY_SIZE(reg)) in mb86a20s_get_modulation()
388 rc = mb86a20s_writereg(state, 0x6d, reg[layer]); in mb86a20s_get_modulation()
409 unsigned layer) in mb86a20s_get_fec() argument
414 [0] = 0x87, /* Layer A */ in mb86a20s_get_fec()
415 [1] = 0x8b, /* Layer B */ in mb86a20s_get_fec()
416 [2] = 0x8f, /* Layer C */ in mb86a20s_get_fec()
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/kernel/linux/linux-6.6/Documentation/gpu/
Dkomeda-kms.rst22 Layer section in Overview of D71 like display IPs
24 Layer is the first pipeline stage, which prepares the pixel data for the next
33 The usage of scaler is very flexible and can be connected to layer output
34 for layer scaling, or connected to compositor and scale the whole display
46 Writeback Layer (wb_layer)
48 Writeback layer does the opposite things of Layer, which connects to compiz
64 compared with Layer, like if Layer supports 4K input size, the scaler only can
66 introduces Layer Split, which splits the whole image to two half parts and feeds
73 Similar to Layer Split, but Splitter is used for writeback, which splits the
120 "Layer-0" -> "Scaler-0"
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/kernel/linux/linux-5.10/Documentation/gpu/
Dkomeda-kms.rst22 Layer section in Overview of D71 like display IPs
24 Layer is the first pipeline stage, which prepares the pixel data for the next
33 The usage of scaler is very flexible and can be connected to layer output
34 for layer scaling, or connected to compositor and scale the whole display
46 Writeback Layer (wb_layer)
48 Writeback layer does the opposite things of Layer, which connects to compiz
64 compared with Layer, like if Layer supports 4K input size, the scaler only can
66 introduces Layer Split, which splits the whole image to two half parts and feeds
73 Similar to Layer Split, but Splitter is used for writeback, which splits the
120 "Layer-0" -> "Scaler-0"
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/kernel/linux/linux-5.10/fs/overlayfs/
Dexport.c41 * Before encoding a non-upper directory file handle from real layer N, we need
44 * "layer N connected" ancestor and verifying that all parents along the way are
45 * "layer N connectable". If an ancestor that is NOT "layer N connectable" is
46 * found, we need to copy up an ancestor, which is "layer N connectable", thus
47 * making that ancestor "layer N connected". For example:
49 * layer 1: /a
50 * layer 2: /a/b/c
52 * The overlay dentry /a is NOT "layer 2 connectable", because if dir /a is
54 * layer 1. The dir /a from layer 2 will never be indexed, so the algorithm (*)
59 * /a/b/c, which is "layer 2 connectable", on encode time. That ancestor is
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/kernel/linux/linux-6.6/fs/overlayfs/
Dexport.c41 * Before encoding a non-upper directory file handle from real layer N, we need
44 * "layer N connected" ancestor and verifying that all parents along the way are
45 * "layer N connectable". If an ancestor that is NOT "layer N connectable" is
46 * found, we need to copy up an ancestor, which is "layer N connectable", thus
47 * making that ancestor "layer N connected". For example:
49 * layer 1: /a
50 * layer 2: /a/b/c
52 * The overlay dentry /a is NOT "layer 2 connectable", because if dir /a is
54 * layer 1. The dir /a from layer 2 will never be indexed, so the algorithm (*)
59 * /a/b/c, which is "layer 2 connectable", on encode time. That ancestor is
[all …]

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