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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/
Dsamsung,exynos4210-mct.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 global timer and CPU local timers. The global timer is a 64-bit free running
15 up-counter and can generate 4 interrupts when the counter reaches one of the
16 four preset counter values. The CPU local timers are 32-bit free running
17 down-counters and generate an interrupt when the counter expires. There is
18 one CPU local timer instantiated in MCT for every CPU in the system.
[all …]
Dmarvell,armada-370-xp-timer.txt1 Marvell Armada 370 and Armada XP Timers
2 ---------------------------------------
5 - compatible: Should be one of the following
6 "marvell,armada-370-timer",
7 "marvell,armada-375-timer",
8 "marvell,armada-xp-timer".
9 - interrupts: Should contain the list of Global Timer interrupts and
10 then local timer interrupts
11 - reg: Should contain location and length for timers register. First
13 local/private timers.
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/
Dsamsung,exynos4210-mct.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 global timer and CPU local timers. The global timer is a 64-bit free running
15 up-counter and can generate 4 interrupts when the counter reaches one of the
16 four preset counter values. The CPU local timers are 32-bit free running
17 down-counters and generate an interrupt when the counter expires. There is
18 one CPU local timer instantiated in MCT for every CPU in the system.
[all …]
Dmarvell,armada-370-xp-timer.txt1 Marvell Armada 370 and Armada XP Timers
2 ---------------------------------------
5 - compatible: Should be one of the following
6 "marvell,armada-370-timer",
7 "marvell,armada-375-timer",
8 "marvell,armada-xp-timer".
9 - interrupts: Should contain the list of Global Timer interrupts and
10 then local timer interrupts
11 - reg: Should contain location and length for timers register. First
13 local/private timers.
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/kernel/linux/linux-6.6/Documentation/timers/
Dhighres.rst2 High resolution timers and dynamic ticks design notes
8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
34 the base implementation are covered in Documentation/timers/hrtimers.rst. See
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/kernel/linux/linux-5.10/Documentation/timers/
Dhighres.rst2 High resolution timers and dynamic ticks design notes
8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
34 the base implementation are covered in Documentation/timers/hrtimers.rst. See
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/kernel/linux/linux-6.6/Documentation/virt/hyperv/
Dclocks.rst1 .. SPDX-License-Identifier: GPL-2.0
3 Clocks and Timers
7 -----
8 On arm64, Hyper-V virtualizes the ARMv8 architectural system counter
12 architectural system counter is functional in guest VMs on Hyper-V.
13 While Hyper-V also provides a synthetic system clock and four synthetic
14 per-CPU timers as described in the TLFS, they are not used by the
15 Linux kernel in a Hyper-V guest on arm64. However, older versions
16 of Hyper-V for arm64 only partially virtualize the ARMv8
19 Linux kernel versions on these older Hyper-V versions requires an
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/kernel/linux/linux-6.6/kernel/
Dcpu_pm.c1 // SPDX-License-Identifier: GPL-2.0-only
53 * cpu_pm_register_notifier - register a driver with cpu_pm
74 * cpu_pm_unregister_notifier - unregister a driver with cpu_pm
94 * cpu_pm_enter - CPU low power entry notifier
102 * co-processor, interrupt controller and its PM extensions, local CPU
103 * timers context save/restore which shouldn't be interrupted. Hence it
115 * cpu_pm_exit - CPU low power exit notifier
120 * Notified drivers can include VFP co-processor, interrupt controller
121 * and its PM extensions, local CPU timers context save/restore which
133 * cpu_cluster_pm_enter - CPU cluster low power entry notifier
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/kernel/linux/linux-5.10/kernel/
Dcpu_pm.c1 // SPDX-License-Identifier: GPL-2.0-only
62 * cpu_pm_register_notifier - register a driver with cpu_pm
83 * cpu_pm_unregister_notifier - unregister a driver with cpu_pm
103 * cpu_pm_enter - CPU low power entry notifier
111 * co-processor, interrupt controller and its PM extensions, local CPU
112 * timers context save/restore which shouldn't be interrupted. Hence it
124 * cpu_pm_exit - CPU low power exit notifier
129 * Notified drivers can include VFP co-processor, interrupt controller
130 * and its PM extensions, local CPU timers context save/restore which
142 * cpu_cluster_pm_enter - CPU cluster low power entry notifier
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/kernel/linux/linux-5.10/net/mac80211/
Dpm.c1 // SPDX-License-Identifier: GPL-2.0
7 #include "driver-ops.h"
10 static void ieee80211_sched_scan_cancel(struct ieee80211_local *local) in ieee80211_sched_scan_cancel() argument
12 if (ieee80211_request_sched_scan_stop(local)) in ieee80211_sched_scan_cancel()
14 cfg80211_sched_scan_stopped_rtnl(local->hw.wiphy, 0); in ieee80211_sched_scan_cancel()
19 struct ieee80211_local *local = hw_to_local(hw); in __ieee80211_suspend() local
23 if (!local->open_count) in __ieee80211_suspend()
26 ieee80211_scan_cancel(local); in __ieee80211_suspend()
28 ieee80211_dfs_cac_cancel(local); in __ieee80211_suspend()
30 ieee80211_roc_purge(local, NULL); in __ieee80211_suspend()
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/kernel/linux/linux-6.6/net/mac80211/
Dpm.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2020-2021 Intel Corporation
11 #include "driver-ops.h"
14 static void ieee80211_sched_scan_cancel(struct ieee80211_local *local) in ieee80211_sched_scan_cancel() argument
16 if (ieee80211_request_sched_scan_stop(local)) in ieee80211_sched_scan_cancel()
18 cfg80211_sched_scan_stopped_locked(local->hw.wiphy, 0); in ieee80211_sched_scan_cancel()
23 struct ieee80211_local *local = hw_to_local(hw); in __ieee80211_suspend() local
27 if (!local->open_count) in __ieee80211_suspend()
30 local->suspending = true; in __ieee80211_suspend()
33 ieee80211_scan_cancel(local); in __ieee80211_suspend()
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/kernel/linux/linux-5.10/arch/x86/platform/intel-mid/
Dintel-mid.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * intel-mid.c: Intel MID platform setup code
27 #include <asm/intel-mid.h>
41 * 2. per cpu always-on lapic clocks only, this is Penwell/Medfield only
51 * lapic (with C3STOP) --------- 100
52 * apbt (always-on) ------------ 110
53 * lapic (always-on,ARAT) ------ 150
89 /* Use apbt and local apic */ in intel_mid_time_init()
90 x86_init.timers.setup_percpu_clockev = intel_mid_setup_bp_timer; in intel_mid_time_init()
97 x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock; in intel_mid_time_init()
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/kernel/linux/linux-6.6/drivers/clocksource/
Dbcm_kona_timer.c1 // SPDX-License-Identifier: GPL-2.0
32 static struct kona_bcm_timers timers; variable
37 * We use the peripheral timers for system tick, the cpu global timer for
65 * Read 64-bit free running counter in kona_timer_get_counter()
66 * 1. Read hi-word in kona_timer_get_counter()
67 * 2. Read low-word in kona_timer_get_counter()
68 * 3. Read hi-word again in kona_timer_get_counter()
70 * if new hi-word is not equal to previously read hi-word, then in kona_timer_get_counter()
73 * if new hi-word is equal to previously read hi-word then stop. in kona_timer_get_counter()
81 } while (--loop_limit); in kona_timer_get_counter()
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Dexynos_mct.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* linux/arch/arm/mach-exynos4/mct.c
7 * Exynos4 MCT(Multi-Core Timer) support
63 /* There are four Global timers starting with 0 offset */
65 /* Local timers count starts after global timer count */
69 /* Max number of local timers */
70 #define MCT_NR_LOCAL (MCT_NR_IRQS - MCT_L0_IRQ)
87 * local timer interrupts grow over two digits
167 * exynos4_read_count_64 - Read all 64-bits of the global counter
169 * This will read all 64-bits of the global counter taking care to make sure
[all …]
Darm_arch_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #include <linux/arm-smccc.h>
77 [ARCH_TIMER_PHYS_SECURE_PPI] = "sec-phys",
80 [ARCH_TIMER_HYP_PPI] = "hyp-phys",
81 [ARCH_TIMER_HYP_VIRT_PPI] = "hyp-virt",
109 * 2) a roll-over time of not less than 40 years
118 return clamp_val(ilog2(min_cycles - 1) + 1, 56, 64); in arch_counter_get_width()
133 writel_relaxed((u32)val, timer->base + CNTP_CTL); in arch_timer_reg_write()
140 writeq_relaxed(val, timer->base + CNTP_CVAL_LO); in arch_timer_reg_write()
149 writel_relaxed((u32)val, timer->base + CNTV_CTL); in arch_timer_reg_write()
[all …]
/kernel/linux/linux-5.10/drivers/clocksource/
Dbcm_kona_timer.c42 static struct kona_bcm_timers timers; variable
47 * We use the peripheral timers for system tick, the cpu global timer for
75 * Read 64-bit free running counter in kona_timer_get_counter()
76 * 1. Read hi-word in kona_timer_get_counter()
77 * 2. Read low-word in kona_timer_get_counter()
78 * 3. Read hi-word again in kona_timer_get_counter()
80 * if new hi-word is not equal to previously read hi-word, then in kona_timer_get_counter()
83 * if new hi-word is equal to previously read hi-word then stop. in kona_timer_get_counter()
91 } while (--loop_limit); in kona_timer_get_counter()
95 return -ETIMEDOUT; in kona_timer_get_counter()
[all …]
Darm_arch_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
99 writel_relaxed(val, timer->base + CNTP_CTL); in arch_timer_reg_write()
102 writel_relaxed(val, timer->base + CNTP_TVAL); in arch_timer_reg_write()
109 writel_relaxed(val, timer->base + CNTV_CTL); in arch_timer_reg_write()
112 writel_relaxed(val, timer->base + CNTV_TVAL); in arch_timer_reg_write()
130 val = readl_relaxed(timer->base + CNTP_CTL); in arch_timer_reg_read()
133 val = readl_relaxed(timer->base + CNTP_TVAL); in arch_timer_reg_read()
140 val = readl_relaxed(timer->base + CNTV_CTL); in arch_timer_reg_read()
143 val = readl_relaxed(timer->base + CNTV_TVAL); in arch_timer_reg_read()
223 _retries--; \
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dmti,gic.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mti,gic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Burton <paulburton@kernel.org>
11 - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
15 It also supports local (per-processor) interrupts and software-generated
16 interrupts which can be used as IPIs. The GIC also includes a free-running
17 global timer, per-CPU count/compare timers, and a watchdog.
23 "#interrupt-cells":
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dmti,gic.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mti,gic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Burton <paulburton@kernel.org>
11 - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
15 It also supports local (per-processor) interrupts and software-generated
16 interrupts which can be used as IPIs. The GIC also includes a free-running
17 global timer, per-CPU count/compare timers, and a watchdog.
23 "#interrupt-cells":
[all …]
/kernel/linux/linux-5.10/arch/x86/kernel/
Dapb_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * apb_timer.c: Driver for Langwell APB timers
10 * eight external timers in total that can be used by the operating system.
15 * Unlike HPET, there is no master counter, therefore one of the timers are
17 * - timer 0 - NR_CPUs for per cpu timer
18 * - one timer for clocksource
19 * - one timer for watchdog driver.
20 * It is also worth notice that APB timer does not support true one-shot mode,
21 * free-running mode will be used here to emulate one-shot mode.
22 * APB timer can also be used as broadcast timer along with per cpu local APIC
[all …]
Di8253.c1 // SPDX-License-Identifier: GPL-2.0
18 * the two timers is used
28 * requires to know the local APIC timer frequency as it normally is
56 * - On SMP PIT does not scale due to i8253_lock in init_pit_clocksource()
57 * - when HPET is enabled in init_pit_clocksource()
58 * - when local APIC timer is active (PIT is switched off) in init_pit_clocksource()
/kernel/linux/linux-6.6/include/linux/usb/
Dotg-fsm.h1 // SPDX-License-Identifier: GPL-2.0+
18 * Table:6-4
23 * Table:6-5
29 /* Standard OTG timers */
38 /* Auxiliary timers */
49 * struct otg_fsm - OTG state machine according to the OTG spec
54 * @id: TRUE for B-device, FALSE for A-device.
56 * ADP measurement taken at n-2, differs by more than CADP_THR
60 * A-Device state inputs
61 * @a_srp_det: TRUE if the A-device detects SRP
[all …]
/kernel/linux/linux-5.10/include/linux/usb/
Dotg-fsm.h1 // SPDX-License-Identifier: GPL-2.0+
31 * Table:6-4
36 * Table:6-5
42 /* Standard OTG timers */
51 /* Auxiliary timers */
62 * struct otg_fsm - OTG state machine according to the OTG spec
67 * @id: TRUE for B-device, FALSE for A-device.
69 * ADP measurement taken at n-2, differs by more than CADP_THR
73 * A-Device state inputs
74 * @a_srp_det: TRUE if the A-device detects SRP
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/kernel/linux/linux-5.10/Documentation/virt/kvm/
Dtimekeeping.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Timekeeping Virtualization for X86-Based Architectures
32 information relevant to KVM and hardware-based virtualization.
41 2.1. i8254 - PIT
42 ----------------
46 channels which can be programmed to deliver periodic or one-shot interrupts.
53 The PIT uses I/O ports 0x40 - 0x43. Access to the 16-bit counters is done
55 available, but not all modes are available to all timers, as only timer 2
59 -------------- ----------------
61 | 1.1932 MHz|---------->| CLOCK OUT | ---------> IRQ 0
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/kernel/linux/linux-6.6/Documentation/virt/kvm/x86/
Dtimekeeping.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Timekeeping Virtualization for X86-Based Architectures
32 information relevant to KVM and hardware-based virtualization.
41 2.1. i8254 - PIT
42 ----------------
46 channels which can be programmed to deliver periodic or one-shot interrupts.
53 The PIT uses I/O ports 0x40 - 0x43. Access to the 16-bit counters is done
55 available, but not all modes are available to all timers, as only timer 2
59 -------------- ----------------
61 | 1.1932 MHz|---------->| CLOCK OUT | ---------> IRQ 0
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