| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | qcom,sc8280xp-lpasscc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sc8280xp-lpasscc.yaml#
17 include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h
23 - qcom,sc8280xp-lpasscc
44 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
53 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
54 lpasscc: clock-controller@33e0000 {
55 compatible = "qcom,sc8280xp-lpasscc";
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| D | qcom,sdm845-lpasscc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-lpasscc.yaml#
19 const: qcom,sdm845-lpasscc
43 compatible = "qcom,sdm845-lpasscc";
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| D | qcom,sc7280-lpasscc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#
21 - qcom,sc7280-lpasscc
64 compatible = "qcom,sc7280-lpasscc";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,sdm845-adsp-pil.yaml | 137 <&lpasscc LPASS_Q6SS_AHBS_AON_CLK>,
138 <&lpasscc LPASS_Q6SS_AHBM_AON_CLK>,
139 <&lpasscc LPASS_QDSP6SS_XO_CLK>,
140 <&lpasscc LPASS_QDSP6SS_SLEEP_CLK>,
141 <&lpasscc LPASS_QDSP6SS_CORE_CLK>;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,hexagon-v56.txt | 118 <&lpasscc LPASS_Q6SS_AHBS_AON_CLK>,
119 <&lpasscc LPASS_Q6SS_AHBM_AON_CLK>,
120 <&lpasscc LPASS_QDSP6SS_XO_CLK>,
121 <&lpasscc LPASS_QDSP6SS_SLEEP_CLK>,
122 <&lpasscc LPASS_QDSP6SS_CORE_CLK>;
|
| /kernel/linux/linux-6.6/drivers/clk/qcom/ |
| D | lpasscc-sc8280xp.c | 15 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
63 .compatible = "qcom,sc8280xp-lpasscc",
80 .name = "lpasscc-sc8280xp",
88 MODULE_DESCRIPTION("QTI LPASSCC SC8280XP Driver");
|
| D | lpasscc-sdm845.c | 135 { .compatible = "qcom,sdm845-lpasscc" },
143 .name = "sdm845-lpasscc",
|
| D | Makefile | 83 obj-$(CONFIG_SC_LPASSCC_7280) += lpasscc-sc7280.o
84 obj-$(CONFIG_SC_LPASSCC_8280XP) += lpasscc-sc8280xp.o
97 obj-$(CONFIG_SDM_LPASSCC_845) += lpasscc-sdm845.o
|
| D | lpasscc-sc7280.c | 159 { .compatible = "qcom,sc7280-lpasscc" },
167 .name = "sc7280-lpasscc",
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | qcom,lpasscc.txt | 5 - compatible : shall contain "qcom,sdm845-lpasscc"
21 lpasscc: clock-controller@17014000 {
22 compatible = "qcom,sdm845-lpasscc";
|
| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| D | lpasscc-sdm845.c | 134 { .compatible = "qcom,sdm845-lpasscc" },
142 .name = "sdm845-lpasscc",
|
| D | Makefile | 65 obj-$(CONFIG_SDM_LPASSCC_845) += lpasscc-sdm845.o
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/ |
| D | sc7280-chrome-common.dtsi | 61 &lpasscc {
|
| D | sc7180.dtsi | 3761 lpasscc: clock-controller@62d00000 { label
3792 <&lpasscc LPASS_AUDIO_CORE_CORE_CLK>,
3793 <&lpasscc LPASS_AUDIO_CORE_EXT_MCLK0_CLK>,
3794 <&lpasscc LPASS_AUDIO_CORE_SYSNOC_MPORT_CORE_CLK>,
3795 <&lpasscc LPASS_AUDIO_CORE_LPAIF_PRI_IBIT_CLK>,
3796 <&lpasscc LPASS_AUDIO_CORE_LPAIF_SEC_IBIT_CLK>;
|
| D | sdm845-cheza.dtsi | 757 &lpasscc {
|
| D | sc8280xp.dtsi | 11 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
2866 resets = <&lpasscc LPASS_AUDIO_SWR_TX_CGCR>;
3061 lpasscc: clock-controller@33e0000 { label
3062 compatible = "qcom,sc8280xp-lpasscc";
|
| D | sc7180-trogdor.dtsi | 775 &lpasscc {
|
| D | sc7280.dtsi | 2260 lpasscc: lpasscc@3000000 { label
2261 compatible = "qcom,sc7280-lpasscc";
|
| D | sdm845.dtsi | 5079 lpasscc: clock-controller@17014000 { label
5080 compatible = "qcom,sdm845-lpasscc";
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | sdm845-cheza.dtsi | 624 &lpasscc {
|
| D | sdm845.dtsi | 4363 lpasscc: clock-controller@17014000 { label
4364 compatible = "qcom,sdm845-lpasscc";
|
| D | sc7180.dtsi | 3380 lpasscc: clock-controller@62d00000 { label
|