| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/ipmi/ |
| D | aspeed,ast2400-kcs-bmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
13 The Aspeed BMC SoCs typically use the Keyboard-Controller-Style (KCS)
14 interfaces on the LPC bus for in-band IPMI communication with their host.
19 - description: Channel ID derived from reg
22 - aspeed,ast2400-kcs-bmc-v2
23 - aspeed,ast2500-kcs-bmc-v2
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/ |
| D | 8250.yaml | 3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: serial.yaml#
14 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
15 - if:
17 - required:
18 - aspeed,lpc-io-reg
19 - required:
20 - aspeed,lpc-interrupts
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ipmi/ |
| D | aspeed-kcs-bmc.txt | 5 used to perform in-band IPMI communication with their host.
9 - compatible : should be one of
10 "aspeed,ast2400-kcs-bmc"
11 "aspeed,ast2500-kcs-bmc"
12 - interrupts : interrupt generated by the controller
13 - kcs_chan : The LPC channel number in the controller
14 - kcs_addr : The host CPU IO map address
18 - compatible : should be one of
19 "aspeed,ast2400-kcs-bmc-v2"
20 "aspeed,ast2500-kcs-bmc-v2"
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/ |
| D | aspeed-bmc-amd-ethanolx.dts | 1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
15 reg = <0x80000000 0x20000000>;
18 reserved-memory {
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
|
| D | aspeed-bmc-tyan-s8036.dts | 1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s8036-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
19 reg = <0x80000000 0x20000000>;
22 reserved-memory {
23 #address-cells = <1>;
[all …]
|
| D | aspeed-bmc-asrock-romed8hm3.dts | 1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "asrock,romed8hm3-bmc", "aspeed,ast2500";
17 stdout-path = &uart5;
22 reg = <0x80000000 0x20000000>;
26 compatible = "gpio-leds";
30 linux,default-trigger = "timer";
[all …]
|
| D | aspeed-bmc-asrock-e3c246d4i.dts | 1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "asrock,e3c246d4i-bmc", "aspeed,ast2500";
18 stdout-path = &uart5;
23 reg = <0x80000000 0x20000000>;
27 compatible = "gpio-leds";
[all …]
|
| D | aspeed-bmc-amd-daytonax.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "amd,daytonax-bmc", "aspeed,ast2500";
13 reg = <0x80000000 0x20000000>;
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
[all …]
|
| D | aspeed-g6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
[all …]
|
| D | aspeed-bmc-tyan-s7106.dts | 1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s7106-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
19 reg = <0x80000000 0x20000000>;
22 reserved-memory {
23 #address-cells = <1>;
[all …]
|
| D | aspeed-bmc-ibm-bonnell.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,bonnell-bmc", "aspeed,ast2600";
23 stdout-path = &uart5;
29 reg = <0x80000000 0x40000000>;
32 reserved-memory {
[all …]
|
| D | aspeed-bmc-facebook-elbert.dts | 1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "ast2600-facebook-netbmc-common.dtsi"
10 compatible = "facebook,elbert-bmc", "aspeed,ast2600";
19 * 8 child channels of PCA9548 2-0075.
31 * 8 child channels of PCA9548 5-0075.
44 stdout-path = &uart5;
48 num-chipselects = <1>;
49 cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
59 aspeed,lpc-io-reg = <0xca8>;
[all …]
|
| D | aspeed-bmc-vegman.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
13 stdout-path = &uart5;
18 reg = <0x80000000 0x20000000>;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
29 compatible = "shared-dma-pool";
35 reg = <0x9eff0000 0x10000>;
[all …]
|
| D | aspeed-bmc-opp-tacoma.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
15 stdout-path = &uart5;
21 reg = <0x80000000 0x40000000>;
24 reserved-memory {
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | aspeed-lpc.txt | 2 Device tree bindings for the Aspeed Low Pin Count (LPC) Bus Controller
5 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
7 primary use case of the Aspeed LPC controller is as a slave on the bus
11 The LPC controller is represented as a multi-function device to account for the
14 "basically compatible with the [LPC registers from the] popular BMC controller
22 * An LPC Host Controller: Manages LPC functions such as host vs slave mode, the
23 physical properties of some LPC pins, configuration of serial IRQs, and
24 APB-to-LPC bridging amonst other functions.
26 * An LPC Host Interface Controller: Manages functions exposed to the host such
27 as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
[all …]
|
| /kernel/linux/linux-6.6/drivers/char/ipmi/ |
| D | kcs_bmc_aspeed.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2018, Intel Corporation.
6 #define pr_fmt(fmt) "aspeed-kcs-bmc: " fmt
11 #include <linux/io.h>
27 #define DEVICE_NAME "ast-kcs-bmc"
34 * LPCyE Enable LPC channel y
35 * IBFIEy Input Buffer Full IRQ Enable for LPC channel y
36 * IRQxEy Assert SerIRQ x for LPC channel y (Deprecated, use IDyIRQX, IRQXEy)
37 * IDyIRQX Use the specified 4-bit SerIRQ for LPC channel y
38 * SELyIRQX SerIRQ polarity for LPC channel y (low: 0, high: 1)
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | aspeed-g6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
43 #address-cells = <1>;
44 #size-cells = <0>;
45 enable-method = "aspeed,ast2600-smp";
[all …]
|
| D | aspeed-g5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
42 reg = <0>;
[all …]
|
| D | aspeed-g4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&vic>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "arm,arm926ej-s";
41 reg = <0>;
47 reg = <0x40000000 0>;
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | aspeed,ast2500-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-or-later
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
16 - compatible: Should be one of the following:
17 "aspeed,ast2500-scu", "syscon", "simple-mfd"
18 "aspeed,g5-scu", "syscon", "simple-mfd"
25 const: aspeed,ast2500-pinctrl
26 reg:
[all …]
|
| /kernel/linux/linux-6.6/drivers/tty/serial/8250/ |
| D | 8250_aspeed_vuart.c | 1 // SPDX-License-Identifier: GPL-2.0+
61 * at what IO port and interrupt number the host side will appear
62 * to the host on the Host <-> BMC LPC bus. It could be different on a
66 static inline u8 aspeed_vuart_readb(struct aspeed_vuart *vuart, u8 reg) in aspeed_vuart_readb() argument
68 return readb(vuart->port->port.membase + reg); in aspeed_vuart_readb()
71 static inline void aspeed_vuart_writeb(struct aspeed_vuart *vuart, u8 val, u8 reg) in aspeed_vuart_writeb() argument
73 writeb(val, vuart->port->port.membase + reg); in aspeed_vuart_writeb()
91 return -EINVAL; in aspeed_vuart_set_lpc_address()
121 u8 reg; in sirq_show() local
123 reg = aspeed_vuart_readb(vuart, ASPEED_VUART_GCRB); in sirq_show()
[all …]
|
| /kernel/linux/linux-6.6/drivers/reset/ |
| D | reset-simple.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
17 #include <linux/io.h>
20 #include <linux/reset-controller.h>
21 #include <linux/reset/reset-simple.h>
38 u32 reg; in reset_simple_update() local
40 spin_lock_irqsave(&data->lock, flags); in reset_simple_update()
42 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
43 if (assert ^ data->active_low) in reset_simple_update()
44 reg |= BIT(offset); in reset_simple_update()
[all …]
|
| /kernel/linux/linux-5.10/drivers/char/ipmi/ |
| D | kcs_bmc_aspeed.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2018, Intel Corporation.
6 #define pr_fmt(fmt) "aspeed-kcs-bmc: " fmt
11 #include <linux/io.h>
26 #define DEVICE_NAME "ast-kcs-bmc"
30 /* mapped to lpc-bmc@0 IO space */
56 /* mapped to lpc-host@80 IO space */
70 static u8 aspeed_kcs_inb(struct kcs_bmc *kcs_bmc, u32 reg) in aspeed_kcs_inb() argument
76 rc = regmap_read(priv->map, reg, &val); in aspeed_kcs_inb()
82 static void aspeed_kcs_outb(struct kcs_bmc *kcs_bmc, u32 reg, u8 data) in aspeed_kcs_outb() argument
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/gma500/ |
| D | oaktrail_lvds_i2c.c | 2 * Copyright (c) 2002-2010, Intel Corporation.
27 #include <linux/i2c-algo-bit.h>
30 #include <linux/io.h>
41 * LPC GPIO based I2C bus for LVDS of Atom E6xx
44 /*-----------------------------------------------------------------------------
45 * LPC Register Offsets. Used for LVDS GPIO Bit Bashing. Registers are part
47 ----------------------------------------------------------------------------*/
63 #define LPC_READ_REG(chan, r) inl((chan)->reg + (r))
64 #define LPC_WRITE_REG(chan, r, val) outl((val), (chan)->reg + (r))
134 struct drm_device *dev = encoder->dev; in oaktrail_lvds_i2c_init()
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/gma500/ |
| D | oaktrail_lvds_i2c.c | 2 * Copyright (c) 2002-2010, Intel Corporation.
27 #include <linux/i2c-algo-bit.h>
30 #include <linux/io.h>
41 * LPC GPIO based I2C bus for LVDS of Atom E6xx
44 /*-----------------------------------------------------------------------------
45 * LPC Register Offsets. Used for LVDS GPIO Bit Bashing. Registers are part
47 ----------------------------------------------------------------------------*/
63 #define LPC_READ_REG(chan, r) inl((chan)->reg + (r))
64 #define LPC_WRITE_REG(chan, r, val) outl((val), (chan)->reg + (r))
140 return ERR_PTR(-ENOMEM); in oaktrail_lvds_i2c_init()
[all …]
|