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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/
Ddsi-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for DSI Display Panels
10 - Linus Walleij <linus.walleij@linaro.org>
13 This document defines device tree properties common to DSI, Display
22 Notice: this binding concerns DSI panels connected directly to a master
23 without any intermediate port graph to the panel. Each DSI master
26 reg-property set to the virtual channel number, usually there is just
[all …]
Dmipi-dsi-bus.txt1 MIPI DSI (Display Serial Interface) busses
6 define the syntax used to represent a DSI bus in a device tree.
8 This document describes DSI bus-specific properties only or defines existing
9 standard properties in the context of the DSI bus.
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
15 The following assumes that only a single peripheral is connected to a DSI
18 DSI host
22 a DSI host, the following properties apply to a node representing a DSI host.
25 - #address-cells: The number of cells required to represent an address on the
26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
[all …]
Dtruly,nt35597.txt1 Truly model NT35597 DSI display driver
7 - compatible: should be "truly,nt35597-2K-display"
8 - vdda-supply: phandle of the regulator that provides the supply voltage
10 - vdispp-supply: phandle of the regulator that provides the supply voltage
12 - vdispn-supply: phandle of the regulator that provides the supply voltage
14 - reset-gpios: phandle of gpio for reset line
15 This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names
17 - mode-gpios: phandle of the gpio for choosing the mode of the display
18 for single DSI or Dual DSI
19 This should be low for dual DSI and high for single DSI mode
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/
Ddsi-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for DSI Display Panels
10 - Linus Walleij <linus.walleij@linaro.org>
13 This document defines device tree properties common to DSI, Display
22 Notice: this binding concerns DSI panels connected directly to a master
23 without any intermediate port graph to the panel. Each DSI master
26 reg-property set to the virtual channel number, usually there is just
[all …]
Dmipi-dsi-bus.txt1 MIPI DSI (Display Serial Interface) busses
6 define the syntax used to represent a DSI bus in a device tree.
8 This document describes DSI bus-specific properties only or defines existing
9 standard properties in the context of the DSI bus.
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
15 The following assumes that only a single peripheral is connected to a DSI
18 DSI host
22 a DSI host, the following properties apply to a node representing a DSI host.
25 - #address-cells: The number of cells required to represent an address on the
26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
[all …]
Dtruly,nt35597.txt1 Truly model NT35597 DSI display driver
7 - compatible: should be "truly,nt35597-2K-display"
8 - vdda-supply: phandle of the regulator that provides the supply voltage
10 - vdispp-supply: phandle of the regulator that provides the supply voltage
12 - vdispn-supply: phandle of the regulator that provides the supply voltage
14 - reset-gpios: phandle of gpio for reset line
15 This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names
17 - mode-gpios: phandle of the gpio for choosing the mode of the display
18 for single DSI or Dual DSI
19 This should be low for dual DSI and high for single DSI mode
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/exynos/
Dexynos_drm_dsi.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <drm/bridge/samsung-dsim.h>
27 struct exynos_dsi *dsi = dsim->priv; in exynos_dsi_te_irq_handler() local
28 struct drm_encoder *encoder = &dsi->encoder; in exynos_dsi_te_irq_handler()
30 if (dsim->state & DSIM_STATE_VIDOUT_AVAILABLE) in exynos_dsi_te_irq_handler()
31 exynos_drm_crtc_te_handler(encoder->crtc); in exynos_dsi_te_irq_handler()
39 struct exynos_dsi *dsi = dsim->priv; in exynos_dsi_host_attach() local
40 struct drm_encoder *encoder = &dsi->encoder; in exynos_dsi_host_attach()
41 struct drm_device *drm = encoder->dev; in exynos_dsi_host_attach()
43 drm_bridge_attach(encoder, &dsim->bridge, in exynos_dsi_host_attach()
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/kernel/linux/linux-6.6/drivers/gpu/drm/msm/dsi/
Ddsi_manager.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "dsi.h"
18 * DSI_1 as master encoder
24 struct msm_dsi *dsi[DSI_MAX]; member
39 return msm_dsim_glb.dsi[id]; in dsi_mgr_get_dsi()
44 return msm_dsim_glb.dsi[(id + 1) % DSI_MAX]; in dsi_mgr_get_other_dsi()
51 /* We assume 2 dsi nodes have the same information of bonded dsi and in dsi_mgr_parse_of()
52 * sync-mode, and only one node specifies master in case of bonded mode. in dsi_mgr_parse_of()
54 if (!msm_dsim->is_bonded_dsi) in dsi_mgr_parse_of()
55 msm_dsim->is_bonded_dsi = of_property_read_bool(np, "qcom,dual-dsi-mode"); in dsi_mgr_parse_of()
[all …]
Ddsi.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "dsi.h"
10 unsigned long host_flags = msm_dsi_host_get_mode_flags(msm_dsi->host); in msm_dsi_is_cmd_mode()
17 return msm_dsi_host_get_dsc_config(msm_dsi->host); in msm_dsi_get_dsc_config()
22 struct platform_device *pdev = msm_dsi->pdev; in dsi_get_phy()
26 phy_node = of_parse_phandle(pdev->dev.of_node, "phys", 0); in dsi_get_phy()
28 DRM_DEV_ERROR(&pdev->dev, "cannot find phy device\n"); in dsi_get_phy()
29 return -ENXIO; in dsi_get_phy()
34 msm_dsi->phy = platform_get_drvdata(phy_pdev); in dsi_get_phy()
35 msm_dsi->phy_dev = &phy_pdev->dev; in dsi_get_phy()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/bridge/synopsys/
Ddw-mipi-dsi.c1 // SPDX-License-Identifier: GPL-2.0+
7 * This generic Synopsys DesignWare MIPI DSI host driver is based on the
8 * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
193 #define N_LANES(n) (((n) - 1) & 0x3)
226 #define VPG_DEFS(name, dsi) \ argument
227 ((void __force *)&((*dsi).vpg_defs.name))
229 #define REGISTER(name, mask, dsi) \ argument
230 { #name, VPG_DEFS(name, dsi), mask, dsi }
236 struct dw_mipi_dsi *dsi; member
265 struct dw_mipi_dsi *master; /* dual-dsi master ptr */ member
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/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/synopsys/
Ddw-mipi-dsi.c1 // SPDX-License-Identifier: GPL-2.0+
7 * This generic Synopsys DesignWare MIPI DSI host driver is based on the
8 * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
193 #define N_LANES(n) (((n) - 1) & 0x3)
226 #define VPG_DEFS(name, dsi) \ argument
227 ((void __force *)&((*dsi).vpg_defs.name))
229 #define REGISTER(name, mask, dsi) \ argument
230 { #name, VPG_DEFS(name, dsi), mask, dsi }
236 struct dw_mipi_dsi *dsi; member
265 struct dw_mipi_dsi *master; /* dual-dsi master ptr */ member
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/
Ddsi_manager.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include "dsi.h"
16 * DSI_1 as master encoder
22 struct msm_dsi *dsi[DSI_MAX]; member
37 return msm_dsim_glb.dsi[id]; in dsi_mgr_get_dsi()
42 return msm_dsim_glb.dsi[(id + 1) % DSI_MAX]; in dsi_mgr_get_other_dsi()
49 /* We assume 2 dsi nodes have the same information of dual-dsi and in dsi_mgr_parse_dual_dsi()
50 * sync-mode, and only one node specifies master in case of dual mode. in dsi_mgr_parse_dual_dsi()
52 if (!msm_dsim->is_dual_dsi) in dsi_mgr_parse_dual_dsi()
53 msm_dsim->is_dual_dsi = of_property_read_bool( in dsi_mgr_parse_dual_dsi()
[all …]
Ddsi.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "dsi.h"
13 return msm_dsi->encoder; in msm_dsi_get_encoder()
18 struct platform_device *pdev = msm_dsi->pdev; in dsi_get_phy()
22 phy_node = of_parse_phandle(pdev->dev.of_node, "phys", 0); in dsi_get_phy()
24 DRM_DEV_ERROR(&pdev->dev, "cannot find phy device\n"); in dsi_get_phy()
25 return -ENXIO; in dsi_get_phy()
30 msm_dsi->phy = platform_get_drvdata(phy_pdev); in dsi_get_phy()
31 msm_dsi->phy_dev = &phy_pdev->dev; in dsi_get_phy()
37 DRM_DEV_ERROR(&pdev->dev, "%s: phy driver is not ready\n", __func__); in dsi_get_phy()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/
Ddsi.txt1 Qualcomm Technologies Inc. adreno/snapdragon DSI output
3 DSI Controller:
5 - compatible:
6 * "qcom,mdss-dsi-ctrl"
7 - reg: Physical base address and length of the registers of controller
8 - reg-names: The names of register regions. The following regions are required:
10 - interrupts: The interrupt signal from the DSI block.
11 - power-domains: Should be <&mmcc MDSS_GDSC>.
12 - clocks: Phandles to device clocks.
13 - clock-names: the following clocks are required:
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/tegra/
Ddsi.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "dsi.h"
30 #include "mipi-phy.h"
81 /* for ganged-mode support */
82 struct tegra_dsi *master; member
102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/tegra/
Ddsi.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "dsi.h"
30 #include "mipi-phy.h"
81 /* for ganged-mode support */
82 struct tegra_dsi *master; member
102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/
Ddrm_of.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/media-bus-format.h>
25 * drm_of_crtc_port_mask - find the mask of a registered CRTC by port OF node
39 if (tmp->port == port) in drm_of_crtc_port_mask()
50 * drm_of_find_possible_crtcs - find the possible CRTCs for an encoder port
83 * drm_of_component_match_add - Add a component helper OF node match rule
84 * @master: master device
89 void drm_of_component_match_add(struct device *master, in drm_of_component_match_add() argument
95 component_match_add_release(master, matchptr, component_release_of, in drm_of_component_match_add()
101 * drm_of_component_probe - Generic probe function for a component based master
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/rockchip/
Ddw-mipi-dsi-rockchip.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Chris Zhong <zyw@rock-chips.com>
6 * Nickey Yang <nickey.yang@rock-chips.com>
41 #define N_LANES(n) ((((n) - 1) & 0x3) << 0)
93 #define INPUT_DIVIDER(val) (((val) - 1) & 0x7f)
96 #define LOOP_DIV_LOW_SEL(val) (((val) - 1) & 0x1f)
97 #define LOOP_DIV_HIGH_SEL(val) ((((val) - 1) >> 5) & 0xf)
264 /* dual-channel */
355 return -EINVAL; in max_mbps_to_parameter()
358 static inline void dsi_write(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 val) in dsi_write() argument
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/
DNOTES5 + MDP3 - ?? seems to be what is on geeksphone peak device
6 + MDP4 - S3 (APQ8060, touchpad), S4-pro (APQ8064, nexus4 & ifc6410)
7 + MDP5 - snapdragon 800
12 Plus a handful of blocks around them for HDMI/DSI/etc output.
18 But, HDMI/DSI/etc blocks seem like they can be shared across multiple
20 with N different kms devices from xf86-video-freedreno. Plus, it
27 And one or more 'struct msm_gpu' for the various different gpu sub-
38 plane -> PIPE{RGBn,VGn} \
39 crtc -> OVLP{n} + DMA{P,S,E} (??) |-> MDP "device"
40 encoder -> DTV/LCDC/DSI (within MDP4) /
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/
DNOTES5 + MDP3 - ?? seems to be what is on geeksphone peak device
6 + MDP4 - S3 (APQ8060, touchpad), S4-pro (APQ8064, nexus4 & ifc6410)
7 + MDP5 - snapdragon 800
12 Plus a handful of blocks around them for HDMI/DSI/etc output.
18 But, HDMI/DSI/etc blocks seem like they can be shared across multiple
20 with N different kms devices from xf86-video-freedreno. Plus, it
27 And one or more 'struct msm_gpu' for the various different gpu sub-
38 plane -> PIPE{RGBn,VGn} \
39 crtc -> OVLP{n} + DMA{P,S,E} (??) |-> MDP "device"
40 encoder -> DTV/LCDC/DSI (within MDP4) /
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/rockchip/
Ddw-mipi-dsi-rockchip.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Chris Zhong <zyw@rock-chips.com>
6 * Nickey Yang <nickey.yang@rock-chips.com>
40 #define N_LANES(n) ((((n) - 1) & 0x3) << 0)
92 #define INPUT_DIVIDER(val) (((val) - 1) & 0x7f)
95 #define LOOP_DIV_LOW_SEL(val) (((val) - 1) & 0x1f)
96 #define LOOP_DIV_HIGH_SEL(val) ((((val) - 1) >> 5) & 0xf)
230 /* dual-channel */
306 return -EINVAL; in max_mbps_to_parameter()
309 static inline void dsi_write(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 val) in dsi_write() argument
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/msm/
Ddsi-controller-main.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI controller
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
15 - items:
16 - enum:
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/sprd/
Dsprd,display-subsystem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/sprd/sprd,display-subsystem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Unisoc DRM master device
10 - Kevin Tang <kevin.tang@unisoc.com>
13 The Unisoc DRM master device is a virtual device needed to list all
23 dpu0 and dpu1 both binding to DSI for dual mipi-dsi display;
24 dpu0 binding to DSI for primary display, and dpu1 binding to DP for external display;
26 +-----------------------------------------+
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/exynos/
Dexynos_dsim.txt1 Exynos MIPI DSI Master
4 - compatible: value should be one of the following
5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
10 - reg: physical base address and length of the registers set for the device
11 - interrupts: should contain DSI interrupt
12 - clocks: list of clock specifiers, must contain an entry for each required
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/vc4/
Dvc4_dsi.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * BCM2835 contains two DSI modules, DSI0 and DSI1. DSI0 is a
10 * single-lane DSI controller, while DSI1 is a more modern 4-lane DSI
16 * This driver has been tested for DSI1 video-mode display only
21 #include <linux/clk-provider.h>
25 #include <linux/dma-mapping.h>
146 * of going to LP-STOP.
149 /* Transmit blanking packet only during vblank, instead of allowing LP-STOP. */
151 /* Transmit blanking packet only during HFP, instead of allowing LP-STOP. */
153 /* Transmit blanking packet only during HBP, instead of allowing LP-STOP. */
[all …]

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