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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dmarvell-nand.txt1 Marvell NAND Flash Controller (NFC)
4 - compatible: can be one of the following:
5 * "marvell,armada-8k-nand-controller"
6 * "marvell,armada370-nand-controller"
7 * "marvell,pxa3xx-nand-controller"
8 * "marvell,armada-8k-nand" (deprecated)
9 * "marvell,armada370-nand" (deprecated)
10 * "marvell,pxa3xx-nand" (deprecated)
13 - reg: NAND flash controller memory area.
14 - #address-cells: shall be set to 1. Encode the NAND CS.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Dmarvell,nand-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell NAND Flash Controller (NFC)
10 - Miquel Raynal <miquel.raynal@bootlin.com>
15 - items:
16 - const: marvell,armada-8k-nand-controller
17 - const: marvell,armada370-nand-controller
18 - enum:
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/
Darmada-395-gp.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 /dts-v1/;
11 #include "armada-395.dtsi"
15 compatible = "marvell,a395-gp", "marvell,armada395",
19 stdout-path = "serial0:115200n8";
31 internal-regs {
34 clock-frequency = <100000>;
62 clock-frequency = <200000000>;
63 broken-cd;
64 wp-inverted;
[all …]
Darmada-370-mirabox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include "armada-370.dtsi"
14 compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";
17 stdout-path = "serial0:115200n8";
30 internal-regs {
35 clock-frequency = <600000000>;
40 compatible = "gpio-leds";
[all …]
Darmada-398-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 /dts-v1/;
11 #include "armada-398.dtsi"
15 compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390";
18 stdout-path = "serial0:115200n8";
30 internal-regs {
32 pinctrl-0 = <&i2c0_pins>;
33 pinctrl-names = "default";
35 clock-frequency = <100000>;
[all …]
Darmada-390-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-88F6920)
11 /dts-v1/;
12 #include "armada-390.dtsi"
16 compatible = "marvell,a390-db", "marvell,armada390";
19 stdout-path = "serial0:115200n8";
31 internal-regs {
34 clock-frequency = <100000>;
81 pinctrl-0 = <&spi1_pins>;
82 pinctrl-names = "default";
[all …]
Darmada-370-dlink-dns327l.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for D-Link DNS-327L
12 /dts-v1/;
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include "armada-370.dtsi"
19 model = "D-Link DNS-327L";
22 "marvell,armada-370-xp";
25 stdout-path = &uart0;
38 internal-regs {
[all …]
Darmada-xp-db-xc3-24g4xg.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-XC3-24G4XG board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx3336.dtsi"
23 model = "DB-XC3-24G4XG";
24 compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp";
37 arm,parity-enable;
38 marvell,ecc-enable;
[all …]
Darmada-xp-db-dxbc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-DXBC2 board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx4251.dtsi"
24 compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp";
43 devbus,bus-width = <16>;
44 devbus,turn-off-ps = <60000>;
45 devbus,badr-skew-ps = <0>;
[all …]
Darmada-375-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-88F6720)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include "armada-375.dtsi"
18 compatible = "marvell,a375-db", "marvell,armada375";
21 stdout-path = "serial0:115200n8";
57 pinctrl-0 = <&spi0_pins>;
[all …]
Darmada-370-netgear-rn102.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-370.dtsi"
16 compatible = "netgear,readynas-102", "marvell,armada370", "marvell,armada-370-xp";
19 stdout-path = "serial0:115200n8";
32 internal-regs {
45 nr-ports = <1>;
50 pinctrl-0 = <&ge1_rgmii_pins>;
[all …]
Darmada-370-rd.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (RD-88F6710-A1)
6 * Copied from arch/arm/boot/dts/armada-370-db.dts
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
20 /dts-v1/;
21 #include <dt-bindings/input/input.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
23 #include <dt-bindings/leds/common.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "armada-370.dtsi"
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Darmada-395-gp.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 /dts-v1/;
11 #include "armada-395.dtsi"
15 compatible = "marvell,a395-gp", "marvell,armada395",
19 stdout-path = "serial0:115200n8";
31 internal-regs {
34 clock-frequency = <100000>;
62 clock-frequency = <200000000>;
63 broken-cd;
64 wp-inverted;
[all …]
Darmada-370-mirabox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include "armada-370.dtsi"
14 compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";
17 stdout-path = "serial0:115200n8";
30 internal-regs {
35 clock-frequency = <600000000>;
40 compatible = "gpio-leds";
[all …]
Darmada-398-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 /dts-v1/;
11 #include "armada-398.dtsi"
15 compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390";
18 stdout-path = "serial0:115200n8";
30 internal-regs {
32 pinctrl-0 = <&i2c0_pins>;
33 pinctrl-names = "default";
35 clock-frequency = <100000>;
[all …]
Darmada-390-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-88F6920)
11 /dts-v1/;
12 #include "armada-390.dtsi"
16 compatible = "marvell,a390-db", "marvell,armada390";
19 stdout-path = "serial0:115200n8";
31 internal-regs {
34 clock-frequency = <100000>;
81 pinctrl-0 = <&spi1_pins>;
82 pinctrl-names = "default";
[all …]
Darmada-370-dlink-dns327l.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for D-Link DNS-327L
12 /dts-v1/;
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include "armada-370.dtsi"
19 model = "D-Link DNS-327L";
22 "marvell,armada-370-xp";
25 stdout-path = &uart0;
38 internal-regs {
[all …]
Darmada-xp-db-xc3-24g4xg.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-XC3-24G4XG board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx3336.dtsi"
23 model = "DB-XC3-24G4XG";
24 compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp";
37 arm,parity-enable;
38 marvell,ecc-enable;
[all …]
Darmada-xp-db-dxbc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-DXBC2 board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx4251.dtsi"
24 compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp";
43 devbus,bus-width = <16>;
44 devbus,turn-off-ps = <60000>;
45 devbus,badr-skew-ps = <0>;
[all …]
Darmada-375-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-88F6720)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include "armada-375.dtsi"
18 compatible = "marvell,a375-db", "marvell,armada375";
21 stdout-path = "serial0:115200n8";
57 pinctrl-0 = <&spi0_pins>;
[all …]
Darmada-370-netgear-rn102.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-370.dtsi"
16 compatible = "netgear,readynas-102", "marvell,armada370", "marvell,armada-370-xp";
19 stdout-path = "serial0:115200n8";
32 internal-regs {
45 nr-ports = <1>;
50 pinctrl-0 = <&ge1_rgmii_pins>;
[all …]
Darmada-388-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-88F6820)
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 /dts-v1/;
12 #include "armada-388.dtsi"
16 compatible = "marvell,a385-db", "marvell,armada388",
20 stdout-path = "serial0:115200n8";
35 internal-regs {
38 clock-frequency = <100000>;
43 clock-frequency = <100000>;
[all …]
/kernel/linux/linux-5.10/arch/mips/txx9/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
2 config MACH_TX39XX
7 config MACH_TX49XX
16 config MACH_TXX9
26 config TOSHIBA_JMR3927
27 bool "Toshiba JMR-TX3927 board"
31 config TOSHIBA_RBTX4927
41 config TOSHIBA_RBTX4938
49 config TOSHIBA_RBTX4939
58 config SOC_TX3927
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Dmvebu-devbus.txt4 different types of standard memory and I/O devices such as NOR, NAND, and FPGA.
9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
23 integer values for each chip-select line in use:
28 - devbus,keep-config This property can optionally be used to keep
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dmvebu-devbus.txt4 different types of standard memory and I/O devices such as NOR, NAND, and FPGA.
9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
23 integer values for each chip-select line in use:
28 - devbus,keep-config This property can optionally be used to keep
[all …]

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