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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dbrcm,iproc-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,iproc-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom iProc PCIe controller with the platform bus interface
10 - Ray Jui <ray.jui@broadcom.com>
11 - Scott Branden <scott.branden@broadcom.com>
14 - $ref: /schemas/pci/pci-bus.yaml#
19 - enum:
22 - brcm,iproc-pcie
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Dti-pci.txt3 PCIe DesignWare Controller
4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
5 Should be "ti,dra7-pcie-ep" for EP (deprecated)
6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode
9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode
10 - phys : list of PHY specifiers (used by generic PHY framework)
11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Dbrcm,iproc-pcie.txt1 * Broadcom iProc PCIe controller with the platform bus interface
4 - compatible:
5 "brcm,iproc-pcie" for the first generation of PAXB based controller,
7 "brcm,iproc-pcie-paxb-v2" for the second generation of PAXB-based
9 "brcm,iproc-pcie-paxc" for the first generation of PAXC based
11 "brcm,iproc-pcie-paxc-v2" for the second generation of PAXC based
13 PAXB-based root complex is used for external endpoint devices. PAXC-based
15 - reg: base address and length of the PCIe controller I/O register space
16 - #interrupt-cells: set to <1>
17 - interrupt-map-mask and interrupt-map, standard PCI properties to define the
[all …]
Dti-pci.txt3 PCIe DesignWare Controller
4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
5 Should be "ti,dra7-pcie-ep" for EP (deprecated)
6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode
9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode
10 - phys : list of PHY specifiers (used by generic PHY framework)
11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
[all …]
/kernel/linux/linux-5.10/drivers/pci/controller/
Dpcie-iproc-platform.c1 // SPDX-License-Identifier: GPL-2.0
20 #include "pcie-iproc.h"
24 .compatible = "brcm,iproc-pcie",
27 .compatible = "brcm,iproc-pcie-paxb-v2",
30 .compatible = "brcm,iproc-pcie-paxc",
33 .compatible = "brcm,iproc-pcie-paxc-v2",
42 struct device *dev = &pdev->dev; in iproc_pcie_pltfm_probe()
43 struct iproc_pcie *pcie; in iproc_pcie_pltfm_probe() local
44 struct device_node *np = dev->of_node; in iproc_pcie_pltfm_probe()
49 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); in iproc_pcie_pltfm_probe()
[all …]
Dpcie-iproc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014 Hauke Mehrtens <hauke@hauke-m.de>
16 #include <linux/irqchip/arm-gic-v3.h>
24 #include "pcie-iproc.h"
99 * iProc PCIe outbound mapping controller specific parameters
146 * iProc PCIe inbound mapping type
160 * iProc PCIe inbound mapping controller specific parameters
169 * @imap_addr_offset: register offset between the upper and lower 32-bit
171 * @imap_window_offset: register offset between each IMAP window
239 * iProc PCIe host registers
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Dpcie-iproc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2014-2015 Broadcom Corporation
10 * iProc PCIe interface type
27 * iProc PCIe outbound mapping
28 * @axi_offset: offset from the AXI address to the internal address used by
29 * the iProc PCIe core
38 * iProc PCIe inbound mapping
50 * iProc PCIe device
53 * @type: iProc PCIe interface type
55 * @base: PCIe host controller I/O register base
[all …]
/kernel/linux/linux-6.6/drivers/pci/controller/
Dpcie-iproc-platform.c1 // SPDX-License-Identifier: GPL-2.0
19 #include "pcie-iproc.h"
23 .compatible = "brcm,iproc-pcie",
26 .compatible = "brcm,iproc-pcie-paxb-v2",
29 .compatible = "brcm,iproc-pcie-paxc",
32 .compatible = "brcm,iproc-pcie-paxc-v2",
41 struct device *dev = &pdev->dev; in iproc_pltfm_pcie_probe()
42 struct iproc_pcie *pcie; in iproc_pltfm_pcie_probe() local
43 struct device_node *np = dev->of_node; in iproc_pltfm_pcie_probe()
48 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); in iproc_pltfm_pcie_probe()
[all …]
Dpcie-iproc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014 Hauke Mehrtens <hauke@hauke-m.de>
9 #include <linux/pci-ecam.h>
17 #include <linux/irqchip/arm-gic-v3.h>
24 #include "pcie-iproc.h"
91 * struct iproc_pcie_ob_map - iProc PCIe outbound mapping controller-specific
138 * enum iproc_pcie_ib_map_type - iProc PCIe inbound mapping type
150 * struct iproc_pcie_ib_map - iProc PCIe inbound mapping controller-specific
159 * @imap_addr_offset: register offset between the upper and lower 32-bit
161 * @imap_window_offset: register offset between each IMAP window
[all …]
Dpcie-iproc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2014-2015 Broadcom Corporation
10 * enum iproc_pcie_type - iProc PCIe interface type
11 * @IPROC_PCIE_PAXB_BCMA: BCMA-based host controllers
12 * @IPROC_PCIE_PAXB: PAXB-based host controllers for
14 * @IPROC_PCIE_PAXB_V2: PAXB-based host controllers for Stingray SoCs
15 * @IPROC_PCIE_PAXC: PAXC-based host controllers
16 * @IPROC_PCIE_PAXC_V2: PAXC-based host controllers (second generation)
33 * struct iproc_pcie_ob - iProc PCIe outbound mapping
34 * @axi_offset: offset from the AXI address to the internal address used by
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/axis/
Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
[all …]
Ddra7.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/clock/dra7.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/dra.h>
12 #include <dt-bindings/clock/dra7.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
21 interrupt-parent = <&crossbar_mpu>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
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Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
Dimx8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-reset.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "dt-bindings/input/input.h"
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interconnect/imx8mq.h>
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/
D0001_linux_arch.patch7 Change-Id: I8c7b42f8858212fb4b2d56a871d3f4d5afc73954
9 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
11 --- a/arch/arm64/Kconfig
13 @@ -183,7 +183,6 @@ config ARM64
17 - select HOLES_IN_ZONE
21 @@ -1023,6 +1022,9 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK
31 @@ -1148,7 +1150,7 @@ config XEN
35 - int
40 @@ -1182,15 +1184,6 @@ config UNMAP_KERNEL_AT_EL0
44 -config MITIGATE_SPECTRE_BRANCH_HISTORY
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