| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/cpufreq/ |
| D | apple,cluster-cpufreq.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/apple,cluster-cpufreq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC cluster cpufreq device
10 - Hector Martin <marcan@marcan.st>
13 Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of
14 the cluster management register block. This binding uses the standard
15 operating-points-v2 table to define the CPU performance states, with the
16 opp-level property specifying the hardware p-state index for that level.
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| /kernel/linux/linux-6.6/drivers/clk/mvebu/ |
| D | ap-cpu-clk.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Marvell Armada AP CPU Clock Controller
11 #define pr_fmt(fmt) "ap-cpu-clk: " fmt
13 #include <linux/clk-provider.h>
33 * struct cpu_dfs_regs: CPU DFS register mapping
34 * @divider_reg: full integer ratio from PLL frequency to CPU clock frequency
53 /* AP806 CPU DFS register mapping*/
91 /* AP807 CPU DFS register mapping */
127 * struct ap806_clk: CPU cluster clock controller instance
128 * @cluster: Cluster clock controller index
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| /kernel/linux/linux-5.10/drivers/clk/mvebu/ |
| D | ap-cpu-clk.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Marvell Armada AP CPU Clock Controller
11 #define pr_fmt(fmt) "ap-cpu-clk: " fmt
13 #include <linux/clk-provider.h>
34 * struct cpu_dfs_regs: CPU DFS register mapping
35 * @divider_reg: full integer ratio from PLL frequency to CPU clock frequency
54 /* AP806 CPU DFS register mapping*/
92 /* AP807 CPU DFS register mapping */
128 * struct ap806_clk: CPU cluster clock controller instance
129 * @cluster: Cluster clock controller index
[all …]
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| /kernel/linux/linux-6.6/arch/x86/kernel/apic/ |
| D | x2apic_cluster.c | 1 // SPDX-License-Identifier: GPL-2.0
17 * Using per cpu variable would cost one cache line per cpu.
29 static void x2apic_send_IPI(int cpu, int vector) in x2apic_send_IPI() argument
31 u32 dest = x86_cpu_to_logical_apicid[cpu]; in x2apic_send_IPI()
41 unsigned int cpu, clustercpu; in __x2apic_send_IPI_mask() local
52 /* If IPI should not be sent to self, clear current CPU */ in __x2apic_send_IPI_mask()
56 /* Collapse cpus in a cluster so a single IPI per cluster is sent */ in __x2apic_send_IPI_mask()
57 for_each_cpu(cpu, tmpmsk) { in __x2apic_send_IPI_mask()
58 struct cpumask *cmsk = per_cpu(cluster_masks, cpu); in __x2apic_send_IPI_mask()
68 /* Remove cluster CPUs from tmpmask */ in __x2apic_send_IPI_mask()
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/cpu/ |
| D | cpu-topology.txt | 2 CPU topology binding description
6 1 - Introduction
12 - socket
13 - cluster
14 - core
15 - thread
18 symmetric multi-threading (SMT) is supported or not.
20 For instance in a system where CPUs support SMT, "cpu" nodes represent all
22 In systems where SMT is not supported "cpu" nodes represent all cores present
25 CPU topology bindings allow one to associate cpu nodes with hierarchical groups
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/cpu/ |
| D | cpu-topology.txt | 2 CPU topology binding description
6 1 - Introduction
12 - socket
13 - cluster
14 - core
15 - thread
18 symmetric multi-threading (SMT) is supported or not.
20 For instance in a system where CPUs support SMT, "cpu" nodes represent all
22 In systems where SMT is not supported "cpu" nodes represent all cores present
25 CPU topology bindings allow one to associate cpu nodes with hierarchical groups
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| /kernel/linux/linux-6.6/arch/arm/mach-versatile/ |
| D | spc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
14 #include <linux/cpu.h>
28 #define SPCLOG "vexpress-spc: "
39 /* SPC wake-up IRQs status and mask */
46 /* SPC per-CPU mailboxes */
50 /* SPC CPU/cluster reset statue */
52 #define STANDBYWFI_STAT_A15_CPU_MASK(cpu) (1 << (cpu)) argument
53 #define STANDBYWFI_STAT_A7_CPU_MASK(cpu) (1 << (3 + (cpu))) argument
68 /* wake-up interrupt masks */
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| /kernel/linux/linux-5.10/drivers/perf/ |
| D | qcom_l2_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2015-2017 The Linux Foundation. All rights reserved.
26 #include <soc/qcom/kryo-l2-accessors.h>
121 * The cache is made up of one or more clusters, each cluster has its own PMU.
122 * Each cluster is associated with one or more CPUs.
125 * Events can be envisioned as a 2-dimensional array. Each column represents
143 /* The CPU that is used for collecting events on this cluster */
145 /* All the CPUs associated with this cluster */
164 struct l2cache_pmu *l2cache_pmu, int cpu) in get_cluster_pmu() argument
166 return *per_cpu_ptr(l2cache_pmu->pmu_cluster, cpu); in get_cluster_pmu()
[all …]
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| /kernel/linux/linux-6.6/drivers/perf/ |
| D | qcom_l2_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2015-2017 The Linux Foundation. All rights reserved.
26 #include <soc/qcom/kryo-l2-accessors.h>
121 * The cache is made up of one or more clusters, each cluster has its own PMU.
122 * Each cluster is associated with one or more CPUs.
125 * Events can be envisioned as a 2-dimensional array. Each column represents
143 /* The CPU that is used for collecting events on this cluster */
145 /* All the CPUs associated with this cluster */
164 struct l2cache_pmu *l2cache_pmu, int cpu) in get_cluster_pmu() argument
166 return *per_cpu_ptr(l2cache_pmu->pmu_cluster, cpu); in get_cluster_pmu()
[all …]
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| /kernel/linux/linux-6.6/arch/mips/kernel/ |
| D | cacheinfo.c | 1 // SPDX-License-Identifier: GPL-2.0-only
10 leaf->type = c_type; \
11 leaf->level = c_level; \
12 leaf->coherency_line_size = c->cache.linesz; \
13 leaf->number_of_sets = c->cache.sets; \
14 leaf->ways_of_associativity = c->cache.ways; \
15 leaf->size = c->cache.linesz * c->cache.sets * \
16 c->cache.ways; \
20 int init_cache_level(unsigned int cpu) in init_cache_level() argument
23 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); in init_cache_level()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-vexpress/ |
| D | spc.c | 20 #include <linux/clk-provider.h>
22 #include <linux/cpu.h>
36 #define SPCLOG "vexpress-spc: "
47 /* SPC wake-up IRQs status and mask */
54 /* SPC per-CPU mailboxes */
58 /* SPC CPU/cluster reset statue */
60 #define STANDBYWFI_STAT_A15_CPU_MASK(cpu) (1 << (cpu)) argument
61 #define STANDBYWFI_STAT_A7_CPU_MASK(cpu) (1 << (3 + (cpu))) argument
76 /* wake-up interrupt masks */
79 /* TC2 static dual-cluster configuration */
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| /kernel/linux/linux-5.10/arch/mips/kernel/ |
| D | cacheinfo.c | 1 // SPDX-License-Identifier: GPL-2.0-only
10 leaf->type = c_type; \
11 leaf->level = c_level; \
12 leaf->coherency_line_size = c->cache.linesz; \
13 leaf->number_of_sets = c->cache.sets; \
14 leaf->ways_of_associativity = c->cache.ways; \
15 leaf->size = c->cache.linesz * c->cache.sets * \
16 c->cache.ways; \
20 int init_cache_level(unsigned int cpu) in init_cache_level() argument
23 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); in init_cache_level()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/marvell/ |
| D | ap80x-system-controller.txt | 6 registers giving access to numerous features: clocks, pin-muxing and
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the AP80x system controller
18 -------
24 - 0: reference clock of CPU cluster 0
25 - 1: reference clock of CPU cluster 1
26 - 2: fixed PLL at 1200 Mhz
27 - 3: MSS clock, derived from the fixed PLL
31 - compatible: must be one of:
32 * "marvell,ap806-clock"
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|
| /kernel/linux/linux-6.6/Documentation/admin-guide/pm/ |
| D | intel_uncore_frequency_scaling.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 :Copyright: |copy| 2022-2023 Intel Corporation
13 ------------
22 the scaling min/max frequencies via cpufreq sysfs to improve CPU performance.
30 ---------------
33 `/sys/devices/system/cpu/intel_uncore_frequency/`.
36 uncore scaling control is per die in multiple die/package SoCs or per
37 package for single die per package SoCs. The name represents the
45 This is a read-only attribute. If users adjust max_freq_khz,
50 This is a read-only attribute. If users adjust min_freq_khz,
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/marvell/ |
| D | ap80x-system-controller.txt | 6 registers giving access to numerous features: clocks, pin-muxing and
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the AP80x system controller
18 -------
24 - 0: reference clock of CPU cluster 0
25 - 1: reference clock of CPU cluster 1
26 - 2: fixed PLL at 1200 Mhz
27 - 3: MSS clock, derived from the fixed PLL
31 - compatible: must be one of:
32 * "marvell,ap806-clock"
[all …]
|
| /kernel/linux/linux-5.10/arch/x86/kernel/apic/ |
| D | x2apic_cluster.c | 1 // SPDX-License-Identifier: GPL-2.0
28 static void x2apic_send_IPI(int cpu, int vector) in x2apic_send_IPI() argument
30 u32 dest = per_cpu(x86_cpu_to_logical_apicid, cpu); in x2apic_send_IPI()
40 unsigned int cpu, clustercpu; in __x2apic_send_IPI_mask() local
51 /* If IPI should not be sent to self, clear current CPU */ in __x2apic_send_IPI_mask()
55 /* Collapse cpus in a cluster so a single IPI per cluster is sent */ in __x2apic_send_IPI_mask()
56 for_each_cpu(cpu, tmpmsk) { in __x2apic_send_IPI_mask()
57 struct cluster_mask *cmsk = per_cpu(cluster_masks, cpu); in __x2apic_send_IPI_mask()
60 for_each_cpu_and(clustercpu, tmpmsk, &cmsk->mask) in __x2apic_send_IPI_mask()
66 __x2apic_send_IPI_dest(dest, vector, apic->dest_logical); in __x2apic_send_IPI_mask()
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/include/asm/ |
| D | mcpm.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright: (C) 2012-2013 Linaro Limited
13 * Maximum number of possible clusters / CPUs per cluster.
39 * This is used to indicate where the given CPU from given cluster should
40 * branch once it is ready to re-enter the kernel using ptr, or NULL if it
41 * should be gated. A gated CPU is held in a WFE loop until its vector
44 void mcpm_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr);
48 * from very early assembly code before the CPU is ungated. The
51 void mcpm_set_early_poke(unsigned cpu, unsigned cluster,
55 * CPU/cluster power operations API for higher subsystems to use.
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| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | mcpm.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright: (C) 2012-2013 Linaro Limited
13 * Maximum number of possible clusters / CPUs per cluster.
39 * This is used to indicate where the given CPU from given cluster should
40 * branch once it is ready to re-enter the kernel using ptr, or NULL if it
41 * should be gated. A gated CPU is held in a WFE loop until its vector
44 void mcpm_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr);
48 * from very early assembly code before the CPU is ungated. The
51 void mcpm_set_early_poke(unsigned cpu, unsigned cluster,
55 * CPU/cluster power operations API for higher subsystems to use.
[all …]
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| /kernel/linux/linux-5.10/drivers/cpufreq/ |
| D | tegra194-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/cpu.h>
9 #include <linux/dma-mapping.h>
19 #include <soc/tegra/bpmp-abi.h>
31 enum cluster { enum
46 u32 cpu; member
59 static void get_cpu_cluster(void *cluster) in get_cpu_cluster() argument
63 *((uint32_t *)cluster) = MPIDR_AFFINITY_LEVEL(mpidr, 1); in get_cpu_cluster()
67 * Read per-core Read-only system register NVFREQ_FEEDBACK_EL1.
87 return nltbl->ref_clk_hz / KHZ * ndiv / (nltbl->pdiv * nltbl->mdiv); in map_ndiv_to_freq()
[all …]
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| /kernel/linux/linux-5.10/drivers/clocksource/ |
| D | timer-nps.c | 14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
39 #include <linux/cpu.h>
46 /* This array is per cluster of CPUs (Each NPS400 cluster got 256 CPUs) */
74 return -EINVAL; in nps_get_timer_clk()
82 int cluster = raw_smp_processor_id() >> NPS_CLUSTER_OFFSET; in nps_clksrc_read() local
84 return (u64)ioread32be(nps_msu_reg_low_addr[cluster]); in nps_clksrc_read()
89 int ret, cluster; in nps_setup_clocksource() local
94 for (cluster = 0; cluster < NPS_CLUSTER_NUM; cluster++) in nps_setup_clocksource()
95 nps_msu_reg_low_addr[cluster] = in nps_setup_clocksource()
[all …]
|
| /kernel/linux/linux-6.6/include/linux/ |
| D | swap.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
15 #include <linux/page-flags.h>
29 #define SWAP_FLAG_DISCARD_ONCE 0x20000 /* discard swap area at swapon-time */
30 #define SWAP_FLAG_DISCARD_PAGES 0x40000 /* discard page-clusters after use */
39 return current->flags & PF_KSWAPD; in current_is_kswapd()
47 * on 32-bit-pgoff_t architectures. And that assumes that the architecture packs
70 * device memory that is unaddressable (inaccessible) by CPU, so that we can
73 * When a page is migrated from CPU to device, we set the CPU page table entry
76 * When a page is mapped by the device for exclusive access we set the CPU page
118 ((1 << MAX_SWAPFILES_SHIFT) - SWP_DEVICE_NUM - \
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| /kernel/linux/linux-6.6/Documentation/ABI/stable/ |
| D | sysfs-devices-system-cpu | 1 What: /sys/devices/system/cpu/dscr_default
2 Date: 13-May-2014
6 /sys/devices/system/cpu/cpuN/dscr on all CPUs.
9 all per-CPU defaults at the same time.
12 What: /sys/devices/system/cpu/cpu[0-9]+/dscr
13 Date: 13-May-2014
17 a CPU.
22 on any CPU where it executes (overriding the value described
27 What: /sys/devices/system/cpu/cpuX/topology/physical_package_id
33 What: /sys/devices/system/cpu/cpuX/topology/die_id
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| /kernel/linux/linux-5.10/include/linux/ |
| D | swap.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include <linux/page-flags.h>
27 #define SWAP_FLAG_DISCARD_ONCE 0x20000 /* discard swap area at swapon-time */
28 #define SWAP_FLAG_DISCARD_PAGES 0x40000 /* discard page-clusters after use */
37 return current->flags & PF_KSWAPD; in current_is_kswapd()
45 * on 32-bit-pgoff_t architectures. And that assumes that the architecture packs
59 * device memory that is unaddressable (inaccessible) by CPU, so that we can
62 * When a page is migrated from CPU to device, we set the CPU page table entry
95 ((1 << MAX_SWAPFILES_SHIFT) - SWP_DEVICE_NUM - \
96 SWP_MIGRATION_NUM - SWP_HWPOISON_NUM)
[all …]
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| /kernel/linux/linux-6.6/drivers/cpufreq/ |
| D | vexpress-spc-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013 - 2019 ARM Ltd.
15 #include <linux/cpu.h>
45 #define ACTUAL_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq << 1 : freq) argument
46 #define VIRT_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq >> 1 : freq) argument
60 static inline int raw_cpu_to_cluster(int cpu) in raw_cpu_to_cluster() argument
62 return topology_physical_package_id(cpu); in raw_cpu_to_cluster()
65 static inline int cpu_to_cluster(int cpu) in cpu_to_cluster() argument
68 MAX_CLUSTERS : raw_cpu_to_cluster(cpu); in cpu_to_cluster()
71 static unsigned int find_cluster_maxfreq(int cluster) in find_cluster_maxfreq() argument
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| D | tegra194-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2020 - 2022, NVIDIA CORPORATION. All rights reserved
6 #include <linux/cpu.h>
9 #include <linux/dma-mapping.h>
20 #include <soc/tegra/bpmp-abi.h>
30 #define CORE_OFFSET(cpu) (cpu * 8) argument
32 #define SCRATCH_FREQ_CORE_REG(data, cpu) (data->regs + CMU_CLKS_BASE + CORE_OFFSET(cpu)) argument
36 (data->regs + (MMCRAB_CLUSTER_BASE(cl) + data->soc->actmon_cntr_base))
37 #define CORE_ACTMON_CNTR_REG(data, cl, cpu) (CLUSTER_ACTMON_BASE(data, cl) + CORE_OFFSET(cpu)) argument
43 u32 cpu; member
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