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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dmarvell,kirkwood-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
16 Available mpp pins/groups and functions:
22 name pins functions
24 mpp0 0 gpio, nand(io2), spi(cs)
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dmarvell,kirkwood-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
16 Available mpp pins/groups and functions:
22 name pins functions
24 mpp0 0 gpio, nand(io2), spi(cs)
[all …]
Dqcom,msm8960-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8960-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18 const: qcom,msm8960-pinctrl
26 interrupt-controller: true
27 "#interrupt-cells": true
28 gpio-controller: true
[all …]
Dmediatek,mt8192-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
13 The MediaTek's MT8192 Pin controller is used to control SoC pins.
17 const: mediatek,mt8192-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
[all …]
Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
32 power-supply = <&ppvar_sys>;
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/sunxi/
Dpinctrl-suniv-f1c100s.c2 * Allwinner new F-series F1C100s SoC (suniv) pinctrl driver.
12 * Copyright (C) 2014 Chen-Yu Tsai
14 * Chen-Yu Tsai <wens@csie.org>
18 * Maxime Ripard <maxime.ripard@free-electrons.com>
31 #include "pinctrl-sunxi.h"
39 SUNXI_FUNCTION(0x6, "spi1")), /* CS */
46 SUNXI_FUNCTION(0x6, "spi1")), /* MOSI */
54 SUNXI_FUNCTION(0x6, "spi1")), /* MOSI */
71 SUNXI_FUNCTION(0x6, "spi1")), /* CS */
79 SUNXI_FUNCTION(0x6, "spi1")), /* MOSI */
[all …]
Dpinctrl-sun50i-a100.c1 // SPDX-License-Identifier: GPL-2.0
15 #include "pinctrl-sunxi.h"
22 SUNXI_FUNCTION(0x3, "spi2"), /* CS */
29 SUNXI_FUNCTION(0x3, "spi2"), /* CLK */
36 SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */
111 SUNXI_FUNCTION(0x4, "spi0"), /* MOSI */
129 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
171 SUNXI_FUNCTION(0x4, "spi0"), /* CLK */
272 SUNXI_FUNCTION(0x4, "spi1"), /* CS */
278 SUNXI_FUNCTION(0x4, "spi1"), /* CLK */
[all …]
Dpinctrl-sun50i-h5.c6 * Based on pinctrl-sun8i-h3.c, which is:
9 * Based on pinctrl-sun8i-a23.c, which is:
10 * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
11 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
24 #include "pinctrl-sunxi.h"
70 SUNXI_FUNCTION(0x2, "sim"), /* CLK */
102 SUNXI_FUNCTION(0x2, "spi1"), /* CS */
108 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
114 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
137 SUNXI_FUNCTION(0x2, "i2s0"), /* CLK */
[all …]
/kernel/linux/linux-6.6/drivers/pinctrl/sunxi/
Dpinctrl-suniv-f1c100s.c2 * Allwinner new F-series F1C100s SoC (suniv) pinctrl driver.
12 * Copyright (C) 2014 Chen-Yu Tsai
14 * Chen-Yu Tsai <wens@csie.org>
18 * Maxime Ripard <maxime.ripard@free-electrons.com>
30 #include "pinctrl-sunxi.h"
38 SUNXI_FUNCTION(0x6, "spi1")), /* CS */
45 SUNXI_FUNCTION(0x6, "spi1")), /* MOSI */
53 SUNXI_FUNCTION(0x6, "spi1")), /* CLK */
70 SUNXI_FUNCTION(0x6, "spi1")), /* CS */
78 SUNXI_FUNCTION(0x6, "spi1")), /* MOSI */
[all …]
Dpinctrl-sun50i-a100.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "pinctrl-sunxi.h"
21 SUNXI_FUNCTION(0x3, "spi2"), /* CS */
28 SUNXI_FUNCTION(0x3, "spi2"), /* CLK */
35 SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */
110 SUNXI_FUNCTION(0x4, "spi0"), /* MOSI */
128 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
170 SUNXI_FUNCTION(0x4, "spi0"), /* CLK */
271 SUNXI_FUNCTION(0x4, "spi1"), /* CS */
277 SUNXI_FUNCTION(0x4, "spi1"), /* CLK */
[all …]
Dpinctrl-sun50i-h5.c6 * Based on pinctrl-sun8i-h3.c, which is:
9 * Based on pinctrl-sun8i-a23.c, which is:
10 * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
11 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
23 #include "pinctrl-sunxi.h"
69 SUNXI_FUNCTION(0x2, "sim"), /* CLK */
101 SUNXI_FUNCTION(0x2, "spi1"), /* CS */
107 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
113 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
136 SUNXI_FUNCTION(0x2, "i2s0"), /* CLK */
[all …]
Dpinctrl-sun8i-h3.c6 * Based on pinctrl-sun8i-a23.c, which is:
7 * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
8 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
20 #include "pinctrl-sunxi.h"
66 SUNXI_FUNCTION(0x2, "sim"), /* CLK */
98 SUNXI_FUNCTION(0x2, "spi1"), /* CS */
104 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
110 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
133 SUNXI_FUNCTION(0x2, "i2s0"), /* CLK */
153 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
10 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
11 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dqcom-apq8074-dragonboard.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974.dtsi"
3 #include "qcom-pm8841.dtsi"
4 #include "qcom-pm8941.dtsi"
8 compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
17 stdout-path = "serial0:115200n8";
26 bus-width = <8>;
27 non-removable;
30 vmmc-supply = <&pm8941_l20>;
31 vqmmc-supply = <&pm8941_s3>;
[all …]
Darmada-385-clearfog-gtr.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work
9 SERDES mapping -
10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0
12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1
14 4. mini PCIe CON2 - PCIe2
17 USB 2.0 mapping -
18 0. USB 2.0 - 0 USB pins header CON12
19 1. USB 2.0 - 1 mini PCIe CON2
20 2. USB 2.0 - 2 to USB 3.0 connector (used with SERDES #3)
[all …]
Dqcom-msm8960-cdp.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
4 #include "qcom-msm8960.dtsi"
8 compatible = "qcom,msm8960-cdp", "qcom,msm8960";
15 stdout-path = "serial0:115200n8";
41 compatible = "qcom,rpm-pm8921-regulators";
42 vin_lvs1_3_6-supply = <&pm8921_s4>;
43 vin_lvs2-supply = <&pm8921_s4>;
44 vin_lvs4_5_7-supply = <&pm8921_s4>;
45 vdd_ncp-supply = <&pm8921_l6>;
[all …]
Domap3-gta04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on omap3-beagle-xm.dts
7 /dts-v1/;
10 #include <dt-bindings/input/input.h>
14 compatible = "ti,omap3-gta04", "ti,omap3630", "ti,omap36xx", "ti,omap3";
18 cpu0-supply = <&vcc>;
28 stdout-path = &uart3;
34 /delete-property/ mmc2;
35 /delete-property/ mmc3;
39 compatible = "regulator-fixed";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/
Darmada-385-clearfog-gtr.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work
9 SERDES mapping -
10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0
12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1
14 4. mini PCIe CON2 - PCIe2
17 USB 2.0 mapping -
18 0. USB 2.0 - 0 USB pins header CON12
19 1. USB 2.0 - 1 mini PCIe CON2
20 2. USB 2.0 - 2 to USB 3.0 connector (used with SERDES #3)
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-msm8960-samsung-expressatt.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
4 #include "qcom-msm8960.dtsi"
5 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
8 model = "Samsung Galaxy Express SGH-I437";
10 chassis-type = "handset";
19 stdout-path = "serial0:115200n8";
33 vmmc-supply = <&pm8921_l5>;
38 vmmc-supply = <&pm8921_l6>;
39 vqmmc-supply = <&pm8921_l7>;
[all …]
Dqcom-msm8960-cdp.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
4 #include "qcom-msm8960.dtsi"
8 compatible = "qcom,msm8960-cdp", "qcom,msm8960";
15 stdout-path = "serial0:115200n8";
18 ext_l2: gpio-regulator {
19 compatible = "regulator-fixed";
20 regulator-name = "ext_l2";
22 startup-delay-us = <10000>;
23 enable-active-high;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Domap3-gta04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on omap3-beagle-xm.dts
7 /dts-v1/;
10 #include <dt-bindings/input/input.h>
17 cpu0-supply = <&vcc>;
27 stdout-path = &uart3;
33 /delete-property/ mmc2;
34 /delete-property/ mmc3;
38 compatible = "regulator-fixed";
39 regulator-name = "ldo_3v3";
[all …]
/kernel/linux/linux-5.10/drivers/spi/
Dspi-davinci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <linux/clk.h>
16 #include <linux/dma-mapping.h>
23 #include <linux/platform_data/spi-davinci.h>
40 #define SPIPC0_DOFUN_MASK BIT(10) /* MOSI */
41 #define SPIPC0_CLKFUN_MASK BIT(9) /* CLK */
107 struct clk *clk; member
137 if (dspi->rx) { in davinci_spi_rx_buf_u8()
138 u8 *rx = dspi->rx; in davinci_spi_rx_buf_u8()
140 dspi->rx = rx; in davinci_spi_rx_buf_u8()
[all …]
/kernel/linux/linux-6.6/drivers/spi/
Dspi-davinci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <linux/clk.h>
16 #include <linux/dma-mapping.h>
22 #include <linux/platform_data/spi-davinci.h>
39 #define SPIPC0_DOFUN_MASK BIT(10) /* MOSI */
40 #define SPIPC0_CLKFUN_MASK BIT(9) /* CLK */
106 struct clk *clk; member
136 if (dspi->rx) { in davinci_spi_rx_buf_u8()
137 u8 *rx = dspi->rx; in davinci_spi_rx_buf_u8()
139 dspi->rx = rx; in davinci_spi_rx_buf_u8()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Dpx30.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/px30-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/px30-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]

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