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/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dste-dbx5x0-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "ste-nomadik-pinctrl.dtsi"
17 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
21 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
28 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
32 pins = "GPIO1_AJ3"; /* RTS */
36 pins = "GPIO3_AH3"; /* TXD */
49 pins = "GPIO4_AH6"; /* RXD */
53 pins = "GPIO5_AG6"; /* TXD */
60 pins = "GPIO4_AH6"; /* RXD */
[all …]
Dstih407-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "st-pincfg.h"
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /* 0-5: PIO_SBC */
18 /* 10-19: PIO_FRONT0 */
31 /* 30-35: PIO_REAR */
38 /* 40-42: PIO_FLASH */
45 pin-controller-sbc@961f080 {
46 #address-cells = <1>;
47 #size-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dste-dbx5x0-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "ste-nomadik-pinctrl.dtsi"
17 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
21 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
28 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
32 pins = "GPIO1_AJ3"; /* RTS */
36 pins = "GPIO3_AH3"; /* TXD */
49 pins = "GPIO4_AH6"; /* RXD */
53 pins = "GPIO5_AG6"; /* TXD */
60 pins = "GPIO4_AH6"; /* RXD */
[all …]
Dstih407-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "st-pincfg.h"
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /* 0-5: PIO_SBC */
18 /* 10-19: PIO_FRONT0 */
31 /* 30-35: PIO_REAR */
38 /* 40-42: PIO_FLASH */
45 pin-controller-sbc@961f080 {
46 #address-cells = <1>;
47 #size-cells = <1>;
[all …]
Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
Dkirkwood-km_common.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 stdout-path = &uart0;
9 pinctrl: pin-controller@10000 {
10 pinctrl-0 = < &pmx_i2c_gpio_sda &pmx_i2c_gpio_scl >;
11 pinctrl-names = "default";
13 pmx_i2c_gpio_sda: pmx-gpio-sda {
14 marvell,pins = "mpp8";
17 pmx_i2c_gpio_scl: pmx-gpio-scl {
18 marvell,pins = "mpp9";
29 compatible = "i2c-gpio";
[all …]
Ds5pv210-aries.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "shared-dma-pool";
[all …]
/kernel/linux/linux-6.6/drivers/i2c/busses/
Di2c-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/i2c-algo-bit.h>
16 #include <linux/platform_data/i2c-gpio.h>
22 struct gpio_desc *sda; member
23 struct gpio_desc *scl; member
36 * Toggle SDA by changing the output value of the pin. This is only
37 * valid for pins configured as open drain (i.e. setting the value
44 gpiod_set_value_cansleep(priv->sda, state); in i2c_gpio_setsda_val()
48 * Toggle SCL by changing the output value of the pin. This is used
49 * for pins that are configured as open drain and for output-only
[all …]
/kernel/linux/linux-5.10/drivers/staging/sm750fb/
Dddk750_swi2c.c1 // SPDX-License-Identifier: GPL-2.0
5 * swi2c.c --- SM750/SM718 DDK
19 * a point in time where the SCL or SDA may be changed.
22 * +-------------+-------------+-------------+-------------+
23 * | SCL set LOW |SCL no change| SCL set HIGH|SCL no change|
26 * SCL == XXXX _____________ ____________ /
28 * I.e. the SCL may only be changed in section 1. and section 3. while
29 * the SDA may only be changed in section 2. and section 4. The table
37 * ---------------+---+---+---+---+
38 * Tx Start SDA | | H | | L |
[all …]
/kernel/linux/linux-6.6/drivers/staging/sm750fb/
Dddk750_swi2c.c1 // SPDX-License-Identifier: GPL-2.0
5 * swi2c.c --- SM750/SM718 DDK
19 * a point in time where the SCL or SDA may be changed.
22 * +-------------+-------------+-------------+-------------+
23 * | SCL set LOW |SCL no change| SCL set HIGH|SCL no change|
26 * SCL == XXXX _____________ ____________ /
28 * I.e. the SCL may only be changed in section 1. and section 3. while
29 * the SDA may only be changed in section 2. and section 4. The table
37 * ---------------+---+---+---+---+
38 * Tx Start SDA | | H | | L |
[all …]
/kernel/linux/linux-5.10/drivers/i2c/busses/
Di2c-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/i2c-algo-bit.h>
17 #include <linux/platform_data/i2c-gpio.h>
22 struct gpio_desc *sda; member
23 struct gpio_desc *scl; member
36 * Toggle SDA by changing the output value of the pin. This is only
37 * valid for pins configured as open drain (i.e. setting the value
44 gpiod_set_value_cansleep(priv->sda, state); in i2c_gpio_setsda_val()
48 * Toggle SCL by changing the output value of the pin. This is used
49 * for pins that are configured as open drain and for output-only
[all …]
/kernel/linux/linux-6.6/arch/riscv/boot/dts/starfive/
Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
19 stdout-path = "serial0:115200n8";
23 timebase-frequency = <6250000>;
32 compatible = "gpio-leds";
34 led-ack {
38 linux,default-trigger = "heartbeat";
[all …]
Djh7110-starfive-visionfive-2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
26 stdout-path = "serial0:115200n8";
30 timebase-frequency = <4000000>;
38 gpio-restart {
39 compatible = "gpio-restart";
46 clock-frequency = <74250000>;
50 clock-frequency = <125000000>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Di2c-st.txt4 - compatible : Must be "st,comms-ssc-i2c" or "st,comms-ssc4-i2c"
5 - reg : Offset and length of the register set for the device
6 - interrupts : the interrupt specifier
7 - clock-names: Must contain "ssc".
8 - clocks: Must contain an entry for each name in clock-names. See the common
10 - A pinctrl state named "default" must be defined to set pins in mode of
14 - clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
17 - st,i2c-min-scl-pulse-width-us : The minimum valid SCL pulse width that is
19 - st,i2c-min-sda-pulse-width-us : The minimum valid SDA pulse width that is
21 - A pinctrl state named "idle" could be defined to set pins in idle state
[all …]
Di2c-at91.txt4 - compatible : Must be one of:
5 "atmel,at91rm9200-i2c",
6 "atmel,at91sam9261-i2c",
7 "atmel,at91sam9260-i2c",
8 "atmel,at91sam9g20-i2c",
9 "atmel,at91sam9g10-i2c",
10 "atmel,at91sam9x5-i2c",
11 "atmel,sama5d4-i2c",
12 "atmel,sama5d2-i2c",
13 "microchip,sam9x60-i2c".
[all …]
Di2c.txt8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
21 -----------------------------
26 - clock-frequency
29 - i2c-bus
31 devices and non-I2C devices, the 'i2c-bus' subnode can be used for
32 populating I2C devices. If the 'i2c-bus' subnode is present, only
34 '#address-cells' and '#size-cells' must be defined under this subnode
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
41 '#gpio-cells':
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
41 '#gpio-cells':
[all …]
/kernel/linux/linux-6.6/drivers/infiniband/hw/qib/
Dqib_twsi.c3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 * Originally written for a not-quite-i2c serial eeprom, which is
45 * variety of other uses, most board-specific, so the bit-boffing
47 * have been moved to chip-specific files.
59 * i2c_wait_for_writes - wait for a write
74 dd->f_gpio_mod(dd, 0, 0, 0); in i2c_wait_for_writes()
79 * QSFP modules are allowed to hold SCL low for 500uSec. Allow twice that
95 mask = 1UL << dd->gpio_scl_num; in scl_out()
[all …]
/kernel/linux/linux-5.10/drivers/infiniband/hw/qib/
Dqib_twsi.c3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 * Originally written for a not-quite-i2c serial eeprom, which is
45 * variety of other uses, most board-specific, so the bit-boffing
47 * have been moved to chip-specific files.
59 * i2c_wait_for_writes - wait for a write
74 dd->f_gpio_mod(dd, 0, 0, 0); in i2c_wait_for_writes()
79 * QSFP modules are allowed to hold SCL low for 500uSec. Allow twice that
95 mask = 1UL << dd->gpio_scl_num; in scl_out()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/
Dkirkwood-km_common.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 stdout-path = &uart0;
9 pinctrl: pin-controller@10000 {
10 pinctrl-0 = < &pmx_i2c_gpio_sda &pmx_i2c_gpio_scl >;
11 pinctrl-names = "default";
13 pmx_i2c_gpio_sda: pmx-gpio-sda {
14 marvell,pins = "mpp8";
17 pmx_i2c_gpio_scl: pmx-gpio-scl {
18 marvell,pins = "mpp9";
29 compatible = "i2c-gpio";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Ds5pv210-aries.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "shared-dma-pool";
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/
Di2c.txt8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
21 -----------------------------
26 - clock-frequency
29 - i2c-bus
31 devices and non-I2C devices, the 'i2c-bus' subnode can be used for
32 populating I2C devices. If the 'i2c-bus' subnode is present, only
34 '#address-cells' and '#size-cells' must be defined under this subnode
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/
Dlan966x-kontron-kswitch-d10-mmt-6g-2gs.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for the Kontron KSwitch D10 MMT 6G-2GS
6 /dts-v1/;
7 #include "lan966x-kontron-kswitch-d10-mmt.dtsi"
10 model = "Kontron KSwitch D10 MMT 6G-2GS";
11 compatible = "kontron,kswitch-d10-mmt-6g-2gs", "kontron,s1921",
21 i2c-bus = <&i2c4>;
22 los-gpios = <&sgpio_in 1 0 GPIO_ACTIVE_HIGH>;
23 mod-def0-gpios = <&sgpio_in 1 1 GPIO_ACTIVE_LOW>;
24 maximum-power-milliwatt = <2500>;
[all …]

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