| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/ |
| D | ti,gpmc-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
20 - enum:
21 - ti,am64-nand
22 - ti,omap2-nand
29 - description: Interrupt for fifoevent
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/nds32/n13/ |
| D | atcpmu.json | 15 "PublicDescription": "Prefetch Instruction",
18 "BriefDescription": "V3 Prefetch Instruction"
27 "PublicDescription": "JR(non-RET) instructions",
30 "BriefDescription": "V3 JR(non-RET) instructions"
123 "PublicDescription": "DMA BIU CYCLES",
126 "BriefDescription": "V3 DMA BIU CYCLES"
165 "PublicDescription": "Prefetch Instructions with cache hit",
168 "BriefDescription": "V3 Prefetch Instructions with cache hit"
201 "PublicDescription": "ld-after-st conflict replays",
204 "BriefDescription": "V3 ld-after-st conflict replays"
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/nds32/n13/ |
| D | atcpmu.json | 15 "PublicDescription": "Prefetch Instruction",
18 "BriefDescription": "V3 Prefetch Instruction"
27 "PublicDescription": "JR(non-RET) instructions",
30 "BriefDescription": "V3 JR(non-RET) instructions"
123 "PublicDescription": "DMA BIU CYCLES",
126 "BriefDescription": "V3 DMA BIU CYCLES"
165 "PublicDescription": "Prefetch Instructions with cache hit",
168 "BriefDescription": "V3 Prefetch Instructions with cache hit"
201 "PublicDescription": "ld-after-st conflict replays",
204 "BriefDescription": "V3 ld-after-st conflict replays"
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| /kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/ |
| D | mt792x_dma.c | 1 // SPDX-License-Identifier: ISC
8 #include "dma.h"
15 if (test_bit(MT76_REMOVED, &dev->mt76.phy.state)) in mt792x_irq_handler()
17 mt76_wr(dev, dev->irq_map->host_irq_enable, 0); in mt792x_irq_handler()
19 if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) in mt792x_irq_handler()
22 tasklet_schedule(&dev->mt76.irq_tasklet); in mt792x_irq_handler()
31 const struct mt792x_irq_map *irq_map = dev->irq_map; in mt792x_irq_tasklet()
34 mt76_wr(dev, irq_map->host_irq_enable, 0); in mt792x_irq_tasklet()
37 intr &= dev->mt76.mmio.irqmask; in mt792x_irq_tasklet()
40 trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); in mt792x_irq_tasklet()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | gpmc-nand.txt | 7 explained in a separate documents - please refer to
8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
11 Documentation/devicetree/bindings/mtd/nand-controller.yaml
16 - compatible: "ti,omap2-nand"
17 - reg: range id (CS number), base offset and length of the
19 - interrupts: Two interrupt specifiers, one for fifoevent, one for termcount.
23 - nand-bus-width: Set this numeric value to 16 if the hardware
27 - ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
28 "sw" 1-bit Hamming ecc code via software
30 "hw-romcode" <deprecated> use "ham1" instead
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| /kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt7915/ |
| D | dma.c | 1 // SPDX-License-Identifier: ISC
5 #include "../dma.h"
14 hwq = devm_kzalloc(dev->mt76.dev, sizeof(*hwq), GFP_KERNEL); in mt7915_init_tx_queues()
16 return -ENOMEM; in mt7915_init_tx_queues()
24 dev->mt76.q_tx[i] = hwq; in mt7915_init_tx_queues()
35 hwq = devm_kzalloc(dev->mt76.dev, sizeof(*hwq), GFP_KERNEL); in mt7915_init_mcu_queue()
37 return -ENOMEM; in mt7915_init_mcu_queue()
43 dev->mt76.q_tx[qid] = hwq; in mt7915_init_mcu_queue()
52 __le32 *rxd = (__le32 *)skb->data; in mt7915_queue_rx_skb()
66 mt76_rx(&dev->mt76, q, skb); in mt7915_queue_rx_skb()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/mt7996/ |
| D | dma.c | 1 // SPDX-License-Identifier: ISC
7 #include "../dma.h"
16 mt76_connac_tx_cleanup(&dev->mt76); in mt7996_poll_tx()
27 dev->q_wfdma_mask |= (1 << (q)); \ in mt7996_dma_config()
28 dev->q_int_mask[(q)] = int; \ in mt7996_dma_config()
29 dev->q_id[(q)] = id; \ in mt7996_dma_config()
61 #define PREFETCH(_base, _depth) ((_base) << 16 | (_depth)) in __mt7996_dma_prefetch() macro
62 /* prefetch SRAM wrapping boundary for tx/rx ring. */ in __mt7996_dma_prefetch()
63 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_FWDL) + ofs, PREFETCH(0x0, 0x2)); in __mt7996_dma_prefetch()
64 mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WM) + ofs, PREFETCH(0x20, 0x2)); in __mt7996_dma_prefetch()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/sfc/ |
| D | tx_tso.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2015 Solarflare Communications Inc.
34 #define PTR_DIFF(p1, p2) ((u8 *)(p1) - (u8 *)(p2))
37 * struct tso_state - TSO state for an SKB
42 * @dma_addr: DMA address of current position
45 * @unmap_addr: DMA address of SKB fragment
51 * @header_dma_addr: Header DMA address
52 * @header_unmap_len: Header DMA mapped length
84 ptr = (char *) (tx_queue->buffer + insert_ptr); in prefetch_ptr()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/sfc/ |
| D | tx_tso.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2015 Solarflare Communications Inc.
34 #define PTR_DIFF(p1, p2) ((u8 *)(p1) - (u8 *)(p2))
37 * struct tso_state - TSO state for an SKB
42 * @dma_addr: DMA address of current position
45 * @unmap_addr: DMA address of SKB fragment
51 * @header_dma_addr: Header DMA address
52 * @header_unmap_len: Header DMA mapped length
84 ptr = (char *) (tx_queue->buffer + insert_ptr); in prefetch_ptr()
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/axis/ |
| D | artpec6.dtsi | 2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | artpec6.dtsi | 2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
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| /kernel/linux/linux-6.6/drivers/comedi/drivers/ |
| D | plx9080.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
26 * struct plx_dma_desc - DMA descriptor format for PLX PCI 9080
32 * Describes the format of a scatter-gather DMA descriptor for the PLX
33 * PCI 9080. All members are raw, little-endian register values that
34 * will be transferred by the DMA engine from local or PCI memory into
35 * corresponding registers for the DMA channel.
37 * The DMA descriptors must be aligned on a 16-byte boundary. Bits 3:0
82 /* DMA Arbitration Register (alias of MARBR). */
99 /* DMA Channel Priority */
101 #define PLX_MARBR_PRIO_DMA0 (BIT(19) * 1) /* DMA channel 0 has priority */
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| /kernel/linux/linux-5.10/drivers/staging/comedi/drivers/ |
| D | plx9080.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
26 * struct plx_dma_desc - DMA descriptor format for PLX PCI 9080
32 * Describes the format of a scatter-gather DMA descriptor for the PLX
33 * PCI 9080. All members are raw, little-endian register values that
34 * will be transferred by the DMA engine from local or PCI memory into
35 * corresponding registers for the DMA channel.
37 * The DMA descriptors must be aligned on a 16-byte boundary. Bits 3:0
82 /* DMA Arbitration Register (alias of MARBR). */
99 /* DMA Channel Priority */
101 #define PLX_MARBR_PRIO_DMA0 (BIT(19) * 1) /* DMA channel 0 has priority */
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| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| D | omap2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
18 #include <linux/mtd/nand-ecc-sw-bch.h>
21 #include <linux/omap-dma.h>
29 #include <linux/omap-gpmc.h>
30 #include <linux/platform_data/mtd-nand-omap2.h>
32 #define DRIVER_NAME "omap2-nand"
156 struct dma_chan *dma; member
198 * omap_prefetch_enable - configures and starts prefetch transfer
201 * @dma_mode: dma mode enable (1) or disable (0)
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| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/igbvf/ |
| D | igbvf.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2009 - 2018 Intel Corporation. */
52 * PTHRESH - MAC will consider prefetch if it has fewer than this number of
54 * Setting this to 0 disables RX descriptor prefetch.
55 * HTHRESH - MAC will only prefetch if there are at least this many descriptors
58 * WTHRESH - RX descriptor writeback threshold - MAC will delay writing back
79 #define IGBVF_MNG_VLAN_NONE (-1)
84 #define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
97 * so a DMA handle can be stored along with the buffer
100 dma_addr_t dma; member
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| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/igbvf/ |
| D | igbvf.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2009 - 2018 Intel Corporation. */
52 * PTHRESH - MAC will consider prefetch if it has fewer than this number of
54 * Setting this to 0 disables RX descriptor prefetch.
55 * HTHRESH - MAC will only prefetch if there are at least this many descriptors
58 * WTHRESH - RX descriptor writeback threshold - MAC will delay writing back
79 #define IGBVF_MNG_VLAN_NONE (-1)
84 #define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
97 * so a DMA handle can be stored along with the buffer
100 dma_addr_t dma; member
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | ti,gpmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
16 - Asynchronous SRAM-like memories and ASICs
17 - Asynchronous, synchronous, and page mode burst NOR flash
18 - NAND flash
19 - Pseudo-SRAM devices
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| /kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/mt7915/ |
| D | dma.c | 1 // SPDX-License-Identifier: ISC
5 #include "../dma.h"
11 struct mt7915_dev *dev = phy->dev; in mt7915_init_tx_queues()
13 if (mtk_wed_device_active(&phy->dev->mt76.mmio.wed)) { in mt7915_init_tx_queues()
14 if (is_mt798x(&dev->mt76)) in mt7915_init_tx_queues()
19 idx -= MT_TXQ_ID(0); in mt7915_init_tx_queues()
22 return mt76_connac_init_tx_queues(phy->mt76, idx, n_desc, ring_base, in mt7915_init_tx_queues()
32 mt76_connac_tx_cleanup(&dev->mt76); in mt7915_poll_tx()
43 dev->wfdma_mask |= (1 << (q)); \ in mt7915_dma_config()
44 dev->q_int_mask[(q)] = int; \ in mt7915_dma_config()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | l2c2x0.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
16 models (Note 1). Some of the properties that are just prefixed "cache-*" are
22 cache controllers as found in e.g. Cortex-A15/A7/A57/A53. These
28 - $ref: /schemas/cache-controller.yaml#
33 - enum:
34 - arm,pl310-cache
35 - arm,l220-cache
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/cache/ |
| D | l2c2x0.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
16 models (Note 1). Some of the properties that are just prefixed "cache-*" are
22 cache controllers as found in e.g. Cortex-A15/A7/A57/A53. These
28 - $ref: /schemas/cache-controller.yaml#
33 - enum:
34 - arm,pl310-cache
35 - arm,l220-cache
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| /kernel/linux/linux-5.10/arch/arm/mm/ |
| D | cache-fa.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/cache-fa.S
6 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
8 * Based on cache-v4wb.S:
9 * Copyright (C) 1997-2002 Russell king
19 #include "proc-macros.S"
71 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
80 * - start - start address (inclusive, page aligned)
81 * - end - end address (exclusive, page aligned)
82 * - flags - vma_area_struct flags describing address space
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| /kernel/linux/linux-6.6/arch/arm/mm/ |
| D | cache-fa.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/cache-fa.S
6 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
8 * Based on cache-v4wb.S:
9 * Copyright (C) 1997-2002 Russell king
18 #include "proc-macros.S"
70 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
79 * - start - start address (inclusive, page aligned)
80 * - end - end address (exclusive, page aligned)
81 * - flags - vma_area_struct flags describing address space
[all …]
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| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | omap2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
20 #include <linux/omap-dma.h>
29 #include <linux/omap-gpmc.h>
30 #include <linux/platform_data/mtd-nand-omap2.h>
32 #define DRIVER_NAME "omap2-nand"
157 struct dma_chan *dma; member
182 * omap_prefetch_enable - configures and starts prefetch transfer
185 * @dma_mode: dma mode enable (1) or disable (0)
187 * @is_write: prefetch read(0) or write post(1) mode
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| /kernel/linux/linux-6.6/drivers/net/ethernet/pasemi/ |
| D | pasemi_mac.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006-2007 PA Semi, Inc
17 #include <asm/dma-mapping.h>
23 #include <linux/prefetch.h>
34 * unaligned DMA, so make sure the data is aligned instead.
40 * - Multicast support
41 * - Large MTU support
42 * - Multiqueue RX/TX
63 static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
85 return pasemi_read_mac_reg(mac->dma_if, reg); in read_mac_reg()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/pasemi/ |
| D | pasemi_mac.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006-2007 PA Semi, Inc
17 #include <asm/dma-mapping.h>
23 #include <linux/prefetch.h>
34 * unaligned DMA, so make sure the data is aligned instead.
40 * - Multicast support
41 * - Large MTU support
42 * - Multiqueue RX/TX
63 static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
85 return pasemi_read_mac_reg(mac->dma_if, reg); in read_mac_reg()
[all …]
|