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/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsa8775p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include "sa8775p-ride.dtsi"
12 compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
16 phy-mode = "sgmii";
20 phy-mode = "sgmii";
24 compatible = "snps,dwmac-mdio";
25 #address-cells = <1>;
26 #size-cells = <0>;
29 compatible = "ethernet-phy-id0141.0dd4";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dstm32mp151a-prtt1c.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "stm32mp151a-prtt1l.dtsi"
14 clock_ksz9031: clock-ksz9031 {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <25000000>;
20 clock_sja1105: clock-sja1105 {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
[all …]
Dstm32mp151a-prtt1a.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "stm32mp151a-prtt1l.dtsi"
16 phy-handle = <&phy0>;
21 phy0: ethernet-phy@0 {
22 compatible = "ethernet-phy-id2000.0181";
24 interrupts-extended = <&gpioa 4 IRQ_TYPE_LEVEL_LOW>;
25 reset-gpios = <&gpioa 3 GPIO_ACTIVE_LOW>;
26 reset-assert-us = <10>;
27 reset-deassert-us = <35>;
[all …]
Dstm32mp151a-prtt1s.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "stm32mp151a-prtt1l.dtsi"
16 phy-handle = <&phy0>;
20 pinctrl-names = "default", "sleep";
21 pinctrl-0 = <&i2c1_pins_a>;
22 pinctrl-1 = <&i2c1_sleep_pins_a>;
23 clock-frequency = <100000>;
24 /delete-property/dmas;
25 /delete-property/dma-names;
[all …]
/kernel/linux/linux-5.10/drivers/reset/
Dreset-imx7.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * i.MX7 System Reset Controller (SRC) driver
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/reset/imx7-reset.h>
17 #include <dt-bindings/reset/imx8mq-reset.h>
18 #include <dt-bindings/reset/imx8mp-reset.h>
51 const struct imx7_src_signal *signal = &imx7src->signals[id]; in imx7_reset_update()
53 return regmap_update_bits(imx7src->regmap, in imx7_reset_update()
54 signal->offset, signal->bit, value); in imx7_reset_update()
92 unsigned long id, bool assert) in imx7_reset_set() argument
[all …]
/kernel/linux/linux-6.6/drivers/reset/
Dreset-imx7.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * i.MX7 System Reset Controller (SRC) driver
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/reset/imx7-reset.h>
17 #include <dt-bindings/reset/imx8mq-reset.h>
18 #include <dt-bindings/reset/imx8mp-reset.h>
51 const struct imx7_src_signal *signal = &imx7src->signals[id]; in imx7_reset_update()
53 return regmap_update_bits(imx7src->regmap, in imx7_reset_update()
54 signal->offset, signal->bit, value); in imx7_reset_update()
92 unsigned long id, bool assert) in imx7_reset_set() argument
[all …]
/kernel/linux/linux-6.6/drivers/clk/qcom/
Dreset.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/reset-controller.h>
12 #include "reset.h"
18 rcdev->ops->assert(rcdev, id); in qcom_reset()
19 fsleep(rst->reset_map[id].udelay ?: 1); /* use 1 us as default */ in qcom_reset()
21 rcdev->ops->deassert(rcdev, id); in qcom_reset()
26 unsigned long id, bool assert) in qcom_reset_set_assert() argument
33 map = &rst->reset_map[id]; in qcom_reset_set_assert()
34 mask = map->bitmask ? map->bitmask : BIT(map->bit); in qcom_reset_set_assert()
36 regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); in qcom_reset_set_assert()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
24 "#address-cells":
27 "#size-cells":
30 reset-gpios:
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
24 "#address-cells":
27 "#size-cells":
30 reset-gpios:
[all …]
Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
/kernel/linux/linux-5.10/drivers/clk/qcom/
Dreset.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/reset-controller.h>
12 #include "reset.h"
18 rcdev->ops->assert(rcdev, id); in qcom_reset()
19 fsleep(rst->reset_map[id].udelay ?: 1); /* use 1 us as default */ in qcom_reset()
21 rcdev->ops->deassert(rcdev, id); in qcom_reset()
33 map = &rst->reset_map[id]; in qcom_reset_assert()
34 mask = map->bitmask ? map->bitmask : BIT(map->bit); in qcom_reset_assert()
36 return regmap_update_bits(rst->regmap, map->reg, mask, mask); in qcom_reset_assert()
47 map = &rst->reset_map[id]; in qcom_reset_deassert()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3328-nanopi-r2c.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>
9 /dts-v1/;
10 #include "rk3328-nanopi-r2s.dts"
14 compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328";
18 phy-handle = <&yt8521s>;
23 /delete-node/ ethernet-phy@1;
25 yt8521s: ethernet-phy@3 {
26 compatible = "ethernet-phy-ieee802.3-c22";
29 motorcomm,clk-out-frequency-hz = <125000000>;
[all …]
Drk3328-orangepi-r1-plus-lts.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>
9 /dts-v1/;
10 #include "rk3328-orangepi-r1-plus.dts"
14 compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328";
18 /delete-property/ tx_delay;
19 /delete-property/ rx_delay;
21 phy-handle = <&yt8531c>;
22 phy-mode = "rgmii-id";
25 /delete-node/ ethernet-phy@1;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/
Dnvidia,tegra124-soctherm.txt4 or interrupt-based thermal monitoring, CPU and GPU throttling based
10 - compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
11 For Tegra132, must contain "nvidia,tegra132-soctherm".
12 For Tegra210, must contain "nvidia,tegra210-soctherm".
13 - reg : Should contain at least 2 entries for each entry in reg-names:
14 - SOCTHERM register set
15 - Tegra CAR register set: Required for Tegra124 and Tegra210.
16 - CCROC register set: Required for Tegra132.
17 - reg-names : Should contain at least 2 entries:
18 - soctherm-reg
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gxbb-kii-pro.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb-p20x.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
14 compatible = "videostrong,kii-pro", "amlogic,meson-gxbb";
18 compatible = "gpio-leds";
21 default-state = "off";
27 gpio-keys-polled {
[all …]
Dmeson-gxm-q200.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
11 #include "meson-gxm.dtsi"
12 #include "meson-gx-p23x-q20x.dtsi"
15 compatible = "amlogic,q200", "amlogic,s912", "amlogic,meson-gxm";
18 adc-keys {
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
21 io-channel-names = "buttons";
[all …]
Dmeson-gxl-s905d-p230.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
11 #include "meson-gxl-s905d.dtsi"
12 #include "meson-gx-p23x-q20x.dtsi"
15 compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl";
18 adc-keys {
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
21 io-channel-names = "buttons";
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/
Dmeson-gxm-q200.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
11 #include "meson-gxm.dtsi"
12 #include "meson-gx-p23x-q20x.dtsi"
15 compatible = "amlogic,q200", "amlogic,s912", "amlogic,meson-gxm";
18 adc-keys {
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
21 io-channel-names = "buttons";
[all …]
Dmeson-gxm-gt1-ultimate.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxm.dtsi"
9 #include "meson-gx-p23x-q20x.dtsi"
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
14 compatible = "azw,gt1-ultimate", "amlogic,s912", "amlogic,meson-gxm";
18 compatible = "gpio-leds";
20 led-white {
24 default-state = "on";
[all …]
Dmeson-gxl-s905d-p230.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
11 #include "meson-gxl-s905d.dtsi"
12 #include "meson-gx-p23x-q20x.dtsi"
15 compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl";
18 adc-keys {
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
21 io-channel-names = "buttons";
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8mp-debix-som-a-bmb-08.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "imx8mp-debix-som-a.dtsi"
12 model = "Polyhex i.MX8MPlus Debix SOM A on BMB-08";
13 compatible = "polyhex,imx8mp-debix-som-a-bmb-08", "polyhex,imx8mp-debix-som-a",
22 stdout-path = &uart2;
25 reg_baseboard_vdd3v3: regulator-baseboard-vdd3v3 {
26 compatible = "regulator-fixed";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
[all …]
Dimx8dxl-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "fsl,imx8dxl-evk", "fsl,imx8dxl";
22 stdout-path = &lpuart0;
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
37 * This will be automatically added to dtb if OP-TEE is installed.
40 * no-map;
46 compatible = "shared-dma-pool";
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/thermal/
Dnvidia,tegra124-soctherm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/nvidia,tegra124-soctherm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 polled or interrupt-based thermal monitoring, CPU and GPU throttling based
21 - nvidia,tegra124-soctherm
22 - nvidia,tegra132-soctherm
23 - nvidia,tegra210-soctherm
[all …]

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