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/kernel/linux/linux-6.6/drivers/gpu/drm/vmwgfx/
Dvmwgfx_shader.c45 struct vmw_shader shader; member
127 * Shader management:
167 struct vmw_shader *shader = vmw_res_to_shader(res); in vmw_gb_shader_init() local
186 shader->size = size; in vmw_gb_shader_init()
187 shader->type = type; in vmw_gb_shader_init()
188 shader->num_input_sig = num_input_sig; in vmw_gb_shader_init()
189 shader->num_output_sig = num_output_sig; in vmw_gb_shader_init()
196 * GB shader code:
202 struct vmw_shader *shader = vmw_res_to_shader(res); in vmw_gb_shader_create() local
214 DRM_ERROR("Failed to allocate a shader id.\n"); in vmw_gb_shader_create()
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Dvmwgfx_binding.h95 * struct vmw_ctx_bindinfo_shader - Shader binding metadata
179 * struct vmw_dx_shader_bindings - per shader type context binding state
181 * @shader: The shader binding for this shader type
182 * @const_buffer: Const buffer bindings for this shader type.
183 * @shader_res: Shader resource view bindings for this shader type.
184 * @dirty_sr: Bitmap tracking individual shader resource bindings changes
190 struct vmw_ctx_bindinfo_shader shader; member
Dvmwgfx_binding.c50 * (surface, shader or even DX query) is conceptually a context binding that
79 * @per_shader: Per shader-type bindings.
161 offsetof(struct vmw_ctx_binding_state, per_shader[0].shader),
162 offsetof(struct vmw_ctx_binding_state, per_shader[1].shader),
163 offsetof(struct vmw_ctx_binding_state, per_shader[2].shader),
164 offsetof(struct vmw_ctx_binding_state, per_shader[3].shader),
165 offsetof(struct vmw_ctx_binding_state, per_shader[4].shader),
166 offsetof(struct vmw_ctx_binding_state, per_shader[5].shader),
298 * @shader_slot: The shader slot of the binding. If none, then set to 0.
333 * @shader_slot: The shader slot of the binding.
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/kernel/linux/linux-5.10/drivers/gpu/drm/vmwgfx/
Dvmwgfx_shader.c44 struct vmw_shader shader; member
129 * Shader management:
169 struct vmw_shader *shader = vmw_res_to_shader(res); in vmw_gb_shader_init() local
188 shader->size = size; in vmw_gb_shader_init()
189 shader->type = type; in vmw_gb_shader_init()
190 shader->num_input_sig = num_input_sig; in vmw_gb_shader_init()
191 shader->num_output_sig = num_output_sig; in vmw_gb_shader_init()
198 * GB shader code:
204 struct vmw_shader *shader = vmw_res_to_shader(res); in vmw_gb_shader_create() local
216 DRM_ERROR("Failed to allocate a shader id.\n"); in vmw_gb_shader_create()
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Dvmwgfx_binding.h95 * struct vmw_ctx_bindinfo_shader - Shader binding metadata
179 * struct vmw_dx_shader_bindings - per shader type context binding state
181 * @shader: The shader binding for this shader type
182 * @const_buffer: Const buffer bindings for this shader type.
183 * @shader_res: Shader resource view bindings for this shader type.
184 * @dirty_sr: Bitmap tracking individual shader resource bindings changes
190 struct vmw_ctx_bindinfo_shader shader; member
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/adreno/
Da6xx_gpu_state.h188 #define SHADER(_type, _size) \ macro
196 SHADER(A6XX_TP0_TMO_DATA, 0x200),
197 SHADER(A6XX_TP0_SMO_DATA, 0x80),
198 SHADER(A6XX_TP0_MIPMAP_BASE_DATA, 0x3c0),
199 SHADER(A6XX_TP1_TMO_DATA, 0x200),
200 SHADER(A6XX_TP1_SMO_DATA, 0x80),
201 SHADER(A6XX_TP1_MIPMAP_BASE_DATA, 0x3c0),
202 SHADER(A6XX_SP_INST_DATA, 0x800),
203 SHADER(A6XX_SP_LB_0_DATA, 0x800),
204 SHADER(A6XX_SP_LB_1_DATA, 0x800),
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/kernel/linux/linux-5.10/drivers/gpu/drm/msm/adreno/
Da6xx_gpu_state.h182 #define SHADER(_type, _size) \ macro
190 SHADER(A6XX_TP0_TMO_DATA, 0x200),
191 SHADER(A6XX_TP0_SMO_DATA, 0x80),
192 SHADER(A6XX_TP0_MIPMAP_BASE_DATA, 0x3c0),
193 SHADER(A6XX_TP1_TMO_DATA, 0x200),
194 SHADER(A6XX_TP1_SMO_DATA, 0x80),
195 SHADER(A6XX_TP1_MIPMAP_BASE_DATA, 0x3c0),
196 SHADER(A6XX_SP_INST_DATA, 0x800),
197 SHADER(A6XX_SP_LB_0_DATA, 0x800),
198 SHADER(A6XX_SP_LB_1_DATA, 0x800),
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/kernel/linux/linux-5.10/drivers/gpu/drm/vc4/
Dvc4_validate_shaders.c25 * DOC: Shader validator for VC4.
34 * The shader validator walks over a shader's BO, ensuring that its
39 * Shader BO are immutable for their lifetimes (enforced by not
53 /* IP at the end of the BO, do not read shader[max_ip] */
56 uint64_t *shader; member
87 * stream, even if the shader didn't need to read uniforms in later
94 * a threaded shader, then the other shader running on our
187 uint64_t inst = validation_state->shader[validation_state->ip]; in check_tmu_write()
311 uint64_t inst = validation_state->shader[validation_state->ip]; in validate_uniform_address_write()
390 uint64_t inst = validation_state->shader[validation_state->ip]; in check_reg_write()
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Dvc4_drv.h267 /* Struct for shader validation state, if created by
597 /* This is the BO where we store the validated command lists, shader
603 * This tracks the per-shader-record state (packet 64) that
604 * determines the length of the shader record and the offset
611 * shader state.
616 /** How many shader states the user declared they were using. */
618 /** How many shader state records the validator has seen. */
643 /* Pointers to the shader recs. These paddr gets incremented as CL
645 * (u and v) get incremented and size decremented as the shader recs
730 * For a given shader, each time a shader state record references it, we need
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Dvc4_validate.c120 DRM_DEBUG("Trying to use shader BO as something other than " in vc4_use_bo()
121 "a shader\n"); in vc4_use_bo()
267 DRM_DEBUG("shader state must precede primitives\n"); in validate_indexed_prim_list()
304 DRM_DEBUG("shader state must precede primitives\n"); in validate_gl_array_primitive()
327 DRM_DEBUG("More requests for shader states than declared\n"); in validate_gl_shader_state()
335 DRM_DEBUG("high bits set in GL shader rec reference\n"); in validate_gl_shader_state()
767 DRM_DEBUG("overflowed shader recs reading %d handles " in validate_gl_shader_rec()
777 DRM_DEBUG("overflowed shader recs copying %db packet " in validate_gl_shader_rec()
786 /* Shader recs have to be aligned to 16 bytes (due to the attribute in validate_gl_shader_rec()
787 * flags being in the low bytes), so round the next validated shader in validate_gl_shader_rec()
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/kernel/linux/linux-6.6/drivers/gpu/drm/vc4/
Dvc4_validate_shaders.c25 * DOC: Shader validator for VC4.
34 * The shader validator walks over a shader's BO, ensuring that its
39 * Shader BO are immutable for their lifetimes (enforced by not
53 /* IP at the end of the BO, do not read shader[max_ip] */
56 uint64_t *shader; member
87 * stream, even if the shader didn't need to read uniforms in later
94 * a threaded shader, then the other shader running on our
187 uint64_t inst = validation_state->shader[validation_state->ip]; in check_tmu_write()
311 uint64_t inst = validation_state->shader[validation_state->ip]; in validate_uniform_address_write()
390 uint64_t inst = validation_state->shader[validation_state->ip]; in check_reg_write()
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Dvc4_drv.h264 /* Struct for shader validation state, if created by
690 /* This is the BO where we store the validated command lists, shader
696 * This tracks the per-shader-record state (packet 64) that
697 * determines the length of the shader record and the offset
704 * shader state.
709 /** How many shader states the user declared they were using. */
711 /** How many shader state records the validator has seen. */
736 /* Pointers to the shader recs. These paddr gets incremented as CL
738 * (u and v) get incremented and size decremented as the shader recs
825 * For a given shader, each time a shader state record references it, we need
[all …]
Dvc4_validate.c124 DRM_DEBUG("Trying to use shader BO as something other than " in vc4_use_bo()
125 "a shader\n"); in vc4_use_bo()
275 DRM_DEBUG("shader state must precede primitives\n"); in validate_indexed_prim_list()
312 DRM_DEBUG("shader state must precede primitives\n"); in validate_gl_array_primitive()
335 DRM_DEBUG("More requests for shader states than declared\n"); in validate_gl_shader_state()
343 DRM_DEBUG("high bits set in GL shader rec reference\n"); in validate_gl_shader_state()
779 DRM_DEBUG("overflowed shader recs reading %d handles " in validate_gl_shader_rec()
789 DRM_DEBUG("overflowed shader recs copying %db packet " in validate_gl_shader_rec()
798 /* Shader recs have to be aligned to 16 bytes (due to the attribute in validate_gl_shader_rec()
799 * flags being in the low bytes), so round the next validated shader in validate_gl_shader_rec()
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/kernel/linux/linux-5.10/include/uapi/drm/
Dvc4_drm.h95 * coordinate shader to determine where primitives land on the screen,
101 /* Pointer to the shader records.
103 * Shader records are the structures read by the hardware that contain
105 * reference to the shader record has enough information to determine
108 * just stored as __u32s before each shader record passed in.
113 * referenced by the shader.
115 * For each shader state record, there is a set of uniform data in the
123 * because the kernel has to determine the sizes anyway during shader
131 /* Size in bytes of the set of shader records. */
133 /* Number of shader records.
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/kernel/linux/linux-6.6/include/uapi/drm/
Dvc4_drm.h95 * coordinate shader to determine where primitives land on the screen,
101 /* Pointer to the shader records.
103 * Shader records are the structures read by the hardware that contain
105 * reference to the shader record has enough information to determine
108 * just stored as __u32s before each shader record passed in.
113 * referenced by the shader.
115 * For each shader state record, there is a set of uniform data in the
123 * because the kernel has to determine the sizes anyway during shader
131 /* Size in bytes of the set of shader records. */
133 /* Number of shader records.
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/kernel/linux/linux-6.6/drivers/gpu/drm/panfrost/
Dpanfrost_regs.h13 #define GPU_CORE_FEATURES 0x008 /* (RO) Shader Core Features */
87 #define GPU_SHADER_PRESENT_LO 0x100 /* (RO) Shader core present bitmap, low word */
88 #define GPU_SHADER_PRESENT_HI 0x104 /* (RO) Shader core present bitmap, high word */
102 #define SHADER_READY_LO 0x140 /* (RO) Shader core ready bitmap, low word */
103 #define SHADER_READY_HI 0x144 /* (RO) Shader core ready bitmap, high word */
115 #define SHADER_PWRON_LO 0x180 /* (WO) Shader core power on bitmap, low word */
116 #define SHADER_PWRON_HI 0x184 /* (WO) Shader core power on bitmap, high word */
128 #define SHADER_PWROFF_LO 0x1C0 /* (WO) Shader core power off bitmap, low word */
129 #define SHADER_PWROFF_HI 0x1C4 /* (WO) Shader core power off bitmap, high word */
141 #define SHADER_PWRTRANS_LO 0x200 /* (RO) Shader core power transition bitmap, low word */
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/kernel/linux/linux-5.10/drivers/gpu/drm/panfrost/
Dpanfrost_regs.h13 #define GPU_CORE_FEATURES 0x008 /* (RO) Shader Core Features */
86 #define GPU_SHADER_PRESENT_LO 0x100 /* (RO) Shader core present bitmap, low word */
87 #define GPU_SHADER_PRESENT_HI 0x104 /* (RO) Shader core present bitmap, high word */
101 #define SHADER_READY_LO 0x140 /* (RO) Shader core ready bitmap, low word */
102 #define SHADER_READY_HI 0x144 /* (RO) Shader core ready bitmap, high word */
114 #define SHADER_PWRON_LO 0x180 /* (WO) Shader core power on bitmap, low word */
115 #define SHADER_PWRON_HI 0x184 /* (WO) Shader core power on bitmap, high word */
127 #define SHADER_PWROFF_LO 0x1C0 /* (WO) Shader core power off bitmap, low word */
128 #define SHADER_PWROFF_HI 0x1C4 /* (WO) Shader core power off bitmap, high word */
140 #define SHADER_PWRTRANS_LO 0x200 /* (RO) Shader core power transition bitmap, low word */
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/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dmcp77.c203 const int shader = cstate->domain[nv_clk_src_shader]; in mcp77_clk_calc() local
215 /* Calculate clock * 2, so shader clock can use it too */ in mcp77_clk_calc()
239 if (shader == nvkm_clk_read(&clk->base, nv_clk_src_href)) { in mcp77_clk_calc()
242 clock = calc_pll(clk, 0x4020, shader, &N, &M, &P1); in mcp77_clk_calc()
244 out = calc_P((core << 1), shader, &divs); in mcp77_clk_calc()
246 if (abs(shader - out) <= in mcp77_clk_calc()
247 abs(shader - clock) && in mcp77_clk_calc()
281 nvkm_debug(subdev, "shader: hrefm4\n"); in mcp77_clk_calc()
283 nvkm_debug(subdev, "shader: nvpll\n"); in mcp77_clk_calc()
285 nvkm_debug(subdev, "shader: spll\n"); in mcp77_clk_calc()
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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dmcp77.c206 const int shader = cstate->domain[nv_clk_src_shader]; in mcp77_clk_calc() local
218 /* Calculate clock * 2, so shader clock can use it too */ in mcp77_clk_calc()
242 if (shader == nvkm_clk_read(&clk->base, nv_clk_src_href)) { in mcp77_clk_calc()
245 clock = calc_pll(clk, 0x4020, shader, &N, &M, &P1); in mcp77_clk_calc()
247 out = calc_P((core << 1), shader, &divs); in mcp77_clk_calc()
249 if (abs(shader - out) <= in mcp77_clk_calc()
250 abs(shader - clock) && in mcp77_clk_calc()
284 nvkm_debug(subdev, "shader: hrefm4\n"); in mcp77_clk_calc()
286 nvkm_debug(subdev, "shader: nvpll\n"); in mcp77_clk_calc()
288 nvkm_debug(subdev, "shader: spll\n"); in mcp77_clk_calc()
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpu/
Dvivante,gc.yaml35 - description: Shader clock (only required if GPU has feature PIPE_3D)
42 enum: [ bus, core, shader, reg ]
72 clock-names = "bus", "core", "shader";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpu/
Dvivante,gc.yaml35 - description: Shader clock (only required if GPU has feature PIPE_3D)
43 enum: [ bus, core, shader, reg ]
73 clock-names = "bus", "core", "shader";
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdkfd/
Dkfd_flat_memory.c45 * “Flat” shader memory access – These are new shader vector memory
64 * clients (CP/RLC, DMA, SHADER(ifetch, scalar, and vector ops)) to access
121 * that references this memory descriptor. This is the case for shader
123 * locations of assets (ex. the shader program location). In these cases
125 * address in the descriptor (ex. V# or T# or shader program location)
128 * space. For example a shader program cannot jump in/out between ATC
134 * S_LOAD and FLAT_* shader memory instructions where we have 64b pointers
178 * the shader for reporting a “memory violation” back to the
257 * For the S_LOAD and FLAT_* shader operations, the SUA mode is decoded from
Dkfd_dbgmgr.h80 uint32_t ShaderArray:1; /* Shader array */
86 uint32_t ShaderEngine:2;/* Shader engine */
113 * by CPU and GPU shader code within the process to set and query the content
115 * runtime and potentially GPU shader code interfacing with the HSA runtime.
130 HSA_EVENTTYPE_HW_EXCEPTION = 3, /* GPU shader exception event */
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/
Dkfd_flat_memory.c46 * “Flat” shader memory access – These are new shader vector memory
65 * clients (CP/RLC, DMA, SHADER(ifetch, scalar, and vector ops)) to access
122 * that references this memory descriptor. This is the case for shader
124 * locations of assets (ex. the shader program location). In these cases
126 * address in the descriptor (ex. V# or T# or shader program location)
129 * space. For example a shader program cannot jump in/out between ATC
135 * S_LOAD and FLAT_* shader memory instructions where we have 64b pointers
179 * the shader for reporting a “memory violation” back to the
258 * For the S_LOAD and FLAT_* shader operations, the SUA mode is decoded from
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/
Dgpu.txt33 - zap-shader: For a5xx and a6xx devices this node contains a memory-region that
34 points to reserved memory to store the zap shader that can be used to help
36 - firmware-name: optional property of the 'zap-shader' node, listing the
145 zap-shader {

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