Searched +full:shared +full:- +full:interrupt (Results 1 – 25 of 1060) sorted by relevance
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| /kernel/linux/linux-5.10/drivers/net/ipa/ |
| D | ipa_uc.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2020 Linaro Ltd.
23 * The microcontroller can generate two interrupts to the AP. One interrupt
26 * addition, the AP can interrupt the microcontroller by writing a register.
30 * AP and the IPA microcontroller. Each side writes data to the shared area
32 * to the interrupt. Some information found in the shared area is currently
33 * unused. All remaining space in the shared area is reserved, and must not
42 * struct ipa_uc_mem_area - AP/microcontroller shared memory area
43 * @command: command code (AP->microcontroller)
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| /kernel/linux/linux-6.6/arch/mips/include/asm/ |
| D | mips-gic.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 # error Please include asm/mips-cps.h rather than asm/mips-gic.h
29 /* For read-only shared registers */
33 /* For read-write shared registers */
37 /* For read-only local registers */
42 /* For read-write local registers */
47 /* For read-only shared per-interrupt registers */
60 /* For read-write shared per-interrupt registers */
71 /* For read-only local per-interrupt registers */
78 /* For read-write local per-interrupt registers */
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| /kernel/linux/linux-5.10/arch/mips/include/asm/ |
| D | mips-gic.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 # error Please include asm/mips-cps.h rather than asm/mips-gic.h
29 /* For read-only shared registers */
33 /* For read-write shared registers */
37 /* For read-only local registers */
42 /* For read-write local registers */
47 /* For read-only shared per-interrupt registers */
60 /* For read-write shared per-interrupt registers */
71 /* For read-only local per-interrupt registers */
78 /* For read-write local per-interrupt registers */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | axp20x.txt | 4 axp152 (X-Powers)
5 axp202 (X-Powers)
6 axp209 (X-Powers)
7 axp221 (X-Powers)
8 axp223 (X-Powers)
9 axp803 (X-Powers)
10 axp806 (X-Powers)
11 axp809 (X-Powers)
12 axp813 (X-Powers)
20 - compatible: should be one of:
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| /kernel/linux/linux-6.6/drivers/net/ipa/ |
| D | ipa_uc.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2022 Linaro Ltd.
24 * The microcontroller can generate two interrupts to the AP. One interrupt
27 * addition, the AP can interrupt the microcontroller by writing a register.
31 * AP and the IPA microcontroller. Each side writes data to the shared area
33 * to the interrupt. Some information found in the shared area is currently
34 * unused. All remaining space in the shared area is reserved, and must not
43 * struct ipa_uc_mem_area - AP/microcontroller shared memory area
44 * @command: command code (AP->microcontroller)
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/ |
| D | nvidia,tegra186-hsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/nvidia,tegra186-hsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 The features that HSP supported are shared mailboxes, shared
29 For shared mailboxes, the first cell composed of two fields:
30 - bits 15..8:
31 A bit mask of flags that further specifies the type of shared
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/ |
| D | nvidia,tegra186-hsp.txt | 9 The features that HSP supported are shared mailboxes, shared semaphores,
13 - name : Should be hsp
14 - compatible
17 - "nvidia,tegra186-hsp"
18 - "nvidia,tegra194-hsp", "nvidia,tegra186-hsp"
19 - reg : Offset and length of the register set for the device.
20 - interrupt-names
22 Contains a list of names for the interrupts described by the interrupt
24 - "doorbell"
25 - "sharedN", where 'N' is a number from zero up to the number of
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/ |
| D | st,spear3xx-shirq.txt | 1 * SPEAr Shared IRQ layer (shirq)
3 SPEAr3xx architecture includes shared/multiplexed irqs for certain set
4 of devices. The multiplexor provides a single interrupt to parent
5 interrupt controller (VIC) on behalf of a group of devices.
13 A single node in the device tree is used to describe the shared
14 interrupt multiplexor (one node for all groups). A group in the
15 interrupt controller shares config/control registers with other groups.
16 For example, a 32-bit interrupt enable/disable config register can
17 accommodate up to 4 interrupt groups.
20 - compatible: should be, either of
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | st,spear3xx-shirq.txt | 1 * SPEAr Shared IRQ layer (shirq)
3 SPEAr3xx architecture includes shared/multiplexed irqs for certain set
4 of devices. The multiplexor provides a single interrupt to parent
5 interrupt controller (VIC) on behalf of a group of devices.
13 A single node in the device tree is used to describe the shared
14 interrupt multiplexor (one node for all groups). A group in the
15 interrupt controller shares config/control registers with other groups.
16 For example, a 32-bit interrupt enable/disable config register can
17 accommodate up to 4 interrupt groups.
20 - compatible: should be, either of
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| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| D | prcm-common.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * Copyright (C) 2007-2009, 2011 Texas Instruments, Inc.
9 * Copyright (C) 2007-2009 Nokia Corporation
30 /* Chip-specific module offsets */
37 #define OMAP3430_IVA2_MOD -0x800
66 /* 24XX register bits shared between CM & PRM registers */
68 /* CM_FCLKEN1_CORE, CM_ICLKEN1_CORE, PM_WKEN1_CORE shared bits */
108 /* CM_FCLKEN2_CORE, CM_ICLKEN2_CORE, PM_WKEN2_CORE shared bits */
122 /* CM_ICLKEN2_CORE, PM_WKEN2_CORE shared bits */
130 /* CM_IDLEST1_CORE, PM_WKST1_CORE shared bits */
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| /kernel/linux/linux-6.6/arch/arm/mach-omap2/ |
| D | prcm-common.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * Copyright (C) 2007-2009, 2011 Texas Instruments, Inc.
9 * Copyright (C) 2007-2009 Nokia Corporation
30 /* Chip-specific module offsets */
37 #define OMAP3430_IVA2_MOD -0x800
66 /* 24XX register bits shared between CM & PRM registers */
68 /* CM_FCLKEN1_CORE, CM_ICLKEN1_CORE, PM_WKEN1_CORE shared bits */
108 /* CM_FCLKEN2_CORE, CM_ICLKEN2_CORE, PM_WKEN2_CORE shared bits */
122 /* CM_ICLKEN2_CORE, PM_WKEN2_CORE shared bits */
130 /* CM_IDLEST1_CORE, PM_WKST1_CORE shared bits */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | brcm,bcm2835-dma.txt | 11 - compatible: Should be "brcm,bcm2835-dma".
12 - reg: Should contain DMA registers location and length.
13 - interrupts: Should contain the DMA interrupts associated
15 - interrupt-names: Should contain the names of the interrupt
17 Use "dma-shared-all" for the common interrupt line
18 that is shared by all dma channels.
19 - #dma-cells: Must be <1>, the cell in the dmas property of the
21 - brcm,dma-channel-mask: Bit mask representing the channels
28 compatible = "brcm,bcm2835-dma";
41 /* dma channel 11-14 share one irq */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ti/ |
| D | ti,j721e-dss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Jyri Sarha <jsarha@ti.com>
12 - Tomi Valkeinen <tomi.valkeinen@ti.com>
22 const: ti,j721e-dss
26 - description: common_m DSS Master common
27 - description: common_s0 DSS Shared common 0
28 - description: common_s1 DSS Shared common 1
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/ti/ |
| D | ti,j721e-dss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jyri Sarha <jsarha@ti.com>
12 - Tomi Valkeinen <tomi.valkeinen@ti.com>
22 const: ti,j721e-dss
26 - description: common_m DSS Master common
27 - description: common_s0 DSS Shared common 0
28 - description: common_s1 DSS Shared common 1
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| /kernel/linux/linux-6.6/drivers/net/ethernet/aquantia/atlantic/hw_atl2/ |
| D | hw_atl2_llh.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
13 /* Set TX Interrupt Moderation Control Register */
41 /* set tx random TC-queue mapping enable bit */
72 /* get data from firmware shared input buffer */
76 /* set data into firmware shared input buffer */
80 /* get data from firmware shared output buffer */
84 /* set host finished write shared buffer indication */
87 /* get mcp finished read shared buffer indication */
96 /* get host interrupt request */
99 /* clear host interrupt request */
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| /kernel/linux/linux-5.10/drivers/net/ethernet/aquantia/atlantic/hw_atl2/ |
| D | hw_atl2_llh.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
13 /* Set TX Interrupt Moderation Control Register */
41 /* set tx random TC-queue mapping enable bit */
72 /* get data from firmware shared input buffer */
76 /* set data into firmware shared input buffer */
80 /* get data from firmware shared output buffer */
84 /* set host finished write shared buffer indication */
87 /* get mcp finished read shared buffer indication */
96 /* get host interrupt request */
99 /* clear host interrupt request */
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,smsm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Shared Memory State Machine
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 The Shared Memory State Machine facilitates broadcasting of single bit state
25 '#address-cells':
28 qcom,local-host:
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | gpio-sprd.txt | 3 The controller's registers are organized as sets of sixteen 16-bit
5 interrupt is shared for all of the banks handled by the controller.
8 - compatible: Should be "sprd,sc9860-gpio".
9 - reg: Define the base and range of the I/O address space containing
11 - gpio-controller: Marks the device node as a GPIO controller.
12 - #gpio-cells: Should be <2>. The first cell is the gpio number and
14 - interrupt-controller: Marks the device node as an interrupt controller.
15 - #interrupt-cells: Should be <2>. Specifies the number of cells needed
16 to encode interrupt source.
17 - interrupts: Should be the port interrupt shared by all the gpios.
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| /kernel/linux/linux-6.6/drivers/tee/optee/ |
| D | optee_smc.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
3 * Copyright (c) 2015-2021, Linaro Limited
8 #include <linux/arm-smccc.h>
28 * Normal cached memory (write-back), shareable for SMP systems and not
36 * 32-bit registers.
44 * 384fb3e0-e7f8-11e3-af63-0002a5d5c51b.
75 * Used by non-secure world to figure out which Trusted OS is installed.
78 * Returns UUID in a0-4 in the same way as OPTEE_SMC_CALLS_UID
88 * Used by non-secure world to figure out which version of the Trusted OS
92 * Returns revision in a0-1 in the same way as OPTEE_SMC_CALLS_REVISION
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | stm32mp15xx-osd32.dtsi | 1 /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
3 * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
7 #include "stm32mp15-pinctrl.dtsi"
9 #include <dt-bindings/mfd/st,stpmic1.h>
12 reserved-memory {
13 #address-cells = <1>;
14 #size-cells = <1>;
18 compatible = "shared-dma-pool";
20 no-map;
24 compatible = "shared-dma-pool";
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/st/ |
| D | stm32mp15xx-osd32.dtsi | 1 /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
3 * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
7 #include "stm32mp15-pinctrl.dtsi"
9 #include <dt-bindings/mfd/st,stpmic1.h>
12 reserved-memory {
13 #address-cells = <1>;
14 #size-cells = <1>;
18 compatible = "shared-dma-pool";
20 no-map;
24 compatible = "shared-dma-pool";
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| /kernel/linux/linux-6.6/Documentation/power/ |
| D | suspend-and-interrupts.rst | 10 -----------------------------------
12 Device interrupt request lines (IRQs) are generally disabled during system
14 ->prepare, ->suspend and ->suspend_late callbacks have been executed for all
21 interrupt handlers for shared IRQs that device drivers implementing them were
29 Device IRQs are re-enabled during system resume, right before the "early" phase
30 of resuming devices (that is, before starting to execute ->resume_early
35 ------------------------
38 suspend-resume cycle, including the "noirq" phases of suspending and resuming
41 but also to IPIs and to some other special-purpose interrupts.
44 requesting a special-purpose interrupt. It causes suspend_device_irqs() to
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| /kernel/linux/linux-5.10/Documentation/power/ |
| D | suspend-and-interrupts.rst | 10 -----------------------------------
12 Device interrupt request lines (IRQs) are generally disabled during system
14 ->prepare, ->suspend and ->suspend_late callbacks have been executed for all
21 interrupt handlers for shared IRQs that device drivers implementing them were
29 Device IRQs are re-enabled during system resume, right before the "early" phase
30 of resuming devices (that is, before starting to execute ->resume_early
35 ------------------------
38 suspend-resume cycle, including the "noirq" phases of suspending and resuming
41 but also to IPIs and to some other special-purpose interrupts.
44 requesting a special-purpose interrupt. It causes suspend_device_irqs() to
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/ |
| D | sprd,gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Orson Zhai <orsonzhai@gmail.com>
12 - Baolin Wang <baolin.wang7@gmail.com>
13 - Chunyan Zhang <zhang.lyra@gmail.com>
16 The controller's registers are organized as sets of sixteen 16-bit
18 interrupt is shared for all of the banks handled by the controller.
23 - const: sprd,sc9860-gpio
24 - items:
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| /kernel/liteos_m/components/dynlink/ |
| D | los_dynlink.h | 2 * Copyright (c) 2021-2022 Huawei Device Co., Ltd. All rights reserved.
75 #define ELF_ALIGN_UP(a, b) (((a) + ((b) - 1)) & ~((b) - 1))
76 #define ELF_ALIGN_DOWN(a, b) ((a) & ~((b) - 1))
77 #define ELF_ALIGN_OFFSET(a, b) ((a) & ((b) - 1))
143 * @brief Load the shared library file named by the NULL-terminated string filename and
146 * @param fileName The name pointer of shared library.
147 * @param pool The heap for shared library to load. If the parameter, pool, is NULL, then
149 * then the shared library will be loaded to the heap by pool.
153 * of memory to initialize the pool. LOS_SoLoad must not be called in interrupt callback.
155 * @return Return NULL if error. Return non-NULL if success.
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