| /kernel/linux/linux-6.6/arch/arm/mach-hisi/ |
| D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on arch/arm/mach-vexpress/platsmp.c, Copyright (C) 2002 ARM Ltd.
7 #include <linux/smp.h>
28 writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2)); in hi3xxx_set_cpu_jump()
36 return readl_relaxed(ctrl_base + ((cpu - 1) << 2)); in hi3xxx_get_cpu_jump()
59 u32 offset = 0; in hi3xxx_smp_prepare_cpus() local
74 if (of_property_read_u32(np, "smp-offset", &offset) < 0) { in hi3xxx_smp_prepare_cpus()
76 pr_err("failed to find smp-offset property\n"); in hi3xxx_smp_prepare_cpus()
79 ctrl_base += offset; in hi3xxx_smp_prepare_cpus()
112 writel_relaxed(0xe51ff004, virt); /* ldr pc, [pc, #-4] */ in hix5hd2_set_scu_boot_addr()
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| /kernel/linux/linux-5.10/arch/arm/mach-hisi/ |
| D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on arch/arm/mach-vexpress/platsmp.c, Copyright (C) 2002 ARM Ltd.
7 #include <linux/smp.h>
28 writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2)); in hi3xxx_set_cpu_jump()
36 return readl_relaxed(ctrl_base + ((cpu - 1) << 2)); in hi3xxx_get_cpu_jump()
59 u32 offset = 0; in hi3xxx_smp_prepare_cpus() local
74 if (of_property_read_u32(np, "smp-offset", &offset) < 0) { in hi3xxx_smp_prepare_cpus()
76 pr_err("failed to find smp-offset property\n"); in hi3xxx_smp_prepare_cpus()
79 ctrl_base += offset; in hi3xxx_smp_prepare_cpus()
112 writel_relaxed(0xe51ff004, virt); /* ldr pc, [pc, #-4] */ in hix5hd2_set_scu_boot_addr()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/cpu-enable-method/ |
| D | al,alpine-smp | 2 Secondary CPU enable-method "al,alpine-smp" binding
5 This document describes the "al,alpine-smp" method for
7 "al,alpine-smp" enable method should be defined in the
10 Enable method name: "al,alpine-smp"
12 Compatible CPUs: "arm,cortex-a15"
17 "al,alpine-cpu-resume" and "al,alpine-nb-service".
26 - compatible : Should contain "al,alpine-cpu-resume".
27 - reg : Offset and length of the register set for the device
30 * Alpine System-Fabric Service Registers
32 The System-Fabric Service Registers allow various operation on CPU and
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/cpu-enable-method/ |
| D | al,alpine-smp | 2 Secondary CPU enable-method "al,alpine-smp" binding
5 This document describes the "al,alpine-smp" method for
7 "al,alpine-smp" enable method should be defined in the
10 Enable method name: "al,alpine-smp"
12 Compatible CPUs: "arm,cortex-a15"
17 "al,alpine-cpu-resume" and "al,alpine-nb-service".
26 - compatible : Should contain "al,alpine-cpu-resume".
27 - reg : Offset and length of the register set for the device
30 * Alpine System-Fabric Service Registers
32 The System-Fabric Service Registers allow various operation on CPU and
[all …]
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| /kernel/linux/linux-6.6/arch/powerpc/kernel/ |
| D | smp-tbsync.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Smp timebase synchronization for ppc.
11 #include <linux/smp.h>
15 #include <asm/smp.h>
42 tbsync->race_result = add; in enter_contest()
57 tbsync->ack = 1; in smp_generic_take_timebase()
58 while (!tbsync->handshake) in smp_generic_take_timebase()
62 cmd = tbsync->cmd; in smp_generic_take_timebase()
63 tb = tbsync->tb; in smp_generic_take_timebase()
65 tbsync->ack = 0; in smp_generic_take_timebase()
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| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | smp-tbsync.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Smp timebase synchronization for ppc.
11 #include <linux/smp.h>
15 #include <asm/smp.h>
42 tbsync->race_result = add; in enter_contest()
57 tbsync->ack = 1; in smp_generic_take_timebase()
58 while (!tbsync->handshake) in smp_generic_take_timebase()
62 cmd = tbsync->cmd; in smp_generic_take_timebase()
63 tb = tbsync->tb; in smp_generic_take_timebase()
65 tbsync->ack = 0; in smp_generic_take_timebase()
[all …]
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| /kernel/linux/linux-6.6/drivers/scsi/isci/ |
| D | scu_task_context.h | 7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
68 * enum scu_ssp_task_type - This enumberation defines the various SSP task
77 SCU_TASK_TYPE_SMP_REQUEST, /* /< SMP Request type */
84 * enum scu_sata_task_type - This enumeration defines the various SATA task
222 * MAKE_SCU_CONTEXT_COMMAND_TYPE() -
293 * struct ssp_task_context - This is the SCU hardware definition for an SSP
299 /* OFFSET 0x18 */
303 /* OFFSET 0x1C */
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| /kernel/linux/linux-5.10/drivers/scsi/isci/ |
| D | scu_task_context.h | 7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
68 * enum scu_ssp_task_type - This enumberation defines the various SSP task
77 SCU_TASK_TYPE_SMP_REQUEST, /* /< SMP Request type */
84 * enum scu_sata_task_type - This enumeration defines the various SATA task
222 * MAKE_SCU_CONTEXT_COMMAND_TYPE() -
293 * struct ssp_task_context - This is the SCU hardware definition for an SSP
299 /* OFFSET 0x18 */
303 /* OFFSET 0x1C */
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| /kernel/linux/linux-6.6/arch/csky/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
39 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
136 For SMP, CPU needs "ldex&stex" instructions for atomic operations.
151 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
186 # VA_BITS - PAGE_SHIFT - 3
220 prompt "PAGE OFFSET"
224 bool "PAGE OFFSET 2G (user:kernel = 2:2)"
227 bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
236 prompt "C-SKY PMU type"
266 bool "Tightly-Coupled/Sram Memory"
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| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | processor.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1995-1999 Russell King
20 #define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
41 * Everything usercopied to/from thread_struct is statically-sized, so
44 static inline void arch_thread_struct_whitelist(unsigned long *offset, in arch_thread_struct_whitelist() argument
47 *offset = *size = 0; in arch_thread_struct_whitelist()
57 r7 = regs->ARM_r7; \
58 r8 = regs->ARM_r8; \
59 r9 = regs->ARM_r9; \
61 memset(regs->uregs, 0, sizeof(regs->uregs)); \
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| /kernel/linux/linux-6.6/arch/arm/include/asm/ |
| D | processor.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1995-1999 Russell King
20 #define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
41 * Everything usercopied to/from thread_struct is statically-sized, so
44 static inline void arch_thread_struct_whitelist(unsigned long *offset, in arch_thread_struct_whitelist() argument
47 *offset = *size = 0; in arch_thread_struct_whitelist()
57 r7 = regs->ARM_r7; \
58 r8 = regs->ARM_r8; \
59 r9 = regs->ARM_r9; \
61 memset(regs->uregs, 0, sizeof(regs->uregs)); \
[all …]
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| /kernel/linux/linux-6.6/sound/synth/emux/ |
| D | soundfont.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (c) 1999-2000 Takashi Iwai <tiwai@suse.de>
69 mutex_lock(&sflist->presets_mutex); in lock_preset()
70 spin_lock_irqsave(&sflist->lock, flags); in lock_preset()
71 sflist->presets_locked = 1; in lock_preset()
72 spin_unlock_irqrestore(&sflist->lock, flags); in lock_preset()
83 spin_lock_irqsave(&sflist->lock, flags); in unlock_preset()
84 sflist->presets_locked = 0; in unlock_preset()
85 spin_unlock_irqrestore(&sflist->lock, flags); in unlock_preset()
86 mutex_unlock(&sflist->presets_mutex); in unlock_preset()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| D | sysctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wei Xu <xuwei5@hisilicon.com>
19 offset. In addition, the HiP01 system controller has some specific control
23 Hisilicon system controller --> hisilicon,sysctrl
24 HiP01 system controller --> hisilicon,hip01-sysctrl
25 Hi6220 system controller --> hisilicon,hi6220-sysctrl
26 Hi3519 system controller --> hisilicon,hi3519-sysctrl
29 - if:
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| D | sysctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wei Xu <xuwei5@hisilicon.com>
19 offset. In addition, the HiP01 system controller has some specific control
23 Hisilicon system controller --> hisilicon,sysctrl
24 HiP01 system controller --> hisilicon,hip01-sysctrl
25 Hi6220 system controller --> hisilicon,hi6220-sysctrl
26 Hi3519 system controller --> hisilicon,hi3519-sysctrl
29 - if:
[all …]
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| /kernel/linux/linux-5.10/sound/synth/emux/ |
| D | soundfont.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (c) 1999-2000 Takashi Iwai <tiwai@suse.de>
69 mutex_lock(&sflist->presets_mutex); in lock_preset()
70 spin_lock_irqsave(&sflist->lock, flags); in lock_preset()
71 sflist->presets_locked = 1; in lock_preset()
72 spin_unlock_irqrestore(&sflist->lock, flags); in lock_preset()
83 spin_lock_irqsave(&sflist->lock, flags); in unlock_preset()
84 sflist->presets_locked = 0; in unlock_preset()
85 spin_unlock_irqrestore(&sflist->lock, flags); in unlock_preset()
86 mutex_unlock(&sflist->presets_mutex); in unlock_preset()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-prima2/ |
| D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * plat smp support for CSR Marco dual-core SMP SoCs
9 #include <linux/smp.h>
26 /* XXX prima2_pen_release is cargo culted code - DO NOT COPY XXX */
27 volatile int prima2_pen_release = -1;
35 prima2_pen_release = -1; in sirfsoc_secondary_init()
46 { .compatible = "sirf,atlas7-clkc" },
57 return -ENODEV; in sirfsoc_boot_secondary()
61 return -ENOMEM; in sirfsoc_boot_secondary()
65 * at offset 0x2bC, then write the magic number 0x3CAF5D62 to the in sirfsoc_boot_secondary()
[all …]
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| /kernel/linux/linux-6.6/fs/jfs/ |
| D | jfs_dtree.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) International Business Machines Corp., 2000-2004
7 * jfs_dtree.c: directory B+-tree manager
9 * B+-tree with variable length key directory:
11 * each directory page is structured as an array of 32-byte
28 * directory starts as a root/leaf page in on-disk inode
41 * case-insensitive directory file system
43 * names are stored in case-sensitive way in leaf entry.
44 * but stored, searched and compared in case-insensitive (uppercase) order
46 * (note that case-sensitive order is BROKEN in storage, e.g.,
[all …]
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| D | jfs_xtree.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) International Business Machines Corp., 2000-2005
6 * jfs_xtree.c: extent allocation descriptor B+-tree manager
27 * xtree key/entry comparison: extent offset
30 * -1: k < start of extent
38 ((K) < OFFSET64) ? -1 : 0;\
44 (XAD)->flag = (FLAG);\
58 if ((le16_to_cpu((P)->header.nextindex) < XTENTRYSTART) || \
59 (le16_to_cpu((P)->header.nextindex) > \
60 le16_to_cpu((P)->header.maxentry)) || \
[all …]
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-xtensa.c | 1 // SPDX-License-Identifier: GPL-2.0
22 * This driver is currently incompatible with SMP. The GPIO32 extension is not
24 * different set of IO wires. A theoretical SMP aware version of this driver
72 static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset) in xtensa_impwire_get_direction() argument
77 static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset) in xtensa_impwire_get_value() argument
86 return !!(impwire & BIT(offset)); in xtensa_impwire_get_value()
89 static void xtensa_impwire_set_value(struct gpio_chip *gc, unsigned offset, in xtensa_impwire_set_value() argument
95 static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset) in xtensa_expstate_get_direction() argument
100 static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset) in xtensa_expstate_get_value() argument
109 return !!(expstate & BIT(offset)); in xtensa_expstate_get_value()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpio/ |
| D | gpio-xtensa.c | 1 // SPDX-License-Identifier: GPL-2.0
22 * This driver is currently incompatible with SMP. The GPIO32 extension is not
24 * different set of IO wires. A theoretical SMP aware version of this driver
72 static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset) in xtensa_impwire_get_direction() argument
77 static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset) in xtensa_impwire_get_value() argument
86 return !!(impwire & BIT(offset)); in xtensa_impwire_get_value()
89 static void xtensa_impwire_set_value(struct gpio_chip *gc, unsigned offset, in xtensa_impwire_set_value() argument
95 static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset) in xtensa_expstate_get_direction() argument
100 static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset) in xtensa_expstate_get_value() argument
109 return !!(expstate & BIT(offset)); in xtensa_expstate_get_value()
[all …]
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| /kernel/linux/linux-5.10/fs/jfs/ |
| D | jfs_dtree.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) International Business Machines Corp., 2000-2004
7 * jfs_dtree.c: directory B+-tree manager
9 * B+-tree with variable length key directory:
11 * each directory page is structured as an array of 32-byte
28 * directory starts as a root/leaf page in on-disk inode
41 * case-insensitive directory file system
43 * names are stored in case-sensitive way in leaf entry.
44 * but stored, searched and compared in case-insensitive (uppercase) order
46 * (note that case-sensitive order is BROKEN in storage, e.g.,
[all …]
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| /kernel/linux/linux-6.6/arch/loongarch/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
149 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP
167 select SMP
214 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
254 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
257 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
260 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
263 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
266 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
332 string "Built-in kernel command line"
[all …]
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| /kernel/linux/linux-6.6/kernel/irq/ |
| D | ipi.c | 1 // SPDX-License-Identifier: GPL-2.0
15 * irq_reserve_ipi() - Setup an IPI to destination cpumask
26 unsigned int nr_irqs, offset; in irq_reserve_ipi() local
32 return -EINVAL; in irq_reserve_ipi()
37 return -EINVAL; in irq_reserve_ipi()
43 return -EINVAL; in irq_reserve_ipi()
54 offset = 0; in irq_reserve_ipi()
64 offset = cpumask_first(dest); in irq_reserve_ipi()
69 next = cpumask_next_zero(offset, dest); in irq_reserve_ipi()
74 return -EINVAL; in irq_reserve_ipi()
[all …]
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| /kernel/linux/linux-5.10/kernel/irq/ |
| D | ipi.c | 1 // SPDX-License-Identifier: GPL-2.0
15 * irq_reserve_ipi() - Setup an IPI to destination cpumask
26 unsigned int nr_irqs, offset; in irq_reserve_ipi() local
32 return -EINVAL; in irq_reserve_ipi()
37 return -EINVAL; in irq_reserve_ipi()
43 return -EINVAL; in irq_reserve_ipi()
54 offset = 0; in irq_reserve_ipi()
64 offset = cpumask_first(dest); in irq_reserve_ipi()
69 next = cpumask_next_zero(offset, dest); in irq_reserve_ipi()
74 return -EINVAL; in irq_reserve_ipi()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-ux500/ |
| D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009 ST-Ericsson.
14 #include <linux/smp.h>
23 #include "db8500-regs.h"
38 np = of_find_compatible_node(NULL, NULL, "ste,dbx500-backupram"); in ux500_smp_prepare_cpus()
50 np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); in ux500_smp_prepare_cpus()
73 * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the in ux500_boot_secondary()
74 * backup ram register at offset 0x1FF0, which is what boot rom code in ux500_boot_secondary()
102 CPU_METHOD_OF_DECLARE(ux500_smp, "ste,dbx500-smp", &ux500_smp_ops);
|