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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/soundwire/
Dqcom,sdw.txt1 Qualcomm SoundWire Controller Bindings
4 This binding describes the Qualcomm SoundWire Controller along with its
7 - compatible:
10 Definition: must be "qcom,soundwire-v<MAJOR>.<MINOR>.<STEP>",
12 "qcom,soundwire-v1.3.0"
13 "qcom,soundwire-v1.5.0"
14 "qcom,soundwire-v1.5.1"
15 "qcom,soundwire-v1.6.0"
16 - reg:
18 Value type: <prop-encoded-array>
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soundwire/
Dqcom,soundwire.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soundwire/qcom,soundwire.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SoundWire Controller
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
14 The Qualcomm SoundWire controller along with its board specific bus parameters.
19 - qcom,soundwire-v1.3.0
20 - qcom,soundwire-v1.5.0
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dadi,max98363.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices MAX98363 SoundWire Amplifier
10 - Ryan Lee <ryans.lee@analog.com>
13 The MAX98363 is a SoundWire input Class D mono amplifier that
14 supports MIPI SoundWire v1.2-compatible digital interface for
16 SoundWire peripheral device ID of MAX98363 is 0x3*019f836300
21 - $ref: dai-common.yaml#
30 '#sound-dai-cells':
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/kernel/linux/linux-5.10/drivers/soundwire/
Dqcom.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/soundwire/sdw.h>
17 #include <linux/soundwire/sdw_registers.h>
56 #define SWRM_DP_PORT_CTRL_BANK(n, m) (0x1124 + 0x100 * (n - 1) + 0x40 * m)
57 #define SWRM_DP_BLOCK_CTRL3_BANK(n, m) (0x1138 + 0x100 * (n - 1) + 0x40 * m)
133 struct regmap *wcd_regmap = ctrl->regmap; in qcom_swrm_ahb_reg_read()
153 struct regmap *wcd_regmap = ctrl->regmap; in qcom_swrm_ahb_reg_write()
173 *val = readl(ctrl->mmio + reg); in qcom_swrm_cpu_reg_read()
180 writel(val, ctrl->mmio + reg); in qcom_swrm_cpu_reg_write()
192 spin_lock_irqsave(&ctrl->comp_lock, flags); in qcom_swrm_cmd_fifo_wr_cmd()
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/kernel/linux/linux-6.6/sound/soc/codecs/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
5 # setting - SPI can't be modular so that case doesn't need to be covered.
469 tristate "Analog Devices AU1761 CODEC - I2C"
475 tristate "Analog Devices AU1761 CODEC - SPI"
512 tristate "Analog Devices ADAU7002 Stereo PDM-to-I2S/TDM Converter"
518 tristate "Analog Devices ADAU7118 8 Channel PDM-to-I2S/TDM Converter - HW Mode"
521 Enable support for the Analog Devices ADAU7118 8 Channel PDM-to-I2S/TDM
527 will be called snd-soc-adau7118-hw.
530 tristate "Analog Devices ADAU7118 8 Channel PDM-to-I2S/TDM Converter - I2C"
535 Enable support for the Analog Devices ADAU7118 8 Channel PDM-to-I2S/TDM
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/kernel/linux/linux-6.6/drivers/soundwire/
Dqcom.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/soundwire/sdw.h>
20 #include <linux/soundwire/sdw_registers.h>
101 #define SWRM_DP_PORT_CTRL_BANK(n, m) (0x1124 + 0x100 * (n - 1) + 0x40 * m)
102 #define SWRM_DP_PORT_CTRL_2_BANK(n, m) (0x1128 + 0x100 * (n - 1) + 0x40 * m)
103 #define SWRM_DP_BLOCK_CTRL_1(n) (0x112C + 0x100 * (n - 1))
104 #define SWRM_DP_BLOCK_CTRL2_BANK(n, m) (0x1130 + 0x100 * (n - 1) + 0x40 * m)
105 #define SWRM_DP_PORT_HCTRL_BANK(n, m) (0x1134 + 0x100 * (n - 1) + 0x40 * m)
106 #define SWRM_DP_BLOCK_CTRL3_BANK(n, m) (0x1138 + 0x100 * (n - 1) + 0x40 * m)
107 #define SWRM_DP_SAMPLECTRL2_BANK(n, m) (0x113C + 0x100 * (n - 1) + 0x40 * m)
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/kernel/linux/linux-6.6/include/linux/soundwire/
Dsdw.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
36 * Note: The maximum row define in SoundWire spec 1.1 is 23. In order to
75 * enum sdw_slave_status - Slave status
93 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
94 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
104 * enum sdw_command_response - Command response as defined by SDW spec
183 * SDW properties, defined in MIPI DisCo spec v1.0
190 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
201 * enum sdw_dpn_type - Data port types
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Dsdw_registers.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
40 /* BIT(4) not allocated in SoundWire specification 1.2 */
123 /* 0x4E is not allocated in SoundWire specification 1.2 */
171 /* BIT(7) not allocated in SoundWire 1.2 specification */
211 /* BIT(7) not allocated in SoundWire 1.2 specification */
223 /* PHY registers - CTRL and STAT are the same address */
313 * v1.2 device - SDCA address mapping
/kernel/linux/linux-5.10/include/linux/soundwire/
Dsdw.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
32 * Note: The maximum row define in SoundWire spec 1.1 is 23. In order to
71 * enum sdw_slave_status - Slave status
89 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
90 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
100 * enum sdw_command_response - Command response as defined by SDW spec
173 * SDW properties, defined in MIPI DisCo spec v1.0
180 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
191 * enum sdw_dpn_type - Data port types
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsdm845-wcd9340.dtsi1 // SPDX-License-Identifier: GPL-2.0
13 #address-cells = <2>;
14 #size-cells = <0>;
24 slim-ifc-dev = <&wcd9340_ifd>;
26 #sound-dai-cells = <1>;
28 interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>;
29 interrupt-controller;
30 #interrupt-cells = <1>;
32 clock-names = "extclk";
35 #clock-cells = <0>;
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Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
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Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
10 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
11 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
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Dsm8250.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
12 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/gpio/gpio.h>
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Dsc8280xp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sc8280xp.h>
8 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
9 #include <dt-bindings/clock/qcom,gpucc-sc8280xp.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
12 #include <dt-bindings/interconnect/qcom,osm-l3.h>
13 #include <dt-bindings/interconnect/qcom,sc8280xp.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/mailbox/qcom-ipcc.h>
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Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
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/kernel/linux/linux-6.6/drivers/mfd/
Dwcd934x.c1 // SPDX-License-Identifier: GPL-2.0
36 .name = "wcd934x-codec",
38 .name = "wcd934x-gpio",
39 .of_compatible = "qcom,wcd9340-gpio",
41 .name = "wcd934x-soundwire",
42 .of_compatible = "qcom,soundwire-v1.3.0",
125 struct regmap *regmap = ddata->regmap; in wcd934x_bring_up()
139 dev_info(ddata->dev, "WCD934x chip id major 0x%x, minor 0x%x\n", in wcd934x_bring_up()
158 struct device *dev = &sdev->dev; in wcd934x_slim_status_up()
164 ddata->regmap = regmap_init_slimbus(sdev, &wcd934x_regmap_config); in wcd934x_slim_status_up()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
45 tristate "Active-semi ACT8945A"
50 Support for the ACT8945A PMIC from Active-semi. This device
51 features three step-down DC/DC converters and four low-dropout
67 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
70 called sun4i-gpadc.
101 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
132 over at91-usart-serial driver and usart-spi-driver. Only one function
148 tristate "Atmel HLCDC (High-end LCD Controller)"
185 tristate "X-Powers AC100"
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/kernel/linux/linux-5.10/drivers/mfd/
Dwcd934x.c1 // SPDX-License-Identifier: GPL-2.0
22 .name = "wcd934x-codec",
24 .name = "wcd934x-gpio",
25 .of_compatible = "qcom,wcd9340-gpio",
27 .name = "wcd934x-soundwire",
28 .of_compatible = "qcom,soundwire-v1.3.0",
123 struct regmap *regmap = ddata->regmap; in wcd934x_bring_up()
137 dev_info(ddata->dev, "WCD934x chip id major 0x%x, minor 0x%x\n", in wcd934x_bring_up()
156 struct device *dev = &sdev->dev; in wcd934x_slim_status_up()
162 ddata->regmap = regmap_init_slimbus(sdev, &wcd934x_regmap_config); in wcd934x_slim_status_up()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 tristate "Active-semi ACT8945A"
49 Support for the ACT8945A PMIC from Active-semi. This device
50 features three step-down DC/DC converters and four low-dropout
66 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
69 called sun4i-gpadc.
88 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
119 over at91-usart-serial driver and usart-spi-driver. Only one function
135 tristate "Atmel HLCDC (High-end LCD Controller)"
172 tristate "X-Powers AC100"
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
16 #include <dt-bindings/interconnect/qcom,sdm845.h>
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/kernel/linux/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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/kernel/linux/linux-6.6/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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