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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/cec/
Dst,stm32-cec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/cec/st,stm32-cec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 CEC
10 - Yannick Fertre <yannick.fertre@foss.st.com>
14 const: st,stm32-cec
24 - description: Module Clock
25 - description: Bus Clock
27 clock-names:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dst,stm32-cec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/st,stm32-cec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 CEC bindings
10 - Benjamin Gaignard <benjamin.gaignard@st.com>
11 - Yannick Fertre <yannick.fertre@st.com>
15 const: st,stm32-cec
25 - description: Module Clock
26 - description: Bus Clock
[all …]
/kernel/linux/linux-6.6/drivers/media/cec/platform/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 tristate "ChromeOS EC CEC driver"
13 ChromeOS Embedded Controller's CEC.
14 The CEC bus is present in the HDMI connector and enables communication
18 tristate "Amlogic Meson AO CEC driver"
23 This is a driver for Amlogic Meson SoCs AO CEC interface. It uses the
24 generic CEC framework interface.
25 CEC bus is present in the HDMI connector and enables communication
28 tristate "Amlogic Meson G12A AO CEC driver"
36 This is a driver for Amlogic Meson G12A SoCs AO CEC interface.
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the CEC platform device drivers.
7 obj-$(CONFIG_CEC_CROS_EC) += cros-ec/
8 obj-$(CONFIG_CEC_GPIO) += cec-gpio/
9 obj-y += meson/
10 obj-$(CONFIG_CEC_SAMSUNG_S5P) += s5p/
11 obj-$(CONFIG_CEC_SECO) += seco/
12 obj-$(CONFIG_CEC_STI) += sti/
13 obj-$(CONFIG_CEC_STM32) += stm32/
14 obj-$(CONFIG_CEC_TEGRA) += tegra/
/kernel/linux/linux-5.10/drivers/media/cec/platform/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 tristate "ChromeOS EC CEC driver"
13 ChromeOS Embedded Controller's CEC.
14 The CEC bus is present in the HDMI connector and enables communication
18 tristate "Amlogic Meson AO CEC driver"
23 This is a driver for Amlogic Meson SoCs AO CEC interface. It uses the
24 generic CEC framework interface.
25 CEC bus is present in the HDMI connector and enables communication
28 tristate "Amlogic Meson G12A AO CEC driver"
36 This is a driver for Amlogic Meson G12A SoCs AO CEC interface.
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the CEC platform device drivers.
7 obj-$(CONFIG_CEC_CROS_EC) += cros-ec/
8 obj-$(CONFIG_CEC_GPIO) += cec-gpio/
9 obj-$(CONFIG_CEC_MESON_AO) += meson/
10 obj-$(CONFIG_CEC_SAMSUNG_S5P) += s5p/
11 obj-$(CONFIG_CEC_SECO) += seco/
12 obj-$(CONFIG_CEC_STI) += sti/
13 obj-$(CONFIG_CEC_STM32) += stm32/
14 obj-$(CONFIG_CEC_TEGRA) += tegra/
/kernel/linux/linux-5.10/drivers/media/cec/platform/stm32/
Dstm32-cec.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 CEC driver
17 #include <media/cec.h>
19 #define CEC_NAME "stm32-cec"
21 /* CEC registers */
80 static void cec_hw_init(struct stm32_cec *cec) in cec_hw_init() argument
82 regmap_update_bits(cec->regmap, CEC_CR, TXEOM | TXSOM | CECEN, 0); in cec_hw_init()
84 regmap_update_bits(cec->regmap, CEC_IER, ALL_TX_IT | ALL_RX_IT, in cec_hw_init()
87 regmap_update_bits(cec->regmap, CEC_CFGR, FULL_CFG, FULL_CFG); in cec_hw_init()
90 static void stm32_tx_done(struct stm32_cec *cec, u32 status) in stm32_tx_done() argument
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_CEC_STM32) += stm32-cec.o
/kernel/linux/linux-6.6/drivers/media/cec/platform/stm32/
Dstm32-cec.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 CEC driver
16 #include <media/cec.h>
18 #define CEC_NAME "stm32-cec"
20 /* CEC registers */
79 static void cec_hw_init(struct stm32_cec *cec) in cec_hw_init() argument
81 regmap_update_bits(cec->regmap, CEC_CR, TXEOM | TXSOM | CECEN, 0); in cec_hw_init()
83 regmap_update_bits(cec->regmap, CEC_IER, ALL_TX_IT | ALL_RX_IT, in cec_hw_init()
86 regmap_update_bits(cec->regmap, CEC_CFGR, FULL_CFG, FULL_CFG); in cec_hw_init()
89 static void stm32_tx_done(struct stm32_cec *cec, u32 status) in stm32_tx_done() argument
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_CEC_STM32) += stm32-cec.o
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
52 clk_hse: clk-hse {
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
[all …]
Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
52 clk_hse: clk-hse {
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
[all …]
Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
Dstm32f769-disco.dts2 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f769-pinctrl.dtsi"
46 #include <dt-bindings/input/input.h>
47 #include <dt-bindings/gpio/gpio.h>
50 model = "STMicroelectronics STM32F769-DISCO board";
51 compatible = "st,stm32f769-disco", "st,stm32f769";
55 stdout-path = "serial0:115200n8";
68 compatible = "gpio-leds";
[all …]
/kernel/linux/linux-6.6/Documentation/arch/arm/stm32/
Dstm32f769-overview.rst6 ------------
8 The STM32F769 is a Cortex-M7 MCU aimed at various applications.
11 - Cortex-M7 core running up to @216MHz
12 - 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM)
13 - FMC controller to connect SDRAM, NOR and NAND memories
14 - Dual mode QSPI
15 - SD/MMC/SDIO support*2
16 - Ethernet controller
17 - USB OTFG FS & HS controllers
18 - I2C*4, SPI*6, CAN*3 busses support
[all …]
Dstm32f746-overview.rst6 ------------
8 The STM32F746 is a Cortex-M7 MCU aimed at various applications.
11 - Cortex-M7 core running up to @216MHz
12 - 1MB internal flash, 320KBytes internal RAM (+4KB of backup SRAM)
13 - FMC controller to connect SDRAM, NOR and NAND memories
14 - Dual mode QSPI
15 - SD/MMC/SDIO support
16 - Ethernet controller
17 - USB OTFG FS & HS controllers
18 - I2C, SPI, CAN busses support
[all …]
/kernel/linux/linux-5.10/Documentation/arm/stm32/
Dstm32f769-overview.rst6 ------------
8 The STM32F769 is a Cortex-M7 MCU aimed at various applications.
11 - Cortex-M7 core running up to @216MHz
12 - 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM)
13 - FMC controller to connect SDRAM, NOR and NAND memories
14 - Dual mode QSPI
15 - SD/MMC/SDIO support*2
16 - Ethernet controller
17 - USB OTFG FS & HS controllers
18 - I2C*4, SPI*6, CAN*3 busses support
[all …]
Dstm32f746-overview.rst6 ------------
8 The STM32F746 is a Cortex-M7 MCU aimed at various applications.
11 - Cortex-M7 core running up to @216MHz
12 - 1MB internal flash, 320KBytes internal RAM (+4KB of backup SRAM)
13 - FMC controller to connect SDRAM, NOR and NAND memories
14 - Dual mode QSPI
15 - SD/MMC/SDIO support
16 - Ethernet controller
17 - USB OTFG FS & HS controllers
18 - I2C, SPI, CAN busses support
[all …]
/kernel/linux/linux-5.10/Documentation/admin-guide/media/
Dbuilding.rst1 .. SPDX-License-Identifier: GPL-2.0
8 distribution-specific source file or via the Kernel's main git tree\ [1]_.
12 - you're a braveheart and want to experiment with new stuff;
13 - if you want to report a bug;
14 - if you're developing new patches
23 https://linuxtv.org/wiki/index.php/How_to_Obtain,_Build_and_Install_V4L-DVB_Device_Drivers
50 Device Drivers --->
51 <M> Remote Controller support --->
52 [ ] HDMI CEC RC integration
53 [ ] Enable CEC error injection support
[all …]
/kernel/linux/linux-6.6/Documentation/admin-guide/media/
Dbuilding.rst1 .. SPDX-License-Identifier: GPL-2.0
8 distribution-specific source file or via the Kernel's main git tree\ [1]_.
12 - you're a braveheart and want to experiment with new stuff;
13 - if you want to report a bug;
14 - if you're developing new patches
23 https://linuxtv.org/wiki/index.php/How_to_Obtain,_Build_and_Install_V4L-DVB_Device_Drivers
50 Device Drivers --->
51 <M> Remote Controller support --->
52 [ ] HDMI CEC RC integration
53 [ ] Enable CEC error injection support
[all …]
Dcec.rst1 .. SPDX-License-Identifier: GPL-2.0
4 HDMI CEC
12 - Exynos4
13 - Exynos5
14 - STIH4xx HDMI CEC
15 - V4L2 adv7511 (same HW, but a different driver from the drm adv7511)
16 - stm32
17 - Allwinner A10 (sun4i)
18 - Raspberry Pi
19 - dw-hdmi (Synopsis IP)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dst,stm32-rcc.txt1 STMicroelectronics STM32 Reset and Clock Controller
6 Please refer to clock-bindings.txt for common clock controller binding usage.
10 - compatible: Should be:
11 "st,stm32f42xx-rcc"
12 "st,stm32f469-rcc"
13 "st,stm32f746-rcc"
14 "st,stm32f769-rcc"
16 - reg: should be register base and length as documented in the
18 - #reset-cells: 1, see below
19 - #clock-cells: 2, device nodes should specify the clock in their "clocks"
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dst,stm32-rcc.txt1 STMicroelectronics STM32 Reset and Clock Controller
6 Please refer to clock-bindings.txt for common clock controller binding usage.
10 - compatible: Should be:
11 "st,stm32f42xx-rcc"
12 "st,stm32f469-rcc"
13 "st,stm32f746-rcc"
14 "st,stm32f769-rcc"
16 - reg: should be register base and length as documented in the
18 - #reset-cells: 1, see below
19 - #clock-cells: 2, device nodes should specify the clock in their "clocks"
[all …]
/kernel/linux/linux-5.10/drivers/media/cec/platform/seco/
Dseco-cec.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * SECO X86 Boards CEC register defines
68 * STM32 SMBus Registers

12