Home
last modified time | relevance | path

Searched +full:stm32 +full:- +full:timer +full:- +full:counter (Results 1 – 25 of 53) sorted by relevance

123

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers bindings
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
[all …]
Dst,stm32-timers.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Timers bindings
10 This hardware block provides 3 types of timer along with PWM functionality:
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Benjamin Gaignard <benjamin.gaignard@st.com>
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
[all …]
Dst,stm32-timers.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Timers
10 This hardware block provides 3 types of timer along with PWM functionality:
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
[all …]
/kernel/linux/linux-5.10/drivers/counter/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Counter devices
6 menuconfig COUNTER config
7 tristate "Counter support"
9 This enables counter device support through the Generic Counter
11 one or more of the counter device drivers below.
13 if COUNTER
16 tristate "ACCES 104-QUAD-8 driver"
20 Say yes here to build support for the ACCES 104-QUAD-8 quadrature
21 encoder counter/interface device family (104-QUAD-8, 104-QUAD-4).
[all …]
Dstm32-timer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Timer Encoder and Counter driver
10 #include <linux/counter.h>
11 #include <linux/mfd/stm32-timers.h>
31 struct counter_device counter; member
40 * enum stm32_count_function - enumerates stm32 timer counter encoder modes
60 static int stm32_count_read(struct counter_device *counter, in stm32_count_read() argument
63 struct stm32_timer_cnt *const priv = counter->priv; in stm32_count_read()
66 regmap_read(priv->regmap, TIM_CNT, &cnt); in stm32_count_read()
72 static int stm32_count_write(struct counter_device *counter, in stm32_count_write() argument
[all …]
Dstm32-lptimer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Encoder and Counter driver
9 * Inspired by 104-quad-8 and stm32-timer-trigger drivers.
14 #include <linux/counter.h>
15 #include <linux/mfd/stm32-lptimer.h>
22 struct counter_device counter; member
37 ret = regmap_read(priv->regmap, STM32_LPTIM_CR, &val); in stm32_lptim_is_enabled()
51 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, val); in stm32_lptim_set_enable_state()
56 clk_disable(priv->clk); in stm32_lptim_set_enable_state()
57 priv->enabled = false; in stm32_lptim_set_enable_state()
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
3 # Makefile for Counter devices
6 obj-$(CONFIG_COUNTER) += counter.o
8 obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
9 obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
10 obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
11 obj-$(CONFIG_TI_EQEP) += ti-eqep.o
12 obj-$(CONFIG_FTM_QUADDEC) += ftm-quaddec.o
13 obj-$(CONFIG_MICROCHIP_TCB_CAPTURE) += microchip-tcb-capture.o
/kernel/linux/linux-6.6/drivers/counter/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Counter devices
8 select COUNTER
14 Interval Timer (PIT). The Intel 825x family of chips was first
21 menuconfig COUNTER config
22 tristate "Counter support"
24 This enables counter device support through the Generic Counter
26 one or more of the counter device drivers below.
28 if COUNTER
31 tristate "ACCES 104-QUAD-8 driver"
[all …]
Dstm32-lptimer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Encoder and Counter driver
9 * Inspired by 104-quad-8 and stm32-timer-trigger drivers.
14 #include <linux/counter.h>
15 #include <linux/mfd/stm32-lptimer.h>
37 ret = regmap_read(priv->regmap, STM32_LPTIM_CR, &val); in stm32_lptim_is_enabled()
51 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, val); in stm32_lptim_set_enable_state()
56 clk_disable(priv->clk); in stm32_lptim_set_enable_state()
57 priv->enabled = false; in stm32_lptim_set_enable_state()
61 ret = clk_enable(priv->clk); in stm32_lptim_set_enable_state()
[all …]
Dstm32-timer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Timer Encoder and Counter driver
10 #include <linux/counter.h>
11 #include <linux/mfd/stm32-timers.h>
46 static int stm32_count_read(struct counter_device *counter, in stm32_count_read() argument
49 struct stm32_timer_cnt *const priv = counter_priv(counter); in stm32_count_read()
52 regmap_read(priv->regmap, TIM_CNT, &cnt); in stm32_count_read()
58 static int stm32_count_write(struct counter_device *counter, in stm32_count_write() argument
61 struct stm32_timer_cnt *const priv = counter_priv(counter); in stm32_count_write()
64 regmap_read(priv->regmap, TIM_ARR, &ceiling); in stm32_count_write()
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
3 # Makefile for Counter devices
6 obj-$(CONFIG_COUNTER) += counter.o
7 counter-y := counter-core.o counter-sysfs.o counter-chrdev.o
9 obj-$(CONFIG_I8254) += i8254.o
10 obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
11 obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
12 obj-$(CONFIG_RZ_MTU3_CNT) += rz-mtu3-cnt.o
13 obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
14 obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
[all …]
/kernel/linux/linux-6.6/drivers/clocksource/
Dtimer-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
6 * Inspired by time-efm32.c from Uwe Kleine-Koenig
23 #include "timer-of.h"
54 * stm32_timer_of_bits_set - set accessor helper
58 * Accessor helper to set the number of bits in the timer-of private
64 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_set()
66 pd->bits = bits; in stm32_timer_of_bits_set()
70 * stm32_timer_of_bits_get - get accessor helper
73 * Accessor helper to get the number of bits in the timer-of private
[all …]
Dtimer-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
11 #include <linux/mfd/stm32-lptimer.h>
40 regmap_write(priv->reg, STM32_LPTIM_CR, 0); in stm32_clkevent_lp_shutdown()
41 regmap_write(priv->reg, STM32_LPTIM_IER, 0); in stm32_clkevent_lp_shutdown()
43 regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF); in stm32_clkevent_lp_shutdown()
55 regmap_write(priv->reg, STM32_LPTIM_CR, 0); in stm32_clkevent_lp_set_timer()
57 regmap_write(priv->reg, STM32_LPTIM_IER, STM32_LPTIM_ARRMIE); in stm32_clkevent_lp_set_timer()
59 regmap_write(priv->reg, STM32_LPTIM_CR, STM32_LPTIM_ENABLE); in stm32_clkevent_lp_set_timer()
60 /* set next event counter */ in stm32_clkevent_lp_set_timer()
[all …]
/kernel/linux/linux-5.10/drivers/clocksource/
Dtimer-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
6 * Inspired by time-efm32.c from Uwe Kleine-Koenig
23 #include "timer-of.h"
54 * stm32_timer_of_bits_set - set accessor helper
58 * Accessor helper to set the number of bits in the timer-of private
64 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_set()
66 pd->bits = bits; in stm32_timer_of_bits_set()
70 * stm32_timer_of_bits_get - get accessor helper
73 * Accessor helper to get the number of bits in the timer-of private
[all …]
Dtimer-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
11 #include <linux/mfd/stm32-lptimer.h>
40 regmap_write(priv->reg, STM32_LPTIM_CR, 0); in stm32_clkevent_lp_shutdown()
41 regmap_write(priv->reg, STM32_LPTIM_IER, 0); in stm32_clkevent_lp_shutdown()
43 regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF); in stm32_clkevent_lp_shutdown()
55 regmap_write(priv->reg, STM32_LPTIM_CR, 0); in stm32_clkevent_lp_set_timer()
57 regmap_write(priv->reg, STM32_LPTIM_IER, STM32_LPTIM_ARRMIE); in stm32_clkevent_lp_set_timer()
59 regmap_write(priv->reg, STM32_LPTIM_CR, STM32_LPTIM_ENABLE); in stm32_clkevent_lp_set_timer()
60 /* set next event counter */ in stm32_clkevent_lp_set_timer()
[all …]
/kernel/linux/linux-5.10/drivers/pwm/
Dpwm-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer PWM driver
9 * Inspired by Gerald Baeza's pwm-stm32 driver
13 #include <linux/mfd/stm32-lptimer.h>
31 /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */
47 if (!state->enabled) { in stm32_pwm_lp_apply()
49 /* Disable LP timer */ in stm32_pwm_lp_apply()
50 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, 0); in stm32_pwm_lp_apply()
53 /* disable clock to PWM counter */ in stm32_pwm_lp_apply()
54 clk_disable(priv->clk); in stm32_pwm_lp_apply()
[all …]
/kernel/linux/linux-6.6/drivers/pwm/
Dpwm-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer PWM driver
9 * Inspired by Gerald Baeza's pwm-stm32 driver
13 #include <linux/mfd/stm32-lptimer.h>
31 /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */
47 if (!state->enabled) { in stm32_pwm_lp_apply()
49 /* Disable LP timer */ in stm32_pwm_lp_apply()
50 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, 0); in stm32_pwm_lp_apply()
53 /* disable clock to PWM counter */ in stm32_pwm_lp_apply()
54 clk_disable(priv->clk); in stm32_pwm_lp_apply()
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/
Dstm32-lptimer.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * STM32 Low-Power Timer parent driver.
6 * Inspired by Benjamin Gaignard's stm32-timers driver
22 #define STM32_LPTIM_CNT 0x1C /* Counter Reg */
24 /* STM32_LPTIM_ISR - bit fields */
29 /* STM32_LPTIM_ICR - bit fields */
33 /* STM32_LPTIM_IER - bit flieds */
36 /* STM32_LPTIM_CR - bit fields */
41 /* STM32_LPTIM_CFGR - bit fields */
52 * struct stm32_lptimer - STM32 Low-Power Timer data assigned by parent device
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/
Dstm32-lptimer.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * STM32 Low-Power Timer parent driver.
6 * Inspired by Benjamin Gaignard's stm32-timers driver
22 #define STM32_LPTIM_CNT 0x1C /* Counter Reg */
24 /* STM32_LPTIM_ISR - bit fields */
29 /* STM32_LPTIM_ICR - bit fields */
33 /* STM32_LPTIM_IER - bit flieds */
36 /* STM32_LPTIM_CR - bit fields */
41 /* STM32_LPTIM_CFGR - bit fields */
57 * struct stm32_lptimer - STM32 Low-Power Timer data assigned by parent device
[all …]

123