Home
last modified time | relevance | path

Searched +full:stm32mp1 +full:- +full:usbphyc (Results 1 – 11 of 11) sorted by relevance

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dphy-stm32-usbphyc.txt3 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
8 USBPHYC
14 |_ PHY port#2 ----| |________________
23 - compatible: must be "st,stm32mp1-usbphyc"
24 - reg: address and length of the usb phy control register set
25 - clocks: phandle + clock specifier for the PLL phy clock
26 - #address-cells: number of address cells for phys sub-nodes, must be <1>
27 - #size-cells: number of size cells for phys sub-nodes, must be <0>
30 - assigned-clocks: phandle + clock specifier for the PLL phy clock
31 - assigned-clock-parents: the PLL phy clock parent
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dphy-stm32-usbphyc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
16 USBPHYC
22 |_ PHY port#2 ----| |________________
27 - Amelie Delaunay <amelie.delaunay@foss.st.com>
31 const: st,stm32mp1-usbphyc
42 "#address-cells":
[all …]
/kernel/linux/linux-5.10/drivers/phy/st/
Dphy-stm32-usbphyc.c1 // SPDX-License-Identifier: GPL-2.0
60 struct stm32_usbphyc *usbphyc; member
99 * <=> PLLFRACIN = ((FVCO / (INFF*2)) - PLLNDIV) * 2^16 in stm32_usbphyc_get_pll_params()
105 pll_params->ndiv = (u8)ndiv; in stm32_usbphyc_get_pll_params()
109 frac = frac - (ndiv * (1 << 16)); in stm32_usbphyc_get_pll_params()
110 pll_params->frac = (u16)frac; in stm32_usbphyc_get_pll_params()
113 static int stm32_usbphyc_pll_init(struct stm32_usbphyc *usbphyc) in stm32_usbphyc_pll_init() argument
116 u32 clk_rate = clk_get_rate(usbphyc->clk); in stm32_usbphyc_pll_init()
122 dev_err(usbphyc->dev, "input clk freq (%dHz) out of range\n", in stm32_usbphyc_pll_init()
124 return -EINVAL; in stm32_usbphyc_pll_init()
[all …]
/kernel/linux/linux-6.6/drivers/phy/st/
Dphy-stm32-usbphyc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
138 struct stm32_usbphyc *usbphyc; member
169 static int stm32_usbphyc_regulators_enable(struct stm32_usbphyc *usbphyc) in stm32_usbphyc_regulators_enable() argument
173 ret = regulator_enable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_enable()
177 ret = regulator_enable(usbphyc->vdda1v8); in stm32_usbphyc_regulators_enable()
184 regulator_disable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_enable()
189 static int stm32_usbphyc_regulators_disable(struct stm32_usbphyc *usbphyc) in stm32_usbphyc_regulators_disable() argument
193 ret = regulator_disable(usbphyc->vdda1v8); in stm32_usbphyc_regulators_disable()
197 ret = regulator_disable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_disable()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dstm32mp15xx-dhcom-drc02.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pwm/pwm.h>
24 rs485-rx-en-hog {
25 gpio-hog;
27 output-low;
28 line-name = "rs485-rx-en";
33 gpio-line-names = "", "", "", "",
34 "", "", "DHCOM-B", "",
35 "", "", "", "DRC02-Out1",
[all …]
Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32mp15xx-dhcom-drc02.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pwm/pwm.h>
17 stdout-path = "serial0:115200n8";
36 rs485-rx-en {
37 gpio-hog;
39 output-low;
40 line-name = "rs485-rx-en";
45 gpio-line-names = "", "", "", "",
52 gpio-line-names = "In1", "", "", "",
[all …]
Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
[all …]