| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/ |
| D | dsi.txt | 1 Qualcomm Technologies Inc. adreno/snapdragon DSI output 3 DSI Controller: 5 - compatible: 6 * "qcom,mdss-dsi-ctrl" 7 - reg: Physical base address and length of the registers of controller 8 - reg-names: The names of register regions. The following regions are required: 10 - interrupts: The interrupt signal from the DSI block. 11 - power-domains: Should be <&mmcc MDSS_GDSC>. 12 - clocks: Phandles to device clocks. 13 - clock-names: the following clocks are required: [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/msm/ |
| D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DSI controller 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 15 - items: 16 - enum: 17 - qcom,apq8064-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/ |
| D | dsi_manager.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include "dsi.h" 22 struct msm_dsi *dsi[DSI_MAX]; member 37 return msm_dsim_glb.dsi[id]; in dsi_mgr_get_dsi() 42 return msm_dsim_glb.dsi[(id + 1) % DSI_MAX]; in dsi_mgr_get_other_dsi() 49 /* We assume 2 dsi nodes have the same information of dual-dsi and in dsi_mgr_parse_dual_dsi() 50 * sync-mode, and only one node specifies master in case of dual mode. in dsi_mgr_parse_dual_dsi() 52 if (!msm_dsim->is_dual_dsi) in dsi_mgr_parse_dual_dsi() 53 msm_dsim->is_dual_dsi = of_property_read_bool( in dsi_mgr_parse_dual_dsi() 54 np, "qcom,dual-dsi-mode"); in dsi_mgr_parse_dual_dsi() [all …]
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| D | dsi_host.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <linux/dma-mapping.h> 24 #include "dsi.h" 25 #include "dsi.xml.h" 37 return -EINVAL; in dsi_get_version() 41 * makes all other registers 4-byte shifted down. in dsi_get_version() 45 * 0x1f0). In the case of DSIv2, this hast to be a non-zero value. In in dsi_get_version() 52 /* older dsi host, there is no register shift */ in dsi_get_version() 60 return -EINVAL; in dsi_get_version() 76 return -EINVAL; in dsi_get_version() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/dsi/ |
| D | dsi_manager.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include "dsi.h" 24 struct msm_dsi *dsi[DSI_MAX]; member 39 return msm_dsim_glb.dsi[id]; in dsi_mgr_get_dsi() 44 return msm_dsim_glb.dsi[(id + 1) % DSI_MAX]; in dsi_mgr_get_other_dsi() 51 /* We assume 2 dsi nodes have the same information of bonded dsi and in dsi_mgr_parse_of() 52 * sync-mode, and only one node specifies master in case of bonded mode. in dsi_mgr_parse_of() 54 if (!msm_dsim->is_bonded_dsi) in dsi_mgr_parse_of() 55 msm_dsim->is_bonded_dsi = of_property_read_bool(np, "qcom,dual-dsi-mode"); in dsi_mgr_parse_of() 57 if (msm_dsim->is_bonded_dsi) { in dsi_mgr_parse_of() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| D | intel_dsi_vbt.c | 34 #include <asm/intel-mid.h> 112 /* ICL DSI Display GPIO Pins */ 128 * If single link DSI is being used on any port, the VBT sequence block in intel_dsi_seq_port_to_port() 132 if (hweight8(intel_dsi->ports) == 1) in intel_dsi_seq_port_to_port() 133 return ffs(intel_dsi->ports) - 1; in intel_dsi_seq_port_to_port() 136 if (intel_dsi->ports & BIT(PORT_B)) in intel_dsi_seq_port_to_port() 138 else if (intel_dsi->ports & BIT(PORT_C)) in intel_dsi_seq_port_to_port() 148 struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev); in mipi_exec_send_packet() 154 drm_dbg_kms(&dev_priv->drm, "\n"); in mipi_exec_send_packet() 166 if (drm_WARN_ON(&dev_priv->drm, !intel_dsi->dsi_hosts[port])) in mipi_exec_send_packet() [all …]
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| D | icl_dsi.c | 58 drm_err(&dev_priv->drm, "DSI header credits not released\n"); in wait_for_header_credits() 66 drm_err(&dev_priv->drm, "DSI payload credits not released\n"); in wait_for_payload_credits() 79 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in wait_for_cmds_dispatched_to_panel() 81 struct mipi_dsi_device *dsi; in wait_for_cmds_dispatched_to_panel() local 87 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel() 94 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel() 95 dsi = intel_dsi->dsi_hosts[port]->device; in wait_for_cmds_dispatched_to_panel() 96 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in wait_for_cmds_dispatched_to_panel() 97 dsi->channel = 0; in wait_for_cmds_dispatched_to_panel() 98 ret = mipi_dsi_dcs_nop(dsi); in wait_for_cmds_dispatched_to_panel() [all …]
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| D | vlv_dsi.c | 78 struct drm_encoder *encoder = &intel_dsi->base.base; in vlv_dsi_wait_for_fifo_empty() 79 struct drm_device *dev = encoder->dev; in vlv_dsi_wait_for_fifo_empty() 88 drm_err(&dev_priv->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty() 100 for (j = 0; j < min_t(u32, len - i, 4); j++) in write_data() 116 for (j = 0; j < min_t(u32, len - i, 4); j++) in read_data() 125 struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev; in intel_dsi_host_transfer() 127 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer() 141 if (msg->flags & MIPI_DSI_MSG_USE_LPM) { in intel_dsi_host_transfer() 157 drm_err(&dev_priv->drm, in intel_dsi_host_transfer() 164 if (msg->rx_len) { in intel_dsi_host_transfer() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | intel_dsi_vbt.c | 119 /* ICL DSI Display GPIO Pins */ 135 * If single link DSI is being used on any port, the VBT sequence block in intel_dsi_seq_port_to_port() 139 if (hweight8(intel_dsi->ports) == 1) in intel_dsi_seq_port_to_port() 140 return ffs(intel_dsi->ports) - 1; in intel_dsi_seq_port_to_port() 143 if (intel_dsi->ports & BIT(PORT_B)) in intel_dsi_seq_port_to_port() 145 else if (intel_dsi->ports & BIT(PORT_C)) in intel_dsi_seq_port_to_port() 155 struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev); in mipi_exec_send_packet() 161 drm_dbg_kms(&dev_priv->drm, "\n"); in mipi_exec_send_packet() 173 if (drm_WARN_ON(&dev_priv->drm, !intel_dsi->dsi_hosts[port])) in mipi_exec_send_packet() 176 dsi_device = intel_dsi->dsi_hosts[port]->device; in mipi_exec_send_packet() [all …]
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| D | icl_dsi.c | 71 drm_err(&dev_priv->drm, "DSI header credits not released\n"); in wait_for_header_credits() 83 drm_err(&dev_priv->drm, "DSI payload credits not released\n"); in wait_for_payload_credits() 100 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in wait_for_cmds_dispatched_to_panel() 102 struct mipi_dsi_device *dsi; in wait_for_cmds_dispatched_to_panel() local 108 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel() 115 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel() 116 dsi = intel_dsi->dsi_hosts[port]->device; in wait_for_cmds_dispatched_to_panel() 117 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in wait_for_cmds_dispatched_to_panel() 118 dsi->channel = 0; in wait_for_cmds_dispatched_to_panel() 119 ret = mipi_dsi_dcs_nop(dsi); in wait_for_cmds_dispatched_to_panel() [all …]
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| D | vlv_dsi.c | 87 struct drm_encoder *encoder = &intel_dsi->base.base; in vlv_dsi_wait_for_fifo_empty() 88 struct drm_device *dev = encoder->dev; in vlv_dsi_wait_for_fifo_empty() 97 drm_err(&dev_priv->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty() 109 for (j = 0; j < min_t(u32, len - i, 4); j++) in write_data() 125 for (j = 0; j < min_t(u32, len - i, 4); j++) in read_data() 134 struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev; in intel_dsi_host_transfer() 136 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer() 149 if (msg->flags & MIPI_DSI_MSG_USE_LPM) { in intel_dsi_host_transfer() 165 drm_err(&dev_priv->drm, in intel_dsi_host_transfer() 172 if (msg->rx_len) { in intel_dsi_host_transfer() [all …]
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| D | intel_display.c | 2 * Copyright © 2006-2007 Intel Corporation 27 #include <linux/dma-resv.h> 148 drm_WARN(&dev_priv->drm, (val & CCK_FREQUENCY_STATUS) != in vlv_get_cck_clock() 162 if (dev_priv->hpll_freq == 0) in vlv_get_cck_clock_hpll() 163 dev_priv->hpll_freq = vlv_get_hpll_vco(dev_priv); in vlv_get_cck_clock_hpll() 165 hpll = vlv_get_cck_clock(dev_priv, name, reg, dev_priv->hpll_freq); in vlv_get_cck_clock_hpll() 177 dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk", in intel_update_czclk() 180 drm_dbg(&dev_priv->drm, "CZ clock rate: %d kHz\n", in intel_update_czclk() 181 dev_priv->czclk_freq); in intel_update_czclk() 186 return (crtc_state->active_planes & in is_hdr_mode() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/bridge/ |
| D | ti-sn65dsi83.c | 1 // SPDX-License-Identifier: GPL-2.0 6 * - SN65DSI83 7 * = 1x Single-link DSI ~ 1x Single-link LVDS 8 * - Supported 9 * - Single-link LVDS mode tested 10 * - SN65DSI84 11 * = 1x Single-link DSI ~ 2x Single-link or 1x Dual-link LVDS 12 * - Supported 13 * - Dual-link LVDS mode tested 14 * - 2x Single-link LVDS mode unsupported [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/ |
| D | sm8250-xiaomi-elish-common.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/arm/qcom,ids.h> 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 19 /delete-node/ &adsp_mem; 20 /delete-node/ &cdsp_secure_heap; 21 /delete-node/ &slpi_mem; 22 /delete-node/ &spss_mem; 23 /delete-node/ &xbl_aop_mem; 26 classis-type = "tablet"; [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/tegra/ |
| D | dsi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 29 #include "dsi.h" 30 #include "mipi-phy.h" 81 /* for ganged-mode support */ 102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument 104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state() 107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument 109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl() 111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl() 116 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, in tegra_dsi_writel() argument [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/tegra/ |
| D | dsi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 29 #include "dsi.h" 30 #include "mipi-phy.h" 81 /* for ganged-mode support */ 102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument 104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state() 107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument 109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl() 111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl() 116 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, in tegra_dsi_writel() argument [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_ctl.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2015 The Linux Foundation. All rights reserved. 10 * CTL - MDP Control Pool Manager 16 * a specific data path ID - REG_MDP5_CTL_*(<id>, ...) 20 * In certain use cases (high-resolution dual pipe), one single CTL can be 62 /* to filter out non-present bits in the current hardware config */ 77 struct msm_drm_private *priv = ctl_mgr->dev->dev_private; in get_kms() 79 return to_mdp5_kms(to_mdp_kms(priv->kms)); in get_kms() 85 struct mdp5_kms *mdp5_kms = get_kms(ctl->ctlm); in ctl_write() 87 (void)ctl->reg_offset; /* TODO use this instead of mdp5_write */ in ctl_write() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_ctl.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2015 The Linux Foundation. All rights reserved. 10 * CTL - MDP Control Pool Manager 16 * a specific data path ID - REG_MDP5_CTL_*(<id>, ...) 20 * In certain use cases (high-resolution dual pipe), one single CTL can be 62 /* to filter out non-present bits in the current hardware config */ 77 struct msm_drm_private *priv = ctl_mgr->dev->dev_private; in get_kms() 79 return to_mdp5_kms(to_mdp_kms(priv->kms)); in get_kms() 85 struct mdp5_kms *mdp5_kms = get_kms(ctl->ctlm); in ctl_write() 87 (void)ctl->reg_offset; /* TODO use this instead of mdp5_write */ in ctl_write() [all …]
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
| D | 0020_linux_drivers_gpu.patch | 7 Change-Id: Ie95ebc16d7424b75135df39b9e20893d1a5171d6 9 diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile 11 --- a/drivers/gpu/Makefile 13 @@ -3,6 +3,7 @@ 16 obj-$(CONFIG_TEGRA_HOST1X) += host1x/ 17 +obj-y += imx/ 18 obj-y += drm/ vga/ 19 obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/ 20 obj-$(CONFIG_TRACE_GPU_MEM) += trace/ 21 diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_encoder_phys_vid.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2015-2018, 2020-2021 The Linux Foundation. All rights reserved. 17 (e) && (e)->parent ? \ 18 (e)->parent->base.id : -1, \ 19 (e) && (e)->hw_intf ? \ 20 (e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__) 23 (e) && (e)->parent ? \ 24 (e)->parent->base.id : -1, \ 25 (e) && (e)->hw_intf ? \ 26 (e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__) [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_encoder_phys_vid.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 13 (e) && (e)->parent ? \ 14 (e)->parent->base.id : -1, \ 15 (e) && (e)->hw_intf ? \ 16 (e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__) 19 (e) && (e)->parent ? \ 20 (e)->parent->base.id : -1, \ 21 (e) && (e)->hw_intf ? \ 22 (e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__) [all …]
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| /kernel/linux/linux-5.10/include/drm/ |
| D | drm_connector.h | 50 DRM_FORCE_ON_DIGITAL, /* for DVI-I use digital connector */ 54 * enum drm_connector_status - status for a &drm_connector 69 * nothing there. It is driver-dependent whether a connector with this 76 * flicker (like load-detection when the connector is in use), or when a 77 * hardware resource isn't available (like when load-detection needs a 87 * enum drm_connector_registration_status - userspace registration status for 120 * - An unregistered connector may only have its DPMS changed from 121 * On->Off. Once DPMS is changed to Off, it may not be switched back 123 * - Modesets are not allowed on unregistered connectors, unless they 127 * - Removing a CRTC from an unregistered connector is OK, but new [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/stm/ |
| D | ltdc.c | 1 // SPDX-License-Identifier: GPL-2.0 41 #define CRTC_MASK GENMASK(NB_CRTC - 1, 0) 55 #define REG_OFS (ldev->caps.reg_ofs) 116 #define GCR_PCPOL BIT(28) /* Pixel Clock POLarity-Inverted */ 117 #define GCR_DEPOL BIT(29) /* Data Enable POLarity-High */ 118 #define GCR_VSPOL BIT(30) /* Vertical Synchro POLarity-High */ 119 #define GCR_HSPOL BIT(31) /* Horizontal Synchro POLarity-High */ 133 #define GC1R_SPP BIT(27) /* Sync Polarity Programmable */ 139 #define GC2R_STSAEN BIT(1) /* Slave Timing Sync Ability ENabled */ 140 #define GC2R_DVAEN BIT(2) /* Dual-View Ability ENabled */ [all …]
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| /kernel/linux/patches/linux-5.10/yangfan_patch/ |
| D | drivers.patch | 1 diff --git a/drivers/Makefile b/drivers/Makefile 3 --- a/drivers/Makefile 5 @@ -6,6 +6,8 @@ 6 # Rewritten to use lists instead of if-statements. 11 obj-y += irqchip/ 12 obj-y += bus/ 14 diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c 16 --- a/drivers/block/nbd.c 18 @@ -2398,12 +2398,6 @@ static int nbd_genl_status(struct sk_buff *skb, struct genl_info *info) 22 - if (!dev_list) { [all …]
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| /kernel/linux/linux-6.6/include/drm/ |
| D | drm_connector.h | 54 DRM_FORCE_ON_DIGITAL, /* for DVI-I use digital connector */ 58 * enum drm_connector_status - status for a &drm_connector 73 * nothing there. It is driver-dependent whether a connector with this 80 * flicker (like load-detection when the connector is in use), or when a 81 * hardware resource isn't available (like when load-detection needs a 91 * enum drm_connector_registration_state - userspace registration status for 124 * - An unregistered connector may only have its DPMS changed from 125 * On->Off. Once DPMS is changed to Off, it may not be switched back 127 * - Modesets are not allowed on unregistered connectors, unless they 131 * - Removing a CRTC from an unregistered connector is OK, but new [all …]
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