Home
last modified time | relevance | path

Searched +full:sys +full:- +full:mgr (Results 1 – 25 of 32) sorted by relevance

12

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/altera/
Dsocfpga-system.txt4 - compatible : "altr,sys-mgr"
5 - reg : Should contain 1 register ranges(address and length)
6 - cpu1-start-addr : CPU1 start address in hex.
10 compatible = "altr,sys-mgr";
12 cpu1-start-addr = <0xffd080c4>;
15 ARM64 - Stratix10
17 - compatible : "altr,sys-mgr-s10"
18 - reg : Should contain 1 register range(address and length)
23 compatible = "altr,sys-mgr-s10";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/altera/
Dsocfpga-system.txt4 - compatible : "altr,sys-mgr"
5 - reg : Should contain 1 register ranges(address and length)
6 - cpu1-start-addr : CPU1 start address in hex.
10 compatible = "altr,sys-mgr";
12 cpu1-start-addr = <0xffd080c4>;
15 ARM64 - Stratix10
17 - compatible : "altr,sys-mgr-s10"
18 - reg : Should contain 1 register range(address and length)
23 compatible = "altr,sys-mgr-s10";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/
Dnuvoton,npcm7xx-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Tali Perry <tali.perry1@gmail.com>
20 - nuvoton,npcm750-i2c
21 - nuvoton,npcm845-i2c
33 clock-frequency:
40 nuvoton,sys-mgr:
45 - compatible
[all …]
/kernel/linux/linux-5.10/drivers/mfd/
Daltera-sysmgr.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018-2019, Intel Corporation.
10 #include <linux/arm-smccc.h>
13 #include <linux/mfd/altera-sysmgr.h>
23 * struct altr_sysmgr - Altera SOCFPGA System Manager
109 return ERR_PTR(-ENODEV); in altr_sysmgr_regmap_lookup_by_phandle()
115 return ERR_PTR(-EPROBE_DEFER); in altr_sysmgr_regmap_lookup_by_phandle()
119 return sysmgr->regmap; in altr_sysmgr_regmap_lookup_by_phandle()
129 struct device *dev = &pdev->dev; in sysmgr_probe()
130 struct device_node *np = dev->of_node; in sysmgr_probe()
[all …]
/kernel/linux/linux-6.6/drivers/mfd/
Daltera-sysmgr.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018-2019, Intel Corporation.
10 #include <linux/arm-smccc.h>
13 #include <linux/mfd/altera-sysmgr.h>
22 * struct altr_sysmgr - Altera SOCFPGA System Manager
108 return ERR_PTR(-ENODEV); in altr_sysmgr_regmap_lookup_by_phandle()
116 return ERR_PTR(-EPROBE_DEFER); in altr_sysmgr_regmap_lookup_by_phandle()
120 return sysmgr->regmap; in altr_sysmgr_regmap_lookup_by_phandle()
130 struct device *dev = &pdev->dev; in sysmgr_probe()
131 struct device_node *np = dev->of_node; in sysmgr_probe()
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-socfpga/
Dsocfpga.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2015 Altera Corporation
12 #include <asm/hardware/cache-l2x0.h>
28 np = of_find_compatible_node(NULL, NULL, "altr,sys-mgr"); in socfpga_sysmgr_init()
30 if (of_property_read_u32(np, "cpu1-start-addr", in socfpga_sysmgr_init()
32 pr_err("SMP: Need cpu1-start-addr in device tree.\n"); in socfpga_sysmgr_init()
40 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); in socfpga_sysmgr_init()
43 np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl"); in socfpga_sysmgr_init()
110 "altr,socfpga-arria10",
Docram.c1 // SPDX-License-Identifier: GPL-2.0-only
23 np = of_find_compatible_node(NULL, NULL, "altr,socfpga-ocram-ecc"); in socfpga_init_ocram_ecc()
25 pr_err("Unable to find socfpga-ocram-ecc\n"); in socfpga_init_ocram_ecc()
99 while (limit--) { in altr_init_memory_port()
106 return -EBUSY; in altr_init_memory_port()
122 pr_err("SOCFPGA: sys-mgr is not initialized\n"); in socfpga_init_arria10_ocram_ecc()
127 np = of_find_compatible_node(NULL, NULL, "altr,socfpga-a10-ocram-ecc"); in socfpga_init_arria10_ocram_ecc()
129 pr_err("Unable to find socfpga-a10-ocram-ecc\n"); in socfpga_init_arria10_ocram_ecc()
/kernel/linux/linux-6.6/arch/arm/mach-socfpga/
Dsocfpga.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2015 Altera Corporation
26 np = of_find_compatible_node(NULL, NULL, "altr,sys-mgr"); in socfpga_sysmgr_init()
28 if (of_property_read_u32(np, "cpu1-start-addr", in socfpga_sysmgr_init()
30 pr_err("SMP: Need cpu1-start-addr in device tree.\n"); in socfpga_sysmgr_init()
38 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); in socfpga_sysmgr_init()
41 np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl"); in socfpga_sysmgr_init()
108 "altr,socfpga-arria10",
Docram.c1 // SPDX-License-Identifier: GPL-2.0-only
21 np = of_find_compatible_node(NULL, NULL, "altr,socfpga-ocram-ecc"); in socfpga_init_ocram_ecc()
23 pr_err("Unable to find socfpga-ocram-ecc\n"); in socfpga_init_ocram_ecc()
97 while (limit--) { in altr_init_memory_port()
104 return -EBUSY; in altr_init_memory_port()
120 pr_err("SOCFPGA: sys-mgr is not initialized\n"); in socfpga_init_arria10_ocram_ecc()
125 np = of_find_compatible_node(NULL, NULL, "altr,socfpga-a10-ocram-ecc"); in socfpga_init_arria10_ocram_ecc()
127 pr_err("Unable to find socfpga-a10-ocram-ecc\n"); in socfpga_init_arria10_ocram_ecc()
/kernel/linux/linux-5.10/drivers/clk/socfpga/
Dclk-gate-a10.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
27 if (socfpgaclk->fixed_div) in socfpga_gate_clk_recalc_rate()
28 div = socfpgaclk->fixed_div; in socfpga_gate_clk_recalc_rate()
29 else if (socfpgaclk->div_reg) { in socfpga_gate_clk_recalc_rate()
30 val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; in socfpga_gate_clk_recalc_rate()
31 val &= GENMASK(socfpgaclk->width - 1, 0); in socfpga_gate_clk_recalc_rate()
45 if (socfpgaclk->clk_phase[0] || socfpgaclk->clk_phase[1]) { in socfpga_clk_prepare()
47 switch (socfpgaclk->clk_phase[i]) { in socfpga_clk_prepare()
79 if (!IS_ERR(socfpgaclk->sys_mgr_base_addr)) in socfpga_clk_prepare()
[all …]
Dclk-gate.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2012 Calxeda, Inc.
4 * Copyright (C) 2012-2013 Altera Corporation <www.altera.com>
6 * Based from clk-highbank.c
9 #include <linux/clk-provider.h>
96 if (socfpgaclk->fixed_div) in socfpga_clk_recalc_rate()
97 div = socfpgaclk->fixed_div; in socfpga_clk_recalc_rate()
98 else if (socfpgaclk->div_reg) { in socfpga_clk_recalc_rate()
99 val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; in socfpga_clk_recalc_rate()
100 val &= GENMASK(socfpgaclk->width - 1, 0); in socfpga_clk_recalc_rate()
[all …]
/kernel/linux/linux-5.10/drivers/fpga/
Daltera-fpga2sdram.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
23 * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
26 #include <linux/fpga/fpga-bridge.h>
58 struct alt_fpga2sdram_data *priv = bridge->priv; in alt_fpga2sdram_enable_show()
61 regmap_read(priv->sdrctl, ALT_SDR_CTL_FPGAPORTRST_OFST, &value); in alt_fpga2sdram_enable_show()
63 return (value & priv->mask) == priv->mask; in alt_fpga2sdram_enable_show()
69 return regmap_update_bits(priv->sdrctl, ALT_SDR_CTL_FPGAPORTRST_OFST, in _alt_fpga2sdram_enable_set()
70 priv->mask, enable ? priv->mask : 0); in _alt_fpga2sdram_enable_set()
75 return _alt_fpga2sdram_enable_set(bridge->priv, enable); in alt_fpga2sdram_enable_set()
[all …]
/kernel/linux/linux-6.6/drivers/fpga/
Daltera-fpga2sdram.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
23 * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
26 #include <linux/fpga/fpga-bridge.h>
58 struct alt_fpga2sdram_data *priv = bridge->priv; in alt_fpga2sdram_enable_show()
61 regmap_read(priv->sdrctl, ALT_SDR_CTL_FPGAPORTRST_OFST, &value); in alt_fpga2sdram_enable_show()
63 return (value & priv->mask) == priv->mask; in alt_fpga2sdram_enable_show()
69 return regmap_update_bits(priv->sdrctl, ALT_SDR_CTL_FPGAPORTRST_OFST, in _alt_fpga2sdram_enable_set()
70 priv->mask, enable ? priv->mask : 0); in _alt_fpga2sdram_enable_set()
75 return _alt_fpga2sdram_enable_set(bridge->priv, enable); in alt_fpga2sdram_enable_set()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/
Ddrm_debugfs.c56 struct drm_debugfs_entry *entry = m->private; in drm_name_info()
57 struct drm_device *dev = entry->dev; in drm_name_info()
60 mutex_lock(&dev->master_mutex); in drm_name_info()
61 master = dev->master; in drm_name_info()
62 seq_printf(m, "%s", dev->driver->name); in drm_name_info()
63 if (dev->dev) in drm_name_info()
64 seq_printf(m, " dev=%s", dev_name(dev->dev)); in drm_name_info()
65 if (master && master->unique) in drm_name_info()
66 seq_printf(m, " master=%s", master->unique); in drm_name_info()
67 if (dev->unique) in drm_name_info()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/intel/
Dsocfpga_agilex5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/intel,agilex5-clkmgr.h>
14 compatible = "intel,socfpga-agilex5";
15 #address-cells = <2>;
16 #size-cells = <2>;
[all …]
Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/agilex-clock.h>
13 compatible = "intel,socfpga-agilex";
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/altera/
Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/intel/
Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/agilex-clock.h>
12 compatible = "intel,socfpga-agilex";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/altera/
Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_debugfs.c64 /* parse_write_buffer_into_params - Helper function to parse debugfs write buffer into an array
91 return -EFAULT; in parse_write_buffer_into_params()
105 /* skip non-space*/ in parse_write_buffer_into_params()
154 * debugfs is located at /sys/kernel/debug/dri/0/DP-x/link_settings
156 * --- to get dp configuration
158 * cat /sys/kernel/debug/dri/0/DP-x/link_settings
161 * current -- for current video mode
162 * verified --- maximum configuration which pass link training
163 * reported --- DP rx report caps (DPCD register offset 0, 1 2)
164 * preferred --- user force settings
[all …]
/kernel/linux/linux-6.6/drivers/mmc/host/
Ddw_mmc-pltfm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <linux/mfd/altera-sysmgr.h>
24 #include "dw_mmc-pltfm.h"
36 host = devm_kzalloc(&pdev->dev, sizeof(struct dw_mci), GFP_KERNEL); in dw_mci_pltfm_register()
38 return -ENOMEM; in dw_mci_pltfm_register()
40 host->irq = platform_get_irq(pdev, 0); in dw_mci_pltfm_register()
41 if (host->irq < 0) in dw_mci_pltfm_register()
42 return host->irq; in dw_mci_pltfm_register()
44 host->drv_data = drv_data; in dw_mci_pltfm_register()
45 host->dev = &pdev->dev; in dw_mci_pltfm_register()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/intel/socfpga/
Dsocfpga_arria10.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 enable-method = "altr,socfpga-a10-smp";
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
[all …]
Dsocfpga.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/reset/altr,rst-mgr.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <0>;
24 enable-method = "altr,socfpga-smp";
27 compatible = "arm,cortex-a9";
30 next-level-cache = <&L2>;
33 compatible = "arm,cortex-a9";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsocfpga_arria10.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 enable-method = "altr,socfpga-a10-smp";
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
[all …]
Dsocfpga.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/reset/altr,rst-mgr.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <0>;
24 enable-method = "altr,socfpga-smp";
27 compatible = "arm,cortex-a9";
30 next-level-cache = <&L2>;
33 compatible = "arm,cortex-a9";
[all …]

12