Home
last modified time | relevance | path

Searched +full:syscon +full:- +full:raminit (Results 1 – 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/can/c_can/
Dc_can_platform.c9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
36 #include <linux/mfd/syscon.h>
47 /* 16-bit c_can registers can be arranged differently in the memory
48 * architecture of different implementations. For example: 16-bit
49 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
55 return readw(priv->base + priv->regs[index]); in c_can_plat_read_reg_aligned_to_16bit()
61 writew(val, priv->base + priv->regs[index]); in c_can_plat_write_reg_aligned_to_16bit()
67 return readw(priv->base + 2 * priv->regs[index]); in c_can_plat_read_reg_aligned_to_32bit()
73 writew(val, priv->base + 2 * priv->regs[index]); in c_can_plat_write_reg_aligned_to_32bit()
[all …]
Dc_can.h9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
32 C_CAN_MSG_OBJ_RX_NUM - 1)
36 C_CAN_MSG_OBJ_TX_NUM - 1)
39 #define C_CAN_MSG_RX_LOW_LAST (C_CAN_MSG_OBJ_RX_SPLIT - 1)
180 /* RAMINIT register description. Optional. */
186 /* Out of band RAMINIT register access via syscon regmap */
188 struct regmap *syscon; /* for raminit ctrl. reg. access */ member
189 unsigned int reg; /* register index within syscon */
210 void *priv; /* for board-specific data */
[all …]
/kernel/linux/linux-6.6/drivers/net/can/c_can/
Dc_can_platform.c9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
36 #include <linux/mfd/syscon.h>
47 /* 16-bit c_can registers can be arranged differently in the memory
48 * architecture of different implementations. For example: 16-bit
49 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
55 return readw(priv->base + priv->regs[index]); in c_can_plat_read_reg_aligned_to_16bit()
61 writew(val, priv->base + priv->regs[index]); in c_can_plat_write_reg_aligned_to_16bit()
67 return readw(priv->base + 2 * priv->regs[index]); in c_can_plat_read_reg_aligned_to_32bit()
73 writew(val, priv->base + 2 * priv->regs[index]); in c_can_plat_write_reg_aligned_to_32bit()
[all …]
Dc_can.h9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
165 /* RAMINIT register description. Optional. */
171 /* Out of band RAMINIT register access via syscon regmap */
173 struct regmap *syscon; /* for raminit ctrl. reg. access */ member
174 unsigned int reg; /* register index within syscon */
211 struct c_can_raminit raminit_sys; /* RAMINIT via syscon regmap */
212 void (*raminit)(const struct c_can_priv *priv, bool enable); member
230 return ring->head & (ring->obj_num - 1); in c_can_get_tx_head()
235 return ring->tail & (ring->obj_num - 1); in c_can_get_tx_tail()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/can/
Dbosch,c_can.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Dario Binacchi <dariobin@libero.it>
15 - $ref: can-controller.yaml#
20 - enum:
21 - bosch,c_can
22 - bosch,d_can
23 - ti,dra7-d_can
24 - ti,am3352-d_can
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/can/
Dc_can.txt2 -------------------------------------------------
5 - compatible : Should be "bosch,c_can" for C_CAN controllers and
7 Can be "ti,dra7-d_can", "ti,am3352-d_can" or
8 "ti,am4372-d_can".
9 - reg : physical base address and size of the C_CAN/D_CAN
11 - interrupts : property with a value describing the interrupt
15 - ti,hwmods : Must be "d_can<n>" or "c_can<n>", n being the
19 - power-domains : Should contain a phandle to a PM domain provider node
22 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
23 - clocks : CAN functional clock phandle. This property is as per the
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Dam33xx-l4.dtsi2 compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
[all …]
Dam437x-l4.dtsi2 compatible = "ti,am4-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
[all …]
Ddra7-l4.dtsi2 compatible = "ti,dra7-l4-cfg", "simple-pm-bus";
3 power-domains = <&prm_coreaon>;
5 clock-names = "fck";
9 reg-names = "ap", "la", "ia0";
10 #address-cells = <1>;
11 #size-cells = <1>;
15 dma-ranges;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dam437x-l4.dtsi2 compatible = "ti,am4-l4-wkup", "simple-bus";
7 reg-names = "ap", "la", "ia0", "ia1";
8 #address-cells = <1>;
9 #size-cells = <1>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
[all …]
Dam33xx-l4.dtsi2 compatible = "ti,am33xx-l4-wkup", "simple-bus";
7 reg-names = "ap", "la", "ia0", "ia1";
8 #address-cells = <1>;
9 #size-cells = <1>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
[all …]
Ddra7-l4.dtsi2 compatible = "ti,dra7-l4-cfg", "simple-bus";
6 reg-names = "ap", "la", "ia0";
7 #address-cells = <1>;
8 #size-cells = <1>;
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
47 target-module@2000 { /* 0x4a002000, ap 3 08.0 */
48 compatible = "ti,sysc-omap4", "ti,sysc";
50 reg-names = "rev";
[all …]