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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/
Dnvidia,tegra30-timer.txt1 NVIDIA Tegra30 timer
3 The Tegra30 timer provides ten 29-bit timer channels, a single 32-bit free
9 - compatible : For Tegra30, must contain "nvidia,tegra30-timer". Otherwise,
10 must contain '"nvidia,<chip>-timer", "nvidia,tegra30-timer"' where
12 - reg : Specifies base physical address and size of the registers.
13 - interrupts : A list of 6 interrupts; one per each of timer channels 1
15 - clocks : Must contain one entry, for the module clock.
16 See ../clocks/clock-bindings.txt for details.
18 timer {
19 compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/
Dnvidia,tegra-timer.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra timer
10 - Stephen Warren <swarren@nvidia.com>
13 - if:
17 const: nvidia,tegra210-timer
25 A list of 14 interrupts; one per each timer channels 0 through 13
27 - if:
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
10 compatible = "nvidia,tegra30";
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
[all …]
Dtegra114.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
13 interrupt-parent = <&lic>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-peripherals-opp.dtsi"
13 compatible = "nvidia,tegra30";
[all …]
Dtegra114.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dnvidia,tegra20-usb-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra20-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
17 - items:
18 - enum:
19 - nvidia,tegra124-usb-phy
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dnvidia,tegra20-usb-phy.txt6 - compatible : For Tegra20, must contain "nvidia,tegra20-usb-phy".
7 For Tegra30, must contain "nvidia,tegra30-usb-phy". Otherwise, must contain
8 "nvidia,<chip>-usb-phy" plus at least one of the above, where <chip> is
10 - reg : Defines the following set of registers, in the order listed:
11 - The PHY's own register set.
13 - The register set of the PHY containing the UTMI pad control registers.
14 Present if-and-only-if phy_type == utmi.
15 - phy_type : Should be one of "utmi", "ulpi" or "hsic".
16 - clocks : Defines the clocks listed in the clock-names property.
17 - clock-names : The following clock names must be present:
[all …]
/kernel/linux/linux-6.6/drivers/clocksource/
Dtimer-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #define pr_fmt(fmt) "tegra-timer: " fmt
24 #include "timer-of.h"
60 * Tegra's timer uses n+1 scheme for the counter, i.e. timer will in tegra_timer_set_next_event()
68 writel_relaxed(TIMER_PTV_EN | (cycles - 1), reg_base + TIMER_PTV); in tegra_timer_set_next_event()
87 writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | (period - 1), in tegra_timer_set_periodic()
99 evt->event_handler(evt); in tegra_timer_isr()
139 irq_force_affinity(to->clkevt.irq, cpumask_of(cpu)); in tegra_timer_setup()
140 enable_irq(to->clkevt.irq); in tegra_timer_setup()
143 * Tegra's timer uses n+1 scheme for the counter, i.e. timer will in tegra_timer_setup()
[all …]
/kernel/linux/linux-5.10/drivers/clocksource/
Dtimer-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #define pr_fmt(fmt) "tegra-timer: " fmt
24 #include "timer-of.h"
60 * Tegra's timer uses n+1 scheme for the counter, i.e. timer will in tegra_timer_set_next_event()
68 writel_relaxed(TIMER_PTV_EN | (cycles - 1), reg_base + TIMER_PTV); in tegra_timer_set_next_event()
87 writel_relaxed(TIMER_PTV_EN | TIMER_PTV_PER | (period - 1), in tegra_timer_set_periodic()
99 evt->event_handler(evt); in tegra_timer_isr()
139 irq_force_affinity(to->clkevt.irq, cpumask_of(cpu)); in tegra_timer_setup()
140 enable_irq(to->clkevt.irq); in tegra_timer_setup()
143 * Tegra's timer uses n+1 scheme for the counter, i.e. timer will in tegra_timer_setup()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/
Dtegra132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra132-peripherals-opp.dtsi"
[all …]
Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
[all …]
Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/
Dnvidia,tegra20-rtc.txt1 NVIDIA Tegra20 real-time clock
4 registers. The alarms and other interrupts may wake the system from low-power
9 - compatible : For Tegra20, must contain "nvidia,tegra20-rtc". Otherwise,
10 must contain '"nvidia,<chip>-rtc", "nvidia,tegra20-rtc"', where <chip>
11 can be tegra30, tegra114, tegra124, or tegra132.
12 - reg : Specifies base physical address and size of the registers.
13 - interrupts : A single interrupt specifier.
14 - clocks : Must contain one entry, for the module clock.
15 See ../clocks/clock-bindings.txt for details.
19 timer {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
13 interrupt-parent = <&lic>;
[all …]
Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/rtc/
Dnvidia,tegra20-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/nvidia,tegra20-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra real-time clock
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 from low-power state.
21 - const: nvidia,tegra20-rtc
22 - items:
[all …]
/kernel/linux/linux-6.6/drivers/clk/tegra/
Dclk-tegra30.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
18 #include <dt-bindings/clock/tegra30-car.h>
21 #include "clk-id.h"
595 { .con_id = "vcp", .dev_id = "tegra-avp", .dt_id = TEGRA30_CLK_VCP },
596 { .con_id = "bsea", .dev_id = "tegra-avp", .dt_id = TEGRA30_CLK_BSEA },
597 { .con_id = "bsev", .dev_id = "tegra-aes", .dt_id = TEGRA30_CLK_BSEV },
601 { .con_id = "pcie", .dev_id = "tegra-pcie", .dt_id = TEGRA30_CLK_PCIE },
602 { .con_id = "afi", .dev_id = "tegra-pcie", .dt_id = TEGRA30_CLK_AFI },
604 { .con_id = "fuse_burn", .dev_id = "fuse-tegra", .dt_id = TEGRA30_CLK_FUSE_BURN },
[all …]
/kernel/linux/linux-5.10/drivers/watchdog/
Dtegra_wdt.c1 // SPDX-License-Identifier: GPL-2.0
19 * Base of the WDT registers, from the timer base address. There are
21 * timer), at bases 0x100 + (WDT ID) * 0x20, where WDT ID is 0 through 4.
28 * Register base of the timer that's selected for pairing with the watchdog.
29 * This driver arbitrarily uses timer 5, which is currently unused by
31 * needs to change, take care that the new timer is not used by the
54 /* Timer registers */
91 writel(val, wdt->tmr_regs + TIMER_PTV); in tegra_wdt_start()
101 (wdd->timeout << WDT_CFG_PERIOD_SHIFT) | in tegra_wdt_start()
103 writel(val, wdt->wdt_regs + WDT_CFG); in tegra_wdt_start()
[all …]
/kernel/linux/linux-6.6/drivers/watchdog/
Dtegra_wdt.c1 // SPDX-License-Identifier: GPL-2.0
19 * Base of the WDT registers, from the timer base address. There are
21 * timer), at bases 0x100 + (WDT ID) * 0x20, where WDT ID is 0 through 4.
28 * Register base of the timer that's selected for pairing with the watchdog.
29 * This driver arbitrarily uses timer 5, which is currently unused by
31 * needs to change, take care that the new timer is not used by the
54 /* Timer registers */
91 writel(val, wdt->tmr_regs + TIMER_PTV); in tegra_wdt_start()
101 (wdd->timeout << WDT_CFG_PERIOD_SHIFT) | in tegra_wdt_start()
103 writel(val, wdt->wdt_regs + WDT_CFG); in tegra_wdt_start()
[all …]
/kernel/linux/linux-5.10/drivers/clk/tegra/
Dclk-tegra30.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/tegra30-car.h>
19 #include "clk-id.h"
593 { .con_id = "vcp", .dev_id = "tegra-avp", .dt_id = TEGRA30_CLK_VCP },
594 { .con_id = "bsea", .dev_id = "tegra-avp", .dt_id = TEGRA30_CLK_BSEA },
595 { .con_id = "bsev", .dev_id = "tegra-aes", .dt_id = TEGRA30_CLK_BSEV },
599 { .con_id = "pcie", .dev_id = "tegra-pcie", .dt_id = TEGRA30_CLK_PCIE },
600 { .con_id = "afi", .dev_id = "tegra-pcie", .dt_id = TEGRA30_CLK_AFI },
602 { .con_id = "fuse_burn", .dev_id = "fuse-tegra", .dt_id = TEGRA30_CLK_FUSE_BURN },
[all …]
/kernel/linux/linux-5.10/drivers/input/keyboard/
Dtegra-kbc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2009-2011, NVIDIA Corporation.
104 struct timer_list timer; member
156 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i); in tegra_kbc_report_keys()
165 keycodes[num_down] = kbc->keycode[scancode]; in tegra_kbc_report_keys()
167 if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map) in tegra_kbc_report_keys()
178 * Ghosting occurs if there are 3 keys such that - in tegra_kbc_report_keys()
182 if (kbc->use_ghost_filter && num_down >= 3) { in tegra_kbc_report_keys()
190 * and the other is in the same column as the i-th key. in tegra_kbc_report_keys()
210 scancodes[i] += kbc->max_keys; in tegra_kbc_report_keys()
[all …]
/kernel/linux/linux-6.6/drivers/input/keyboard/
Dtegra-kbc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2009-2011, NVIDIA Corporation.
104 struct timer_list timer; member
156 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i); in tegra_kbc_report_keys()
165 keycodes[num_down] = kbc->keycode[scancode]; in tegra_kbc_report_keys()
167 if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map) in tegra_kbc_report_keys()
178 * Ghosting occurs if there are 3 keys such that - in tegra_kbc_report_keys()
182 if (kbc->use_ghost_filter && num_down >= 3) { in tegra_kbc_report_keys()
190 * and the other is in the same column as the i-th key. in tegra_kbc_report_keys()
210 scancodes[i] += kbc->max_keys; in tegra_kbc_report_keys()
[all …]

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