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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
[all …]
Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: snps,dwmac.yaml#
27 - items:
28 - enum:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.50a
25 - snps,dwmac-3.610
26 - snps,dwmac-3.70a
[all …]
Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: "snps,dwmac.yaml#"
27 - items:
28 - enum:
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/intel/ixgbe/
Dixgbe_dcb_82599.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
10 * ixgbe_dcb_config_rx_arbiter_82599 - Config Rx Data arbiter
70 * ixgbe_dcb_config_tx_desc_arbiter_82599 - Config Tx Desc. arbiter
77 * Configure Tx Descriptor Arbiter and credits for each traffic class.
88 /* Clear the per-Tx queue credits; we use per-TC instead */ in ixgbe_dcb_config_tx_desc_arbiter_82599()
111 * Configure Tx descriptor plane (recycle mode; WSP) and in ixgbe_dcb_config_tx_desc_arbiter_82599()
121 * ixgbe_dcb_config_tx_data_arbiter_82599 - Config Tx Data arbiter
129 * Configure Tx Packet Arbiter and credits for each traffic class.
172 * Configure Tx packet plane (recycle mode; SP; arb delay) and in ixgbe_dcb_config_tx_data_arbiter_82599()
[all …]
Dixgbe_dcb_82598.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
10 * ixgbe_dcb_config_rx_arbiter_82598 - Config Rx data arbiter
69 * ixgbe_dcb_config_tx_desc_arbiter_82598 - Config Tx Desc. arbiter
76 * Configure Tx Descriptor Arbiter and credits for each traffic class.
118 * ixgbe_dcb_config_tx_data_arbiter_82598 - Config Tx data arbiter
125 * Configure Tx Data Arbiter and credits for each traffic class.
159 /* Enable Tx packet buffer division */ in ixgbe_dcb_config_tx_data_arbiter_82598()
168 * ixgbe_dcb_config_pfc_82598 - Config priority flow control
194 /* Configure PFC Tx thresholds per TC */ in ixgbe_dcb_config_pfc_82598()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/ixgbe/
Dixgbe_dcb_82599.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
10 * ixgbe_dcb_config_rx_arbiter_82599 - Config Rx Data arbiter
70 * ixgbe_dcb_config_tx_desc_arbiter_82599 - Config Tx Desc. arbiter
77 * Configure Tx Descriptor Arbiter and credits for each traffic class.
88 /* Clear the per-Tx queue credits; we use per-TC instead */ in ixgbe_dcb_config_tx_desc_arbiter_82599()
111 * Configure Tx descriptor plane (recycle mode; WSP) and in ixgbe_dcb_config_tx_desc_arbiter_82599()
121 * ixgbe_dcb_config_tx_data_arbiter_82599 - Config Tx Data arbiter
129 * Configure Tx Packet Arbiter and credits for each traffic class.
172 * Configure Tx packet plane (recycle mode; SP; arb delay) and in ixgbe_dcb_config_tx_data_arbiter_82599()
[all …]
Dixgbe_dcb_82598.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
10 * ixgbe_dcb_config_rx_arbiter_82598 - Config Rx data arbiter
69 * ixgbe_dcb_config_tx_desc_arbiter_82598 - Config Tx Desc. arbiter
76 * Configure Tx Descriptor Arbiter and credits for each traffic class.
118 * ixgbe_dcb_config_tx_data_arbiter_82598 - Config Tx data arbiter
125 * Configure Tx Data Arbiter and credits for each traffic class.
159 /* Enable Tx packet buffer division */ in ixgbe_dcb_config_tx_data_arbiter_82598()
168 * ixgbe_dcb_config_pfc_82598 - Config priority flow control
194 /* Configure PFC Tx thresholds per TC */ in ixgbe_dcb_config_pfc_82598()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
[all …]
Dsa8775p-ride.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "sa8775p-pmics.dtsi"
28 stdout-path = "serial0:115200n8";
33 regulators-0 {
34 compatible = "qcom,pmm8654au-rpmh-regulators";
35 qcom,pmic-id = "a";
38 regulator-name = "vreg_s4a";
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3588.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "rk3588-pinctrl.dtsi"
11 compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon";
16 compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";
21 compatible = "rockchip,rk3588-i2s-tdm";
25 clock-names = "mclk_tx", "mclk_rx", "hclk";
26 assigned-clocks = <&cru CLK_I2S8_8CH_TX_SRC>;
27 assigned-clock-parents = <&cru PLL_AUPLL>;
29 dma-names = "tx";
30 power-domains = <&power RK3588_PD_VO0>;
[all …]
Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
16 clock-names = "sata", "pmalive", "rxoob";
19 phy-names = "sata-phy";
20 ports-implemented = <0x1>;
21 power-domains = <&power RK3568_PD_PIPE>;
26 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
31 compatible = "rockchip,rk3568-qos", "syscon";
36 compatible = "rockchip,rk3568-qos", "syscon";
41 compatible = "rockchip,rk3568-qos", "syscon";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/axis/
Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
[all …]
/kernel/linux/linux-5.10/drivers/net/caif/
Dcaif_virtio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson AB 2013
21 #include <linux/dma-mapping.h>
33 /* Defaults used if virtio config space is unavailable */
41 /* struct cfv_napi_contxt - NAPI context info
46 * used to indicate invalid head-id.
53 /* struct cfv_stats - statistics for debugfs
58 * @tx_full_ring: Number times TX ring was full
59 * @tx_no_mem: Number of times TX went out of memory
60 * @tx_flow_on: Number of flow on (TX)
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/
Dstmmac_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
88 * stmmac_axi_setup - parse DT parameters for programming the AXI register
91 * if required, from device-tree the AXI internal register can be tuned
99 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0); in stmmac_axi_setup()
103 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL); in stmmac_axi_setup()
106 return ERR_PTR(-ENOMEM); in stmmac_axi_setup()
109 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en"); in stmmac_axi_setup()
[all …]
/kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/mellanox/
Dmlx5.rst1 .. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
12 - `Enabling the driver and kconfig options`_
13 - `Devlink info`_
14 - `Devlink parameters`_
15 - `Devlink health reporters`_
16 - `mlx5 tracepoints`_
23 | Basic features, ethernet net device rx/tx offloads and XDP, are available with the most basic fla…
29 | The driver can be enabled by choosing CONFIG_MLX5_CORE=y/m in kernel config.
35 …ng this option will allow basic ethernet netdevice support with all of the standard rx/tx offloads.
37 | built-in into mlx5_core.ko.
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/ice/
Dice.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/dma-mapping.h>
84 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1)
94 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
100 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
101 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
102 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
103 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
107 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
109 /* Macros for each Tx/Rx ring in a VSI */
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/intel/fm10k/
Dfm10k_common.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
7 * fm10k_get_bus_info_generic - Generic set PCI bus info
17 /* Get the maximum link width and speed from PCIe config space */ in fm10k_get_bus_info_generic()
22 hw->bus_caps.width = fm10k_bus_width_pcie_x1; in fm10k_get_bus_info_generic()
25 hw->bus_caps.width = fm10k_bus_width_pcie_x2; in fm10k_get_bus_info_generic()
28 hw->bus_caps.width = fm10k_bus_width_pcie_x4; in fm10k_get_bus_info_generic()
31 hw->bus_caps.width = fm10k_bus_width_pcie_x8; in fm10k_get_bus_info_generic()
34 hw->bus_caps.width = fm10k_bus_width_unknown; in fm10k_get_bus_info_generic()
40 hw->bus_caps.speed = fm10k_bus_speed_2500; in fm10k_get_bus_info_generic()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/fm10k/
Dfm10k_common.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
7 * fm10k_get_bus_info_generic - Generic set PCI bus info
17 /* Get the maximum link width and speed from PCIe config space */ in fm10k_get_bus_info_generic()
22 hw->bus_caps.width = fm10k_bus_width_pcie_x1; in fm10k_get_bus_info_generic()
25 hw->bus_caps.width = fm10k_bus_width_pcie_x2; in fm10k_get_bus_info_generic()
28 hw->bus_caps.width = fm10k_bus_width_pcie_x4; in fm10k_get_bus_info_generic()
31 hw->bus_caps.width = fm10k_bus_width_pcie_x8; in fm10k_get_bus_info_generic()
34 hw->bus_caps.width = fm10k_bus_width_unknown; in fm10k_get_bus_info_generic()
40 hw->bus_caps.speed = fm10k_bus_speed_2500; in fm10k_get_bus_info_generic()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/cadence/
Dmacb_main.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2006 Atmel Corporation
10 #include <linux/clk-provider.h>
25 #include <linux/dma-mapping.h>
40 #include <linux/firmware/xlnx-zynqmp.h>
57 * (bp)->rx_ring_size)
63 * (bp)->tx_ring_size)
65 /* level of occupied TX descriptors under which we wake up TX process */
66 #define MACB_TX_WAKEUP_THRESH(bp) (3 * (bp)->tx_ring_size / 4)
77 …MAX_TX_LEN ((unsigned int)((1 << MACB_TX_FRMLEN_SIZE) - 1) & ~((unsigned int)(MACB_TX_LEN_ALIGN -…
[all …]
/kernel/linux/linux-6.6/drivers/net/caif/
Dcaif_virtio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson AB 2013
21 #include <linux/dma-mapping.h>
33 /* Defaults used if virtio config space is unavailable */
41 /* struct cfv_napi_contxt - NAPI context info
46 * used to indicate invalid head-id.
53 /* struct cfv_stats - statistics for debugfs
58 * @tx_full_ring: Number times TX ring was full
59 * @tx_no_mem: Number of times TX went out of memory
60 * @tx_flow_on: Number of flow on (TX)
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/intel/ice/
Dice.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/dma-mapping.h>
110 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */
120 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
128 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
129 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
130 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
131 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
157 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
159 /* Macros for each Tx/Xdp/Rx ring in a VSI */
[all …]
/kernel/linux/linux-6.6/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/
Doverview.rst16 DPAA2 is a hardware architecture designed for high-speeed network
23 DPAA2 hardware resources. The MC provides an object-based abstraction for
25 The MC uses DPAA2 hardware resources such as queues, buffer pools, and
28 The MC provides memory-mapped I/O command interfaces (MC portals)
34 +--------------------------------------+
38 +-----------------------------|--------+
41 | config,use,destroy)
44 +------------------------| mc portal |-+
46 | +- - - - - - - - - - - - -V- - -+ |
50 | +- - - - - - - - - - - - - - - -+ |
[all …]
/kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/
Doverview.rst16 DPAA2 is a hardware architecture designed for high-speeed network
23 DPAA2 hardware resources. The MC provides an object-based abstraction for
25 The MC uses DPAA2 hardware resources such as queues, buffer pools, and
28 The MC provides memory-mapped I/O command interfaces (MC portals)
34 +--------------------------------------+
38 +-----------------------------|--------+
41 | config,use,destroy)
44 +------------------------| mc portal |-+
46 | +- - - - - - - - - - - - -V- - -+ |
50 | +- - - - - - - - - - - - - - - -+ |
[all …]

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