1 /* 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 * Description: ARCH interface for project 15 * 16 * Create: 2021-07-06 17 */ 18 #ifndef ARCH_PORT_H 19 #define ARCH_PORT_H 20 21 #include <stdint.h> 22 #include <stdbool.h> 23 #include "chip_core_irq.h" 24 #include "memory_config.h" 25 26 #ifdef __cplusplus 27 #if __cplusplus 28 extern "C" { 29 #endif /* __cplusplus */ 30 #endif /* __cplusplus */ 31 32 #ifdef USE_CMSIS_OS 33 #define irq_prio(irq_id) m_auc_int_pri[irq_id] 34 #else 35 #define irq_prio(irq_id) g_auc_int_pri[irq_id] 36 #endif 37 38 extern uint8_t m_auc_int_pri[BUTT_IRQN]; 39 extern uint8_t g_auc_int_pri[BUTT_IRQN]; 40 #ifdef __cplusplus 41 #if __cplusplus 42 } 43 #endif /* __cplusplus */ 44 #endif /* __cplusplus */ 45 46 #endif 47