1 /* 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 * Description: log OML exception producer interface 15 * Author: 16 * Create: 17 */ 18 19 #ifndef LOG_OML_EXCEPTION_H 20 #define LOG_OML_EXCEPTION_H 21 22 #if ((ARCH == RISCV31) || (ARCH == RISCV32) || (ARCH == RISCV70)) 23 #define AULREG_VALUE_INDEX 32 24 #elif (ARCH == CM3) || (ARCH == CM7) 25 #define AULREG_VALUE_INDEX 16 26 #endif 27 28 #include "log_oam_logger.h" 29 #if ((ARCH == RISCV31) || (ARCH == RISCV32) || (ARCH == RISCV70)) 30 #include "vectors.h" 31 #elif (ARCH == CM7) 32 #include "exception.h" 33 #endif 34 typedef struct { 35 om_msg_header_stru_t msg_header; 36 uint32_t stack_limit; 37 uint32_t fault_type; 38 uint32_t fault_reason; 39 uint32_t address; 40 uint32_t reg_value[AULREG_VALUE_INDEX]; 41 uint32_t psp_value; 42 uint32_t lr_value; 43 uint32_t pc_value; 44 uint32_t psps_value; 45 uint32_t primask_value; 46 uint32_t fault_mask_value; 47 uint32_t bserpri_value; 48 uint32_t control_value; 49 uint8_t msg_tail; 50 } __attribute__((packed)) om_exception_info_stru_t; 51 52 enum OM_FAULT_TYPE_ENUM { 53 OM_HARD_FAULT, 54 OM_MEM_FAULT, 55 OM_BUS_FAULT, 56 OM_USAGE_FAULT, 57 OM_LOOP_DEAD, 58 OM_WDT_TIMEOUT, 59 OM_INDEX_BUTT, 60 }; 61 62 enum OM_RISCV_FAULT_TYPE_ENMU { 63 OM_UNKNOW_FAULT, 64 65 OM_INSTRUCTION_ADDRESS_MISALIGNED, 66 OM_INSTRUCTION_ACCESS_FAULT, 67 OM_ILLEGAL_INSTRUCTION, 68 OM_BREAKPOINT, 69 OM_LOAD_ADDERSS_MISALIGNED, 70 OM_LOAD_ACCESS_FAULT, 71 OM_STORE_OR_AMO_ADDRESS_MISALIGNED, 72 OM_STORE_OR_AMO_ACCESS_FALUT, 73 OM_ENVIRONMENT_CALL_FROM_UMODE, 74 OM_ENVIRONMENT_CALL_FROM_SMODE, 75 OM_RESERVED_0, 76 OM_ENVIRONMENT_CALL_FROM_MMODE, 77 OM_INSTRUCTION_PAGE_FAULT, 78 OM_LOAD_PAGE_FAULT, 79 OM_RESERVED_1, 80 OM_STORE_OR_AMO_PAGE_FAULT, 81 #if (ARCH == RISCV31) || (ARCH == RISCV32) 82 OM_RISCV_HARD_FAULT, 83 OM_LOCK_UP, 84 #else 85 OM_ASYNCHRONOUS_EXCEPTION, 86 #endif 87 88 OM_NMI_INTERRUPT, 89 OM_WDT_TIMEOUT_INTERRUPT, 90 OM_APPLICATION_XIP_CTRL_INTERRUPT, 91 OM_APPLICATION_XIP_CACHE_INTERRUPT, 92 OM_APPLICATION_MDMA_INTERRUPT, 93 OM_APPLICATION_SMDMA_INTERRUPT, 94 }; 95 96 enum REG_NUM_INDEX { 97 REG_NUM_0, 98 REG_NUM_1, 99 REG_NUM_2, 100 REG_NUM_3, 101 REG_NUM_4, 102 REG_NUM_5, 103 REG_NUM_6, 104 REG_NUM_7, 105 REG_NUM_8, 106 REG_NUM_9, 107 REG_NUM_10, 108 REG_NUM_11, 109 REG_NUM_12, 110 REG_NUM_13, 111 REG_NUM_14, 112 REG_NUM_15, 113 REG_NUM_16, 114 REG_NUM_17, 115 REG_NUM_18, 116 REG_NUM_19, 117 REG_NUM_20, 118 REG_NUM_21, 119 REG_NUM_22, 120 REG_NUM_23, 121 REG_NUM_24, 122 REG_NUM_25, 123 REG_NUM_26, 124 REG_NUM_27, 125 REG_NUM_28, 126 REG_NUM_29, 127 REG_NUM_30, 128 REG_NUM_31, 129 }; 130 131 enum PARA1_INDEX { 132 PARA1_INDEX_0, 133 PARA1_INDEX_1, 134 PARA1_INDEX_2, 135 PARA1_INDEX_3, 136 PARA1_INDEX_4, 137 PARA1_INDEX_5, 138 PARA1_INDEX_6, 139 PARA1_INDEX_7, 140 }; 141 142 enum PARA2_INDEX { 143 PARA2_INDEX_0, 144 PARA2_INDEX_1, 145 PARA2_INDEX_2, 146 PARA2_INDEX_3, 147 PARA2_INDEX_4, 148 PARA2_INDEX_5, 149 PARA2_INDEX_6, 150 PARA2_INDEX_7, 151 }; 152 153 #if (USE_COMPRESS_LOG_INSTEAD_OF_SDT_LOG == NO) 154 #define DUMP_MAX_LENGTH_PER_TRANS (5000U - 15U) 155 #endif 156 157 /** 158 * @brief Dump the current task stack when in systemfaults and watchdog timeout. 159 */ 160 void log_oml_dump_stack(void); 161 162 /** 163 * @brief Dump the ram when hardfault or watchdog. 164 * @param addr Dump ram start addr. 165 * @param length Dump ram length. 166 */ 167 void log_exception_send_data(const uint8_t *data, uint16_t length); 168 169 /** 170 * @brief Dump the whole rom when hardfault or watchdog. 171 */ 172 void log_oml_memory_dump(void); 173 174 #if ((ARCH == RISCV31) || (ARCH == RISCV32) || (ARCH == RISCV70)) 175 /** 176 * @brief Invoked by exception to dump exception information. 177 * @param irq_id Interrupt ID. 178 * @param exc_buf_addr Exception buff addr. 179 */ 180 void log_exception_dump(uint32_t irq_id, exc_context_t *exc_buf_addr); 181 #else 182 /** 183 * @brief Invoked by exception to dump exception information. 184 * @param int_id Interrupt ID. 185 * @param reason Fault reason. 186 * @param addr Fault address. 187 * @param exc_info cpu exception info. 188 */ 189 void log_exception_dump(uint32_t int_id, uint32_t reason, uint32_t addr, exc_info_t *exc_info); 190 #endif 191 192 #if ((ARCH == RISCV31) || (ARCH == RISCV32) || (ARCH == RISCV70)) 193 /** 194 * @brief SDT interface to send SDT format fault message. 195 * @param irq_id Interrupt ID. 196 * @param exc_buf_addr Exception buff addr. 197 */ 198 void log_oml_exception_info_send(uint32_t irq_id, const exc_context_t *exc_buf_addr); 199 #else 200 /** 201 * @brief SDT interface to send SDT format fault message. 202 * @param address Fault address. 203 * @param fault_type Fault type. 204 * @param fault_reason Fault reason. 205 * @param exc_info exception information. 206 */ 207 void log_oml_exception_info_send(uint32_t address, uint32_t fault_type, uint32_t fault_reason, 208 const exc_info_t *exc_info); 209 #endif 210 211 /** 212 * @brief Register exception dump to fault interrupt. 213 */ 214 void default_register_hal_exception_dump_callback(void); 215 216 #endif 217