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1 /*
2  * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  * Description: PLATFORM TYPES
15  * Author:
16  * Date:
17  */
18 #ifndef PLATFORM_TYPES_H
19 #define PLATFORM_TYPES_H
20 
21 /** @defgroup DRIVER_PLATFORM_PLATFORM_TYPES CHIP Platform TYPES Driver
22   * @ingroup DRIVER_PLATFORM
23   * @{
24   */
25 #include "platform_core.h"
26 #include "chip_definitions.h"
27 
28 /**
29  * @brief  Generic enum to specify the required core.
30  * By using an enum, type safety can be enforced at compile time.
31  */
32 typedef enum {
33     CORES_BT_CORE = 0,                              /* !< bt Core. */
34     CORES_PROTOCOL_CORE = 1,                        /* !< Hifi Core. */
35     CORES_APPS_CORE = 2,                            /* !< Applications Core. */
36     CORES_EXTERN0_CORE = 3,                         /* !< GNSS Core for libra. */
37 #if CHIP_LIBRA
38     CORES_GNSS_CORE = CORES_EXTERN0_CORE,
39 #else
40     CORES_HIFI1_CORE = CORES_EXTERN0_CORE,
41 #endif
42     CORES_EXTERN1_CORE = 4,                         /* !< Sec Core for libra. */
43     CORES_SEC_CORE = CORES_EXTERN1_CORE,
44 #if (CORE_NUMS < 3)                                 /* !< For BS25, dsp core is null. */
45     CORES_MAX_NUMBER_PHYSICAL = 3,                  /* !< Used to size/range arrays for physical cores where needed. */
46 #else
47     CORES_MAX_NUMBER_PHYSICAL,
48 #endif
49     CORES_NONE = CORES_MAX_NUMBER_PHYSICAL,         /* !< Used to return a NONE value where needed. */
50     CORES_ASSET_CORE = CORES_MAX_NUMBER_PHYSICAL,   /* used for asset store */
51     CORES_UNKNOWN = CORES_MAX_NUMBER_PHYSICAL + 1,  /* !< Used to return a unknown value. */
52 } cores_t;
53 
54 /**
55  * @brief  Generic enum to specify the core image.
56  * On master C20 the standard Security core is CORE_IMAGES_RECOVERY
57  * On production the standard Security core is CORE_IMAGES_BT
58  */
59 typedef enum {
60     CORE_IMAGES_BT = 0,           /* !< bt core image A. At the lowest loadable slot in Flash. */
61     CORE_IMAGES_PROTOCOL = 1,     /* !< Hifi core image A */
62     CORE_IMAGES_APPS = 2,         /* !< Application core image A.  */
63     CORE_IMAGES_RECOVERY = 3,     /* !< Recover core image B. */
64     CORE_IMAGES_EXTERN0 = 4,      /* !< GNSS image for libra. */
65     CORE_IMAGES_EXTERN1 = 5,      /* !< Sec image for libra. */
66     CORE_IMAGES_EXTERN1_SSB = 6,  /* !< Sec image for libra. */
67 #if CHIP_SOCMN1 || CHIP_BS25
68     CORE_IMAGES_MAX_NUMBER = 5,
69 #else
70     CORE_IMAGES_MAX_NUMBER = 7,
71 #endif
72 } core_images_e;
73 
74 /**
75  * @brief  Interrupt Service Routine Callback Type.
76  */
77 typedef void (*isr_callback)(void);
78 
79 /**
80  * @brief  Interrupt State Type.
81  */
82 typedef enum {
83     INTERRUPT_STATE_DISABLED = 0, /* !< Interrupt Disabled */
84     INTERRUPT_STATE_ENABLED = 1,  /* !< Interrupt Enabled  */
85 } interrupt_state_t;
86 
87 /**
88   * @}
89   */
90 #endif
91