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1 /*
2  * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  * Description: I2S port for project
15  *
16  * Create: 2023-03-10
17  */
18 
19 #ifndef SIO_PORTING_H
20 #define SIO_PORTING_H
21 
22 #include <stdint.h>
23 #include <stdbool.h>
24 #include "chip_io.h"
25 #include "platform_core.h"
26 
27 #ifdef __cplusplus
28 #if __cplusplus
29 extern "C" {
30 #endif /* __cplusplus */
31 #endif /* __cplusplus */
32 
33 /**
34  * @defgroup drivers_port_sio SIO
35  * @ingroup  drivers_port
36  * @{
37  */
38 #define I2S_S_CLK                       32000
39 #define FREQ_OF_NEED                    32
40 #define SIO_LOOP                        8
41 #define I2S_M_CLK                       32000
42 #define I2S_CR                          0x608
43 #define I2S_CR_DIV_NUM_BIT              5
44 #define I2S_CR_DIV_NUM_LEN              4
45 #define I2S_FIFO_SIZE                   16
46 #define HAL_CFG_I2S_BCLK_DIV_EN         0x1000
47 #define HAL_CFG_I2S_CLK_SEL             0x1014
48 #define HAL_CFG_I2S_MS_CFG              0x1024
49 #define HAL_CFG_I2S_FS_DIV_EN           0x1008
50 #define HAL_CFG_I2S_FS_DIV_NUM          0x100c
51 #define HAL_CFG_I2S_FS_DIV_RATIO_NUM    0x1010
52 #define M_CLKEN0                        0x40
53 #define I2S_DUTY_CYCLE                  2
54 #define PCM_DIV_RATIO_NUM               1
55 #define CFG_I2S_BCLK_DIV_EN             0
56 #define CFG_I2S_BCLK_LOAD_DIV_EN        1
57 #define I2S_FS_DIV_NUM_CONFIG_BITS      11
58 #define I2S_FS_DIV_RATIO_NUM_BITS       11
59 #define I2S_READ_WAIT_TIMES_MAX         8
60 #define I2S_PARAM                       2
61 
62 #define SIXTEEN_WIDTH                   16
63 #define EIGHTTEEN_WIDTH                 18
64 #define TWENTY_WIDTH                    20
65 #define TWENTY_FOUR_WIDTH               24
66 #define THIRTY_TWO_WIDTH                32
67 #define NUM_OF_PIN_REGS                 5
68 #define CONFIG_I2S_BUS_MAX_NUM          1
69 #define CONFIG_I2S_SUPPORT_LOOPBACK     1
70 #define CONFIG_DATA_LEN_MAX             128
71 
72 /**
73  * @brief  Definition of the contorl ID of hal sio.
74  */
75 
76 typedef void (*i2s_irq_func_t)(void);
77 
78 /**
79  * @brief  Get the base address of a specified sio.
80  * @param  [in]  bus PCM device to use.
81  * @return The base address of specified sio.
82  */
83 uintptr_t sio_porting_base_addr_get(sio_bus_t bus);
84 
85 /**
86  * @brief  Register hal funcs objects into hal_sio module.
87  * @param  [in]  bus PCM device to use.
88  */
89 void sio_porting_register_hal_funcs(sio_bus_t bus);
90 
91 /**
92  * @brief  Unregister hal funcs objects from hal_sio module.
93  * @param  [in]  bus PCM device to use.
94  */
95 void sio_porting_unregister_hal_funcs(sio_bus_t bus);
96 
97 /**
98  * @brief  Register the interrupt of sio.
99  * @param  [in]  bus PCM device to use.
100  */
101 void sio_porting_register_irq(sio_bus_t bus);
102 
103 /**
104  * @brief  Unregister the interrupt of sio.
105  * @param  [in]  bus PCM device to use.
106  */
107 void sio_porting_unregister_irq(sio_bus_t bus);
108 
109 /**
110  * @brief  The interrupt handler of sio0.
111  */
112 void irq_sio0_handler(void);
113 
114 /**
115  * @brief  SIO clock.
116  * @param  [in]  enable Enable or not.
117  */
118 void sio_porting_clock_enable(bool enable);
119 
120 /**
121  * @brief  Config the pin mode.
122  */
123 void sio_porting_i2s_pinmux(void);
124 
125 /**
126  * @brief  get mclk.
127  */
128 uint32_t sio_porting_get_mclk(void);
129 
130 /**
131  * @brief  get bclk.
132  */
133 uint32_t sio_porting_get_bclk_div_num(uint8_t data_width, uint32_t ch);
134 uintptr_t i2s_porting_tx_left_data_addr_get(sio_bus_t bus);
135 
136 uintptr_t i2s_porting_tx_merge_data_addr_get(sio_bus_t bus);
137 
138 uintptr_t i2s_porting_rx_merge_data_addr_get(sio_bus_t bus);
139 
140 uintptr_t i2s_porting_tx_right_data_addr_get(sio_bus_t bus);
141 
142 uintptr_t i2s_porting_rx_left_data_addr_get(sio_bus_t bus);
143 
144 uintptr_t i2s_porting_rx_right_data_addr_get(sio_bus_t bus);
145 
146 #if defined(CONFIG_I2S_SUPPORT_DMA)
147 uint32_t i2s_port_get_dma_trans_src_handshaking(sio_bus_t bus);
148 
149 uint32_t i2s_port_get_dma_trans_dest_handshaking(sio_bus_t bus);
150 #endif
151 
152 /**
153  * @}
154  */
155 
156 #ifdef __cplusplus
157 #if __cplusplus
158 }
159 #endif /* __cplusplus */
160 #endif /* __cplusplus */
161 
162 #endif