1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Custom OID/ioctl definitions for 4 * 5 * 6 * Broadcom 802.11abg Networking Device Driver 7 * 8 * Definitions subject to change without notice. 9 * 10 * Copyright (C) 1999-2019, Broadcom. 11 * 12 * Unless you and Broadcom execute a separate written software license 13 * agreement governing use of this software, this software is licensed to you 14 * under the terms of the GNU General Public License version 2 (the "GPL"), 15 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 16 * following added to such license: 17 * 18 * As a special exception, the copyright holders of this software give you 19 * permission to link this software with independent modules, and to copy and 20 * distribute the resulting executable under terms of your choice, provided that 21 * you also meet, for each linked independent module, the terms and conditions of 22 * the license of that module. An independent module is a module which is not 23 * derived from this software. The special exception does not apply to any 24 * modifications of the software. 25 * 26 * Notwithstanding the above, under no circumstances may you combine this 27 * software in any way with any other Broadcom software provided under a license 28 * other than the GPL, without Broadcom's express prior written consent. 29 * 30 * 31 * <<Broadcom-WL-IPTag/Open:>> 32 * 33 * $Id: wlioctl.h 824900 2019-06-12 05:42:13Z $ 34 */ 35 36 #ifndef _wlioctl_h_ 37 #define _wlioctl_h_ 38 39 #include <typedefs.h> 40 #include <ethernet.h> 41 #include <bcmip.h> 42 #include <bcmeth.h> 43 #include <bcmip.h> 44 #include <bcmipv6.h> 45 #include <bcmevent.h> 46 #include <802.11.h> 47 #include <802.11s.h> 48 #include <802.1d.h> 49 #include <bcmwifi_channels.h> 50 #ifdef WL11AX 51 #include <802.11ax.h> 52 #endif /* WL11AX */ 53 #include <bcmwifi_rates.h> 54 #include <wlioctl_defs.h> 55 #include <bcmipv6.h> 56 57 #include <bcm_mpool_pub.h> 58 #include <bcmcdc.h> 59 #define SSSR_NEW_API 60 61 /* Include bcmerror.h for error codes or aliases */ 62 #ifdef BCMUTILS_ERR_CODES 63 #include <bcmerror.h> 64 #endif /* BCMUTILS_ERR_CODES */ 65 66 /* NOTE re: Module specific error codes. 67 * 68 * BCME_.. error codes are extended by various features - e.g. FTM, NAN, SAE etc. 69 * The current process is to allocate a range of 1024 negative 32 bit integers to 70 * each module that extends the error codes to indicate a module specific status. 71 * 72 * The next range to use is below. If that range is used for a new feature, please 73 * update the range to be used by the next feature. 74 * 75 * The error codes -4096 ... -5119 are reserved for firmware signing. 76 * 77 * Next available (inclusive) range: [-8*1024 + 1, -7*1024] 78 * 79 * End Note 80 */ 81 82 /* 11ax trigger frame format - versioning info */ 83 #define TRIG_FRAME_FORMAT_11AX_DRAFT_1P1 0 84 85 typedef struct { 86 uint32 num; 87 chanspec_t list[1]; 88 } chanspec_list_t; 89 90 #define RSN_KCK_LENGTH 16 91 #define RSN_KEK_LENGTH 16 92 #define TPK_FTM_LEN 16 93 #ifndef INTF_NAME_SIZ 94 #define INTF_NAME_SIZ 16 95 #endif // endif 96 97 #define WL_ASSOC_START_EVT_DATA_VERSION 1 98 99 typedef struct assoc_event_data { 100 uint32 version; 101 uint32 flags; 102 chanspec_t join_chspec; 103 } assoc_event_data_t; 104 105 /**Used to send ioctls over the transport pipe */ 106 typedef struct remote_ioctl { 107 cdc_ioctl_t msg; 108 uint32 data_len; 109 char intf_name[INTF_NAME_SIZ]; 110 } rem_ioctl_t; 111 #define REMOTE_SIZE sizeof(rem_ioctl_t) 112 113 #define BCM_IOV_XTLV_VERSION 0 114 115 #define MAX_NUM_D11CORES 2 116 117 /**DFS Forced param */ 118 typedef struct wl_dfs_forced_params { 119 chanspec_t chspec; 120 uint16 version; 121 chanspec_list_t chspec_list; 122 } wl_dfs_forced_t; 123 124 #define DFS_PREFCHANLIST_VER 0x01 125 #define WL_CHSPEC_LIST_FIXED_SIZE OFFSETOF(chanspec_list_t, list) 126 /* size of dfs forced param size given n channels are in the list */ 127 #define WL_DFS_FORCED_PARAMS_SIZE(n) \ 128 (sizeof(wl_dfs_forced_t) + (((n) < 1) ? (0) : (((n) - 1)* sizeof(chanspec_t)))) 129 #define WL_DFS_FORCED_PARAMS_FIXED_SIZE \ 130 (WL_CHSPEC_LIST_FIXED_SIZE + OFFSETOF(wl_dfs_forced_t, chspec_list)) 131 #define WL_DFS_FORCED_PARAMS_MAX_SIZE \ 132 WL_DFS_FORCED_PARAMS_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(chanspec_t)) 133 134 /**association decision information */ 135 typedef struct { 136 uint8 assoc_approved; /**< (re)association approved */ 137 uint8 pad; 138 uint16 reject_reason; /**< reason code for rejecting association */ 139 struct ether_addr da; 140 uint8 pad1[6]; 141 int64 sys_time; /**< current system time */ 142 } assoc_decision_t; 143 144 #define DFS_SCAN_S_IDLE -1 145 #define DFS_SCAN_S_RADAR_FREE 0 146 #define DFS_SCAN_S_RADAR_FOUND 1 147 #define DFS_SCAN_S_INPROGESS 2 148 #define DFS_SCAN_S_SCAN_ABORTED 3 149 #define DFS_SCAN_S_SCAN_MODESW_INPROGRESS 4 150 #define DFS_SCAN_S_MAX 5 151 152 #define ACTION_FRAME_SIZE 1800 153 154 typedef struct wl_action_frame { 155 struct ether_addr da; 156 uint16 len; 157 uint32 packetId; 158 uint8 data[ACTION_FRAME_SIZE]; 159 } wl_action_frame_t; 160 161 #define WL_WIFI_ACTION_FRAME_SIZE sizeof(struct wl_action_frame) 162 163 typedef struct ssid_info 164 { 165 uint8 ssid_len; /**< the length of SSID */ 166 uint8 ssid[32]; /**< SSID string */ 167 } ssid_info_t; 168 169 typedef struct wl_af_params { 170 uint32 channel; 171 int32 dwell_time; 172 struct ether_addr BSSID; 173 uint8 PAD[2]; 174 wl_action_frame_t action_frame; 175 } wl_af_params_t; 176 177 #define WL_WIFI_AF_PARAMS_SIZE sizeof(struct wl_af_params) 178 179 #define MFP_TEST_FLAG_NORMAL 0 180 #define MFP_TEST_FLAG_ANY_KEY 1 181 typedef struct wl_sa_query { 182 uint32 flag; 183 uint8 action; 184 uint8 PAD; 185 uint16 id; 186 struct ether_addr da; 187 uint16 PAD; 188 } wl_sa_query_t; 189 190 /* EXT_STA */ 191 /**association information */ 192 typedef struct { 193 uint32 assoc_req; /**< offset to association request frame */ 194 uint32 assoc_req_len; /**< association request frame length */ 195 uint32 assoc_rsp; /**< offset to association response frame */ 196 uint32 assoc_rsp_len; /**< association response frame length */ 197 uint32 bcn; /**< offset to AP beacon */ 198 uint32 bcn_len; /**< AP beacon length */ 199 uint32 wsec; /**< ucast security algo */ 200 uint32 wpaie; /**< offset to WPA ie */ 201 uint8 auth_alg; /**< 802.11 authentication mode */ 202 uint8 WPA_auth; /**< WPA: authenticated key management */ 203 uint8 ewc_cap; /**< EWC (MIMO) capable */ 204 uint8 ofdm; /**< OFDM */ 205 } assoc_info_t; 206 /* defined(EXT_STA) */ 207 208 /* Flags for OBSS IOVAR Parameters */ 209 #define WL_OBSS_DYN_BWSW_FLAG_ACTIVITY_PERIOD (0x01) 210 #define WL_OBSS_DYN_BWSW_FLAG_NOACTIVITY_PERIOD (0x02) 211 #define WL_OBSS_DYN_BWSW_FLAG_NOACTIVITY_INCR_PERIOD (0x04) 212 #define WL_OBSS_DYN_BWSW_FLAG_PSEUDO_SENSE_PERIOD (0x08) 213 #define WL_OBSS_DYN_BWSW_FLAG_RX_CRS_PERIOD (0x10) 214 #define WL_OBSS_DYN_BWSW_FLAG_DUR_THRESHOLD (0x20) 215 #define WL_OBSS_DYN_BWSW_FLAG_TXOP_PERIOD (0x40) 216 217 /* OBSS IOVAR Version information */ 218 #define WL_PROT_OBSS_CONFIG_PARAMS_VERSION 1 219 220 #include <packed_section_start.h> 221 typedef BWL_PRE_PACKED_STRUCT struct { 222 uint8 obss_bwsw_activity_cfm_count_cfg; /**< configurable count in 223 * seconds before we confirm that OBSS is present and 224 * dynamically activate dynamic bwswitch. 225 */ 226 uint8 obss_bwsw_no_activity_cfm_count_cfg; /**< configurable count in 227 * seconds before we confirm that OBSS is GONE and 228 * dynamically start pseudo upgrade. If in pseudo sense time, we 229 * will see OBSS, [means that, we false detected that OBSS-is-gone 230 * in watchdog] this count will be incremented in steps of 231 * obss_bwsw_no_activity_cfm_count_incr_cfg for confirming OBSS 232 * detection again. Note that, at present, max 30seconds is 233 * allowed like this. [OBSS_BWSW_NO_ACTIVITY_MAX_INCR_DEFAULT] 234 */ 235 uint8 obss_bwsw_no_activity_cfm_count_incr_cfg; /* see above 236 */ 237 uint16 obss_bwsw_pseudo_sense_count_cfg; /**< number of msecs/cnt to be in 238 * pseudo state. This is used to sense/measure the stats from lq. 239 */ 240 uint8 obss_bwsw_rx_crs_threshold_cfg; /**< RX CRS default threshold */ 241 uint8 obss_bwsw_dur_thres; /**< OBSS dyn bwsw trigger/RX CRS Sec */ 242 uint8 obss_bwsw_txop_threshold_cfg; /**< TXOP default threshold */ 243 } BWL_POST_PACKED_STRUCT wlc_obss_dynbwsw_config_t; 244 #include <packed_section_end.h> 245 246 #include <packed_section_start.h> 247 typedef BWL_PRE_PACKED_STRUCT struct { 248 uint32 version; /**< version field */ 249 uint32 config_mask; 250 uint32 reset_mask; 251 wlc_obss_dynbwsw_config_t config_params; 252 } BWL_POST_PACKED_STRUCT obss_config_params_t; 253 #include <packed_section_end.h> 254 255 /**bsscfg type */ 256 typedef enum bsscfg_type { 257 BSSCFG_TYPE_GENERIC = 0, /**< Generic AP/STA/IBSS BSS */ 258 BSSCFG_TYPE_P2P = 1, /**< P2P BSS */ 259 /* index 2 earlier used for BTAMP */ 260 BSSCFG_TYPE_PSTA = 3, 261 BSSCFG_TYPE_TDLS = 4, 262 BSSCFG_TYPE_SLOTTED_BSS = 5, 263 BSSCFG_TYPE_PROXD = 6, 264 BSSCFG_TYPE_NAN = 7, 265 BSSCFG_TYPE_MESH = 8, 266 BSSCFG_TYPE_AIBSS = 9 267 } bsscfg_type_t; 268 269 /* bsscfg subtype */ 270 typedef enum bsscfg_subtype { 271 BSSCFG_SUBTYPE_NONE = 0, 272 BSSCFG_GENERIC_STA = 1, /* GENERIC */ 273 BSSCFG_GENERIC_AP = 2, 274 BSSCFG_GENERIC_IBSS = 6, 275 BSSCFG_P2P_GC = 3, /* P2P */ 276 BSSCFG_P2P_GO = 4, 277 BSSCFG_P2P_DISC = 5, 278 /* Index 7 & 8 earlier used for BTAMP */ 279 BSSCFG_SUBTYPE_AWDL = 9, /* SLOTTED_BSS_TYPE */ 280 BSSCFG_SUBTYPE_NAN_MGMT = 10, 281 BSSCFG_SUBTYPE_NAN_DATA = 11, 282 BSSCFG_SUBTYPE_NAN_MGMT_DATA = 12 283 } bsscfg_subtype_t; 284 285 typedef struct wlc_bsscfg_info { 286 uint32 type; 287 uint32 subtype; 288 } wlc_bsscfg_info_t; 289 290 /* ULP SHM Offsets info */ 291 typedef struct ulp_shm_info { 292 uint32 m_ulp_ctrl_sdio; 293 uint32 m_ulp_wakeevt_ind; 294 uint32 m_ulp_wakeind; 295 } ulp_shm_info_t; 296 297 /* Legacy structure to help keep backward compatible wl tool and tray app */ 298 299 #define LEGACY_WL_BSS_INFO_VERSION 107 /**< older version of wl_bss_info struct */ 300 301 typedef struct wl_bss_info_107 { 302 uint32 version; /**< version field */ 303 uint32 length; /**< byte length of data in this record, 304 * starting at version and including IEs 305 */ 306 struct ether_addr BSSID; 307 uint16 beacon_period; /**< units are Kusec */ 308 uint16 capability; /**< Capability information */ 309 uint8 SSID_len; 310 uint8 SSID[32]; 311 uint8 PAD; 312 struct { 313 uint32 count; /**< # rates in this set */ 314 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 315 } rateset; /**< supported rates */ 316 uint8 channel; /**< Channel no. */ 317 uint8 PAD; 318 uint16 atim_window; /**< units are Kusec */ 319 uint8 dtim_period; /**< DTIM period */ 320 uint8 PAD; 321 int16 RSSI; /**< receive signal strength (in dBm) */ 322 int8 phy_noise; /**< noise (in dBm) */ 323 uint8 PAD[3]; 324 uint32 ie_length; /**< byte length of Information Elements */ 325 /* variable length Information Elements */ 326 } wl_bss_info_107_t; 327 328 /* 329 * Per-BSS information structure. 330 */ 331 332 #define LEGACY2_WL_BSS_INFO_VERSION 108 /**< old version of wl_bss_info struct */ 333 334 /** 335 * BSS info structure 336 * Applications MUST CHECK ie_offset field and length field to access IEs and 337 * next bss_info structure in a vector (in wl_scan_results_t) 338 */ 339 typedef struct wl_bss_info_108 { 340 uint32 version; /**< version field */ 341 uint32 length; /**< byte length of data in this record, 342 * starting at version and including IEs 343 */ 344 struct ether_addr BSSID; 345 uint16 beacon_period; /**< units are Kusec */ 346 uint16 capability; /**< Capability information */ 347 uint8 SSID_len; 348 uint8 SSID[32]; 349 uint8 PAD[1]; 350 struct { 351 uint32 count; /**< # rates in this set */ 352 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 353 } rateset; /**< supported rates */ 354 chanspec_t chanspec; /**< chanspec for bss */ 355 uint16 atim_window; /**< units are Kusec */ 356 uint8 dtim_period; /**< DTIM period */ 357 uint8 PAD; 358 int16 RSSI; /**< receive signal strength (in dBm) */ 359 int8 phy_noise; /**< noise (in dBm) */ 360 361 uint8 n_cap; /**< BSS is 802.11N Capable */ 362 uint8 PAD[2]; 363 uint32 nbss_cap; /**< 802.11N BSS Capabilities (based on HT_CAP_*) */ 364 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 365 uint8 PAD[3]; 366 uint32 reserved32[1]; /**< Reserved for expansion of BSS properties */ 367 uint8 flags; /**< flags */ 368 uint8 reserved[3]; /**< Reserved for expansion of BSS properties */ 369 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 370 371 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 372 uint8 PAD[2]; 373 uint32 ie_length; /**< byte length of Information Elements */ 374 /* Add new fields here */ 375 /* variable length Information Elements */ 376 } wl_bss_info_108_t; 377 378 #define WL_BSS_INFO_VERSION 109 /**< current version of wl_bss_info struct */ 379 380 /** 381 * BSS info structure 382 * Applications MUST CHECK ie_offset field and length field to access IEs and 383 * next bss_info structure in a vector (in wl_scan_results_t) 384 */ 385 typedef struct wl_bss_info { 386 uint32 version; /**< version field */ 387 uint32 length; /**< byte length of data in this record, 388 * starting at version and including IEs 389 */ 390 struct ether_addr BSSID; 391 uint16 beacon_period; /**< units are Kusec */ 392 uint16 capability; /**< Capability information */ 393 uint8 SSID_len; 394 uint8 SSID[32]; 395 uint8 bcnflags; /* additional flags w.r.t. beacon */ 396 struct { 397 uint32 count; /**< # rates in this set */ 398 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 399 } rateset; /**< supported rates */ 400 chanspec_t chanspec; /**< chanspec for bss */ 401 uint16 atim_window; /**< units are Kusec */ 402 uint8 dtim_period; /**< DTIM period */ 403 uint8 accessnet; /* from beacon interwork IE (if bcnflags) */ 404 int16 RSSI; /**< receive signal strength (in dBm) */ 405 int8 phy_noise; /**< noise (in dBm) */ 406 uint8 n_cap; /**< BSS is 802.11N Capable */ 407 uint16 freespace1; /* make implicit padding explicit */ 408 uint32 nbss_cap; /**< 802.11N+AC BSS Capabilities */ 409 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 410 uint8 padding1[3]; /**< explicit struct alignment padding */ 411 uint16 vht_rxmcsmap; /**< VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 412 uint16 vht_txmcsmap; /**< VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 413 uint8 flags; /**< flags */ 414 uint8 vht_cap; /**< BSS is vht capable */ 415 uint8 reserved[2]; /**< Reserved for expansion of BSS properties */ 416 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 417 418 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 419 uint16 freespace2; /* making implicit padding explicit */ 420 uint32 ie_length; /**< byte length of Information Elements */ 421 int16 SNR; /**< average SNR of during frame reception */ 422 uint16 vht_mcsmap; /**< STA's Associated vhtmcsmap */ 423 uint16 vht_mcsmap_prop; /**< STA's Associated prop vhtmcsmap */ 424 uint16 vht_txmcsmap_prop; /**< prop VHT tx mcs prop */ 425 } wl_bss_info_v109_t; 426 427 /** 428 * BSS info structure 429 * Applications MUST CHECK ie_offset field and length field to access IEs and 430 * next bss_info structure in a vector (in wl_scan_results_t) 431 */ 432 typedef struct wl_bss_info_v109_1 { 433 uint32 version; /**< version field */ 434 uint32 length; /**< byte length of data in this record, 435 * starting at version and including IEs 436 */ 437 struct ether_addr BSSID; 438 uint16 beacon_period; /**< units are Kusec */ 439 uint16 capability; /**< Capability information */ 440 uint8 SSID_len; 441 uint8 SSID[32]; 442 uint8 bcnflags; /* additional flags w.r.t. beacon */ 443 struct { 444 uint32 count; /**< # rates in this set */ 445 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 446 } rateset; /**< supported rates */ 447 chanspec_t chanspec; /**< chanspec for bss */ 448 uint16 atim_window; /**< units are Kusec */ 449 uint8 dtim_period; /**< DTIM period */ 450 uint8 accessnet; /* from beacon interwork IE (if bcnflags) */ 451 int16 RSSI; /**< receive signal strength (in dBm) */ 452 int8 phy_noise; /**< noise (in dBm) */ 453 uint8 n_cap; /**< BSS is 802.11N Capable */ 454 uint8 he_cap; /**< BSS is he capable */ 455 uint8 freespace1; /* make implicit padding explicit */ 456 uint32 nbss_cap; /**< 802.11N+AC BSS Capabilities */ 457 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 458 uint8 padding1[3]; /**< explicit struct alignment padding */ 459 uint16 vht_rxmcsmap; /**< VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 460 uint16 vht_txmcsmap; /**< VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 461 uint8 flags; /**< flags */ 462 uint8 vht_cap; /**< BSS is vht capable */ 463 uint8 reserved[2]; /**< Reserved for expansion of BSS properties */ 464 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 465 466 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 467 uint16 freespace2; /* making implicit padding explicit */ 468 uint32 ie_length; /**< byte length of Information Elements */ 469 int16 SNR; /**< average SNR of during frame reception */ 470 uint16 vht_mcsmap; /**< STA's Associated vhtmcsmap */ 471 uint16 vht_mcsmap_prop; /**< STA's Associated prop vhtmcsmap */ 472 uint16 vht_txmcsmap_prop; /**< prop VHT tx mcs prop */ 473 uint32 he_mcsmap; /**< STA's Associated hemcsmap */ 474 uint32 he_rxmcsmap; /**< HE rx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 475 uint32 he_txmcsmap; /**< HE tx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 476 } wl_bss_info_v109_1_t; 477 478 /** 479 * BSS info structure 480 * Applications MUST CHECK ie_offset field and length field to access IEs and 481 * next bss_info structure in a vector (in wl_scan_results_t) 482 */ 483 typedef struct wl_bss_info_v109_2 { 484 uint32 version; /**< version field */ 485 uint32 length; /**< byte length of data in this record, 486 * starting at version and including IEs 487 */ 488 struct ether_addr BSSID; 489 uint16 beacon_period; /**< units are Kusec */ 490 uint16 capability; /**< Capability information */ 491 uint8 SSID_len; 492 uint8 SSID[32]; 493 uint8 bcnflags; /* additional flags w.r.t. beacon */ 494 struct { 495 uint32 count; /**< # rates in this set */ 496 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 497 } rateset; /**< supported rates */ 498 chanspec_t chanspec; /**< chanspec for bss */ 499 uint16 atim_window; /**< units are Kusec */ 500 uint8 dtim_period; /**< DTIM period */ 501 uint8 accessnet; /* from beacon interwork IE (if bcnflags) */ 502 int16 RSSI; /**< receive signal strength (in dBm) */ 503 int8 phy_noise; /**< noise (in dBm) */ 504 uint8 n_cap; /**< BSS is 802.11N Capable */ 505 uint8 he_cap; /**< BSS is he capable */ 506 uint8 freespace1; /* make implicit padding explicit */ 507 uint32 nbss_cap; /**< 802.11N+AC BSS Capabilities */ 508 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 509 uint8 padding1[3]; /**< explicit struct alignment padding */ 510 uint16 vht_rxmcsmap; /**< VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 511 uint16 vht_txmcsmap; /**< VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 512 uint8 flags; /**< flags */ 513 uint8 vht_cap; /**< BSS is vht capable */ 514 uint8 reserved[2]; /**< Reserved for expansion of BSS properties */ 515 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 516 517 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 518 uint16 freespace2; /* making implicit padding explicit */ 519 uint32 ie_length; /**< byte length of Information Elements */ 520 int16 SNR; /**< average SNR of during frame reception */ 521 uint16 vht_mcsmap; /**< STA's Associated vhtmcsmap */ 522 uint16 vht_mcsmap_prop; /**< STA's Associated prop vhtmcsmap */ 523 uint16 vht_txmcsmap_prop; /**< prop VHT tx mcs prop */ 524 uint32 he_mcsmap; /**< STA's Associated hemcsmap */ 525 uint32 he_rxmcsmap; /**< HE rx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 526 uint32 he_txmcsmap; /**< HE tx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 527 uint32 timestamp[2]; /* Beacon Timestamp for FAKEAP req */ 528 } wl_bss_info_v109_2_t; 529 530 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 531 typedef wl_bss_info_v109_t wl_bss_info_t; 532 #endif // endif 533 534 #define WL_GSCAN_FULL_RESULT_VERSION 2 /* current version of wl_gscan_result_t struct */ 535 536 typedef struct wl_gscan_bss_info { 537 uint32 timestamp[2]; 538 wl_bss_info_v109_t info; 539 /* Do not add any more members below, fixed */ 540 /* and variable length Information Elements to follow */ 541 } wl_gscan_bss_info_v2_t; 542 543 typedef struct wl_gscan_bss_info_v3 { 544 uint32 timestamp[2]; 545 uint8 info[]; /* var length wl_bss_info_X structures */ 546 /* Do not add any more members below, fixed */ 547 /* and variable length Information Elements to follow */ 548 } wl_gscan_bss_info_v3_t; 549 550 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 551 typedef wl_gscan_bss_info_v2_t wl_gscan_bss_info_t; 552 #define WL_GSCAN_INFO_FIXED_FIELD_SIZE (sizeof(wl_gscan_bss_info_t) - sizeof(wl_bss_info_t)) 553 #endif // endif 554 555 typedef struct wl_bsscfg { 556 uint32 bsscfg_idx; 557 uint32 wsec; 558 uint32 WPA_auth; 559 uint32 wsec_index; 560 uint32 associated; 561 uint32 BSS; 562 uint32 phytest_on; 563 struct ether_addr prev_BSSID; 564 struct ether_addr BSSID; 565 uint32 targetbss_wpa2_flags; 566 uint32 assoc_type; 567 uint32 assoc_state; 568 } wl_bsscfg_t; 569 570 typedef struct wl_if_add { 571 uint32 bsscfg_flags; 572 uint32 if_flags; 573 uint32 ap; 574 struct ether_addr mac_addr; 575 uint16 PAD; 576 uint32 wlc_index; 577 } wl_if_add_t; 578 579 typedef struct wl_bss_config { 580 uint32 atim_window; 581 uint32 beacon_period; 582 uint32 chanspec; 583 } wl_bss_config_t; 584 585 /* Number of Bsscolor supported per core */ 586 #ifndef HE_MAX_BSSCOLOR_RES 587 #define HE_MAX_BSSCOLOR_RES 2 588 #endif // endif 589 590 #ifndef HE_MAX_STAID_PER_BSSCOLOR 591 #define HE_MAX_STAID_PER_BSSCOLOR 4 592 #endif // endif 593 594 /* BSSColor indices */ 595 #define BSSCOLOR0_IDX 0 596 #define BSSCOLOR1_IDX 1 597 #define HE_BSSCOLOR0 0 598 #define HE_BSSCOLOR_MAX_VAL 63 599 600 /* STAID indices */ 601 #define STAID0_IDX 0 602 #define STAID1_IDX 1 603 #define STAID2_IDX 2 604 #define STAID3_IDX 3 605 #define HE_STAID_MAX_VAL 0x07FF 606 607 typedef struct wl_bsscolor_info { 608 uint16 version; /**< structure version */ 609 uint16 length; /**< length of the bsscolor info */ 610 uint8 bsscolor_index; /**< bsscolor index 0-1 */ 611 uint8 bsscolor; /**<bsscolor value from 0 to 63 */ 612 uint8 partial_bsscolor_ind; 613 uint8 disable_bsscolor_ind; /**< To disable particular bsscolor */ 614 /* bsscolor_disable to be added as part of D1.0 */ 615 uint16 staid_info[HE_MAX_STAID_PER_BSSCOLOR]; /**< 0-3 staid info of each bsscolor */ 616 } wl_bsscolor_info_t; 617 618 #define WL_BSS_USER_RADAR_CHAN_SELECT 0x1 /**< User application will randomly select 619 * radar channel. 620 */ 621 622 #define DLOAD_HANDLER_VER 1 /**< Downloader version */ 623 #define DLOAD_FLAG_VER_MASK 0xf000 /**< Downloader version mask */ 624 #define DLOAD_FLAG_VER_SHIFT 12 /**< Downloader version shift */ 625 626 #define DL_CRC_NOT_INUSE 0x0001 627 #define DL_BEGIN 0x0002 628 #define DL_END 0x0004 629 630 /* Flags for Major/Minor/Date number shift and mask */ 631 #define EPI_VER_SHIFT 16 632 #define EPI_VER_MASK 0xFFFF 633 /** generic download types & flags */ 634 enum { 635 DL_TYPE_UCODE = 1, 636 DL_TYPE_CLM = 2 637 }; 638 639 /** ucode type values */ 640 enum { 641 UCODE_FW, 642 INIT_VALS, 643 BS_INIT_VALS 644 }; 645 646 struct wl_dload_data { 647 uint16 flag; 648 uint16 dload_type; 649 uint32 len; 650 uint32 crc; 651 uint8 data[1]; 652 }; 653 typedef struct wl_dload_data wl_dload_data_t; 654 655 struct wl_ucode_info { 656 uint32 ucode_type; 657 uint32 num_chunks; 658 uint32 chunk_len; 659 uint32 chunk_num; 660 uint8 data_chunk[1]; 661 }; 662 typedef struct wl_ucode_info wl_ucode_info_t; 663 664 struct wl_clm_dload_info { 665 uint32 ds_id; 666 uint32 clm_total_len; 667 uint32 num_chunks; 668 uint32 chunk_len; 669 uint32 chunk_offset; 670 uint8 data_chunk[1]; 671 }; 672 typedef struct wl_clm_dload_info wl_clm_dload_info_t; 673 674 typedef struct wlc_ssid { 675 uint32 SSID_len; 676 uint8 SSID[DOT11_MAX_SSID_LEN]; 677 } wlc_ssid_t; 678 679 typedef struct wlc_ssid_ext { 680 uint8 hidden; 681 uint8 PAD; 682 uint16 flags; 683 uint8 SSID_len; 684 int8 rssi_thresh; 685 uint8 SSID[DOT11_MAX_SSID_LEN]; 686 } wlc_ssid_ext_t; 687 688 #define MAX_PREFERRED_AP_NUM 5 689 typedef struct wlc_fastssidinfo { 690 uint32 SSID_channel[MAX_PREFERRED_AP_NUM]; 691 wlc_ssid_t SSID_info[MAX_PREFERRED_AP_NUM]; 692 } wlc_fastssidinfo_t; 693 694 typedef struct wnm_url { 695 uint8 len; 696 uint8 data[1]; 697 } wnm_url_t; 698 699 typedef struct chan_scandata { 700 uint8 txpower; 701 uint8 pad; 702 chanspec_t channel; /**< Channel num, bw, ctrl_sb and band */ 703 uint32 channel_mintime; 704 uint32 channel_maxtime; 705 } chan_scandata_t; 706 707 typedef enum wl_scan_type { 708 EXTDSCAN_FOREGROUND_SCAN, 709 EXTDSCAN_BACKGROUND_SCAN, 710 EXTDSCAN_FORCEDBACKGROUND_SCAN 711 } wl_scan_type_t; 712 713 #define WLC_EXTDSCAN_MAX_SSID 5 714 715 typedef struct wl_extdscan_params { 716 int8 nprobes; /**< 0, passive, otherwise active */ 717 int8 split_scan; /**< split scan */ 718 int8 band; /**< band */ 719 int8 pad; 720 wlc_ssid_t ssid[WLC_EXTDSCAN_MAX_SSID]; /**< ssid list */ 721 uint32 tx_rate; /**< in 500ksec units */ 722 wl_scan_type_t scan_type; /**< enum */ 723 int32 channel_num; 724 chan_scandata_t channel_list[1]; /**< list of chandata structs */ 725 } wl_extdscan_params_t; 726 727 #define WL_EXTDSCAN_PARAMS_FIXED_SIZE (sizeof(wl_extdscan_params_t) - sizeof(chan_scandata_t)) 728 729 #define WL_SCAN_PARAMS_SSID_MAX 10 730 731 struct wl_scan_params { 732 wlc_ssid_t ssid; /**< default: {0, ""} */ 733 struct ether_addr bssid; /**< default: bcast */ 734 int8 bss_type; /**< default: any, 735 * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT 736 */ 737 uint8 scan_type; /**< flags, 0 use default */ 738 int32 nprobes; /**< -1 use default, number of probes per channel */ 739 int32 active_time; /**< -1 use default, dwell time per channel for 740 * active scanning 741 */ 742 int32 passive_time; /**< -1 use default, dwell time per channel 743 * for passive scanning 744 */ 745 int32 home_time; /**< -1 use default, dwell time for the home channel 746 * between channel scans 747 */ 748 int32 channel_num; /**< count of channels and ssids that follow 749 * 750 * low half is count of channels in channel_list, 0 751 * means default (use all available channels) 752 * 753 * high half is entries in wlc_ssid_t array that 754 * follows channel_list, aligned for int32 (4 bytes) 755 * meaning an odd channel count implies a 2-byte pad 756 * between end of channel_list and first ssid 757 * 758 * if ssid count is zero, single ssid in the fixed 759 * parameter portion is assumed, otherwise ssid in 760 * the fixed portion is ignored 761 */ 762 uint16 channel_list[1]; /**< list of chanspecs */ 763 }; 764 765 /* changes in wl_scan_params_v2 as comapred to wl_scan_params (v1) 766 * unit8 scantype to uint32 767 */ 768 typedef struct wl_scan_params_v2 { 769 uint16 version; /* Version of wl_scan_params, change value of 770 * WL_SCAN_PARAM_VERSION on version update 771 */ 772 uint16 length; /* length of structure wl_scan_params_v1_t 773 * without implicit pad 774 */ 775 wlc_ssid_t ssid; /**< default: {0, ""} */ 776 struct ether_addr bssid; /**< default: bcast */ 777 int8 bss_type; /**< default: any, 778 * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT 779 */ 780 uint8 PAD; 781 uint32 scan_type; /**< flags, 0 use default, and flags specified in 782 * WL_SCANFLAGS_XXX 783 */ 784 int32 nprobes; /**< -1 use default, number of probes per channel */ 785 int32 active_time; /**< -1 use default, dwell time per channel for 786 * active scanning 787 */ 788 int32 passive_time; /**< -1 use default, dwell time per channel 789 * for passive scanning 790 */ 791 int32 home_time; /**< -1 use default, dwell time for the home channel 792 * between channel scans 793 */ 794 int32 channel_num; /**< count of channels and ssids that follow 795 * 796 * low half is count of channels in channel_list, 0 797 * means default (use all available channels) 798 * 799 * high half is entries in wlc_ssid_t array that 800 * follows channel_list, aligned for int32 (4 bytes) 801 * meaning an odd channel count implies a 2-byte pad 802 * between end of channel_list and first ssid 803 * 804 * if ssid count is zero, single ssid in the fixed 805 * parameter portion is assumed, otherwise ssid in 806 * the fixed portion is ignored 807 */ 808 uint16 channel_list[1]; /**< list of chanspecs */ 809 } wl_scan_params_v2_t; 810 811 #define WL_SCAN_PARAMS_VERSION_V2 2 812 813 /** size of wl_scan_params not including variable length array */ 814 #define WL_SCAN_PARAMS_V2_FIXED_SIZE (OFFSETOF(wl_scan_params_v2_t, channel_list)) 815 #define WL_MAX_ROAMSCAN_DATSZ \ 816 (WL_SCAN_PARAMS_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(uint16))) 817 #define WL_MAX_ROAMSCAN_V2_DATSZ \ 818 (WL_SCAN_PARAMS_V2_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(uint16))) 819 820 #define ISCAN_REQ_VERSION 1 821 #define ISCAN_REQ_VERSION_V2 2 822 823 /** incremental scan struct */ 824 struct wl_iscan_params { 825 uint32 version; 826 uint16 action; 827 uint16 scan_duration; 828 struct wl_scan_params params; 829 }; 830 831 /** incremental scan struct */ 832 typedef struct wl_iscan_params_v2 { 833 uint32 version; 834 uint16 action; 835 uint16 scan_duration; 836 wl_scan_params_v2_t params; 837 } wl_iscan_params_v2_t; 838 839 /** 3 fields + size of wl_scan_params, not including variable length array */ 840 #define WL_ISCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_iscan_params_t, params) + sizeof(wlc_ssid_t)) 841 #define WL_ISCAN_PARAMS_V2_FIXED_SIZE \ 842 (OFFSETOF(wl_iscan_params_v2_t, params) + sizeof(wlc_ssid_t)) 843 844 typedef struct wl_scan_results { 845 uint32 buflen; 846 uint32 version; 847 uint32 count; 848 wl_bss_info_v109_t bss_info[1]; 849 } wl_scan_results_v109_t; 850 851 typedef struct wl_scan_results_v2 { 852 uint32 buflen; 853 uint32 version; 854 uint32 count; 855 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 856 } wl_scan_results_v2_t; 857 858 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 859 typedef wl_scan_results_v109_t wl_scan_results_t; 860 /** size of wl_scan_results not including variable length array */ 861 #define WL_SCAN_RESULTS_FIXED_SIZE (sizeof(wl_scan_results_t) - sizeof(wl_bss_info_t)) 862 #endif // endif 863 864 #if defined(SIMPLE_ISCAN) 865 /** the buf lengh can be WLC_IOCTL_MAXLEN (8K) to reduce iteration */ 866 #define WLC_IW_ISCAN_MAXLEN 2048 867 typedef struct iscan_buf { 868 struct iscan_buf * next; 869 int8 iscan_buf[WLC_IW_ISCAN_MAXLEN]; 870 } iscan_buf_t; 871 #endif /* SIMPLE_ISCAN */ 872 #define ESCAN_REQ_VERSION 1 873 #define ESCAN_REQ_VERSION_V2 2 874 875 /** event scan reduces amount of SOC memory needed to store scan results */ 876 struct wl_escan_params { 877 uint32 version; 878 uint16 action; 879 uint16 sync_id; 880 struct wl_scan_params params; 881 }; 882 883 typedef struct wl_escan_params_v2 { 884 uint32 version; 885 uint16 action; 886 uint16 sync_id; 887 wl_scan_params_v2_t params; 888 } wl_escan_params_v2_t; 889 890 #define WL_ESCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_escan_params_t, params) + sizeof(wlc_ssid_t)) 891 #define WL_ESCAN_PARAMS_V2_FIXED_SIZE (OFFSETOF(wl_escan_params_v2_t, params) + sizeof(wlc_ssid_t)) 892 893 /* New scan version is defined then change old version of scan to 894 * wl_scan_params_v1_t and new one to wl_scan_params_t 895 */ 896 #ifdef WL_SCAN_PARAMS_V2 897 typedef struct wl_scan_params wl_scan_params_v1_t; 898 typedef struct wl_escan_params wl_escan_params_v1_t; 899 typedef struct wl_iscan_params wl_iscan_params_v1_t; 900 typedef struct wl_scan_params_v2 wl_scan_params_t; 901 typedef struct wl_escan_params_v2 wl_escan_params_t; 902 typedef struct wl_iscan_params_v2 wl_iscan_params_t; 903 #define WL_SCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_scan_params_t, channel_list)) 904 #else 905 typedef struct wl_scan_params wl_scan_params_t; 906 typedef struct wl_escan_params wl_escan_params_t; 907 typedef struct wl_iscan_params wl_iscan_params_t; 908 #define WL_SCAN_PARAMS_FIXED_SIZE 64 909 #endif // endif 910 911 /** event scan reduces amount of SOC memory needed to store scan results */ 912 typedef struct wl_escan_result { 913 uint32 buflen; 914 uint32 version; 915 uint16 sync_id; 916 uint16 bss_count; 917 wl_bss_info_v109_t bss_info[1]; 918 } wl_escan_result_v109_t; 919 920 /** event scan reduces amount of SOC memory needed to store scan results */ 921 typedef struct wl_escan_result_v2 { 922 uint32 buflen; 923 uint32 version; 924 uint16 sync_id; 925 uint16 bss_count; 926 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 927 } wl_escan_result_v2_t; 928 929 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 930 typedef wl_escan_result_v109_t wl_escan_result_t; 931 #define WL_ESCAN_RESULTS_FIXED_SIZE (sizeof(wl_escan_result_t) - sizeof(wl_bss_info_t)) 932 #endif // endif 933 934 typedef struct wl_gscan_result { 935 uint32 buflen; 936 uint32 version; 937 uint32 scan_ch_bucket; 938 wl_gscan_bss_info_v2_t bss_info[1]; 939 } wl_gscan_result_v2_t; 940 941 typedef struct wl_gscan_result_v2_1 { 942 uint32 buflen; 943 uint32 version; 944 uint32 scan_ch_bucket; 945 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 946 } wl_gscan_result_v2_1_t; 947 948 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 949 typedef wl_gscan_result_v2_t wl_gscan_result_t; 950 #define WL_GSCAN_RESULTS_FIXED_SIZE (sizeof(wl_gscan_result_t) - sizeof(wl_gscan_bss_info_t)) 951 #endif // endif 952 953 /** incremental scan results struct */ 954 typedef struct wl_iscan_results { 955 uint32 status; 956 wl_scan_results_v109_t results; 957 } wl_iscan_results_v109_t; 958 959 /** incremental scan results struct */ 960 typedef struct wl_iscan_results_v2 { 961 uint32 status; 962 wl_scan_results_v2_t results; 963 } wl_iscan_results_v2_t; 964 965 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 966 typedef wl_iscan_results_v109_t wl_iscan_results_t; 967 /** size of wl_iscan_results not including variable length array */ 968 #define WL_ISCAN_RESULTS_FIXED_SIZE \ 969 (WL_SCAN_RESULTS_FIXED_SIZE + OFFSETOF(wl_iscan_results_t, results)) 970 #endif // endif 971 972 typedef struct wl_probe_params { 973 wlc_ssid_t ssid; 974 struct ether_addr bssid; 975 struct ether_addr mac; 976 } wl_probe_params_t; 977 978 #define WL_MAXRATES_IN_SET 16 /**< max # of rates in a rateset */ 979 980 typedef struct wl_rateset { 981 uint32 count; /**< # rates in this set */ 982 uint8 rates[WL_MAXRATES_IN_SET]; /**< rates in 500kbps units w/hi bit set if basic */ 983 } wl_rateset_t; 984 985 #define WL_VHT_CAP_MCS_MAP_NSS_MAX 8 986 987 typedef struct wl_rateset_args_v1 { 988 uint32 count; /**< # rates in this set */ 989 uint8 rates[WL_MAXRATES_IN_SET]; /**< rates in 500kbps units w/hi bit set if basic */ 990 uint8 mcs[MCSSET_LEN]; /**< supported mcs index bit map */ 991 uint16 vht_mcs[WL_VHT_CAP_MCS_MAP_NSS_MAX]; /**< supported mcs index bit map per nss */ 992 } wl_rateset_args_v1_t; 993 994 #define RATESET_ARGS_V1 (1) 995 #define RATESET_ARGS_V2 (2) 996 997 /* RATESET_VERSION_ENABLED is defined in wl.mk post J branch. 998 * Guidelines to use wl_rateset_args_t: 999 * [a] in wlioctl.h: Add macro RATESET_ARGS_VX where X is the new version number. 1000 * [b] in wlioctl.h: Add a new structure with wl_rateset_args_vX_t 1001 * [c] in wlu.c app: Add support to parse new structure under RATESET_ARGS_VX 1002 * [d] in wlc_types.h: in respective branch and trunk: redefine wl_rateset_args_t with 1003 * new wl_rateset_args_vX_t 1004 */ 1005 #ifndef RATESET_VERSION_ENABLED 1006 /* rateset structure before versioning. legacy. DONOT update anymore here */ 1007 #define RATESET_ARGS_VERSION (RATESET_ARGS_V1) 1008 typedef wl_rateset_args_v1_t wl_rateset_args_t; 1009 #endif /* RATESET_VERSION_ENABLED */ 1010 1011 /* Note: dependent structures: sta_info_vX_t. When any update to this structure happens, 1012 * update sta_info_vX_t also. 1013 */ 1014 #define WL_HE_CAP_MCS_MAP_NSS_MAX 8 1015 1016 typedef struct wl_rateset_args_v2 { 1017 uint16 version; /**< version. */ 1018 uint16 len; /**< length */ 1019 uint32 count; /**< # rates in this set */ 1020 uint8 rates[WL_MAXRATES_IN_SET]; /**< rates in 500kbps units w/hi bit set if basic */ 1021 uint8 mcs[MCSSET_LEN]; /**< supported mcs index bit map */ 1022 uint16 vht_mcs[WL_VHT_CAP_MCS_MAP_NSS_MAX]; /**< supported mcs index bit map per nss */ 1023 uint16 he_mcs[WL_HE_CAP_MCS_MAP_NSS_MAX]; /**< supported he mcs index bit map per nss */ 1024 } wl_rateset_args_v2_t; 1025 1026 /* HE Rates BITMAP */ 1027 #define WL_HE_CAP_MCS_0_7_MAP 0x00ff 1028 #define WL_HE_CAP_MCS_0_8_MAP 0x01ff 1029 #define WL_HE_CAP_MCS_0_9_MAP 0x03ff 1030 #define WL_HE_CAP_MCS_0_10_MAP 0x07ff 1031 #define WL_HE_CAP_MCS_0_11_MAP 0x0fff 1032 1033 #define TXBF_RATE_MCS_ALL 4 1034 #define TXBF_RATE_VHT_ALL 4 1035 #define TXBF_RATE_OFDM_ALL 8 1036 1037 typedef struct wl_txbf_rateset { 1038 uint8 txbf_rate_mcs[TXBF_RATE_MCS_ALL]; /**< one for each stream */ 1039 uint8 txbf_rate_mcs_bcm[TXBF_RATE_MCS_ALL]; /**< one for each stream */ 1040 uint16 txbf_rate_vht[TXBF_RATE_VHT_ALL]; /**< one for each stream */ 1041 uint16 txbf_rate_vht_bcm[TXBF_RATE_VHT_ALL]; /**< one for each stream */ 1042 uint8 txbf_rate_ofdm[TXBF_RATE_OFDM_ALL]; /**< bitmap of ofdm rates that enables txbf */ 1043 uint8 txbf_rate_ofdm_bcm[TXBF_RATE_OFDM_ALL]; /* bitmap of ofdm rates that enables txbf */ 1044 uint8 txbf_rate_ofdm_cnt; 1045 uint8 txbf_rate_ofdm_cnt_bcm; 1046 } wl_txbf_rateset_t; 1047 1048 #define NUM_BFGAIN_ARRAY_1RX 2 1049 #define NUM_BFGAIN_ARRAY_2RX 3 1050 #define NUM_BFGAIN_ARRAY_3RX 4 1051 #define NUM_BFGAIN_ARRAY_4RX 5 1052 1053 typedef struct wl_txbf_expgainset { 1054 /* bitmap for each element: B[4:0]=>c0, B[9:5]=>c1, B[14:10]=>c2, B[19:15]=>c[3-7] 1055 * B[24:20]=>c[8-9], B[29:25]=>c[10-11] 1056 */ 1057 uint32 bfgain_2x1[NUM_BFGAIN_ARRAY_1RX]; /* exp 1ss, imp 1ss */ 1058 uint32 bfgain_2x2[NUM_BFGAIN_ARRAY_2RX]; /* exp [1-2]ss, imp 1ss */ 1059 uint32 bfgain_3x1[NUM_BFGAIN_ARRAY_1RX]; 1060 uint32 bfgain_3x2[NUM_BFGAIN_ARRAY_2RX]; 1061 uint32 bfgain_3x3[NUM_BFGAIN_ARRAY_3RX]; /* exp [1-3]ss, imp 1ss */ 1062 uint32 bfgain_4x1[NUM_BFGAIN_ARRAY_1RX]; 1063 uint32 bfgain_4x2[NUM_BFGAIN_ARRAY_2RX]; 1064 uint32 bfgain_4x3[NUM_BFGAIN_ARRAY_3RX]; 1065 uint32 bfgain_4x4[NUM_BFGAIN_ARRAY_4RX]; /* exp [1-4]ss, imp 1ss */ 1066 } wl_txbf_expgainset_t; 1067 1068 #define OFDM_RATE_MASK 0x0000007f 1069 typedef uint8 ofdm_rates_t; 1070 1071 typedef struct wl_rates_info { 1072 wl_rateset_t rs_tgt; 1073 uint32 phy_type; 1074 int32 bandtype; 1075 uint8 cck_only; 1076 uint8 rate_mask; 1077 uint8 mcsallow; 1078 uint8 bw; 1079 uint8 txstreams; 1080 uint8 PAD[3]; 1081 } wl_rates_info_t; 1082 1083 /**uint32 list */ 1084 typedef struct wl_uint32_list { 1085 /** in - # of elements, out - # of entries */ 1086 uint32 count; 1087 /** variable length uint32 list */ 1088 uint32 element[1]; 1089 } wl_uint32_list_t; 1090 1091 /* WLC_SET_ALLOW_MODE values */ 1092 #define ALLOW_MODE_ANY_BSSID 0 1093 #define ALLOW_MODE_ONLY_DESIRED_BSSID 1 1094 #define ALLOW_MODE_NO_BSSID 2 1095 1096 /** used for association with a specific BSSID and chanspec list */ 1097 typedef struct wl_assoc_params { 1098 struct ether_addr bssid; /**< 00:00:00:00:00:00: broadcast scan */ 1099 uint16 bssid_cnt; /**< 0: use chanspec_num, and the single bssid, 1100 * otherwise count of chanspecs in chanspec_list 1101 * AND paired bssids following chanspec_list 1102 * also, chanspec_num has to be set to zero 1103 * for bssid list to be used 1104 */ 1105 int32 chanspec_num; /**< 0: all available channels, 1106 * otherwise count of chanspecs in chanspec_list 1107 */ 1108 chanspec_t chanspec_list[1]; /**< list of chanspecs */ 1109 } wl_assoc_params_t; 1110 1111 #define WL_ASSOC_PARAMS_FIXED_SIZE OFFSETOF(wl_assoc_params_t, chanspec_list) 1112 1113 /** used for reassociation/roam to a specific BSSID and channel */ 1114 typedef wl_assoc_params_t wl_reassoc_params_t; 1115 #define WL_REASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE 1116 1117 /** used for association to a specific BSSID and channel */ 1118 typedef wl_assoc_params_t wl_join_assoc_params_t; 1119 #define WL_JOIN_ASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE 1120 1121 /** used for join with or without a specific bssid and channel list */ 1122 typedef struct wl_join_params { 1123 wlc_ssid_t ssid; 1124 wl_assoc_params_t params; /**< optional field, but it must include the fixed portion 1125 * of the wl_assoc_params_t struct when it does present. 1126 */ 1127 } wl_join_params_t; 1128 1129 #define WL_JOIN_PARAMS_FIXED_SIZE (OFFSETOF(wl_join_params_t, params) + \ 1130 WL_ASSOC_PARAMS_FIXED_SIZE) 1131 1132 typedef struct wlc_roam_exp_params { 1133 int8 a_band_boost_threshold; 1134 int8 a_band_penalty_threshold; 1135 int8 a_band_boost_factor; 1136 int8 a_band_penalty_factor; 1137 int8 cur_bssid_boost; 1138 int8 alert_roam_trigger_threshold; 1139 int16 a_band_max_boost; 1140 } wlc_roam_exp_params_t; 1141 1142 #define ROAM_EXP_CFG_VERSION 1 1143 1144 #define ROAM_EXP_ENABLE_FLAG (1 << 0) 1145 1146 #define ROAM_EXP_CFG_PRESENT (1 << 1) 1147 1148 typedef struct wl_roam_exp_cfg { 1149 uint16 version; 1150 uint16 flags; 1151 wlc_roam_exp_params_t params; 1152 } wl_roam_exp_cfg_t; 1153 1154 typedef struct wl_bssid_pref_list { 1155 struct ether_addr bssid; 1156 /* Add this to modify rssi */ 1157 int8 rssi_factor; 1158 int8 flags; 1159 } wl_bssid_pref_list_t; 1160 1161 #define BSSID_PREF_LIST_VERSION 1 1162 #define ROAM_EXP_CLEAR_BSSID_PREF (1 << 0) 1163 1164 typedef struct wl_bssid_pref_cfg { 1165 uint16 version; 1166 uint16 flags; 1167 uint16 count; 1168 uint16 reserved; 1169 wl_bssid_pref_list_t bssids[]; 1170 } wl_bssid_pref_cfg_t; 1171 1172 #define SSID_WHITELIST_VERSION 1 1173 1174 #define ROAM_EXP_CLEAR_SSID_WHITELIST (1 << 0) 1175 1176 /* Roam SSID whitelist, ssids in this list are ok to */ 1177 /* be considered as targets to join when considering a roam */ 1178 1179 typedef struct wl_ssid_whitelist { 1180 1181 uint16 version; 1182 uint16 flags; 1183 1184 uint8 ssid_count; 1185 uint8 reserved[3]; 1186 wlc_ssid_t ssids[]; 1187 } wl_ssid_whitelist_t; 1188 1189 #define ROAM_EXP_EVENT_VERSION 1 1190 1191 typedef struct wl_roam_exp_event { 1192 1193 uint16 version; 1194 uint16 flags; 1195 wlc_ssid_t cur_ssid; 1196 } wl_roam_exp_event_t; 1197 1198 /** scan params for extended join */ 1199 typedef struct wl_join_scan_params { 1200 uint8 scan_type; /**< 0 use default, active or passive scan */ 1201 uint8 PAD[3]; 1202 int32 nprobes; /**< -1 use default, number of probes per channel */ 1203 int32 active_time; /**< -1 use default, dwell time per channel for 1204 * active scanning 1205 */ 1206 int32 passive_time; /**< -1 use default, dwell time per channel 1207 * for passive scanning 1208 */ 1209 int32 home_time; /**< -1 use default, dwell time for the home channel 1210 * between channel scans 1211 */ 1212 } wl_join_scan_params_t; 1213 1214 /** extended join params */ 1215 typedef struct wl_extjoin_params { 1216 wlc_ssid_t ssid; /**< {0, ""}: wildcard scan */ 1217 wl_join_scan_params_t scan; 1218 wl_join_assoc_params_t assoc; /**< optional field, but it must include the fixed portion 1219 * of the wl_join_assoc_params_t struct when it does 1220 * present. 1221 */ 1222 } wl_extjoin_params_t; 1223 #define WL_EXTJOIN_PARAMS_FIXED_SIZE (OFFSETOF(wl_extjoin_params_t, assoc) + \ 1224 WL_JOIN_ASSOC_PARAMS_FIXED_SIZE) 1225 1226 #define ANT_SELCFG_MAX 4 /**< max number of antenna configurations */ 1227 #define MAX_STREAMS_SUPPORTED 4 /**< max number of streams supported */ 1228 typedef struct { 1229 uint8 ant_config[ANT_SELCFG_MAX]; /**< antenna configuration */ 1230 uint8 num_antcfg; /**< number of available antenna configurations */ 1231 } wlc_antselcfg_t; 1232 1233 typedef struct { 1234 uint32 duration; /**< millisecs spent sampling this channel */ 1235 union { 1236 uint32 congest_ibss; /**< millisecs in our bss (presumably this traffic will */ 1237 /**< move if cur bss moves channels) */ 1238 uint32 congest_me; /**< millisecs in my own traffic */ 1239 }; 1240 union { 1241 uint32 congest_obss; /**< traffic not in our bss */ 1242 uint32 congest_notme; /**< traffic not from/to me (including bc/mc) */ 1243 }; 1244 uint32 interference; /**< millisecs detecting a non 802.11 interferer. */ 1245 uint32 timestamp; /**< second timestamp */ 1246 } cca_congest_t; 1247 1248 typedef struct { 1249 chanspec_t chanspec; /**< Which channel? */ 1250 uint16 num_secs; /**< How many secs worth of data */ 1251 cca_congest_t secs[1]; /**< Data */ 1252 } cca_congest_channel_req_t; 1253 1254 typedef struct { 1255 uint32 timestamp; /**< second timestamp */ 1256 1257 /* Base structure of cca_congest_t: CCA statistics all inclusive */ 1258 uint32 duration; /**< millisecs spent sampling this channel */ 1259 uint32 congest_meonly; /**< millisecs in my own traffic (TX + RX) */ 1260 uint32 congest_ibss; /**< millisecs in our bss (presumably this traffic will */ 1261 /**< move if cur bss moves channels) */ 1262 uint32 congest_obss; /**< traffic not in our bss */ 1263 uint32 interference; /**< millisecs detecting a non 802.11 interferer. */ 1264 1265 /* CCA statistics for non PM only */ 1266 uint32 duration_nopm; /**< millisecs spent sampling this channel */ 1267 uint32 congest_meonly_nopm; /**< millisecs in my own traffic (TX + RX) */ 1268 uint32 congest_ibss_nopm; /**< millisecs in our bss (presumably this traffic will */ 1269 /**< move if cur bss moves channels) */ 1270 uint32 congest_obss_nopm; /**< traffic not in our bss */ 1271 uint32 interference_nopm; /**< millisecs detecting a non 802.11 interferer. */ 1272 1273 /* CCA statistics for during PM only */ 1274 uint32 duration_pm; /**< millisecs spent sampling this channel */ 1275 uint32 congest_meonly_pm; /**< millisecs in my own traffic (TX + RX) */ 1276 uint32 congest_ibss_pm; /**< millisecs in our bss (presumably this traffic will */ 1277 /**< move if cur bss moves channels) */ 1278 uint32 congest_obss_pm; /**< traffic not in our bss */ 1279 uint32 interference_pm; /**< millisecs detecting a non 802.11 interferer. */ 1280 } cca_congest_ext_t; 1281 1282 #define WL_CCA_EXT_REQ_VER 0 1283 typedef struct { 1284 uint16 ver; /**< version of this struct */ 1285 uint16 len; /**< len of this structure */ 1286 chanspec_t chanspec; /**< Which channel? */ 1287 uint16 num_secs; /**< How many secs worth of data */ 1288 cca_congest_ext_t secs[1]; /**< Data - 3 sets for ALL - non-PM - PM */ 1289 } cca_congest_ext_channel_req_t; 1290 1291 typedef struct { 1292 uint32 duration; /**< millisecs spent sampling this channel */ 1293 uint32 congest; /**< millisecs detecting busy CCA */ 1294 uint32 timestamp; /**< second timestamp */ 1295 } cca_congest_simple_t; 1296 1297 /* The following two structure must have same first 4 fields. 1298 * The cca_chan_qual_event_t is used to report CCA in older formats and NF. 1299 * The cca_only_chan_qual_event_t is used to report CCA only with newer format. 1300 */ 1301 typedef struct { 1302 uint16 status; 1303 uint16 id; 1304 chanspec_t chanspec; /**< Which channel? */ 1305 uint16 len; 1306 union { 1307 cca_congest_simple_t cca_busy; /**< CCA busy */ 1308 cca_congest_t cca_busy_ext; /**< Extended CCA report */ 1309 int32 noise; /**< noise floor */ 1310 }; 1311 } cca_chan_qual_event_t; 1312 1313 typedef struct { 1314 uint16 status; 1315 uint16 id; 1316 chanspec_t chanspec; /**< Which channel? */ 1317 uint16 len; 1318 union { 1319 cca_congest_simple_t cca_busy; /**< CCA busy */ 1320 struct { 1321 cca_congest_t cca_busy_ext; /**< Extended CCA report */ 1322 cca_congest_t cca_busy_nopm; /**< Extedned CCA report (PM awake time) */ 1323 cca_congest_t cca_busy_pm; /**< Extedned CCA report (PM sleep time) */ 1324 }; 1325 }; 1326 } cca_only_chan_qual_event_t; 1327 1328 typedef struct { 1329 uint32 msrmnt_time; /**< Time for Measurement (msec) */ 1330 uint32 msrmnt_done; /**< flag set when measurement complete */ 1331 char buf[]; 1332 } cca_stats_n_flags; 1333 1334 typedef struct { 1335 uint32 msrmnt_query; /* host to driver query for measurement done */ 1336 uint32 time_req; /* time required for measurement */ 1337 uint8 report_opt; /* option to print different stats in report */ 1338 uint8 PAD[3]; 1339 } cca_msrmnt_query; 1340 1341 /* interference sources */ 1342 enum interference_source { 1343 ITFR_NONE = 0, /**< interference */ 1344 ITFR_PHONE, /**< wireless phone */ 1345 ITFR_VIDEO_CAMERA, /**< wireless video camera */ 1346 ITFR_MICROWAVE_OVEN, /**< microwave oven */ 1347 ITFR_BABY_MONITOR, /**< wireless baby monitor */ 1348 ITFR_BLUETOOTH, /**< bluetooth */ 1349 ITFR_VIDEO_CAMERA_OR_BABY_MONITOR, /**< wireless camera or baby monitor */ 1350 ITFR_BLUETOOTH_OR_BABY_MONITOR, /**< bluetooth or baby monitor */ 1351 ITFR_VIDEO_CAMERA_OR_PHONE, /**< video camera or phone */ 1352 ITFR_UNIDENTIFIED /**< interference from unidentified source */ 1353 }; 1354 1355 /** structure for interference source report */ 1356 typedef struct { 1357 uint32 flags; /**< flags. bit definitions below */ 1358 uint32 source; /**< last detected interference source */ 1359 uint32 timestamp; /**< second timestamp on interferenced flag change */ 1360 } interference_source_rep_t; 1361 1362 #define WLC_CNTRY_BUF_SZ 4 /**< Country string is 3 bytes + NUL */ 1363 1364 typedef struct wl_country { 1365 char country_abbrev[WLC_CNTRY_BUF_SZ]; /**< nul-terminated country code used in 1366 * the Country IE 1367 */ 1368 int32 rev; /**< revision specifier for ccode 1369 * on set, -1 indicates unspecified. 1370 * on get, rev >= 0 1371 */ 1372 char ccode[WLC_CNTRY_BUF_SZ]; /**< nul-terminated built-in country code. 1373 * variable length, but fixed size in 1374 * struct allows simple allocation for 1375 * expected country strings <= 3 chars. 1376 */ 1377 } wl_country_t; 1378 1379 #define CCODE_INFO_VERSION 1 1380 1381 typedef enum wl_ccode_role { 1382 WLC_CCODE_ROLE_ACTIVE = 0, 1383 WLC_CCODE_ROLE_HOST, 1384 WLC_CCODE_ROLE_80211D_ASSOC, 1385 WLC_CCODE_ROLE_80211D_SCAN, 1386 WLC_CCODE_ROLE_DEFAULT, 1387 WLC_CCODE_ROLE_DEFAULT_SROM_BKUP, 1388 WLC_CCODE_LAST 1389 } wl_ccode_role_t; 1390 #define WLC_NUM_CCODE_INFO WLC_CCODE_LAST 1391 1392 typedef struct wl_ccode_entry { 1393 uint16 reserved; 1394 uint8 band; 1395 uint8 role; 1396 char ccode[WLC_CNTRY_BUF_SZ]; 1397 } wl_ccode_entry_t; 1398 1399 typedef struct wl_ccode_info { 1400 uint16 version; 1401 uint16 count; /**< Number of ccodes entries in the set */ 1402 wl_ccode_entry_t ccodelist[1]; 1403 } wl_ccode_info_t; 1404 #define WL_CCODE_INFO_FIXED_LEN OFFSETOF(wl_ccode_info_t, ccodelist) 1405 typedef struct wl_channels_in_country { 1406 uint32 buflen; 1407 uint32 band; 1408 char country_abbrev[WLC_CNTRY_BUF_SZ]; 1409 uint32 count; 1410 uint32 channel[1]; 1411 } wl_channels_in_country_t; 1412 1413 typedef struct wl_country_list { 1414 uint32 buflen; 1415 uint32 band_set; 1416 uint32 band; 1417 uint32 count; 1418 char country_abbrev[1]; 1419 } wl_country_list_t; 1420 1421 typedef struct wl_rm_req_elt { 1422 int8 type; 1423 int8 flags; 1424 chanspec_t chanspec; 1425 uint32 token; /**< token for this measurement */ 1426 uint32 tsf_h; /**< TSF high 32-bits of Measurement start time */ 1427 uint32 tsf_l; /**< TSF low 32-bits */ 1428 uint32 dur; /**< TUs */ 1429 } wl_rm_req_elt_t; 1430 1431 typedef struct wl_rm_req { 1432 uint32 token; /**< overall measurement set token */ 1433 uint32 count; /**< number of measurement requests */ 1434 void *cb; /**< completion callback function: may be NULL */ 1435 void *cb_arg; /**< arg to completion callback function */ 1436 wl_rm_req_elt_t req[1]; /**< variable length block of requests */ 1437 } wl_rm_req_t; 1438 #define WL_RM_REQ_FIXED_LEN OFFSETOF(wl_rm_req_t, req) 1439 1440 typedef struct wl_rm_rep_elt { 1441 int8 type; 1442 int8 flags; 1443 chanspec_t chanspec; 1444 uint32 token; /**< token for this measurement */ 1445 uint32 tsf_h; /**< TSF high 32-bits of Measurement start time */ 1446 uint32 tsf_l; /**< TSF low 32-bits */ 1447 uint32 dur; /**< TUs */ 1448 uint32 len; /**< byte length of data block */ 1449 uint8 data[1]; /**< variable length data block */ 1450 } wl_rm_rep_elt_t; 1451 #define WL_RM_REP_ELT_FIXED_LEN 24 /**< length excluding data block */ 1452 1453 #define WL_RPI_REP_BIN_NUM 8 1454 typedef struct wl_rm_rpi_rep { 1455 uint8 rpi[WL_RPI_REP_BIN_NUM]; 1456 int8 rpi_max[WL_RPI_REP_BIN_NUM]; 1457 } wl_rm_rpi_rep_t; 1458 1459 typedef struct wl_rm_rep { 1460 uint32 token; /**< overall measurement set token */ 1461 uint32 len; /**< length of measurement report block */ 1462 wl_rm_rep_elt_t rep[1]; /**< variable length block of reports */ 1463 } wl_rm_rep_t; 1464 #define WL_RM_REP_FIXED_LEN 8 1465 #ifdef BCMCCX 1466 1467 #define LEAP_USER_MAX 32 1468 #define LEAP_DOMAIN_MAX 32 1469 #define LEAP_PASSWORD_MAX 32 1470 1471 typedef struct wl_leap_info { 1472 wlc_ssid_t ssid; 1473 uint8 user_len; 1474 uint8 user[LEAP_USER_MAX]; 1475 uint8 password_len; 1476 uint8 password[LEAP_PASSWORD_MAX]; 1477 uint8 domain_len; 1478 uint8 domain[LEAP_DOMAIN_MAX]; 1479 uint8 PAD; 1480 } wl_leap_info_t; 1481 1482 typedef struct wl_leap_list { 1483 uint32 buflen; 1484 uint32 version; 1485 uint32 count; 1486 wl_leap_info_t leap_info[1]; 1487 } wl_leap_list_t; 1488 #endif /* BCMCCX */ 1489 1490 typedef enum sup_auth_status { 1491 /* Basic supplicant authentication states */ 1492 WLC_SUP_DISCONNECTED = 0, 1493 WLC_SUP_CONNECTING, 1494 WLC_SUP_IDREQUIRED, 1495 WLC_SUP_AUTHENTICATING, 1496 WLC_SUP_AUTHENTICATED, 1497 WLC_SUP_KEYXCHANGE, 1498 WLC_SUP_KEYED, 1499 WLC_SUP_TIMEOUT, 1500 WLC_SUP_LAST_BASIC_STATE, 1501 1502 /* Extended supplicant authentication states */ 1503 /** Waiting to receive handshake msg M1 */ 1504 WLC_SUP_KEYXCHANGE_WAIT_M1 = WLC_SUP_AUTHENTICATED, 1505 /** Preparing to send handshake msg M2 */ 1506 WLC_SUP_KEYXCHANGE_PREP_M2 = WLC_SUP_KEYXCHANGE, 1507 /* Waiting to receive handshake msg M3 */ 1508 WLC_SUP_KEYXCHANGE_WAIT_M3 = WLC_SUP_LAST_BASIC_STATE, 1509 WLC_SUP_KEYXCHANGE_PREP_M4, /**< Preparing to send handshake msg M4 */ 1510 WLC_SUP_KEYXCHANGE_WAIT_G1, /**< Waiting to receive handshake msg G1 */ 1511 WLC_SUP_KEYXCHANGE_PREP_G2 /**< Preparing to send handshake msg G2 */ 1512 } sup_auth_status_t; 1513 1514 typedef struct wl_wsec_key { 1515 uint32 index; /**< key index */ 1516 uint32 len; /**< key length */ 1517 uint8 data[DOT11_MAX_KEY_SIZE]; /**< key data */ 1518 uint32 pad_1[18]; 1519 uint32 algo; /**< CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ 1520 uint32 flags; /**< misc flags */ 1521 uint32 pad_2[2]; 1522 int32 pad_3; 1523 int32 iv_initialized; /**< has IV been initialized already? */ 1524 int32 pad_4; 1525 /* Rx IV */ 1526 struct { 1527 uint32 hi; /**< upper 32 bits of IV */ 1528 uint16 lo; /**< lower 16 bits of IV */ 1529 uint16 PAD; 1530 } rxiv; 1531 uint32 pad_5[2]; 1532 struct ether_addr ea; /**< per station */ 1533 uint16 PAD; 1534 } wl_wsec_key_t; 1535 1536 /* Min length for PSK passphrase */ 1537 #define WSEC_MIN_PSK_LEN 8 1538 /* Max length of supported passphrases for PSK */ 1539 #define WSEC_MAX_PSK_LEN 64 1540 /* Max length of supported passphrases for SAE */ 1541 #define WSEC_MAX_PASSPHRASE_LEN 256u 1542 1543 /* Flag for key material needing passhash'ing */ 1544 #define WSEC_PASSPHRASE 1u 1545 /* Flag indicating an SAE passphrase */ 1546 #define WSEC_SAE_PASSPHRASE 2u 1547 1548 /**receptacle for WLC_SET_WSEC_PMK parameter */ 1549 typedef struct wsec_pmk { 1550 ushort key_len; /* octets in key material */ 1551 ushort flags; /* key handling qualification */ 1552 uint8 key[WSEC_MAX_PASSPHRASE_LEN]; /* PMK material */ 1553 } wsec_pmk_t; 1554 1555 #define WL_AUTH_EVENT_DATA_V1 0x1 1556 1557 /* tlv ids for auth event */ 1558 #define WL_AUTH_PMK_TLV_ID 1 1559 #define WL_AUTH_PMKID_TLV_ID 2 1560 /* AUTH event data 1561 * pmk and pmkid in case of SAE auth 1562 * xtlvs will be 32 bit alligned 1563 */ 1564 typedef struct wl_auth_event { 1565 uint16 version; 1566 uint16 length; 1567 uint8 xtlvs[]; 1568 } wl_auth_event_t; 1569 1570 #define WL_AUTH_EVENT_FIXED_LEN_V1 OFFSETOF(wl_auth_event_t, xtlvs) 1571 1572 #define WL_PMKSA_EVENT_DATA_V1 1u 1573 1574 /* tlv ids for PMKSA event */ 1575 #define WL_PMK_TLV_ID 1u 1576 #define WL_PMKID_TLV_ID 2u 1577 #define WL_PEER_ADDR_TLV_ID 3u 1578 1579 /* PMKSA event data structure */ 1580 typedef struct wl_pmksa_event { 1581 uint16 version; 1582 uint16 length; 1583 uint8 xtlvs[]; 1584 } wl_pmksa_event_t; 1585 1586 #define WL_PMKSA_EVENT_FIXED_LEN_V1 OFFSETOF(wl_pmksa_event_t, xtlvs) 1587 1588 #define FILS_CACHE_ID_LEN 2u 1589 #define PMK_LEN_MAX 48u 1590 1591 typedef struct _pmkid_v1 { 1592 struct ether_addr BSSID; 1593 uint8 PMKID[WPA2_PMKID_LEN]; 1594 } pmkid_v1_t; 1595 1596 #define PMKID_ELEM_V2_LENGTH (sizeof(struct ether_addr) + WPA2_PMKID_LEN + PMK_LEN_MAX + \ 1597 sizeof(ssid_info_t) + FILS_CACHE_ID_LEN) 1598 1599 typedef struct _pmkid_v2 { 1600 uint16 length; /* Should match PMKID_ELEM_VX_LENGTH */ 1601 struct ether_addr BSSID; 1602 uint8 PMKID[WPA2_PMKID_LEN]; 1603 uint8 pmk[PMK_LEN_MAX]; /* for FILS key deriviation */ 1604 uint16 pmk_len; 1605 ssid_info_t ssid; 1606 uint8 fils_cache_id[FILS_CACHE_ID_LEN]; 1607 } pmkid_v2_t; 1608 1609 #define PMKID_LIST_VER_2 2 1610 1611 typedef struct _pmkid_v3 { 1612 struct ether_addr bssid; 1613 uint8 pmkid[WPA2_PMKID_LEN]; 1614 uint8 pmkid_len; 1615 uint8 pmk[PMK_LEN_MAX]; 1616 uint8 pmk_len; 1617 uint16 fils_cache_id; /* 2-byte length */ 1618 uint8 pad; 1619 uint8 ssid_len; 1620 uint8 ssid[DOT11_MAX_SSID_LEN]; /* For FILS, to save ESSID */ 1621 /* one pmkid used in whole ESS */ 1622 uint32 time_left; /* remaining time until expirary in sec. */ 1623 /* 0 means expired, all 0xFF means never expire */ 1624 } pmkid_v3_t; 1625 1626 #define PMKID_LIST_VER_3 3 1627 typedef struct _pmkid_list_v1 { 1628 uint32 npmkid; 1629 pmkid_v1_t pmkid[1]; 1630 } pmkid_list_v1_t; 1631 1632 typedef struct _pmkid_list_v2 { 1633 uint16 version; 1634 uint16 length; 1635 pmkid_v2_t pmkid[1]; 1636 } pmkid_list_v2_t; 1637 1638 typedef struct _pmkid_list_v3 { 1639 uint16 version; 1640 uint16 length; 1641 uint16 count; 1642 uint16 pad; 1643 pmkid_v3_t pmkid[]; 1644 } pmkid_list_v3_t; 1645 1646 #ifndef PMKID_VERSION_ENABLED 1647 /* pmkid structure before versioning. legacy. DONOT update anymore here */ 1648 typedef pmkid_v1_t pmkid_t; 1649 typedef pmkid_list_v1_t pmkid_list_t; 1650 #endif /* PMKID_VERSION_ENABLED */ 1651 1652 typedef struct _pmkid_cand { 1653 struct ether_addr BSSID; 1654 uint8 preauth; 1655 } pmkid_cand_t; 1656 1657 typedef struct _pmkid_cand_list { 1658 uint32 npmkid_cand; 1659 pmkid_cand_t pmkid_cand[1]; 1660 } pmkid_cand_list_t; 1661 1662 #define WL_STA_ANT_MAX 4 /**< max possible rx antennas */ 1663 1664 typedef struct wl_assoc_info { 1665 uint32 req_len; 1666 uint32 resp_len; 1667 uint32 flags; 1668 struct dot11_assoc_req req; 1669 struct ether_addr reassoc_bssid; /**< used in reassoc's */ 1670 struct dot11_assoc_resp resp; 1671 uint32 state; 1672 } wl_assoc_info_t; 1673 1674 typedef struct wl_led_info { 1675 uint32 index; /**< led index */ 1676 uint32 behavior; 1677 uint8 activehi; 1678 uint8 PAD[3]; 1679 } wl_led_info_t; 1680 1681 /** srom read/write struct passed through ioctl */ 1682 typedef struct { 1683 uint32 byteoff; /**< byte offset */ 1684 uint32 nbytes; /**< number of bytes */ 1685 uint16 buf[]; 1686 } srom_rw_t; 1687 1688 #define CISH_FLAG_PCIECIS (1 << 15) /**< write CIS format bit for PCIe CIS */ 1689 1690 /** similar cis (srom or otp) struct [iovar: may not be aligned] */ 1691 typedef struct { 1692 uint16 source; /**< cis source */ 1693 uint16 flags; /**< flags */ 1694 uint32 byteoff; /**< byte offset */ 1695 uint32 nbytes; /**< number of bytes */ 1696 /* data follows here */ 1697 } cis_rw_t; 1698 1699 /** R_REG and W_REG struct passed through ioctl */ 1700 typedef struct { 1701 uint32 byteoff; /**< byte offset of the field in d11regs_t */ 1702 uint32 val; /**< read/write value of the field */ 1703 uint32 size; /**< sizeof the field */ 1704 uint32 band; /**< band (optional) */ 1705 } rw_reg_t; 1706 1707 /** 1708 * Structure used by GET/SET_ATTEN ioctls - it controls power in b/g-band 1709 * PCL - Power Control Loop 1710 */ 1711 typedef struct { 1712 uint16 auto_ctrl; /**< WL_ATTEN_XX */ 1713 uint16 bb; /**< Baseband attenuation */ 1714 uint16 radio; /**< Radio attenuation */ 1715 uint16 txctl1; /**< Radio TX_CTL1 value */ 1716 } atten_t; 1717 1718 /** Per-AC retry parameters */ 1719 struct wme_tx_params_s { 1720 uint8 short_retry; 1721 uint8 short_fallback; 1722 uint8 long_retry; 1723 uint8 long_fallback; 1724 uint16 max_rate; /**< In units of 512 Kbps */ 1725 }; 1726 1727 typedef struct wme_tx_params_s wme_tx_params_t; 1728 1729 #define WL_WME_TX_PARAMS_IO_BYTES (sizeof(wme_tx_params_t) * AC_COUNT) 1730 1731 /**Used to get specific link/ac parameters */ 1732 typedef struct { 1733 int32 ac; 1734 uint8 val; 1735 struct ether_addr ea; 1736 uint8 PAD; 1737 } link_val_t; 1738 1739 #define WL_PM_MUTE_TX_VER 1 1740 1741 typedef struct wl_pm_mute_tx { 1742 uint16 version; /**< version */ 1743 uint16 len; /**< length */ 1744 uint16 deadline; /**< deadline timer (in milliseconds) */ 1745 uint8 enable; /**< set to 1 to enable mode; set to 0 to disable it */ 1746 uint8 PAD; 1747 } wl_pm_mute_tx_t; 1748 1749 /* 1750 * Please update the following when modifying this structure: 1751 * StaInfo Twiki page flags section - description of the sta_info_t struct 1752 * src/wl/exe/wlu.c - print of sta_info_t 1753 * Pay attention to version if structure changes. 1754 */ 1755 1756 /* sta_info_t version 4 */ 1757 typedef struct { 1758 uint16 ver; /**< version of this struct */ 1759 uint16 len; /**< length in bytes of this structure */ 1760 uint16 cap; /**< sta's advertised capabilities */ 1761 uint16 PAD; 1762 uint32 flags; /**< flags defined below */ 1763 uint32 idle; /**< time since data pkt rx'd from sta */ 1764 struct ether_addr ea; /**< Station address */ 1765 uint16 PAD; 1766 wl_rateset_t rateset; /**< rateset in use */ 1767 uint32 in; /**< seconds elapsed since associated */ 1768 uint32 listen_interval_inms; /**< Min Listen interval in ms for this STA */ 1769 uint32 tx_pkts; /**< # of user packets transmitted (unicast) */ 1770 uint32 tx_failures; /**< # of user packets failed */ 1771 uint32 rx_ucast_pkts; /**< # of unicast packets received */ 1772 uint32 rx_mcast_pkts; /**< # of multicast packets received */ 1773 uint32 tx_rate; /**< Rate used by last tx frame */ 1774 uint32 rx_rate; /**< Rate of last successful rx frame */ 1775 uint32 rx_decrypt_succeeds; /**< # of packet decrypted successfully */ 1776 uint32 rx_decrypt_failures; /**< # of packet decrypted unsuccessfully */ 1777 uint32 tx_tot_pkts; /**< # of user tx pkts (ucast + mcast) */ 1778 uint32 rx_tot_pkts; /**< # of data packets recvd (uni + mcast) */ 1779 uint32 tx_mcast_pkts; /**< # of mcast pkts txed */ 1780 uint64 tx_tot_bytes; /**< data bytes txed (ucast + mcast) */ 1781 uint64 rx_tot_bytes; /**< data bytes recvd (ucast + mcast) */ 1782 uint64 tx_ucast_bytes; /**< data bytes txed (ucast) */ 1783 uint64 tx_mcast_bytes; /**< # data bytes txed (mcast) */ 1784 uint64 rx_ucast_bytes; /**< data bytes recvd (ucast) */ 1785 uint64 rx_mcast_bytes; /**< data bytes recvd (mcast) */ 1786 int8 rssi[WL_STA_ANT_MAX]; /**< average rssi per antenna 1787 * of data frames 1788 */ 1789 int8 nf[WL_STA_ANT_MAX]; /**< per antenna noise floor */ 1790 uint16 aid; /**< association ID */ 1791 uint16 ht_capabilities; /**< advertised ht caps */ 1792 uint16 vht_flags; /**< converted vht flags */ 1793 uint16 PAD; 1794 uint32 tx_pkts_retried; /**< # of frames where a retry was 1795 * necessary 1796 */ 1797 uint32 tx_pkts_retry_exhausted; /**< # of user frames where a retry 1798 * was exhausted 1799 */ 1800 int8 rx_lastpkt_rssi[WL_STA_ANT_MAX]; /**< Per antenna RSSI of last 1801 * received data frame. 1802 */ 1803 /* TX WLAN retry/failure statistics: 1804 * Separated for host requested frames and WLAN locally generated frames. 1805 * Include unicast frame only where the retries/failures can be counted. 1806 */ 1807 uint32 tx_pkts_total; /**< # user frames sent successfully */ 1808 uint32 tx_pkts_retries; /**< # user frames retries */ 1809 uint32 tx_pkts_fw_total; /**< # FW generated sent successfully */ 1810 uint32 tx_pkts_fw_retries; /**< # retries for FW generated frames */ 1811 uint32 tx_pkts_fw_retry_exhausted; /**< # FW generated where a retry 1812 * was exhausted 1813 */ 1814 uint32 rx_pkts_retried; /**< # rx with retry bit set */ 1815 uint32 tx_rate_fallback; /**< lowest fallback TX rate */ 1816 /* Fields above this line are common to sta_info_t versions 4 and 5 */ 1817 1818 uint32 rx_dur_total; /* total user RX duration (estimated) */ 1819 1820 chanspec_t chanspec; /** chanspec this sta is on */ 1821 uint16 PAD; 1822 wl_rateset_args_v1_t rateset_adv; /* rateset along with mcs index bitmap */ 1823 uint32 PAD; 1824 } sta_info_v4_t; 1825 1826 /* Note: Version 4 is the latest version of sta_info_t. Version 5 is abandoned. 1827 * Please add new fields to version 4, not version 5. 1828 */ 1829 /* sta_info_t version 5 */ 1830 typedef struct { 1831 uint16 ver; /**< version of this struct */ 1832 uint16 len; /**< length in bytes of this structure */ 1833 uint16 cap; /**< sta's advertised capabilities */ 1834 uint16 PAD; 1835 uint32 flags; /**< flags defined below */ 1836 uint32 idle; /**< time since data pkt rx'd from sta */ 1837 struct ether_addr ea; /**< Station address */ 1838 uint16 PAD; 1839 wl_rateset_t rateset; /**< rateset in use */ 1840 uint32 in; /**< seconds elapsed since associated */ 1841 uint32 listen_interval_inms; /**< Min Listen interval in ms for this STA */ 1842 uint32 tx_pkts; /**< # of user packets transmitted (unicast) */ 1843 uint32 tx_failures; /**< # of user packets failed */ 1844 uint32 rx_ucast_pkts; /**< # of unicast packets received */ 1845 uint32 rx_mcast_pkts; /**< # of multicast packets received */ 1846 uint32 tx_rate; /**< Rate used by last tx frame */ 1847 uint32 rx_rate; /**< Rate of last successful rx frame */ 1848 uint32 rx_decrypt_succeeds; /**< # of packet decrypted successfully */ 1849 uint32 rx_decrypt_failures; /**< # of packet decrypted unsuccessfully */ 1850 uint32 tx_tot_pkts; /**< # of user tx pkts (ucast + mcast) */ 1851 uint32 rx_tot_pkts; /**< # of data packets recvd (uni + mcast) */ 1852 uint32 tx_mcast_pkts; /**< # of mcast pkts txed */ 1853 uint64 tx_tot_bytes; /**< data bytes txed (ucast + mcast) */ 1854 uint64 rx_tot_bytes; /**< data bytes recvd (ucast + mcast) */ 1855 uint64 tx_ucast_bytes; /**< data bytes txed (ucast) */ 1856 uint64 tx_mcast_bytes; /**< # data bytes txed (mcast) */ 1857 uint64 rx_ucast_bytes; /**< data bytes recvd (ucast) */ 1858 uint64 rx_mcast_bytes; /**< data bytes recvd (mcast) */ 1859 int8 rssi[WL_STA_ANT_MAX]; /**< average rssi per antenna 1860 * of data frames 1861 */ 1862 int8 nf[WL_STA_ANT_MAX]; /**< per antenna noise floor */ 1863 uint16 aid; /**< association ID */ 1864 uint16 ht_capabilities; /**< advertised ht caps */ 1865 uint16 vht_flags; /**< converted vht flags */ 1866 uint16 PAD; 1867 uint32 tx_pkts_retried; /**< # of frames where a retry was 1868 * necessary 1869 */ 1870 uint32 tx_pkts_retry_exhausted; /**< # of user frames where a retry 1871 * was exhausted 1872 */ 1873 int8 rx_lastpkt_rssi[WL_STA_ANT_MAX]; /**< Per antenna RSSI of last 1874 * received data frame. 1875 */ 1876 /* TX WLAN retry/failure statistics: 1877 * Separated for host requested frames and WLAN locally generated frames. 1878 * Include unicast frame only where the retries/failures can be counted. 1879 */ 1880 uint32 tx_pkts_total; /**< # user frames sent successfully */ 1881 uint32 tx_pkts_retries; /**< # user frames retries */ 1882 uint32 tx_pkts_fw_total; /**< # FW generated sent successfully */ 1883 uint32 tx_pkts_fw_retries; /**< # retries for FW generated frames */ 1884 uint32 tx_pkts_fw_retry_exhausted; /**< # FW generated where a retry 1885 * was exhausted 1886 */ 1887 uint32 rx_pkts_retried; /**< # rx with retry bit set */ 1888 uint32 tx_rate_fallback; /**< lowest fallback TX rate */ 1889 /* Fields above this line are common to sta_info_t versions 4 and 5 */ 1890 1891 chanspec_t chanspec; /** chanspec this sta is on */ 1892 uint16 PAD; 1893 wl_rateset_args_v1_t rateset_adv; /* rateset along with mcs index bitmap */ 1894 } sta_info_v5_t; 1895 1896 /* 1897 * Please update the following when modifying this structure: 1898 * StaInfo Twiki page flags section - description of the sta_info_t struct 1899 * src/wl/exe/wlu.c - print of sta_info_t 1900 * Pay attention to version if structure changes. 1901 */ 1902 1903 /* sta_info_t version 6 1904 changes to wl_rateset_args_t is leading to update this struct version as well. 1905 */ 1906 typedef struct { 1907 uint16 ver; /**< version of this struct */ 1908 uint16 len; /**< length in bytes of this structure */ 1909 uint16 cap; /**< sta's advertised capabilities */ 1910 uint16 PAD; 1911 uint32 flags; /**< flags defined below */ 1912 uint32 idle; /**< time since data pkt rx'd from sta */ 1913 struct ether_addr ea; /**< Station address */ 1914 uint16 PAD; 1915 wl_rateset_t rateset; /**< rateset in use */ 1916 uint32 in; /**< seconds elapsed since associated */ 1917 uint32 listen_interval_inms; /**< Min Listen interval in ms for this STA */ 1918 uint32 tx_pkts; /**< # of user packets transmitted (unicast) */ 1919 uint32 tx_failures; /**< # of user packets failed */ 1920 uint32 rx_ucast_pkts; /**< # of unicast packets received */ 1921 uint32 rx_mcast_pkts; /**< # of multicast packets received */ 1922 uint32 tx_rate; /**< Rate used by last tx frame */ 1923 uint32 rx_rate; /**< Rate of last successful rx frame */ 1924 uint32 rx_decrypt_succeeds; /**< # of packet decrypted successfully */ 1925 uint32 rx_decrypt_failures; /**< # of packet decrypted unsuccessfully */ 1926 uint32 tx_tot_pkts; /**< # of user tx pkts (ucast + mcast) */ 1927 uint32 rx_tot_pkts; /**< # of data packets recvd (uni + mcast) */ 1928 uint32 tx_mcast_pkts; /**< # of mcast pkts txed */ 1929 uint64 tx_tot_bytes; /**< data bytes txed (ucast + mcast) */ 1930 uint64 rx_tot_bytes; /**< data bytes recvd (ucast + mcast) */ 1931 uint64 tx_ucast_bytes; /**< data bytes txed (ucast) */ 1932 uint64 tx_mcast_bytes; /**< # data bytes txed (mcast) */ 1933 uint64 rx_ucast_bytes; /**< data bytes recvd (ucast) */ 1934 uint64 rx_mcast_bytes; /**< data bytes recvd (mcast) */ 1935 int8 rssi[WL_STA_ANT_MAX]; /**< average rssi per antenna 1936 * of data frames 1937 */ 1938 int8 nf[WL_STA_ANT_MAX]; /**< per antenna noise floor */ 1939 uint16 aid; /**< association ID */ 1940 uint16 ht_capabilities; /**< advertised ht caps */ 1941 uint16 vht_flags; /**< converted vht flags */ 1942 uint16 PAD; 1943 uint32 tx_pkts_retried; /**< # of frames where a retry was 1944 * necessary 1945 */ 1946 uint32 tx_pkts_retry_exhausted; /**< # of user frames where a retry 1947 * was exhausted 1948 */ 1949 int8 rx_lastpkt_rssi[WL_STA_ANT_MAX]; /**< Per antenna RSSI of last 1950 * received data frame. 1951 */ 1952 /* TX WLAN retry/failure statistics: 1953 * Separated for host requested frames and WLAN locally generated frames. 1954 * Include unicast frame only where the retries/failures can be counted. 1955 */ 1956 uint32 tx_pkts_total; /**< # user frames sent successfully */ 1957 uint32 tx_pkts_retries; /**< # user frames retries */ 1958 uint32 tx_pkts_fw_total; /**< # FW generated sent successfully */ 1959 uint32 tx_pkts_fw_retries; /**< # retries for FW generated frames */ 1960 uint32 tx_pkts_fw_retry_exhausted; /**< # FW generated where a retry 1961 * was exhausted 1962 */ 1963 uint32 rx_pkts_retried; /**< # rx with retry bit set */ 1964 uint32 tx_rate_fallback; /**< lowest fallback TX rate */ 1965 /* Fields above this line are common to sta_info_t versions 4 and 5 */ 1966 1967 uint32 rx_dur_total; /* total user RX duration (estimated) */ 1968 1969 chanspec_t chanspec; /** chanspec this sta is on */ 1970 uint16 PAD; 1971 wl_rateset_args_v2_t rateset_adv; /* rateset along with mcs index bitmap */ 1972 } sta_info_v6_t; 1973 1974 /* define to help support one version older sta_info_t from user level 1975 * applications. 1976 */ 1977 #define WL_OLD_STAINFO_SIZE OFFSETOF(sta_info_t, tx_tot_pkts) 1978 1979 #define WL_STA_VER_4 4 1980 #define WL_STA_VER_5 5 1981 #define WL_STA_VER WL_STA_VER_4 1982 1983 #define SWDIV_STATS_VERSION_2 2 1984 #define SWDIV_STATS_CURRENT_VERSION SWDIV_STATS_VERSION_2 1985 1986 struct wlc_swdiv_stats_v1 { 1987 uint32 auto_en; 1988 uint32 active_ant; 1989 uint32 rxcount; 1990 int32 avg_snr_per_ant0; 1991 int32 avg_snr_per_ant1; 1992 int32 avg_snr_per_ant2; 1993 uint32 swap_ge_rxcount0; 1994 uint32 swap_ge_rxcount1; 1995 uint32 swap_ge_snrthresh0; 1996 uint32 swap_ge_snrthresh1; 1997 uint32 swap_txfail0; 1998 uint32 swap_txfail1; 1999 uint32 swap_timer0; 2000 uint32 swap_timer1; 2001 uint32 swap_alivecheck0; 2002 uint32 swap_alivecheck1; 2003 uint32 rxcount_per_ant0; 2004 uint32 rxcount_per_ant1; 2005 uint32 acc_rxcount; 2006 uint32 acc_rxcount_per_ant0; 2007 uint32 acc_rxcount_per_ant1; 2008 uint32 tx_auto_en; 2009 uint32 tx_active_ant; 2010 uint32 rx_policy; 2011 uint32 tx_policy; 2012 uint32 cell_policy; 2013 uint32 swap_snrdrop0; 2014 uint32 swap_snrdrop1; 2015 uint32 mws_antsel_ovr_tx; 2016 uint32 mws_antsel_ovr_rx; 2017 uint8 swap_trig_event_id; 2018 }; 2019 2020 struct wlc_swdiv_stats_v2 { 2021 uint16 version; /* version of the structure 2022 * as defined by SWDIV_STATS_CURRENT_VERSION 2023 */ 2024 uint16 length; /* length of the entire structure */ 2025 uint32 auto_en; 2026 uint32 active_ant; 2027 uint32 rxcount; 2028 int32 avg_snr_per_ant0; 2029 int32 avg_snr_per_ant1; 2030 int32 avg_snr_per_ant2; 2031 uint32 swap_ge_rxcount0; 2032 uint32 swap_ge_rxcount1; 2033 uint32 swap_ge_snrthresh0; 2034 uint32 swap_ge_snrthresh1; 2035 uint32 swap_txfail0; 2036 uint32 swap_txfail1; 2037 uint32 swap_timer0; 2038 uint32 swap_timer1; 2039 uint32 swap_alivecheck0; 2040 uint32 swap_alivecheck1; 2041 uint32 rxcount_per_ant0; 2042 uint32 rxcount_per_ant1; 2043 uint32 acc_rxcount; 2044 uint32 acc_rxcount_per_ant0; 2045 uint32 acc_rxcount_per_ant1; 2046 uint32 tx_auto_en; 2047 uint32 tx_active_ant; 2048 uint32 rx_policy; 2049 uint32 tx_policy; 2050 uint32 cell_policy; 2051 uint32 swap_snrdrop0; 2052 uint32 swap_snrdrop1; 2053 uint32 mws_antsel_ovr_tx; 2054 uint32 mws_antsel_ovr_rx; 2055 uint32 swap_trig_event_id; 2056 }; 2057 2058 #define WLC_NUMRATES 16 /**< max # of rates in a rateset */ 2059 2060 /**Used to get specific STA parameters */ 2061 typedef struct { 2062 uint32 val; 2063 struct ether_addr ea; 2064 uint16 PAD; 2065 } scb_val_t; 2066 2067 /**Used by iovar versions of some ioctls, i.e. WLC_SCB_AUTHORIZE et al */ 2068 typedef struct { 2069 uint32 code; 2070 scb_val_t ioctl_args; 2071 } authops_t; 2072 2073 /** channel encoding */ 2074 typedef struct channel_info { 2075 int32 hw_channel; 2076 int32 target_channel; 2077 int32 scan_channel; 2078 } channel_info_t; 2079 2080 /** For ioctls that take a list of MAC addresses */ 2081 typedef struct maclist { 2082 uint32 count; /**< number of MAC addresses */ 2083 struct ether_addr ea[1]; /**< variable length array of MAC addresses */ 2084 } maclist_t; 2085 2086 typedef struct wds_client_info { 2087 char ifname[INTF_NAME_SIZ]; /* WDS ifname */ 2088 struct ether_addr ea; /* WDS client MAC address */ 2089 } wds_client_info_t; 2090 2091 #define WDS_MACLIST_MAGIC 0xFFFFFFFF 2092 #define WDS_MACLIST_VERSION 1 2093 2094 /* For wds MAC list ioctls */ 2095 typedef struct wds_maclist { 2096 uint32 count; /* Number of WDS clients */ 2097 uint32 magic; /* Magic number */ 2098 uint32 version; /* Version number */ 2099 struct wds_client_info client_list[1]; /* Variable length array of WDS clients */ 2100 } wds_maclist_t; 2101 2102 /**get pkt count struct passed through ioctl */ 2103 typedef struct get_pktcnt { 2104 uint32 rx_good_pkt; 2105 uint32 rx_bad_pkt; 2106 uint32 tx_good_pkt; 2107 uint32 tx_bad_pkt; 2108 uint32 rx_ocast_good_pkt; /**< unicast packets destined for others */ 2109 } get_pktcnt_t; 2110 2111 /* NINTENDO2 */ 2112 #define LQ_IDX_MIN 0 2113 #define LQ_IDX_MAX 1 2114 #define LQ_IDX_AVG 2 2115 #define LQ_IDX_SUM 2 2116 #define LQ_IDX_LAST 3 2117 #define LQ_STOP_MONITOR 0 2118 #define LQ_START_MONITOR 1 2119 2120 /** Get averages RSSI, Rx PHY rate and SNR values */ 2121 /* Link Quality */ 2122 typedef struct { 2123 int32 rssi[LQ_IDX_LAST]; /**< Array to keep min, max, avg rssi */ 2124 int32 snr[LQ_IDX_LAST]; /**< Array to keep min, max, avg snr */ 2125 int32 isvalid; /**< Flag indicating whether above data is valid */ 2126 } wl_lq_t; 2127 2128 typedef enum wl_wakeup_reason_type { 2129 LCD_ON = 1, 2130 LCD_OFF, 2131 DRC1_WAKE, 2132 DRC2_WAKE, 2133 REASON_LAST 2134 } wl_wr_type_t; 2135 2136 typedef struct { 2137 /** Unique filter id */ 2138 uint32 id; 2139 /** stores the reason for the last wake up */ 2140 uint8 reason; 2141 uint8 PAD[3]; 2142 } wl_wr_t; 2143 2144 /** Get MAC specific rate histogram command */ 2145 typedef struct { 2146 struct ether_addr ea; /**< MAC Address */ 2147 uint8 ac_cat; /**< Access Category */ 2148 uint8 num_pkts; /**< Number of packet entries to be averaged */ 2149 } wl_mac_ratehisto_cmd_t; 2150 /** Get MAC rate histogram response */ 2151 /* deprecated after JAGUAR branch */ 2152 typedef struct { 2153 uint32 rate[DOT11_RATE_MAX + 1]; /**< Rates */ 2154 uint32 mcs[WL_RATESET_SZ_HT_IOCTL * WL_TX_CHAINS_MAX]; /**< MCS counts */ 2155 uint32 vht[WL_RATESET_SZ_VHT_MCS][WL_TX_CHAINS_MAX]; /**< VHT counts */ 2156 uint32 tsf_timer[2][2]; /**< Start and End time for 8bytes value */ 2157 uint32 prop11n_mcs[WLC_11N_LAST_PROP_MCS - WLC_11N_FIRST_PROP_MCS + 1]; /** MCS counts */ 2158 } wl_mac_ratehisto_res_t; 2159 2160 /* sta_info ecounters */ 2161 typedef struct { 2162 struct ether_addr ea; /* Station MAC addr */ 2163 struct ether_addr BSSID; /* BSSID of the BSS */ 2164 uint32 tx_pkts_fw_total; /* # FW generated sent successfully */ 2165 uint32 tx_pkts_fw_retries; /* # retries for FW generated frames */ 2166 uint32 tx_pkts_fw_retry_exhausted; /* # FW generated which 2167 * failed after retry 2168 */ 2169 } sta_info_ecounters_t; 2170 2171 #define STAMON_MODULE_VER 1 2172 2173 /**Linux network driver ioctl encoding */ 2174 typedef struct wl_ioctl { 2175 uint32 cmd; /**< common ioctl definition */ 2176 void *buf; /**< pointer to user buffer */ 2177 uint32 len; /**< length of user buffer */ 2178 uint8 set; /**< 1=set IOCTL; 0=query IOCTL */ 2179 uint32 used; /**< bytes read or written (optional) */ 2180 uint32 needed; /**< bytes needed (optional) */ 2181 } wl_ioctl_t; 2182 2183 #ifdef CONFIG_COMPAT 2184 typedef struct compat_wl_ioctl { 2185 uint32 cmd; /**< common ioctl definition */ 2186 uint32 buf; /**< pointer to user buffer */ 2187 uint32 len; /**< length of user buffer */ 2188 uint8 set; /**< 1=set IOCTL; 0=query IOCTL */ 2189 uint32 used; /**< bytes read or written (optional) */ 2190 uint32 needed; /**< bytes needed (optional) */ 2191 } compat_wl_ioctl_t; 2192 #endif /* CONFIG_COMPAT */ 2193 2194 #define WL_NUM_RATES_CCK 4 /**< 1, 2, 5.5, 11 Mbps */ 2195 #define WL_NUM_RATES_OFDM 8 /**< 6, 9, 12, 18, 24, 36, 48, 54 Mbps SISO/CDD */ 2196 #define WL_NUM_RATES_MCS_1STREAM 8 /**< MCS 0-7 1-stream rates - SISO/CDD/STBC/MCS */ 2197 #define WL_NUM_RATES_EXTRA_VHT 2 /**< Additional VHT 11AC rates */ 2198 #define WL_NUM_RATES_VHT 10 2199 #define WL_NUM_RATES_VHT_ALL (WL_NUM_RATES_VHT + WL_NUM_RATES_EXTRA_VHT) 2200 #define WL_NUM_RATES_HE 12 2201 #define WL_NUM_RATES_MCS32 1 2202 #define UC_PATH_LEN 128u /**< uCode path length */ 2203 2204 /* 2205 * Structure for passing hardware and software 2206 * revision info up from the driver. 2207 */ 2208 typedef struct wlc_rev_info { 2209 uint32 vendorid; /**< PCI vendor id */ 2210 uint32 deviceid; /**< device id of chip */ 2211 uint32 radiorev; /**< radio revision */ 2212 uint32 chiprev; /**< chip revision */ 2213 uint32 corerev; /**< core revision */ 2214 uint32 boardid; /**< board identifier (usu. PCI sub-device id) */ 2215 uint32 boardvendor; /**< board vendor (usu. PCI sub-vendor id) */ 2216 uint32 boardrev; /**< board revision */ 2217 uint32 driverrev; /**< driver version */ 2218 uint32 ucoderev; /**< uCode version */ 2219 uint32 bus; /**< bus type */ 2220 uint32 chipnum; /**< chip number */ 2221 uint32 phytype; /**< phy type */ 2222 uint32 phyrev; /**< phy revision */ 2223 uint32 anarev; /**< anacore rev */ 2224 uint32 chippkg; /**< chip package info */ 2225 uint32 nvramrev; /**< nvram revision number */ 2226 uint32 phyminorrev; /**< phy minor rev */ 2227 uint32 coreminorrev; /**< core minor rev */ 2228 uint32 drvrev_major; /**< driver version: major */ 2229 uint32 drvrev_minor; /**< driver version: minor */ 2230 uint32 drvrev_rc; /**< driver version: rc */ 2231 uint32 drvrev_rc_inc; /**< driver version: rc incremental */ 2232 uint16 ucodeprebuilt; /**< uCode prebuilt flag */ 2233 uint16 ucodediffct; /**< uCode diff count */ 2234 uchar ucodeurl[128u]; /* obsolete, kept for ROM compatiblity */ 2235 uchar ucodepath[UC_PATH_LEN]; /**< uCode URL or path */ 2236 } wlc_rev_info_t; 2237 2238 #define WL_REV_INFO_LEGACY_LENGTH 48 2239 2240 #define WL_BRAND_MAX 10 2241 typedef struct wl_instance_info { 2242 uint32 instance; 2243 int8 brand[WL_BRAND_MAX]; 2244 int8 PAD[4-(WL_BRAND_MAX%4)]; 2245 } wl_instance_info_t; 2246 2247 /** structure to change size of tx fifo */ 2248 typedef struct wl_txfifo_sz { 2249 uint16 magic; 2250 uint16 fifo; 2251 uint16 size; 2252 } wl_txfifo_sz_t; 2253 2254 /* Transfer info about an IOVar from the driver */ 2255 /**Max supported IOV name size in bytes, + 1 for nul termination */ 2256 #define WLC_IOV_NAME_LEN (32 + 1) 2257 2258 typedef struct wlc_iov_trx_s { 2259 uint8 module; 2260 uint8 type; 2261 char name[WLC_IOV_NAME_LEN]; 2262 } wlc_iov_trx_t; 2263 2264 /** bump this number if you change the ioctl interface */ 2265 #define WLC_IOCTL_VERSION 2 2266 #define WLC_IOCTL_VERSION_LEGACY_IOTYPES 1 2267 /* ifdef EXT_STA */ 2268 typedef struct _wl_assoc_result { 2269 ulong associated; 2270 ulong NDIS_auth; 2271 ulong NDIS_infra; 2272 } wl_assoc_result_t; 2273 /* EXT_STA */ 2274 2275 #define WL_PHY_PAVARS_LEN 32 /**< Phytype, Bandrange, chain, a[0], b[0], c[0], d[0] .. */ 2276 2277 #define WL_PHY_PAVAR_VER 1 /**< pavars version */ 2278 #define WL_PHY_PAVARS2_NUM 3 /**< a1, b0, b1 */ 2279 typedef struct wl_pavars2 { 2280 uint16 ver; /**< version of this struct */ 2281 uint16 len; /**< len of this structure */ 2282 uint16 inuse; /**< driver return 1 for a1,b0,b1 in current band range */ 2283 uint16 phy_type; /**< phy type */ 2284 uint16 bandrange; 2285 uint16 chain; 2286 uint16 inpa[WL_PHY_PAVARS2_NUM]; /**< phy pavars for one band range */ 2287 } wl_pavars2_t; 2288 2289 typedef struct wl_po { 2290 uint16 phy_type; /**< Phy type */ 2291 uint16 band; 2292 uint16 cckpo; 2293 uint16 PAD; 2294 uint32 ofdmpo; 2295 uint16 mcspo[8]; 2296 } wl_po_t; 2297 2298 #define WL_NUM_RPCALVARS 5 /**< number of rpcal vars */ 2299 2300 typedef struct wl_rpcal { 2301 uint16 value; 2302 uint16 update; 2303 } wl_rpcal_t; 2304 2305 #define WL_NUM_RPCALPHASEVARS 5 /* number of rpcal phase vars */ 2306 2307 typedef struct wl_rpcal_phase { 2308 uint16 value; 2309 uint16 update; 2310 } wl_rpcal_phase_t; 2311 2312 typedef struct wl_aci_args { 2313 int32 enter_aci_thresh; /* Trigger level to start detecting ACI */ 2314 int32 exit_aci_thresh; /* Trigger level to exit ACI mode */ 2315 int32 usec_spin; /* microsecs to delay between rssi samples */ 2316 int32 glitch_delay; /* interval between ACI scans when glitch count is consistently high */ 2317 uint16 nphy_adcpwr_enter_thresh; /**< ADC power to enter ACI mitigation mode */ 2318 uint16 nphy_adcpwr_exit_thresh; /**< ADC power to exit ACI mitigation mode */ 2319 uint16 nphy_repeat_ctr; /**< Number of tries per channel to compute power */ 2320 uint16 nphy_num_samples; /**< Number of samples to compute power on one channel */ 2321 uint16 nphy_undetect_window_sz; /**< num of undetects to exit ACI Mitigation mode */ 2322 uint16 nphy_b_energy_lo_aci; /**< low ACI power energy threshold for bphy */ 2323 uint16 nphy_b_energy_md_aci; /**< mid ACI power energy threshold for bphy */ 2324 uint16 nphy_b_energy_hi_aci; /**< high ACI power energy threshold for bphy */ 2325 uint16 nphy_noise_noassoc_glitch_th_up; /**< wl interference 4 */ 2326 uint16 nphy_noise_noassoc_glitch_th_dn; 2327 uint16 nphy_noise_assoc_glitch_th_up; 2328 uint16 nphy_noise_assoc_glitch_th_dn; 2329 uint16 nphy_noise_assoc_aci_glitch_th_up; 2330 uint16 nphy_noise_assoc_aci_glitch_th_dn; 2331 uint16 nphy_noise_assoc_enter_th; 2332 uint16 nphy_noise_noassoc_enter_th; 2333 uint16 nphy_noise_assoc_rx_glitch_badplcp_enter_th; 2334 uint16 nphy_noise_noassoc_crsidx_incr; 2335 uint16 nphy_noise_assoc_crsidx_incr; 2336 uint16 nphy_noise_crsidx_decr; 2337 } wl_aci_args_t; 2338 2339 #define WL_ACI_ARGS_LEGACY_LENGTH 16 /**< bytes of pre NPHY aci args */ 2340 2341 #define WL_MACFIFO_PLAY_ARGS_T_VERSION 1u /* version of wl_macfifo_play_args_t struct */ 2342 2343 enum wl_macfifo_play_flags { 2344 WL_MACFIFO_PLAY_STOP = 0x00u, /* stop playing samples */ 2345 WL_MACFIFO_PLAY_START = 0x01u, /* start playing samples */ 2346 WL_MACFIFO_PLAY_LOAD = 0x02u, /* for set: load samples 2347 for get: samples are loaded 2348 */ 2349 WL_MACFIFO_PLAY_GET_MAX_SIZE = 0x10u, /* get the macfifo buffer size */ 2350 WL_MACFIFO_PLAY_GET_STATUS = 0x20u, /* get macfifo play status */ 2351 }; 2352 2353 typedef struct wl_macfifo_play_args { 2354 uint16 version; /* structure version */ 2355 uint16 len; /* size of structure */ 2356 uint16 flags; 2357 uint8 PAD[2]; 2358 uint32 data_len; /* data length */ 2359 } wl_macfifo_play_args_t; 2360 2361 #define WL_MACFIFO_PLAY_DATA_T_VERSION 1u /* version of wl_macfifo_play_data_t struct */ 2362 2363 typedef struct wl_macfifo_play_data { 2364 uint16 version; /* structure version */ 2365 uint16 len; /* size of structure */ 2366 uint32 data_len; /* data length */ 2367 } wl_macfifo_play_data_t; 2368 2369 #define WL_SAMPLECOLLECT_T_VERSION 2 /**< version of wl_samplecollect_args_t struct */ 2370 typedef struct wl_samplecollect_args { 2371 /* version 0 fields */ 2372 uint8 coll_us; 2373 uint8 PAD[3]; 2374 int32 cores; 2375 /* add'l version 1 fields */ 2376 uint16 version; /**< see definition of WL_SAMPLECOLLECT_T_VERSION */ 2377 uint16 length; /**< length of entire structure */ 2378 int8 trigger; 2379 uint8 PAD; 2380 uint16 timeout; 2381 uint16 mode; 2382 uint16 PAD; 2383 uint32 pre_dur; 2384 uint32 post_dur; 2385 uint8 gpio_sel; 2386 uint8 downsamp; 2387 uint8 be_deaf; 2388 uint8 agc; /**< loop from init gain and going down */ 2389 uint8 filter; /**< override high pass corners to lowest */ 2390 /* add'l version 2 fields */ 2391 uint8 trigger_state; 2392 uint8 module_sel1; 2393 uint8 module_sel2; 2394 uint16 nsamps; 2395 uint16 PAD; 2396 int32 bitStart; 2397 uint32 gpioCapMask; 2398 uint8 gpio_collection; 2399 uint8 PAD[3]; 2400 } wl_samplecollect_args_t; 2401 2402 #define WL_SAMPLEDATA_T_VERSION 1 /**< version of wl_samplecollect_args_t struct */ 2403 /* version for unpacked sample data, int16 {(I,Q),Core(0..N)} */ 2404 #define WL_SAMPLEDATA_T_VERSION_SPEC_AN 2 2405 2406 typedef struct wl_sampledata { 2407 uint16 version; /**< structure version */ 2408 uint16 size; /**< size of structure */ 2409 uint16 tag; /**< Header/Data */ 2410 uint16 length; /**< data length */ 2411 uint32 flag; /**< bit def */ 2412 } wl_sampledata_t; 2413 2414 /* WL_OTA START */ 2415 /* OTA Test Status */ 2416 enum { 2417 WL_OTA_TEST_IDLE = 0, /**< Default Idle state */ 2418 WL_OTA_TEST_ACTIVE = 1, /**< Test Running */ 2419 WL_OTA_TEST_SUCCESS = 2, /**< Successfully Finished Test */ 2420 WL_OTA_TEST_FAIL = 3 /**< Test Failed in the Middle */ 2421 }; 2422 2423 /* OTA SYNC Status */ 2424 enum { 2425 WL_OTA_SYNC_IDLE = 0, /**< Idle state */ 2426 WL_OTA_SYNC_ACTIVE = 1, /**< Waiting for Sync */ 2427 WL_OTA_SYNC_FAIL = 2 /**< Sync pkt not recieved */ 2428 }; 2429 2430 /* Various error states dut can get stuck during test */ 2431 enum { 2432 WL_OTA_SKIP_TEST_CAL_FAIL = 1, /**< Phy calibration failed */ 2433 WL_OTA_SKIP_TEST_SYNCH_FAIL = 2, /**< Sync Packet not recieved */ 2434 WL_OTA_SKIP_TEST_FILE_DWNLD_FAIL = 3, /**< Cmd flow file download failed */ 2435 WL_OTA_SKIP_TEST_NO_TEST_FOUND = 4, /**< No test found in Flow file */ 2436 WL_OTA_SKIP_TEST_WL_NOT_UP = 5, /**< WL UP failed */ 2437 WL_OTA_SKIP_TEST_UNKNOWN_CALL /**< Unintentional scheduling on ota test */ 2438 }; 2439 2440 /* Differentiator for ota_tx and ota_rx */ 2441 enum { 2442 WL_OTA_TEST_TX = 0, /**< ota_tx */ 2443 WL_OTA_TEST_RX = 1, /**< ota_rx */ 2444 }; 2445 2446 /* Catch 3 modes of operation: 20Mhz, 40Mhz, 20 in 40 Mhz */ 2447 enum { 2448 WL_OTA_TEST_BW_20_IN_40MHZ = 0, /**< 20 in 40 operation */ 2449 WL_OTA_TEST_BW_20MHZ = 1, /**< 20 Mhz operation */ 2450 WL_OTA_TEST_BW_40MHZ = 2, /**< full 40Mhz operation */ 2451 WL_OTA_TEST_BW_80MHZ = 3 /* full 80Mhz operation */ 2452 }; 2453 #define HT_MCS_INUSE 0x00000080 /* HT MCS in use,indicates b0-6 holds an mcs */ 2454 #define VHT_MCS_INUSE 0x00000100 /* VHT MCS in use,indicates b0-6 holds an mcs */ 2455 #define OTA_RATE_MASK 0x0000007f /* rate/mcs value */ 2456 #define OTA_STF_SISO 0 2457 #define OTA_STF_CDD 1 2458 #define OTA_STF_STBC 2 2459 #define OTA_STF_SDM 3 2460 2461 typedef struct ota_rate_info { 2462 uint8 rate_cnt; /**< Total number of rates */ 2463 uint8 PAD; 2464 uint16 rate_val_mbps[WL_OTA_TEST_MAX_NUM_RATE]; /**< array of rates from 1mbps to 130mbps */ 2465 /**< for legacy rates : ratein mbps * 2 */ 2466 /**< for HT rates : mcs index */ 2467 } ota_rate_info_t; 2468 2469 typedef struct ota_power_info { 2470 int8 pwr_ctrl_on; /**< power control on/off */ 2471 int8 start_pwr; /**< starting power/index */ 2472 int8 delta_pwr; /**< delta power/index */ 2473 int8 end_pwr; /**< end power/index */ 2474 } ota_power_info_t; 2475 2476 typedef struct ota_packetengine { 2477 uint16 delay; /**< Inter-packet delay */ 2478 /**< for ota_tx, delay is tx ifs in micro seconds */ 2479 /* for ota_rx, delay is wait time in milliseconds */ 2480 uint16 nframes; /**< Number of frames */ 2481 uint16 length; /**< Packet length */ 2482 } ota_packetengine_t; 2483 2484 /* 2485 * OTA txant/rxant parameter 2486 * bit7-4: 4 bits swdiv_tx/rx_policy bitmask, specify antenna-policy for SW diversity 2487 * bit3-0: 4 bits TxCore bitmask, specify cores used for transmit frames 2488 * (maximum spatial expansion) 2489 */ 2490 #define WL_OTA_TEST_ANT_MASK 0xF0 2491 #define WL_OTA_TEST_CORE_MASK 0x0F 2492 2493 /* OTA txant/rxant 'ant_mask' field; map to Tx/Rx antenna policy for SW diversity */ 2494 enum { 2495 WL_OTA_TEST_FORCE_ANT0 = 0x10, /* force antenna to Ant 0 */ 2496 WL_OTA_TEST_FORCE_ANT1 = 0x20, /* force antenna to Ant 1 */ 2497 }; 2498 2499 /* antenna/core fields access */ 2500 #define WL_OTA_TEST_GET_ANT(_txant) ((_txant) & WL_OTA_TEST_ANT_MASK) 2501 #define WL_OTA_TEST_GET_CORE(_txant) ((_txant) & WL_OTA_TEST_CORE_MASK) 2502 2503 /** Test info vector */ 2504 typedef struct wl_ota_test_args { 2505 uint8 cur_test; /**< test phase */ 2506 uint8 chan; /**< channel */ 2507 uint8 bw; /**< bandwidth */ 2508 uint8 control_band; /**< control band */ 2509 uint8 stf_mode; /**< stf mode */ 2510 uint8 PAD; 2511 ota_rate_info_t rt_info; /**< Rate info */ 2512 ota_packetengine_t pkteng; /**< packeteng info */ 2513 uint8 txant; /**< tx antenna */ 2514 uint8 rxant; /**< rx antenna */ 2515 ota_power_info_t pwr_info; /**< power sweep info */ 2516 uint8 wait_for_sync; /**< wait for sync or not */ 2517 uint8 ldpc; 2518 uint8 sgi; 2519 uint8 PAD; 2520 /* Update WL_OTA_TESTVEC_T_VERSION for adding new members to this structure */ 2521 } wl_ota_test_args_t; 2522 2523 #define WL_OTA_TESTVEC_T_VERSION 1 /* version of wl_ota_test_vector_t struct */ 2524 typedef struct wl_ota_test_vector { 2525 uint16 version; 2526 wl_ota_test_args_t test_arg[WL_OTA_TEST_MAX_NUM_SEQ]; /**< Test argument struct */ 2527 uint16 test_cnt; /**< Total no of test */ 2528 uint8 file_dwnld_valid; /**< File successfully downloaded */ 2529 uint8 sync_timeout; /**< sync packet timeout */ 2530 int8 sync_fail_action; /**< sync fail action */ 2531 struct ether_addr sync_mac; /**< macaddress for sync pkt */ 2532 struct ether_addr tx_mac; /**< macaddress for tx */ 2533 struct ether_addr rx_mac; /**< macaddress for rx */ 2534 int8 loop_test; /**< dbg feature to loop the test */ 2535 uint16 test_rxcnt; 2536 /* Update WL_OTA_TESTVEC_T_VERSION for adding new members to this structure */ 2537 } wl_ota_test_vector_t; 2538 2539 /** struct copied back form dongle to host to query the status */ 2540 typedef struct wl_ota_test_status { 2541 int16 cur_test_cnt; /**< test phase */ 2542 int8 skip_test_reason; /**< skip test reasoin */ 2543 uint8 PAD; 2544 wl_ota_test_args_t test_arg; /**< cur test arg details */ 2545 uint16 test_cnt; /**< total no of test downloaded */ 2546 uint8 file_dwnld_valid; /**< file successfully downloaded ? */ 2547 uint8 sync_timeout; /**< sync timeout */ 2548 int8 sync_fail_action; /**< sync fail action */ 2549 struct ether_addr sync_mac; /**< macaddress for sync pkt */ 2550 struct ether_addr tx_mac; /**< tx mac address */ 2551 struct ether_addr rx_mac; /**< rx mac address */ 2552 uint8 test_stage; /**< check the test status */ 2553 int8 loop_test; /**< Debug feature to puts test enfine in a loop */ 2554 uint8 sync_status; /**< sync status */ 2555 } wl_ota_test_status_t; 2556 2557 /* FOR ioctl that take the sta monitor information */ 2558 typedef struct stamon_data { 2559 struct ether_addr ea; 2560 uint8 PAD[2]; 2561 int32 rssi; 2562 } stamon_data_t; 2563 2564 typedef struct stamon_info { 2565 int32 version; 2566 uint32 count; 2567 stamon_data_t sta_data[1]; 2568 } stamon_info_t; 2569 2570 typedef struct wl_ota_rx_rssi { 2571 uint16 pktcnt; /* Pkt count used for this rx test */ 2572 chanspec_t chanspec; /* Channel info on which the packets are received */ 2573 int16 rssi; /* Average RSSI of the first 50% packets received */ 2574 } wl_ota_rx_rssi_t; 2575 2576 #define WL_OTARSSI_T_VERSION 1 /* version of wl_ota_test_rssi_t struct */ 2577 #define WL_OTA_TEST_RSSI_FIXED_SIZE OFFSETOF(wl_ota_test_rssi_t, rx_rssi) 2578 2579 typedef struct wl_ota_test_rssi { 2580 uint8 version; 2581 uint8 testcnt; /* total measured RSSI values, valid on output only */ 2582 wl_ota_rx_rssi_t rx_rssi[1]; /* Variable length array of wl_ota_rx_rssi_t */ 2583 } wl_ota_test_rssi_t; 2584 2585 /* WL_OTA END */ 2586 2587 /**wl_radar_args_t */ 2588 typedef struct { 2589 int32 npulses; /**< required number of pulses at n * t_int */ 2590 int32 ncontig; /**< required number of pulses at t_int */ 2591 int32 min_pw; /**< minimum pulse width (20 MHz clocks) */ 2592 int32 max_pw; /**< maximum pulse width (20 MHz clocks) */ 2593 uint16 thresh0; /**< Radar detection, thresh 0 */ 2594 uint16 thresh1; /**< Radar detection, thresh 1 */ 2595 uint16 blank; /**< Radar detection, blank control */ 2596 uint16 fmdemodcfg; /**< Radar detection, fmdemod config */ 2597 int32 npulses_lp; /**< Radar detection, minimum long pulses */ 2598 int32 min_pw_lp; /**< Minimum pulsewidth for long pulses */ 2599 int32 max_pw_lp; /**< Maximum pulsewidth for long pulses */ 2600 int32 min_fm_lp; /**< Minimum fm for long pulses */ 2601 int32 max_span_lp; /**< Maximum deltat for long pulses */ 2602 int32 min_deltat; /**< Minimum spacing between pulses */ 2603 int32 max_deltat; /**< Maximum spacing between pulses */ 2604 uint16 autocorr; /**< Radar detection, autocorr on or off */ 2605 uint16 st_level_time; /**< Radar detection, start_timing level */ 2606 uint16 t2_min; /**< minimum clocks needed to remain in state 2 */ 2607 uint8 PAD[2]; 2608 uint32 version; /**< version */ 2609 uint32 fra_pulse_err; /**< sample error margin for detecting French radar pulsed */ 2610 int32 npulses_fra; /**< Radar detection, minimum French pulses set */ 2611 int32 npulses_stg2; /**< Radar detection, minimum staggered-2 pulses set */ 2612 int32 npulses_stg3; /**< Radar detection, minimum staggered-3 pulses set */ 2613 uint16 percal_mask; /**< defines which period cal is masked from radar detection */ 2614 uint8 PAD[2]; 2615 int32 quant; /**< quantization resolution to pulse positions */ 2616 uint32 min_burst_intv_lp; /**< minimum burst to burst interval for bin3 radar */ 2617 uint32 max_burst_intv_lp; /**< maximum burst to burst interval for bin3 radar */ 2618 int32 nskip_rst_lp; /**< number of skipped pulses before resetting lp buffer */ 2619 int32 max_pw_tol; /* maximum tolerance allowd in detected pulse width for radar detection */ 2620 uint16 feature_mask; /**< 16-bit mask to specify enabled features */ 2621 uint16 thresh0_sc; /**< Radar detection, thresh 0 */ 2622 uint16 thresh1_sc; /**< Radar detection, thresh 1 */ 2623 uint8 PAD[2]; 2624 } wl_radar_args_t; 2625 2626 #define WL_RADAR_ARGS_VERSION 2 2627 2628 typedef struct { 2629 uint32 version; /**< version */ 2630 uint16 thresh0_20_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 20MHz */ 2631 uint16 thresh1_20_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 20MHz */ 2632 uint16 thresh0_40_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 40MHz */ 2633 uint16 thresh1_40_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 40MHz */ 2634 uint16 thresh0_80_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 80MHz */ 2635 uint16 thresh1_80_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 80MHz */ 2636 uint16 thresh0_20_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 20MHz */ 2637 uint16 thresh1_20_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 20MHz */ 2638 uint16 thresh0_40_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 40MHz */ 2639 uint16 thresh1_40_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 40MHz */ 2640 uint16 thresh0_80_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 80MHz */ 2641 uint16 thresh1_80_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 80MHz */ 2642 uint16 thresh0_160_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 160MHz */ 2643 uint16 thresh1_160_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 160MHz */ 2644 uint16 thresh0_160_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 160MHz */ 2645 uint16 thresh1_160_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 160MHz */ 2646 } wl_radar_thr_t; 2647 2648 typedef struct { 2649 uint32 version; /* version */ 2650 uint16 thresh0_sc_20_lo; 2651 uint16 thresh1_sc_20_lo; 2652 uint16 thresh0_sc_40_lo; 2653 uint16 thresh1_sc_40_lo; 2654 uint16 thresh0_sc_80_lo; 2655 uint16 thresh1_sc_80_lo; 2656 uint16 thresh0_sc_20_hi; 2657 uint16 thresh1_sc_20_hi; 2658 uint16 thresh0_sc_40_hi; 2659 uint16 thresh1_sc_40_hi; 2660 uint16 thresh0_sc_80_hi; 2661 uint16 thresh1_sc_80_hi; 2662 uint16 fc_varth_sb; 2663 uint16 fc_varth_bin5_sb; 2664 uint16 notradar_enb; 2665 uint16 max_notradar_lp; 2666 uint16 max_notradar; 2667 uint16 max_notradar_lp_sc; 2668 uint16 max_notradar_sc; 2669 uint16 highpow_war_enb; 2670 uint16 highpow_sp_ratio; //unit is 0.5 2671 } wl_radar_thr2_t; 2672 2673 #define WL_RADAR_THR_VERSION 2 2674 2675 typedef struct { 2676 uint32 ver; 2677 uint32 len; 2678 int32 rssi_th[3]; 2679 uint8 rssi_gain_80[4]; 2680 uint8 rssi_gain_160[4]; 2681 } wl_dyn_switch_th_t; 2682 2683 #define WL_PHY_DYN_SWITCH_TH_VERSION 1 2684 2685 /** RSSI per antenna */ 2686 typedef struct { 2687 uint32 version; /**< version field */ 2688 uint32 count; /**< number of valid antenna rssi */ 2689 int8 rssi_ant[WL_RSSI_ANT_MAX]; /**< rssi per antenna */ 2690 int8 rssi_sum; /**< summed rssi across all antennas */ 2691 int8 PAD[3]; 2692 } wl_rssi_ant_t; 2693 2694 /* SNR per antenna */ 2695 typedef struct { 2696 uint32 version; /* version field */ 2697 uint32 count; /* number of valid antenna snr */ 2698 int8 snr_ant[WL_RSSI_ANT_MAX]; /* snr per antenna */ 2699 } wl_snr_ant_t; 2700 2701 /* Weighted average support */ 2702 #define WL_WA_VER 0 /* Initial version - Basic WA algorithm only */ 2703 2704 #define WL_WA_ALGO_BASIC 0 /* Basic weighted average algorithm (all 4 metrics) */ 2705 #define WL_WA_TYPE_RSSI 0 2706 #define WL_WA_TYPE_SNR 1 2707 #define WL_WA_TYPE_TXRATE 2 2708 #define WL_WA_TYPE_RXRATE 3 2709 #define WL_WA_TYPE_MAX 4 2710 2711 typedef struct { /* payload of subcmd in xtlv */ 2712 uint8 id; 2713 uint8 n_total; /* Total number of samples (n_total >= n_recent) */ 2714 uint8 n_recent; /* Number of samples denoted as recent */ 2715 uint8 w_recent; /* Total weight for the recent samples (as percentage) */ 2716 } wl_wa_basic_params_t; 2717 2718 typedef struct { 2719 uint16 ver; 2720 uint16 len; 2721 uint8 subcmd[]; /* sub-cmd in bcm_xtlv_t */ 2722 } wl_wa_cmd_t; 2723 2724 /** data structure used in 'dfs_status' wl interface, which is used to query dfs status */ 2725 typedef struct { 2726 uint32 state; /**< noted by WL_DFS_CACSTATE_XX. */ 2727 uint32 duration; /**< time spent in ms in state. */ 2728 /** 2729 * as dfs enters ISM state, it removes the operational channel from quiet channel 2730 * list and notes the channel in channel_cleared. set to 0 if no channel is cleared 2731 */ 2732 chanspec_t chanspec_cleared; 2733 /** chanspec cleared used to be a uint32, add another to uint16 to maintain size */ 2734 uint16 pad; 2735 } wl_dfs_status_t; 2736 2737 typedef struct { 2738 uint32 state; /* noted by WL_DFS_CACSTATE_XX */ 2739 uint32 duration; /* time spent in ms in state */ 2740 chanspec_t chanspec; /* chanspec of this core */ 2741 chanspec_t chanspec_last_cleared; /* chanspec last cleared for operation by scanning */ 2742 uint16 sub_type; /* currently just the index of the core or the respective PLL */ 2743 uint16 pad; 2744 } wl_dfs_sub_status_t; 2745 2746 #define WL_DFS_STATUS_ALL_VERSION (1) 2747 typedef struct { 2748 uint16 version; /* version field; current max version 1 */ 2749 uint16 num_sub_status; 2750 wl_dfs_sub_status_t dfs_sub_status[1]; /* struct array of length num_sub_status */ 2751 } wl_dfs_status_all_t; 2752 2753 #define WL_DFS_AP_MOVE_VERSION (1) 2754 2755 struct wl_dfs_ap_move_status_v1 { 2756 int16 dfs_status; /* DFS scan status */ 2757 chanspec_t chanspec; /* New AP Chanspec */ 2758 wl_dfs_status_t cac_status; /* CAC status */ 2759 }; 2760 2761 typedef struct wl_dfs_ap_move_status_v2 { 2762 int8 version; /* version field; current max version 1 */ 2763 int8 move_status; /* DFS move status */ 2764 chanspec_t chanspec; /* New AP Chanspec */ 2765 wl_dfs_status_all_t scan_status; /* status; see dfs_status_all for wl_dfs_status_all_t */ 2766 } wl_dfs_ap_move_status_v2_t; 2767 2768 #define WL_DFS_AP_MOVE_ABORT -1 /* Abort any dfs_ap_move in progress immediately */ 2769 #define WL_DFS_AP_MOVE_STUNT -2 /* Stunt move but continue background CSA if in progress */ 2770 2771 /** data structure used in 'radar_status' wl interface, which is use to query radar det status */ 2772 typedef struct { 2773 uint8 detected; 2774 uint8 PAD[3]; 2775 int32 count; 2776 uint8 pretended; 2777 uint8 PAD[3]; 2778 uint32 radartype; 2779 uint32 timenow; 2780 uint32 timefromL; 2781 int32 lp_csect_single; 2782 int32 detected_pulse_index; 2783 int32 nconsecq_pulses; 2784 chanspec_t ch; 2785 uint8 PAD[2]; 2786 int32 pw[10]; 2787 int32 intv[10]; 2788 int32 fm[10]; 2789 } wl_radar_status_t; 2790 2791 #define NUM_PWRCTRL_RATES 12 2792 2793 typedef struct { 2794 uint8 txpwr_band_max[NUM_PWRCTRL_RATES]; /**< User set target */ 2795 uint8 txpwr_limit[NUM_PWRCTRL_RATES]; /**< reg and local power limit */ 2796 uint8 txpwr_local_max; /**< local max according to the AP */ 2797 uint8 txpwr_local_constraint; /**< local constraint according to the AP */ 2798 uint8 txpwr_chan_reg_max; /**< Regulatory max for this channel */ 2799 uint8 txpwr_target[2][NUM_PWRCTRL_RATES]; /**< Latest target for 2.4 and 5 Ghz */ 2800 uint8 txpwr_est_Pout[2]; /**< Latest estimate for 2.4 and 5 Ghz */ 2801 uint8 txpwr_opo[NUM_PWRCTRL_RATES]; /**< On G phy, OFDM power offset */ 2802 uint8 txpwr_bphy_cck_max[NUM_PWRCTRL_RATES]; /**< Max CCK power for this band (SROM) */ 2803 uint8 txpwr_bphy_ofdm_max; /**< Max OFDM power for this band (SROM) */ 2804 uint8 txpwr_aphy_max[NUM_PWRCTRL_RATES]; /**< Max power for A band (SROM) */ 2805 int8 txpwr_antgain[2]; /**< Ant gain for each band - from SROM */ 2806 uint8 txpwr_est_Pout_gofdm; /**< Pwr estimate for 2.4 OFDM */ 2807 } tx_power_legacy_t; 2808 2809 #define WL_TX_POWER_RATES_LEGACY 45 2810 #define WL_TX_POWER_MCS20_FIRST 12 2811 #define WL_TX_POWER_MCS20_NUM 16 2812 #define WL_TX_POWER_MCS40_FIRST 28 2813 #define WL_TX_POWER_MCS40_NUM 17 2814 2815 typedef struct { 2816 uint32 flags; 2817 chanspec_t chanspec; /**< txpwr report for this channel */ 2818 chanspec_t local_chanspec; /**< channel on which we are associated */ 2819 uint8 local_max; /**< local max according to the AP */ 2820 uint8 local_constraint; /**< local constraint according to the AP */ 2821 int8 antgain[2]; /**< Ant gain for each band - from SROM */ 2822 uint8 rf_cores; /**< count of RF Cores being reported */ 2823 uint8 est_Pout[4]; /**< Latest tx power out estimate per RF 2824 * chain without adjustment 2825 */ 2826 uint8 est_Pout_cck; /**< Latest CCK tx power out estimate */ 2827 uint8 user_limit[WL_TX_POWER_RATES_LEGACY]; /**< User limit */ 2828 uint8 reg_limit[WL_TX_POWER_RATES_LEGACY]; /**< Regulatory power limit */ 2829 uint8 board_limit[WL_TX_POWER_RATES_LEGACY]; /**< Max power board can support (SROM) */ 2830 uint8 target[WL_TX_POWER_RATES_LEGACY]; /**< Latest target power */ 2831 uint8 PAD[2]; 2832 } tx_power_legacy2_t; 2833 2834 #define WL_NUM_2x2_ELEMENTS 4 2835 #define WL_NUM_3x3_ELEMENTS 6 2836 #define WL_NUM_4x4_ELEMENTS 10 2837 2838 typedef struct { 2839 uint16 ver; /**< version of this struct */ 2840 uint16 len; /**< length in bytes of this structure */ 2841 uint32 flags; 2842 chanspec_t chanspec; /**< txpwr report for this channel */ 2843 chanspec_t local_chanspec; /**< channel on which we are associated */ 2844 uint32 buflen; /**< ppr buffer length */ 2845 uint8 pprbuf[1]; /**< Latest target power buffer */ 2846 } wl_txppr_t; 2847 2848 #define WL_TXPPR_VERSION 1 2849 #define WL_TXPPR_LENGTH (sizeof(wl_txppr_t)) 2850 #define TX_POWER_T_VERSION 45 2851 2852 /* curpower ppr types */ 2853 enum { 2854 PPRTYPE_TARGETPOWER = 1, 2855 PPRTYPE_BOARDLIMITS = 2, 2856 PPRTYPE_REGLIMITS = 3, 2857 PPRTYPE_RU_REGLIMITS = 4, 2858 PPRTYPE_RU_BOARDLIMITS = 5, 2859 PPRTYPE_RU_TARGETPOWER = 6, 2860 PPRTYPE_LAST 2861 }; 2862 2863 /** number of ppr serialization buffers, it should be reg, board and target */ 2864 #define WL_TXPPR_SER_BUF_NUM (PPRTYPE_LAST - 1) 2865 2866 typedef struct chanspec_txpwr_max { 2867 chanspec_t chanspec; /**< chanspec */ 2868 uint8 txpwr_max; /**< max txpwr in all the rates */ 2869 uint8 padding; 2870 } chanspec_txpwr_max_t; 2871 2872 typedef struct wl_chanspec_txpwr_max { 2873 uint16 ver; /**< version of this struct */ 2874 uint16 len; /**< length in bytes of this structure */ 2875 uint32 count; /**< number of elements of (chanspec, txpwr_max) pair */ 2876 chanspec_txpwr_max_t txpwr[1]; /**< array of (chanspec, max_txpwr) pair */ 2877 } wl_chanspec_txpwr_max_t; 2878 2879 #define WL_CHANSPEC_TXPWR_MAX_VER 1 2880 #define WL_CHANSPEC_TXPWR_MAX_LEN (sizeof(wl_chanspec_txpwr_max_t)) 2881 2882 typedef struct tx_inst_power { 2883 uint8 txpwr_est_Pout[2]; /**< Latest estimate for 2.4 and 5 Ghz */ 2884 uint8 txpwr_est_Pout_gofdm; /**< Pwr estimate for 2.4 OFDM */ 2885 } tx_inst_power_t; 2886 2887 #define WL_NUM_TXCHAIN_MAX 4 2888 typedef struct wl_txchain_pwr_offsets { 2889 int8 offset[WL_NUM_TXCHAIN_MAX]; /**< quarter dBm signed offset for each chain */ 2890 } wl_txchain_pwr_offsets_t; 2891 2892 /** maximum channels returned by the get valid channels iovar */ 2893 #define WL_NUMCHANNELS 64 2894 #define WL_NUMCHANNELS_MANY_CHAN 10 2895 #define WL_ITER_LIMIT_MANY_CHAN 5 2896 2897 #define WL_MIMO_PS_CFG_VERSION_1 1 2898 2899 typedef struct wl_mimops_cfg { 2900 uint8 version; 2901 /* active_chains: 0 for all, 1 for 1 chain. */ 2902 uint8 active_chains; 2903 /* static (0) or dynamic (1).or disabled (3) Mode applies only when active_chains = 0. */ 2904 uint8 mode; 2905 /* bandwidth = Full (0), 20M (1), 40M (2), 80M (3). */ 2906 uint8 bandwidth; 2907 uint8 applychangesafterlearning; 2908 uint8 pad[3]; 2909 } wl_mimops_cfg_t; 2910 2911 /* This event is for tracing MIMO PS metrics snapshot calls. 2912 * It is helpful to debug out-of-sync issue between 2913 * ucode SHM values and FW snapshot calculation. 2914 * It is part of the EVENT_LOG_TAG_MIMO_PS_TRACE. 2915 */ 2916 #define WL_MIMO_PS_METRICS_SNAPSHOT_TRACE_TYPE 0 2917 typedef struct wl_mimo_ps_metrics_snapshot_trace { 2918 /* type field for this TLV: */ 2919 uint16 type; 2920 /* length field for this TLV */ 2921 uint16 len; 2922 uint32 idle_slotcnt_mimo; /* MIMO idle slotcnt raw SHM value */ 2923 uint32 last_idle_slotcnt_mimo; /* stored value snapshot */ 2924 uint32 idle_slotcnt_siso; /* SISO idle slotcnt raw SHM value */ 2925 uint32 last_idle_slotcnt_siso; /* stored value snapshot */ 2926 uint32 rx_time_mimo; /* Rx MIMO raw SHM value */ 2927 uint32 last_rx_time_mimo; /* stored value snapshot */ 2928 uint32 rx_time_siso; /* RX SISO raw SHM value */ 2929 uint32 last_rx_time_siso; /* stored value snapshot */ 2930 uint32 tx_time_1chain; /* Tx 1-chain raw SHM value */ 2931 uint32 last_tx_time_1chain; /* stored value snapshot */ 2932 uint32 tx_time_2chain; /* Tx 2-chain raw SHM value */ 2933 uint32 last_tx_time_2chain; /* stored value snapshot */ 2934 uint32 tx_time_3chain; /* Tx 3-chain raw SHM value */ 2935 uint32 last_tx_time_3chain; /* stored value snapshot */ 2936 uint16 reason; /* reason for snapshot call, see below */ 2937 /* Does the call reset last values after delta calculation */ 2938 uint16 reset_last; 2939 } wl_mimo_ps_metrics_snapshot_trace_t; 2940 /* reason codes for mimo ps metrics snapshot function calls */ 2941 #define WL_MIMOPS_METRICS_SNAPSHOT_REPORT 1 2942 #define WL_MIMOPS_METRICS_SNAPSHOT_RXCHAIN_SET 2 2943 #define WL_MIMOPS_METRICS_SNAPSHOT_ARBI 3 2944 #define WL_MIMOPS_METRICS_SNAPSHOT_SLOTUPD 4 2945 #define WL_MIMOPS_METRICS_SNAPSHOT_PMBCNRX 5 2946 #define WL_MIMOPS_METRICS_SNAPSHOT_BMACINIT 6 2947 #define WL_MIMOPS_METRICS_SNAPSHOT_HT_COMPLETE 7 2948 #define WL_MIMOPS_METRICS_SNAPSHOT_OCL 8 2949 2950 #define WL_MIMO_PS_STATUS_VERSION_2 2 2951 typedef struct wl_mimo_ps_status { 2952 uint8 version; 2953 uint8 ap_cap; /* The associated AP's capability (BW, MIMO/SISO). */ 2954 uint8 association_status; /* How we are associated to the AP (MIMO/SISO). */ 2955 uint8 mimo_ps_state; /* mimo_ps_cfg states: [0-5]. See below for values */ 2956 uint8 mrc_state; /* MRC state: NONE (0), ACTIVE(1) */ 2957 uint8 bss_rxchain; /* bss rxchain bitmask */ 2958 uint8 bss_txchain; /* bss txchain bitmask */ 2959 uint8 bss_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 2960 uint16 hw_state; /* bitmask of hw state. See below for values */ 2961 uint8 hw_rxchain; /* actual HW rxchain bitmask */ 2962 uint8 hw_txchain; /* actual HW txchain bitmask */ 2963 uint8 hw_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 2964 uint8 pm_bcnrx_state; /* actual state of ucode flag */ 2965 uint8 basic_rates_present; /* internal flag to trigger siso bcmc rx */ 2966 uint8 siso_bcmc_rx_state; /* actual state of ucode flag */ 2967 } wl_mimo_ps_status_t; 2968 2969 #define WL_MIMO_PS_STATUS_VERSION_1 1 2970 typedef struct wl_mimo_ps_status_v1 { 2971 uint8 version; 2972 uint8 ap_cap; /* The associated AP's capability (BW, MIMO/SISO). */ 2973 uint8 association_status; /* How we are associated to the AP (MIMO/SISO). */ 2974 uint8 mimo_ps_state; /* mimo_ps_cfg states: [0-5]. See below for values */ 2975 uint8 mrc_state; /* MRC state: NONE (0), ACTIVE(1) */ 2976 uint8 bss_rxchain; /* bss rxchain bitmask */ 2977 uint8 bss_txchain; /* bss txchain bitmask */ 2978 uint8 bss_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 2979 uint16 hw_state; /* bitmask of hw state. See below for values */ 2980 uint8 hw_rxchain; /* actual HW rxchain bitmask */ 2981 uint8 hw_txchain; /* actual HW txchain bitmask */ 2982 uint8 hw_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 2983 uint8 pad[3]; 2984 } wl_mimo_ps_status_v1_t; 2985 2986 #define WL_MIMO_PS_STATUS_AP_CAP(ap_cap) (ap_cap & 0x0F) 2987 #define WL_MIMO_PS_STATUS_AP_CAP_BW(ap_cap) (ap_cap >> 4) 2988 #define WL_MIMO_PS_STATUS_ASSOC_BW_SHIFT 4 2989 2990 /* version 3: assoc status: low nibble is status enum, high other flags */ 2991 #define WL_MIMO_PS_STATUS_VERSION_3 3 2992 #define WL_MIMO_PS_STATUS_ASSOC_STATUS_MASK 0x0F 2993 #define WL_MIMO_PS_STATUS_ASSOC_STATUS_VHT_WITHOUT_OMN 0x80 2994 2995 /* mimo_ps_status: ap_cap/association status */ 2996 enum { 2997 WL_MIMO_PS_STATUS_ASSOC_NONE = 0, 2998 WL_MIMO_PS_STATUS_ASSOC_SISO = 1, 2999 WL_MIMO_PS_STATUS_ASSOC_MIMO = 2, 3000 WL_MIMO_PS_STATUS_ASSOC_LEGACY = 3 3001 }; 3002 3003 /* mimo_ps_status: mimo_ps_cfg states */ 3004 enum { 3005 WL_MIMO_PS_CFG_STATE_NONE = 0, 3006 WL_MIMO_PS_CFG_STATE_INFORM_AP_INPROGRESS = 1, 3007 WL_MIMO_PS_CFG_STATE_INFORM_AP_DONE = 2, 3008 WL_MIMO_PS_CFG_STATE_LEARNING = 3, 3009 WL_MIMO_PS_CFG_STATE_HW_CONFIGURE = 4, 3010 WL_MIMO_PS_CFG_STATE_INFORM_AP_PENDING = 5 3011 }; 3012 3013 /* mimo_ps_status: hw_state values */ 3014 #define WL_MIMO_PS_STATUS_HW_STATE_NONE 0 3015 #define WL_MIMO_PS_STATUS_HW_STATE_LTECOEX (0x1 << 0) 3016 #define WL_MIMO_PS_STATUS_HW_STATE_MIMOPS_BSS (0x1 << 1) 3017 #define WL_MIMO_PS_STATUS_HW_STATE_SCAN (0x1 << 3) 3018 #define WL_MIMO_PS_STATUS_HW_STATE_TXPPR (0x1 << 4) 3019 #define WL_MIMO_PS_STATUS_HW_STATE_PWRTHOTTLE (0x1 << 5) 3020 #define WL_MIMO_PS_STATUS_HW_STATE_TMPSENSE (0x1 << 6) 3021 #define WL_MIMO_PS_STATUS_HW_STATE_IOVAR (0x1 << 7) 3022 #define WL_MIMO_PS_STATUS_HW_STATE_AP_BSS (0x1 << 8) 3023 3024 /* mimo_ps_status: mrc states */ 3025 #define WL_MIMO_PS_STATUS_MRC_NONE 0 3026 #define WL_MIMO_PS_STATUS_MRC_ACTIVE 1 3027 3028 /* mimo_ps_status: core flag states for single-core beacon and siso-bcmc rx */ 3029 #define WL_MIMO_PS_STATUS_MHF_FLAG_NONE 0 3030 #define WL_MIMO_PS_STATUS_MHF_FLAG_ACTIVE 1 3031 #define WL_MIMO_PS_STATUS_MHF_FLAG_COREDOWN 2 3032 #define WL_MIMO_PS_STATUS_MHF_FLAG_INVALID 3 3033 3034 /* Type values for the REASON */ 3035 #define WL_MIMO_PS_PS_LEARNING_ABORTED (1 << 0) 3036 #define WL_MIMO_PS_PS_LEARNING_COMPLETED (1 << 1) 3037 #define WL_MIMO_PS_PS_LEARNING_ONGOING (1 << 2) 3038 3039 typedef struct wl_mimo_ps_learning_event_data { 3040 uint32 startTimeStamp; 3041 uint32 endTimeStamp; 3042 uint16 reason; 3043 struct ether_addr BSSID; 3044 uint32 totalSISO_below_rssi_threshold; 3045 uint32 totalMIMO_below_rssi_threshold; 3046 uint32 totalSISO_above_rssi_threshold; 3047 uint32 totalMIMO_above_rssi_threshold; 3048 } wl_mimo_ps_learning_event_data_t; 3049 3050 #define WL_MIMO_PS_PS_LEARNING_CFG_ABORT (1 << 0) 3051 #define WL_MIMO_PS_PS_LEARNING_CFG_STATUS (1 << 1) 3052 #define WL_MIMO_PS_PS_LEARNING_CFG_CONFIG (1 << 2) 3053 #define WL_MIMO_PS_PS_LEARNING_CFG_MASK (0x7) 3054 3055 #define WL_MIMO_PS_PS_LEARNING_CFG_V1 1 3056 3057 typedef struct wl_mimops_learning_cfg { 3058 /* flag: bit 0 for abort */ 3059 /* flag: bit 1 for status */ 3060 /* flag: bit 2 for configuring no of packets and rssi */ 3061 uint8 flag; 3062 /* mimo ps learning version, compatible version is 0 */ 3063 uint8 version; 3064 /* if version is 0 or rssi is 0, ignored */ 3065 int8 learning_rssi_threshold; 3066 uint8 reserved; 3067 uint32 no_of_packets_for_learning; 3068 wl_mimo_ps_learning_event_data_t mimops_learning_data; 3069 } wl_mimops_learning_cfg_t; 3070 3071 #define WL_OCL_STATUS_VERSION 1 3072 typedef struct ocl_status_info { 3073 uint8 version; 3074 uint8 len; 3075 uint16 fw_status; /* Bits representing FW disable reasons */ 3076 uint8 hw_status; /* Bits for actual HW config and SISO/MIMO coremask */ 3077 uint8 coremask; /* The ocl core mask (indicating listening core) */ 3078 } ocl_status_info_t; 3079 3080 /* MWS OCL map */ 3081 #define WL_MWS_OCL_OVERRIDE_VERSION 1 3082 typedef struct wl_mws_ocl_override { 3083 uint16 version; /* Structure version */ 3084 uint16 bitmap_2g; /* bitmap for 2.4G channels bits 1-13 */ 3085 uint16 bitmap_5g_lo; /* bitmap for 5G low channels by 2: 3086 *34-48, 52-56, 60-64, 100-102 3087 */ 3088 uint16 bitmap_5g_mid; /* bitmap for 5G mid channels by 2: 3089 * 104, 108-112, 116-120, 124-128, 3090 * 132-136, 140, 149-151 3091 */ 3092 uint16 bitmap_5g_high; /* bitmap for 5G high channels by 2 3093 * 153, 157-161, 165 3094 */ 3095 } wl_mws_ocl_override_t; 3096 3097 /* Bits for fw_status */ 3098 #define OCL_DISABLED_HOST 0x01 /* Host has disabled through ocl_enable */ 3099 #define OCL_DISABLED_RSSI 0x02 /* Disabled because of ocl_rssi_threshold */ 3100 #define OCL_DISABLED_LTEC 0x04 /* Disabled due to LTE Coex activity */ 3101 #define OCL_DISABLED_SISO 0x08 /* Disabled while in SISO mode */ 3102 #define OCL_DISABLED_CAL 0x10 /* Disabled during active calibration */ 3103 #define OCL_DISABLED_CHANSWITCH 0x20 /* Disabled during active channel switch */ 3104 #define OCL_DISABLED_ASPEND 0x40 /* Disabled due to assoc pending */ 3105 3106 /* Bits for hw_status */ 3107 #define OCL_HWCFG 0x01 /* State of OCL config bit in phy HW */ 3108 #define OCL_HWMIMO 0x02 /* Set if current coremask is > 1 bit */ 3109 #define OCL_COREDOWN 0x80 /* Set if core is currently down */ 3110 3111 #define WL_OPS_CFG_VERSION_1 1 3112 /* Common IOVAR struct */ 3113 typedef struct wl_ops_cfg_v1 { 3114 uint16 version; 3115 uint16 len; /* total length includes fixed fields and variable data[] */ 3116 uint16 subcmd_id; /* subcommand id */ 3117 uint16 padding; /* reserved / padding for 4 byte align */ 3118 uint8 data[]; /* subcommand data; could be empty */ 3119 } wl_ops_cfg_v1_t; 3120 3121 /* subcommands ids */ 3122 enum { 3123 WL_OPS_CFG_SUBCMD_ENABLE = 0, /* OPS enable/disable mybss and obss 3124 * for nav and plcp options 3125 */ 3126 WL_OPS_CFG_SUBCMD_MAX_SLEEP_DUR = 1, /* Max sleep duration used for OPS */ 3127 WL_OPS_CFG_SUBCMD_RESET_STATS = 2 /* Reset stats part of ops_status 3128 * on both slices 3129 */ 3130 }; 3131 3132 #define WL_OPS_CFG_MASK 0xffff 3133 #define WL_OPS_CFG_CAP_MASK 0xffff0000 3134 #define WL_OPS_CFG_CAP_SHIFT 16 /* Shift bits to locate the OPS CAP */ 3135 #define WL_OPS_MAX_SLEEP_DUR 12500 /* max ops duration in us */ 3136 #define WL_OPS_MINOF_MAX_SLEEP_DUR 512 /* minof max ops duration in us */ 3137 #define WL_OPS_SUPPORTED_CFG (WL_OPS_MYBSS_PLCP_DUR | WL_OPS_MYBSS_NAV_DUR \ 3138 | WL_OPS_OBSS_PLCP_DUR | WL_OPS_OBSS_NAV_DUR) 3139 #define WL_OPS_DEFAULT_CFG WL_OPS_SUPPORTED_CFG 3140 3141 /* WL_OPS_CFG_SUBCMD_ENABLE */ 3142 typedef struct wl_ops_cfg_enable { 3143 uint32 bits; /* selectively enable ops for mybss and obss */ 3144 } wl_ops_cfg_enable_t; 3145 /* Bits for WL_OPS_CFG_SUBCMD_ENABLE Parameter */ 3146 #define WL_OPS_MYBSS_PLCP_DUR 0x1 /* OPS based on mybss 11b & 11n mixed HT frames 3147 * PLCP header duration 3148 */ 3149 #define WL_OPS_MYBSS_NAV_DUR 0x2 /* OPS based on mybss RTS-CTS duration */ 3150 #define WL_OPS_OBSS_PLCP_DUR 0x4 /* OPS based on obss 11b & 11n mixed HT frames 3151 * PLCP header duration 3152 */ 3153 #define WL_OPS_OBSS_NAV_DUR 0x8 /* OPS based on obss RTS-CTS duration */ 3154 3155 /* WL_OPS_CFG_SUBCMD_MAX_SLEEP_DUR */ 3156 typedef struct wl_ops_cfg_max_sleep_dur { 3157 uint32 val; /* maximum sleep duration (us) used for OPS */ 3158 } wl_ops_cfg_max_sleep_dur_t; 3159 3160 /* WL_OPS_CFG_SUBCMD_RESET_STATS */ 3161 typedef struct wl_ops_cfg_reset_stats { 3162 uint32 val; /* bitmap of slices, 0 means all slices */ 3163 } wl_ops_cfg_reset_stats_t; 3164 3165 #define WL_OPS_STATUS_VERSION_1 1 3166 #define OPS_DUR_HIST_BINS 5 /* number of bins used, 0-1, 1-2, 2-4, 4-8, >8 msec */ 3167 typedef struct wl_ops_status_v1 { 3168 uint16 version; 3169 uint16 len; /* Total length including all fixed fields */ 3170 uint8 slice_index; /* Slice for which status is reported */ 3171 uint8 disable_obss; /* indicate if obss cfg is disabled */ 3172 uint8 pad[2]; /* 4-byte alignment */ 3173 uint32 disable_reasons; /* FW disable reasons */ 3174 uint32 disable_duration; /* ops disable time(ms) due to disable reasons */ 3175 uint32 applied_ops_config; /* currently applied ops config */ 3176 uint32 partial_ops_dur; /* Total time (in usec) of partial ops duration */ 3177 uint32 full_ops_dur; /* Total time (in usec) of full ops duration */ 3178 uint32 count_dur_hist[OPS_DUR_HIST_BINS]; /* ops occurrence histogram */ 3179 uint32 nav_cnt; /* number of times ops triggered based NAV duration */ 3180 uint32 plcp_cnt; /* number of times ops triggered based PLCP duration */ 3181 uint32 mybss_cnt; /* number of times mybss ops trigger */ 3182 uint32 obss_cnt; /* number of times obss ops trigger */ 3183 uint32 miss_dur_cnt; /* number of times ops couldn't happen 3184 * due to insufficient duration 3185 */ 3186 uint32 miss_premt_cnt; /* number of times ops couldn't happen due 3187 * to not meeting Phy preemption thresh 3188 */ 3189 uint32 max_dur_cnt; /* number of times ops did not trigger due to 3190 * frames exceeding max sleep duration 3191 */ 3192 uint32 wake_cnt; /* number of ops miss due to wake reason */ 3193 uint32 bcn_wait_cnt; /* number of ops miss due to waiting for bcn */ 3194 } wl_ops_status_v1_t; 3195 /* Bits for disable_reasons */ 3196 #define OPS_DISABLED_HOST 0x01 /* Host has disabled through ops_cfg */ 3197 #define OPS_DISABLED_UNASSOC 0x02 /* Disabled because the slice is in unassociated state */ 3198 #define OPS_DISABLED_SCAN 0x04 /* Disabled because the slice is in scan state */ 3199 #define OPS_DISABLED_BCN_MISS 0x08 /* Disabled because beacon missed for a duration */ 3200 3201 #define WL_PSBW_CFG_VERSION_1 1 3202 /* Common IOVAR struct */ 3203 typedef struct wl_psbw_cfg_v1 { 3204 uint16 version; 3205 uint16 len; /* total length includes fixed fields and variable data[] */ 3206 uint16 subcmd_id; /* subcommand id */ 3207 uint16 pad; /* reserved / padding for 4 byte align */ 3208 uint8 data[]; /* subcommand data */ 3209 } wl_psbw_cfg_v1_t; 3210 3211 /* subcommands ids */ 3212 enum { 3213 /* PSBW enable/disable */ 3214 WL_PSBW_CFG_SUBCMD_ENABLE = 0, 3215 /* override psbw disable requests */ 3216 WL_PSBW_CFG_SUBCMD_OVERRIDE_DISABLE_MASK = 1, 3217 /* Reset stats part of psbw status */ 3218 WL_PSBW_CFG_SUBCMD_RESET_STATS = 2 3219 }; 3220 3221 #define WL_PSBW_OVERRIDE_DISA_CFG_MASK 0x0000ffff 3222 #define WL_PSBW_OVERRIDE_DISA_CAP_MASK 0xffff0000 3223 #define WL_PSBW_OVERRIDE_DISA_CAP_SHIFT 16 /* shift bits for cap */ 3224 3225 /* WL_PSBW_CFG_SUBCMD_ENABLE */ 3226 typedef struct wl_psbw_cfg_enable { 3227 bool enable; /* enable or disable */ 3228 } wl_psbw_cfg_enable_t; 3229 3230 /* WL_PSBW_CFG_SUBCMD_OVERRIDE_DISABLE_MASK */ 3231 typedef struct wl_psbw_cfg_override_disable_mask { 3232 uint32 mask; /* disable requests to override, cap and current cfg */ 3233 } wl_psbw_cfg_override_disable_mask_t; 3234 3235 /* WL_PSBW_CFG_SUBCMD_RESET_STATS */ 3236 typedef struct wl_psbw_cfg_reset_stats { 3237 uint32 val; /* infra interface index, 0 */ 3238 } wl_psbw_cfg_reset_stats_t; 3239 3240 #define WL_PSBW_STATUS_VERSION_1 1 3241 typedef struct wl_psbw_status_v1 { 3242 uint16 version; 3243 uint16 len; /* total length including all fixed fields */ 3244 uint8 curr_slice_index; /* current slice index of the interface */ 3245 uint8 associated; /* interface associatd */ 3246 chanspec_t chspec; /* radio chspec */ 3247 uint32 state; /* psbw state */ 3248 uint32 disable_reasons; /* FW disable reasons */ 3249 uint32 slice_enable_dur; /* time(ms) psbw remains enabled on this slice */ 3250 uint32 total_enable_dur; /* time(ms) psbw remains enabled total */ 3251 uint32 enter_cnt; /* total cnt entering PSBW active */ 3252 uint32 exit_cnt; /* total cnt exiting PSBW active */ 3253 uint32 exit_imd_cnt; /* total cnt imd exit when waited N tbtts */ 3254 uint32 enter_skip_cnt; /* total cnt entering PSBW active skipped */ 3255 } wl_psbw_status_v1_t; 3256 3257 /* Bit for state */ 3258 #define PSBW_ACTIVE 0x1 /* active 20MHz */ 3259 #define PSBW_TTTT_PEND 0x2 /* waiting for TTTT intr */ 3260 #define PSBW_WAIT_ENTER 0x4 /* in wait period before entering */ 3261 #define PSBW_CAL_DONE 0x8 /* 20M channel cal done */ 3262 3263 /* Bits for disable_reasons */ 3264 #define WL_PSBW_DISA_HOST 0x00000001 /* Host has disabled through psbw_cfg */ 3265 #define WL_PSBW_DISA_AP20M 0x00000002 /* AP is operating on 20 MHz */ 3266 #define WL_PSBW_DISA_SLOTTED_BSS 0x00000004 /* slot_bss active */ 3267 #define WL_PSBW_DISA_NOT_PMFAST 0x00000008 /* Not PM_FAST */ 3268 #define WL_PSBW_DISA_BASICRATESET 0x00000010 /* BasicRateSet is empty */ 3269 #define WL_PSBW_DISA_NOT_D3 0x00000020 /* PCIe not in D3 */ 3270 #define WL_PSBW_DISA_CSA 0x00000040 /* CSA IE is present */ 3271 #define WL_PSBW_DISA_ASSOC 0x00000080 /* assoc state is active/or unassoc */ 3272 #define WL_PSBW_DISA_SCAN 0x00000100 /* scan state is active */ 3273 #define WL_PSBW_DISA_CAL 0x00000200 /* cal pending or active */ 3274 /* following are not part of disable reasons */ 3275 #define WL_PSBW_EXIT_PM 0x00001000 /* Out of PM */ 3276 #define WL_PSBW_EXIT_TIM 0x00002000 /* unicast TIM bit present */ 3277 #define WL_PSBW_EXIT_DATA 0x00004000 /* Data for transmission */ 3278 #define WL_PSBW_EXIT_MGMTDATA 0x00008000 /* management frame for transmission */ 3279 #define WL_PSBW_EXIT_BW_UPD 0x00010000 /* BW being updated */ 3280 #define WL_PSBW_DISA_NONE 0x80000000 /* reserved for internal use only */ 3281 3282 /* 3283 * Join preference iovar value is an array of tuples. Each tuple has a one-byte type, 3284 * a one-byte length, and a variable length value. RSSI type tuple must be present 3285 * in the array. 3286 * 3287 * Types are defined in "join preference types" section. 3288 * 3289 * Length is the value size in octets. It is reserved for WL_JOIN_PREF_WPA type tuple 3290 * and must be set to zero. 3291 * 3292 * Values are defined below. 3293 * 3294 * 1. RSSI - 2 octets 3295 * offset 0: reserved 3296 * offset 1: reserved 3297 * 3298 * 2. WPA - 2 + 12 * n octets (n is # tuples defined below) 3299 * offset 0: reserved 3300 * offset 1: # of tuples 3301 * offset 2: tuple 1 3302 * offset 14: tuple 2 3303 * ... 3304 * offset 2 + 12 * (n - 1) octets: tuple n 3305 * 3306 * struct wpa_cfg_tuple { 3307 * uint8 akm[DOT11_OUI_LEN+1]; akm suite 3308 * uint8 ucipher[DOT11_OUI_LEN+1]; unicast cipher suite 3309 * uint8 mcipher[DOT11_OUI_LEN+1]; multicast cipher suite 3310 * }; 3311 * 3312 * multicast cipher suite can be specified as a specific cipher suite or WL_WPA_ACP_MCS_ANY. 3313 * 3314 * 3. BAND - 2 octets 3315 * offset 0: reserved 3316 * offset 1: see "band preference" and "band types" 3317 * 3318 * 4. BAND RSSI - 2 octets 3319 * offset 0: band types 3320 * offset 1: +ve RSSI boost value in dB 3321 */ 3322 3323 struct tsinfo_arg { 3324 uint8 octets[3]; 3325 }; 3326 3327 #define RATE_CCK_1MBPS 0 3328 #define RATE_CCK_2MBPS 1 3329 #define RATE_CCK_5_5MBPS 2 3330 #define RATE_CCK_11MBPS 3 3331 3332 #define RATE_LEGACY_OFDM_6MBPS 0 3333 #define RATE_LEGACY_OFDM_9MBPS 1 3334 #define RATE_LEGACY_OFDM_12MBPS 2 3335 #define RATE_LEGACY_OFDM_18MBPS 3 3336 #define RATE_LEGACY_OFDM_24MBPS 4 3337 #define RATE_LEGACY_OFDM_36MBPS 5 3338 #define RATE_LEGACY_OFDM_48MBPS 6 3339 #define RATE_LEGACY_OFDM_54MBPS 7 3340 3341 #define WL_BSSTRANS_RSSI_RATE_MAP_VERSION 1 3342 #define WL_BSSTRANS_RSSI_RATE_MAP_VERSION_V1 1 3343 #define WL_BSSTRANS_RSSI_RATE_MAP_VERSION_V2 2 3344 3345 typedef struct wl_bsstrans_rssi { 3346 int8 rssi_2g; /**< RSSI in dbm for 2.4 G */ 3347 int8 rssi_5g; /**< RSSI in dbm for 5G, unused for cck */ 3348 } wl_bsstrans_rssi_t; 3349 3350 #define RSSI_RATE_MAP_MAX_STREAMS 4 /**< max streams supported */ 3351 3352 /** RSSI to rate mapping, all 20Mhz, no SGI */ 3353 typedef struct wl_bsstrans_rssi_rate_map_v2 { 3354 uint16 ver; 3355 uint16 len; /**< length of entire structure */ 3356 wl_bsstrans_rssi_t cck[WL_NUM_RATES_CCK]; /**< 2.4G only */ 3357 wl_bsstrans_rssi_t ofdm[WL_NUM_RATES_OFDM]; /**< 6 to 54mbps */ 3358 wl_bsstrans_rssi_t phy_n[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_MCS_1STREAM]; /* MCS0-7 */ 3359 wl_bsstrans_rssi_t phy_ac[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_VHT_ALL]; /**< MCS0-11 */ 3360 wl_bsstrans_rssi_t phy_ax[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_HE]; /**< MCS0-11 */ 3361 } wl_bsstrans_rssi_rate_map_v2_t; 3362 3363 /** RSSI to rate mapping, all 20Mhz, no SGI */ 3364 typedef struct wl_bsstrans_rssi_rate_map_v1 { 3365 uint16 ver; 3366 uint16 len; /**< length of entire structure */ 3367 wl_bsstrans_rssi_t cck[WL_NUM_RATES_CCK]; /**< 2.4G only */ 3368 wl_bsstrans_rssi_t ofdm[WL_NUM_RATES_OFDM]; /**< 6 to 54mbps */ 3369 wl_bsstrans_rssi_t phy_n[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_MCS_1STREAM]; /* MCS0-7 */ 3370 wl_bsstrans_rssi_t phy_ac[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_VHT]; /**< MCS0-9 */ 3371 } wl_bsstrans_rssi_rate_map_v1_t; 3372 3373 /** RSSI to rate mapping, all 20Mhz, no SGI */ 3374 typedef struct wl_bsstrans_rssi_rate_map { 3375 uint16 ver; 3376 uint16 len; /**< length of entire structure */ 3377 wl_bsstrans_rssi_t cck[WL_NUM_RATES_CCK]; /**< 2.4G only */ 3378 wl_bsstrans_rssi_t ofdm[WL_NUM_RATES_OFDM]; /**< 6 to 54mbps */ 3379 wl_bsstrans_rssi_t phy_n[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_MCS_1STREAM]; /* MCS0-7 */ 3380 wl_bsstrans_rssi_t phy_ac[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_VHT]; /**< MCS0-9 */ 3381 } wl_bsstrans_rssi_rate_map_t; 3382 3383 #define WL_BSSTRANS_ROAMTHROTTLE_VERSION 1 3384 3385 /** Configure number of scans allowed per throttle period */ 3386 typedef struct wl_bsstrans_roamthrottle { 3387 uint16 ver; 3388 uint16 period; 3389 uint16 scans_allowed; 3390 } wl_bsstrans_roamthrottle_t; 3391 3392 #define NFIFO 6 /**< # tx/rx fifopairs */ 3393 3394 #ifndef NFIFO_EXT 3395 #if defined(BCM_AQM_DMA_DESC) && !defined(BCM_AQM_DMA_DESC_DISABLED) 3396 #define NFIFO_EXT 10 /* 4EDCA + 4 TWT + 1 Mcast/Bcast + 1 Spare */ 3397 #elif defined(WL11AX_TRIGGERQ) && !defined(WL11AX_TRIGGERQ_DISABLED) 3398 #define NFIFO_EXT 10 3399 #else 3400 #define NFIFO_EXT NFIFO 3401 #endif /* BCM_AQM_DMA_DESC && !BCM_AQM_DMA_DESC_DISABLED */ 3402 #endif /* NFIFO_EXT */ 3403 3404 /* When new reason codes are added to list, Please update wl_reinit_names also */ 3405 /* Reinit reason codes */ 3406 enum { 3407 WL_REINIT_RC_NONE = 0, 3408 WL_REINIT_RC_PS_SYNC = 1, 3409 WL_REINIT_RC_PSM_WD = 2, 3410 WL_REINIT_RC_MAC_WAKE = 3, 3411 WL_REINIT_RC_MAC_SUSPEND = 4, 3412 WL_REINIT_RC_MAC_SPIN_WAIT = 5, 3413 WL_REINIT_RC_AXI_BUS_ERROR = 6, 3414 WL_REINIT_RC_DEVICE_REMOVED = 7, 3415 WL_REINIT_RC_PCIE_FATAL_ERROR = 8, 3416 WL_REINIT_RC_OL_FW_TRAP = 9, 3417 WL_REINIT_RC_FIFO_ERR = 10, 3418 WL_REINIT_RC_INV_TX_STATUS = 11, 3419 WL_REINIT_RC_MQ_ERROR = 12, 3420 WL_REINIT_RC_PHYTXERR_THRESH = 13, 3421 WL_REINIT_RC_USER_FORCED = 14, 3422 WL_REINIT_RC_FULL_RESET = 15, 3423 WL_REINIT_RC_AP_BEACON = 16, 3424 WL_REINIT_RC_PM_EXCESSED = 17, 3425 WL_REINIT_RC_NO_CLK = 18, 3426 WL_REINIT_RC_SW_ASSERT = 19, 3427 WL_REINIT_RC_PSM_JMP0 = 20, 3428 WL_REINIT_RC_PSM_RUN = 21, 3429 WL_REINIT_RC_ENABLE_MAC = 22, 3430 WL_REINIT_RC_SCAN_TIMEOUT = 23, 3431 WL_REINIT_RC_JOIN_TIMEOUT = 24, 3432 /* Below error codes are generated during D3 exit validation */ 3433 WL_REINIT_RC_LINK_NOT_ACTIVE = 25, 3434 WL_REINIT_RC_PCI_CFG_RD_FAIL = 26, 3435 WL_REINIT_RC_INV_VEN_ID = 27, 3436 WL_REINIT_RC_INV_DEV_ID = 28, 3437 WL_REINIT_RC_INV_BAR0 = 29, 3438 WL_REINIT_RC_INV_BAR2 = 30, 3439 WL_REINIT_RC_AER_UC_FATAL = 31, 3440 WL_REINIT_RC_AER_UC_NON_FATAL = 32, 3441 WL_REINIT_RC_AER_CORR = 33, 3442 WL_REINIT_RC_AER_DEV_STS = 34, 3443 WL_REINIT_RC_PCIe_STS = 35, 3444 WL_REINIT_RC_MMIO_RD_FAIL = 36, 3445 WL_REINIT_RC_MMIO_RD_INVAL = 37, 3446 WL_REINIT_RC_MMIO_ARM_MEM_RD_FAIL = 38, 3447 WL_REINIT_RC_MMIO_ARM_MEM_INVAL = 39, 3448 WL_REINIT_RC_SROM_LOAD_FAILED = 40, 3449 WL_REINIT_RC_PHY_CRASH = 41, 3450 WL_REINIT_TX_STALL = 42, 3451 WL_REINIT_RC_TX_FLOW_CONTROL_BLOCKED = 43, 3452 WL_REINIT_RC_RX_HC_FAIL = 44, 3453 WL_REINIT_RC_RX_DMA_STALL = 45, 3454 WL_REINIT_UTRACE_BUF_OVERLAP_SR = 46, 3455 WL_REINIT_UTRACE_TPL_OUT_BOUNDS = 47, 3456 WL_REINIT_UTRACE_TPL_OSET_STRT0 = 48, 3457 WL_REINIT_RC_PHYTXERR = 49, 3458 WL_REINIT_RC_PSM_FATAL_SUSP = 50, 3459 WL_REINIT_RC_TX_FIFO_SUSP = 51, 3460 WL_REINIT_RC_MAC_ENABLE = 52, 3461 WL_REINIT_RC_SCAN_STALLED = 53, 3462 WL_REINIT_RC_PHY_HC = 54, 3463 WL_REINIT_RC_LAST /* This must be the last entry */ 3464 }; 3465 3466 #define WL_REINIT_RC_INVALID 255 3467 3468 #define NREINITREASONCOUNT 8 3469 /* NREINITREASONCOUNT is 8 in other branches. 3470 * Any change to this will break wl tool compatibility with other branches 3471 * #define NREINITREASONCOUNT WL_REINIT_RC_LAST 3472 */ 3473 3474 #define REINITRSNIDX(_x) (((_x) < WL_REINIT_RC_LAST) ? (_x) : 0) 3475 3476 #define WL_CNT_T_VERSION 30 /**< current version of wl_cnt_t struct */ 3477 #define WL_CNT_VERSION_6 6 3478 #define WL_CNT_VERSION_7 7 3479 #define WL_CNT_VERSION_11 11 3480 #define WL_CNT_VERSION_XTLV 30 3481 3482 #define WL_COUNTERS_IOV_VERSION_1 1 3483 #define WL_SUBCNTR_IOV_VER WL_COUNTERS_IOV_VERSION_1 3484 /* First two uint16 are version and lenght fields. So offset of the first counter will be 4 */ 3485 #define FIRST_COUNTER_OFFSET 0x04 3486 3487 /* need for now due to src/wl/ndis automerged to other branches. e.g. BISON */ 3488 #define WLC_WITH_XTLV_CNT 3489 3490 /* Number of xtlv info as required to calculate subcounter offsets */ 3491 #define WL_CNT_XTLV_ID_NUM 12 3492 #define WL_TLV_IOV_VER 1 3493 3494 /** 3495 * tlv IDs uniquely identifies counter component 3496 * packed into wl_cmd_t container 3497 */ 3498 enum wl_cnt_xtlv_id { 3499 WL_CNT_XTLV_SLICE_IDX = 0x1, /**< Slice index */ 3500 WL_CNT_XTLV_WLC = 0x100, /**< WLC layer counters */ 3501 WL_CNT_XTLV_WLC_RINIT_RSN = 0x101, /**< WLC layer reinitreason extension */ 3502 WL_CNT_XTLV_WLC_HE = 0x102, /* he counters */ 3503 WL_CNT_XTLV_WLC_SECVLN = 0x103, /* security vulnerabilities counters */ 3504 WL_CNT_XTLV_WLC_HE_OMI = 0x104, /* he omi counters */ 3505 WL_CNT_XTLV_CNTV_LE10_UCODE = 0x200, /**< wl counter ver < 11 UCODE MACSTAT */ 3506 WL_CNT_XTLV_LT40_UCODE_V1 = 0x300, /**< corerev < 40 UCODE MACSTAT */ 3507 WL_CNT_XTLV_GE40_UCODE_V1 = 0x400, /**< corerev >= 40 UCODE MACSTAT */ 3508 WL_CNT_XTLV_GE64_UCODEX_V1 = 0x800, /* corerev >= 64 UCODEX MACSTAT */ 3509 WL_CNT_XTLV_GE80_UCODE_V1 = 0x900, /* corerev >= 80 UCODEX MACSTAT */ 3510 WL_CNT_XTLV_GE80_TXFUNFL_UCODE_V1 = 0x1000 /* corerev >= 80 UCODEX MACSTAT */ 3511 }; 3512 3513 /* tlv IDs uniquely identifies periodic state component */ 3514 enum wl_periodic_slice_state_xtlv_id { 3515 WL_STATE_COMPACT_COUNTERS = 0x1, 3516 WL_STATE_TXBF_COUNTERS = 0x2, 3517 WL_STATE_COMPACT_HE_COUNTERS = 0x3 3518 }; 3519 3520 /* Sub tlvs for chan_counters */ 3521 enum wl_periodic_chan_xtlv_id { 3522 WL_CHAN_GENERIC_COUNTERS = 0x1, 3523 WL_CHAN_PERIODIC_COUNTERS = 0x2 3524 }; 3525 3526 #ifdef WLC_CHAN_ECNTR_TEST 3527 #define WL_CHAN_PERIODIC_CNTRS_VER_1 1 3528 typedef struct wlc_chan_periodic_cntr 3529 { 3530 uint16 version; 3531 uint16 pad; 3532 uint32 rxstrt; 3533 } wlc_chan_periodic_cntr_t; 3534 #endif /* WLC_CHAN_ECNTR_TEST */ 3535 3536 #define WL_CHANCNTR_HDR_VER_1 1 3537 typedef struct wlc_chan_cntr_hdr_v1 3538 { 3539 uint16 version; 3540 uint16 pad; 3541 chanspec_t chanspec; /* Dont add any fields above this */ 3542 uint16 pad1; 3543 uint32 total_time; 3544 uint32 chan_entry_cnt; 3545 } wlc_chan_cntr_hdr_v1_t; 3546 3547 /* tlv IDs uniquely identifies periodic state component */ 3548 enum wl_periodic_if_state_xtlv_id { 3549 WL_STATE_IF_COMPACT_STATE = 0x1, 3550 WL_STATE_IF_ADPS_STATE = 0x02 3551 }; 3552 3553 enum wl_periodic_tdls_if_state_xtlv_id { 3554 WL_STATE_IF_TDLS_STATE = 0x1 3555 }; 3556 3557 #define TDMTX_CNT_VERSION_V1 1 3558 #define TDMTX_CNT_VERSION_V2 2 3559 3560 /* structure holding tdm counters that interface to iovar */ 3561 typedef struct tdmtx_cnt_v1 { 3562 uint16 ver; 3563 uint16 length; /* length of this structure */ 3564 uint16 wlc_idx; /* index for wlc */ 3565 uint16 enabled; /* tdmtx is enabled on slice */ 3566 uint32 tdmtx_txa_on; /* TXA on requests */ 3567 uint32 tdmtx_txa_tmcnt; /* Total number of TXA timeout */ 3568 uint32 tdmtx_por_on; /* TXA POR requests */ 3569 uint32 tdmtx_txpuen; /* Path enable requests */ 3570 uint32 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 3571 uint32 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 3572 uint32 tdmtx_txdefer; /* Total number of times Tx was deferred on the slice */ 3573 uint32 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 3574 uint32 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 3575 uint32 tdmtx_txa_dur; /* Total time txa on */ 3576 uint32 tdmtx_txpri_dur; /* Total time TXPri */ 3577 uint32 tdmtx_txdefer_dur; /* Total time txdefer */ 3578 /* TDMTX input fields */ 3579 uint32 tdmtx_txpri; 3580 uint32 tdmtx_defer; 3581 uint32 tdmtx_threshold; 3582 uint32 tdmtx_rssi_threshold; 3583 uint32 tdmtx_txpwrboff; 3584 uint32 tdmtx_txpwrboff_dt; 3585 } tdmtx_cnt_v1_t; 3586 3587 typedef struct { 3588 uint16 ver; 3589 uint16 length; /* length of the data portion */ 3590 uint16 cnt; 3591 uint16 pad; /* pad to align to 32 bit */ 3592 uint8 data[]; /* array of tdmtx_cnt_v1_t */ 3593 } tdmtx_status_t; 3594 3595 /* structure holding counters that match exactly shm field sizes */ 3596 typedef struct tdmtx_cnt_shm_v1 { 3597 uint16 tdmtx_txa_on; /* TXA on requests */ 3598 uint16 tdmtx_tmcnt; /* TXA on requests */ 3599 uint16 tdmtx_por_on; /* TXA POR requests */ 3600 uint16 tdmtx_txpuen; /* Path enable requests */ 3601 uint16 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 3602 uint16 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 3603 uint16 tdmtx_txdefer; /* Total number of times Tx was defered by the slice */ 3604 uint16 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 3605 uint16 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 3606 uint16 tdmtx_txa_dur_l; /* Total time (low 16 bits) txa on */ 3607 uint16 tdmtx_txa_dur_h; /* Total time (low 16 bits) txa on */ 3608 uint16 tdmtx_txpri_dur_l; /* Total time (low 16 bits) TXPri */ 3609 uint16 tdmtx_txpri_dur_h; /* Total time (high 16 bits) TXPri */ 3610 uint16 tdmtx_txdefer_dur_l; /* Total time (low 16 bits) txdefer */ 3611 uint16 tdmtx_txdefer_dur_h; /* Total time (high 16 bits) txdefer */ 3612 } tdmtx_cnt_shm_v1_t; 3613 3614 /* structure holding tdm counters that interface to iovar for version 2 */ 3615 typedef struct tdmtx_cnt_v2 { 3616 uint16 ver; 3617 uint16 length; /* length of this structure */ 3618 uint16 wlc_idx; /* index for wlc */ 3619 uint16 enabled; /* tdmtx is enabled on slice */ 3620 uint32 tdmtx_txa_on; /* TXA on requests */ 3621 uint32 tdmtx_txa_tmcnt; /* Total number of TXA timeout */ 3622 uint32 tdmtx_porhi_on; /* TXA PORHI requests */ 3623 uint32 tdmtx_porlo_on; /* TXA PORLO requests */ 3624 uint32 tdmtx_txpuen; /* Path enable requests */ 3625 uint32 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 3626 uint32 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 3627 uint32 tdmtx_txdefer; /* Total number of times Tx was deferred on the slice */ 3628 uint32 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 3629 uint32 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 3630 uint32 tdmtx_txa_dur; /* Total time txa on */ 3631 uint32 tdmtx_txpri_dur; /* Total time TXPri */ 3632 uint32 tdmtx_txdefer_dur; /* Total time txdefer */ 3633 /* TDMTX input fields */ 3634 uint32 tdmtx_txpri; 3635 uint32 tdmtx_defer; 3636 uint32 tdmtx_threshold; 3637 uint32 tdmtx_rssi_threshold; 3638 uint32 tdmtx_txpwrboff; 3639 uint32 tdmtx_txpwrboff_dt; 3640 } tdmtx_cnt_v2_t; 3641 3642 /* structure holding counters that match exactly shm field sizes */ 3643 typedef struct tdmtx_cnt_shm_v2 { 3644 uint16 tdmtx_txa_on; /* TXA on requests */ 3645 uint16 tdmtx_tmcnt; /* TXA on requests */ 3646 uint16 tdmtx_porhi_on; /* TXA PORHI requests */ 3647 uint16 tdmtx_porlo_on; /* TXA PORLO requests */ 3648 uint16 tdmtx_txpuen; /* Path enable requests */ 3649 uint16 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 3650 uint16 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 3651 uint16 tdmtx_txdefer; /* Total number of times Tx was defered by the slice */ 3652 uint16 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 3653 uint16 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 3654 uint16 tdmtx_txa_dur_l; /* Total time (low 16 bits) txa on */ 3655 uint16 tdmtx_txa_dur_h; /* Total time (low 16 bits) txa on */ 3656 uint16 tdmtx_txpri_dur_l; /* Total time (low 16 bits) TXPri */ 3657 uint16 tdmtx_txpri_dur_h; /* Total time (high 16 bits) TXPri */ 3658 uint16 tdmtx_txdefer_dur_l; /* Total time (low 16 bits) txdefer */ 3659 uint16 tdmtx_txdefer_dur_h; /* Total time (high 16 bits) txdefer */ 3660 } tdmtx_cnt_shm_v2_t; 3661 3662 typedef struct wl_tdmtx_ioc { 3663 uint16 id; /* ID of the sub-command */ 3664 uint16 len; /* total length of all data[] */ 3665 uint8 data[]; /* var len payload */ 3666 } wl_tdmtx_ioc_t; 3667 3668 /* 3669 * iovar subcommand ids 3670 */ 3671 enum { 3672 IOV_TDMTX_ENB = 1, 3673 IOV_TDMTX_STATUS = 2, 3674 IOV_TDMTX_TXPRI = 3, 3675 IOV_TDMTX_DEFER = 4, 3676 IOV_TDMTX_TXA = 5, 3677 IOV_TDMTX_CFG = 6, 3678 IOV_TDMTX_LAST 3679 }; 3680 3681 /** 3682 * The number of variables in wl macstat cnt struct. 3683 * (wl_cnt_ge40mcst_v1_t, wl_cnt_lt40mcst_v1_t, wl_cnt_v_le10_mcst_t) 3684 */ 3685 #define WL_CNT_MCST_VAR_NUM 64 3686 /* sizeof(wl_cnt_ge40mcst_v1_t), sizeof(wl_cnt_lt40mcst_v1_t), and sizeof(wl_cnt_v_le10_mcst_t) */ 3687 #define WL_CNT_MCST_STRUCT_SZ ((uint32)sizeof(uint32) * WL_CNT_MCST_VAR_NUM) 3688 #define WL_CNT_REV80_MCST_STRUCT_SZ ((uint32)sizeof(wl_cnt_ge80mcst_v1_t)) 3689 #define WL_CNT_REV80_MCST_TXFUNFlW_STRUCT_FIXED_SZ \ 3690 ((uint32)OFFSETOF(wl_cnt_ge80_txfunfl_v1_t, txfunfl)) 3691 #define WL_CNT_REV80_MCST_TXFUNFl_STRUCT_SZ(fcnt) \ 3692 (WL_CNT_REV80_MCST_TXFUNFlW_STRUCT_FIXED_SZ + (fcnt * sizeof(uint32))) 3693 #define WL_CNT_REV80_MCST_TXFUNFlW_STRUCT_SZ (WL_CNT_REV80_MCST_TXFUNFl_STRUCT_SZ(NFIFO_EXT)) 3694 3695 #define WL_CNT_MCXST_STRUCT_SZ ((uint32)sizeof(wl_cnt_ge64mcxst_v1_t)) 3696 3697 #define WL_CNT_HE_STRUCT_SZ ((uint32)sizeof(wl_he_cnt_wlc_t)) 3698 3699 #define WL_CNT_SECVLN_STRUCT_SZ ((uint32)sizeof(wl_secvln_cnt_t)) 3700 3701 #define WL_CNT_HE_OMI_STRUCT_SZ ((uint32)sizeof(wl_he_omi_cnt_wlc_v1_t)) 3702 #define INVALID_CNT_VAL (uint32)(-1) 3703 3704 #define WL_XTLV_CNTBUF_MAX_SIZE ((uint32)(OFFSETOF(wl_cnt_info_t, data)) + \ 3705 (uint32)BCM_XTLV_HDR_SIZE + (uint32)sizeof(wl_cnt_wlc_t) + \ 3706 (uint32)BCM_XTLV_HDR_SIZE + WL_CNT_MCST_STRUCT_SZ + \ 3707 (uint32)BCM_XTLV_HDR_SIZE + WL_CNT_MCXST_STRUCT_SZ) 3708 3709 #define WL_CNTBUF_MAX_SIZE MAX(WL_XTLV_CNTBUF_MAX_SIZE, (uint32)sizeof(wl_cnt_ver_11_t)) 3710 3711 /* Please refer to the twiki for counters addition/deletion. 3712 * http://hwnbu-twiki.sj.broadcom.com/bin/view/Mwgroup/WlCounters#Counter_Edition 3713 */ 3714 3715 /** Top structure of counters IOVar buffer */ 3716 typedef struct { 3717 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 3718 uint16 datalen; /**< length of data including all paddings. */ 3719 uint8 data []; /**< variable length payload: 3720 * 1 or more bcm_xtlv_t type of tuples. 3721 * each tuple is padded to multiple of 4 bytes. 3722 * 'datalen' field of this structure includes all paddings. 3723 */ 3724 } wl_cnt_info_t; 3725 3726 /* Top structure of subcounters IOVar buffer 3727 * Whenever we make any change in this structure 3728 * WL_SUBCNTR_IOV_VER should be updated accordingly 3729 * The structure definition should remain consistant b/w 3730 * FW and wl/WLM app. 3731 */ 3732 typedef struct { 3733 uint16 version; /* Version of IOVAR structure. Used for backward 3734 * compatibility in future. Whenever we make any 3735 * changes to this structure then value of WL_SUBCNTR_IOV_VER 3736 * needs to be updated properly. 3737 */ 3738 uint16 length; /* length in bytes of this structure */ 3739 uint16 counters_version; /* see definition of WL_CNT_T_VERSION 3740 * wl app will send the version of counters 3741 * which is used to calculate the offset of counters. 3742 * It must match the version of counters FW is using 3743 * else FW will return error with his version of counters 3744 * set in this field. 3745 */ 3746 uint16 num_subcounters; /* Number of counter offset passed by wl app to FW. */ 3747 uint32 data[1]; /* variable length payload: 3748 * Offsets to the counters will be passed to FW 3749 * throught this data field. FW will return the value of counters 3750 * at the offsets passed by wl app in this fiels itself. 3751 */ 3752 } wl_subcnt_info_t; 3753 3754 /* Top structure of counters TLV version IOVar buffer 3755 * The structure definition should remain consistant b/w 3756 * FW and wl/WLM app. 3757 */ 3758 typedef struct { 3759 uint16 version; /* Version of IOVAR structure. Added for backward 3760 * compatibility feature. If any changes are done, 3761 * WL_TLV_IOV_VER need to be updated. 3762 */ 3763 uint16 length; /* total len in bytes of this structure + payload */ 3764 uint16 counters_version; /* See definition of WL_CNT_VERSION_XTLV 3765 * wl app will update counter tlv version to be used 3766 * so to calculate offset of supported TLVs. 3767 * If there is a mismatch in the version, FW will update an error 3768 */ 3769 uint16 num_tlv; /* Max number of TLV info passed by FW to WL app. 3770 * and vice-versa 3771 */ 3772 uint32 data[]; /* variable length payload: 3773 * This stores the tlv as supported by F/W to the wl app. 3774 * This table is required to compute subcounter offsets at WLapp end. 3775 */ 3776 } wl_cntr_tlv_info_t; 3777 3778 /** wlc layer counters */ 3779 typedef struct { 3780 /* transmit stat counters */ 3781 uint32 txframe; /**< tx data frames */ 3782 uint32 txbyte; /**< tx data bytes */ 3783 uint32 txretrans; /**< tx mac retransmits */ 3784 uint32 txerror; /**< tx data errors (derived: sum of others) */ 3785 uint32 txctl; /**< tx management frames */ 3786 uint32 txprshort; /**< tx short preamble frames */ 3787 uint32 txserr; /**< tx status errors */ 3788 uint32 txnobuf; /**< tx out of buffers errors */ 3789 uint32 txnoassoc; /**< tx discard because we're not associated */ 3790 uint32 txrunt; /**< tx runt frames */ 3791 uint32 txchit; /**< tx header cache hit (fastpath) */ 3792 uint32 txcmiss; /**< tx header cache miss (slowpath) */ 3793 3794 /* transmit chip error counters */ 3795 uint32 txuflo; /**< tx fifo underflows */ 3796 uint32 txphyerr; /**< tx phy errors (indicated in tx status) */ 3797 uint32 txphycrs; 3798 3799 /* receive stat counters */ 3800 uint32 rxframe; /**< rx data frames */ 3801 uint32 rxbyte; /**< rx data bytes */ 3802 uint32 rxerror; /**< rx data errors (derived: sum of others) */ 3803 uint32 rxctl; /**< rx management frames */ 3804 uint32 rxnobuf; /**< rx out of buffers errors */ 3805 uint32 rxnondata; /**< rx non data frames in the data channel errors */ 3806 uint32 rxbadds; /**< rx bad DS errors */ 3807 uint32 rxbadcm; /**< rx bad control or management frames */ 3808 uint32 rxfragerr; /**< rx fragmentation errors */ 3809 uint32 rxrunt; /**< rx runt frames */ 3810 uint32 rxgiant; /**< rx giant frames */ 3811 uint32 rxnoscb; /**< rx no scb error */ 3812 uint32 rxbadproto; /**< rx invalid frames */ 3813 uint32 rxbadsrcmac; /**< rx frames with Invalid Src Mac */ 3814 uint32 rxbadda; /**< rx frames tossed for invalid da */ 3815 uint32 rxfilter; /**< rx frames filtered out */ 3816 3817 /* receive chip error counters */ 3818 uint32 rxoflo; /**< rx fifo overflow errors */ 3819 uint32 rxuflo[NFIFO]; /**< rx dma descriptor underflow errors */ 3820 3821 uint32 d11cnt_txrts_off; /**< d11cnt txrts value when reset d11cnt */ 3822 uint32 d11cnt_rxcrc_off; /**< d11cnt rxcrc value when reset d11cnt */ 3823 uint32 d11cnt_txnocts_off; /**< d11cnt txnocts value when reset d11cnt */ 3824 3825 /* misc counters */ 3826 uint32 dmade; /**< tx/rx dma descriptor errors */ 3827 uint32 dmada; /**< tx/rx dma data errors */ 3828 uint32 dmape; /**< tx/rx dma descriptor protocol errors */ 3829 uint32 reset; /**< reset count */ 3830 uint32 tbtt; /**< cnts the TBTT int's */ 3831 uint32 txdmawar; 3832 uint32 pkt_callback_reg_fail; /**< callbacks register failure */ 3833 3834 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 3835 uint32 txfrag; /**< dot11TransmittedFragmentCount */ 3836 uint32 txmulti; /**< dot11MulticastTransmittedFrameCount */ 3837 uint32 txfail; /**< dot11FailedCount */ 3838 uint32 txretry; /**< dot11RetryCount */ 3839 uint32 txretrie; /**< dot11MultipleRetryCount */ 3840 uint32 rxdup; /**< dot11FrameduplicateCount */ 3841 uint32 txrts; /**< dot11RTSSuccessCount */ 3842 uint32 txnocts; /**< dot11RTSFailureCount */ 3843 uint32 txnoack; /**< dot11ACKFailureCount */ 3844 uint32 rxfrag; /**< dot11ReceivedFragmentCount */ 3845 uint32 rxmulti; /**< dot11MulticastReceivedFrameCount */ 3846 uint32 rxcrc; /**< dot11FCSErrorCount */ 3847 uint32 txfrmsnt; /**< dot11TransmittedFrameCount (bogus MIB?) */ 3848 uint32 rxundec; /**< dot11WEPUndecryptableCount */ 3849 3850 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 3851 uint32 tkipmicfaill; /**< TKIPLocalMICFailures */ 3852 uint32 tkipcntrmsr; /**< TKIPCounterMeasuresInvoked */ 3853 uint32 tkipreplay; /**< TKIPReplays */ 3854 uint32 ccmpfmterr; /**< CCMPFormatErrors */ 3855 uint32 ccmpreplay; /**< CCMPReplays */ 3856 uint32 ccmpundec; /**< CCMPDecryptErrors */ 3857 uint32 fourwayfail; /**< FourWayHandshakeFailures */ 3858 uint32 wepundec; /**< dot11WEPUndecryptableCount */ 3859 uint32 wepicverr; /**< dot11WEPICVErrorCount */ 3860 uint32 decsuccess; /**< DecryptSuccessCount */ 3861 uint32 tkipicverr; /**< TKIPICVErrorCount */ 3862 uint32 wepexcluded; /**< dot11WEPExcludedCount */ 3863 3864 uint32 txchanrej; /**< Tx frames suppressed due to channel rejection */ 3865 uint32 psmwds; /**< Count PSM watchdogs */ 3866 uint32 phywatchdog; /**< Count Phy watchdogs (triggered by ucode) */ 3867 3868 /* MBSS counters, AP only */ 3869 uint32 prq_entries_handled; /**< PRQ entries read in */ 3870 uint32 prq_undirected_entries; /**< which were bcast bss & ssid */ 3871 uint32 prq_bad_entries; /**< which could not be translated to info */ 3872 uint32 atim_suppress_count; /**< TX suppressions on ATIM fifo */ 3873 uint32 bcn_template_not_ready; /**< Template marked in use on send bcn ... */ 3874 uint32 bcn_template_not_ready_done; /**< ...but "DMA done" interrupt rcvd */ 3875 uint32 late_tbtt_dpc; /**< TBTT DPC did not happen in time */ 3876 3877 /* per-rate receive stat counters */ 3878 uint32 rx1mbps; /**< packets rx at 1Mbps */ 3879 uint32 rx2mbps; /**< packets rx at 2Mbps */ 3880 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 3881 uint32 rx6mbps; /**< packets rx at 6Mbps */ 3882 uint32 rx9mbps; /**< packets rx at 9Mbps */ 3883 uint32 rx11mbps; /**< packets rx at 11Mbps */ 3884 uint32 rx12mbps; /**< packets rx at 12Mbps */ 3885 uint32 rx18mbps; /**< packets rx at 18Mbps */ 3886 uint32 rx24mbps; /**< packets rx at 24Mbps */ 3887 uint32 rx36mbps; /**< packets rx at 36Mbps */ 3888 uint32 rx48mbps; /**< packets rx at 48Mbps */ 3889 uint32 rx54mbps; /**< packets rx at 54Mbps */ 3890 uint32 rx108mbps; /**< packets rx at 108mbps */ 3891 uint32 rx162mbps; /**< packets rx at 162mbps */ 3892 uint32 rx216mbps; /**< packets rx at 216 mbps */ 3893 uint32 rx270mbps; /**< packets rx at 270 mbps */ 3894 uint32 rx324mbps; /**< packets rx at 324 mbps */ 3895 uint32 rx378mbps; /**< packets rx at 378 mbps */ 3896 uint32 rx432mbps; /**< packets rx at 432 mbps */ 3897 uint32 rx486mbps; /**< packets rx at 486 mbps */ 3898 uint32 rx540mbps; /**< packets rx at 540 mbps */ 3899 3900 uint32 rfdisable; /**< count of radio disables */ 3901 3902 uint32 txexptime; /**< Tx frames suppressed due to timer expiration */ 3903 3904 uint32 txmpdu_sgi; /**< count for sgi transmit */ 3905 uint32 rxmpdu_sgi; /**< count for sgi received */ 3906 uint32 txmpdu_stbc; /**< count for stbc transmit */ 3907 uint32 rxmpdu_stbc; /**< count for stbc received */ 3908 3909 uint32 rxundec_mcst; /**< dot11WEPUndecryptableCount */ 3910 3911 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 3912 uint32 tkipmicfaill_mcst; /**< TKIPLocalMICFailures */ 3913 uint32 tkipcntrmsr_mcst; /**< TKIPCounterMeasuresInvoked */ 3914 uint32 tkipreplay_mcst; /**< TKIPReplays */ 3915 uint32 ccmpfmterr_mcst; /**< CCMPFormatErrors */ 3916 uint32 ccmpreplay_mcst; /**< CCMPReplays */ 3917 uint32 ccmpundec_mcst; /**< CCMPDecryptErrors */ 3918 uint32 fourwayfail_mcst; /**< FourWayHandshakeFailures */ 3919 uint32 wepundec_mcst; /**< dot11WEPUndecryptableCount */ 3920 uint32 wepicverr_mcst; /**< dot11WEPICVErrorCount */ 3921 uint32 decsuccess_mcst; /**< DecryptSuccessCount */ 3922 uint32 tkipicverr_mcst; /**< TKIPICVErrorCount */ 3923 uint32 wepexcluded_mcst; /**< dot11WEPExcludedCount */ 3924 3925 uint32 dma_hang; /**< count for dma hang */ 3926 uint32 reinit; /**< count for reinit */ 3927 3928 uint32 pstatxucast; /**< count of ucast frames xmitted on all psta assoc */ 3929 uint32 pstatxnoassoc; /**< count of txnoassoc frames xmitted on all psta assoc */ 3930 uint32 pstarxucast; /**< count of ucast frames received on all psta assoc */ 3931 uint32 pstarxbcmc; /**< count of bcmc frames received on all psta */ 3932 uint32 pstatxbcmc; /**< count of bcmc frames transmitted on all psta */ 3933 3934 uint32 cso_passthrough; /**< hw cso required but passthrough */ 3935 uint32 cso_normal; /**< hw cso hdr for normal process */ 3936 uint32 chained; /**< number of frames chained */ 3937 uint32 chainedsz1; /**< number of chain size 1 frames */ 3938 uint32 unchained; /**< number of frames not chained */ 3939 uint32 maxchainsz; /**< max chain size so far */ 3940 uint32 currchainsz; /**< current chain size */ 3941 uint32 pciereset; /**< Secondary Bus Reset issued by driver */ 3942 uint32 cfgrestore; /**< configspace restore by driver */ 3943 uint32 reinitreason[NREINITREASONCOUNT]; /**< reinitreason counters; 0: Unknown reason */ 3944 uint32 rxrtry; 3945 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 3946 3947 /* detailed control/management frames */ 3948 uint32 txbar; /**< Number of TX BAR */ 3949 uint32 rxbar; /**< Number of RX BAR */ 3950 uint32 txpspoll; /**< Number of TX PS-poll */ 3951 uint32 rxpspoll; /**< Number of RX PS-poll */ 3952 uint32 txnull; /**< Number of TX NULL_DATA */ 3953 uint32 rxnull; /**< Number of RX NULL_DATA */ 3954 uint32 txqosnull; /**< Number of TX NULL_QoSDATA */ 3955 uint32 rxqosnull; /**< Number of RX NULL_QoSDATA */ 3956 uint32 txassocreq; /**< Number of TX ASSOC request */ 3957 uint32 rxassocreq; /**< Number of RX ASSOC request */ 3958 uint32 txreassocreq; /**< Number of TX REASSOC request */ 3959 uint32 rxreassocreq; /**< Number of RX REASSOC request */ 3960 uint32 txdisassoc; /**< Number of TX DISASSOC */ 3961 uint32 rxdisassoc; /**< Number of RX DISASSOC */ 3962 uint32 txassocrsp; /**< Number of TX ASSOC response */ 3963 uint32 rxassocrsp; /**< Number of RX ASSOC response */ 3964 uint32 txreassocrsp; /**< Number of TX REASSOC response */ 3965 uint32 rxreassocrsp; /**< Number of RX REASSOC response */ 3966 uint32 txauth; /**< Number of TX AUTH */ 3967 uint32 rxauth; /**< Number of RX AUTH */ 3968 uint32 txdeauth; /**< Number of TX DEAUTH */ 3969 uint32 rxdeauth; /**< Number of RX DEAUTH */ 3970 uint32 txprobereq; /**< Number of TX probe request */ 3971 uint32 rxprobereq; /**< Number of RX probe request */ 3972 uint32 txprobersp; /**< Number of TX probe response */ 3973 uint32 rxprobersp; /**< Number of RX probe response */ 3974 uint32 txaction; /**< Number of TX action frame */ 3975 uint32 rxaction; /**< Number of RX action frame */ 3976 uint32 ampdu_wds; /**< Number of AMPDU watchdogs */ 3977 uint32 txlost; /**< Number of lost packets reported in txs */ 3978 uint32 txdatamcast; /**< Number of TX multicast data packets */ 3979 uint32 txdatabcast; /**< Number of TX broadcast data packets */ 3980 uint32 psmxwds; /**< Number of PSMx watchdogs */ 3981 uint32 rxback; 3982 uint32 txback; 3983 uint32 p2p_tbtt; /**< Number of P2P TBTT Events */ 3984 uint32 p2p_tbtt_miss; /**< Number of P2P TBTT Events Miss */ 3985 uint32 txqueue_start; 3986 uint32 txqueue_end; 3987 uint32 txbcast; /* Broadcast TransmittedFrameCount */ 3988 uint32 txdropped; /* tx dropped pkts */ 3989 uint32 rxbcast; /* BroadcastReceivedFrameCount */ 3990 uint32 rxdropped; /* rx dropped pkts (derived: sum of others) */ 3991 uint32 txq_end_assoccb; /* forced txqueue_end callback fired in assoc */ 3992 uint32 tx_toss_cnt; /* number of tx packets tossed */ 3993 uint32 rx_toss_cnt; /* number of rx packets tossed */ 3994 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 3995 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 3996 uint32 pmk_badlen_cnt; /* number of invalid pmk len */ 3997 uint32 txbar_notx; /* number of TX BAR not sent (maybe supressed or muted) */ 3998 uint32 txbar_noack; /* number of TX BAR sent, but not acknowledged by peer */ 3999 uint32 rxfrag_agedout; /**< # of aged out rx fragmentation */ 4000 4001 /* Do not remove or rename in the middle of this struct. 4002 * All counter variables have to be of uint32. 4003 * Please follow the instruction in 4004 * http://hwnbu-twiki.sj.broadcom.com/bin/view/Mwgroup/WlCounters#Counter_Edition 4005 */ 4006 } wl_cnt_wlc_t; 4007 4008 /* he counters Version 1 */ 4009 #define HE_COUNTERS_V1 (1) 4010 typedef struct wl_he_cnt_wlc_v1 { 4011 uint32 he_rxtrig_myaid; 4012 uint32 he_rxtrig_rand; 4013 uint32 he_colormiss_cnt; 4014 uint32 he_txmampdu; 4015 uint32 he_txmtid_back; 4016 uint32 he_rxmtid_back; 4017 uint32 he_rxmsta_back; 4018 uint32 he_txfrag; 4019 uint32 he_rxdefrag; 4020 uint32 he_txtrig; 4021 uint32 he_rxtrig_basic; 4022 uint32 he_rxtrig_murts; 4023 uint32 he_rxtrig_bsrp; 4024 uint32 he_rxdlmu; 4025 uint32 he_physu_rx; 4026 uint32 he_phyru_rx; 4027 uint32 he_txtbppdu; 4028 } wl_he_cnt_wlc_v1_t; 4029 4030 /* he counters Version 2 */ 4031 #define HE_COUNTERS_V2 (2) 4032 typedef struct wl_he_cnt_wlc_v2 { 4033 uint16 version; 4034 uint16 len; 4035 uint32 he_rxtrig_myaid; /**< rxed valid trigger frame with myaid */ 4036 uint32 he_rxtrig_rand; /**< rxed valid trigger frame with random aid */ 4037 uint32 he_colormiss_cnt; /**< for bss color mismatch cases */ 4038 uint32 he_txmampdu; /**< for multi-TID AMPDU transmission */ 4039 uint32 he_txmtid_back; /**< for multi-TID BACK transmission */ 4040 uint32 he_rxmtid_back; /**< reception of multi-TID BACK */ 4041 uint32 he_rxmsta_back; /**< reception of multi-STA BACK */ 4042 uint32 he_txfrag; /**< transmission of Dynamic fragmented packets */ 4043 uint32 he_rxdefrag; /**< reception of dynamic fragmented packets */ 4044 uint32 he_txtrig; /**< transmission of trigger frames */ 4045 uint32 he_rxtrig_basic; /**< reception of basic trigger frame */ 4046 uint32 he_rxtrig_murts; /**< reception of MU-RTS trigger frame */ 4047 uint32 he_rxtrig_bsrp; /**< reception of BSR poll trigger frame */ 4048 uint32 he_rxdlmu; /**< reception of DL MU PPDU */ 4049 uint32 he_physu_rx; /**< reception of SU frame */ 4050 uint32 he_phyru_rx; /**< reception of RU frame */ 4051 uint32 he_txtbppdu; /**< increments on transmission of every TB PPDU */ 4052 uint32 he_null_tbppdu; /**< null TB PPDU's sent as a response to basic trigger frame */ 4053 } wl_he_cnt_wlc_v2_t; 4054 4055 /* he counters Version 3 */ 4056 #define WL_RU_TYPE_MAX 6 4057 #define HE_COUNTERS_V3 (3) 4058 4059 typedef struct wl_he_cnt_wlc_v3 { 4060 uint16 version; 4061 uint16 len; 4062 uint32 he_rxtrig_myaid; /**< rxed valid trigger frame with myaid */ 4063 uint32 he_rxtrig_rand; /**< rxed valid trigger frame with random aid */ 4064 uint32 he_colormiss_cnt; /**< for bss color mismatch cases */ 4065 uint32 he_txmampdu; /**< for multi-TID AMPDU transmission */ 4066 uint32 he_txmtid_back; /**< for multi-TID BACK transmission */ 4067 uint32 he_rxmtid_back; /**< reception of multi-TID BACK */ 4068 uint32 he_rxmsta_back; /**< reception of multi-STA BACK */ 4069 uint32 he_txfrag; /**< transmission of Dynamic fragmented packets */ 4070 uint32 he_rxdefrag; /**< reception of dynamic fragmented packets */ 4071 uint32 he_txtrig; /**< transmission of trigger frames */ 4072 uint32 he_rxtrig_basic; /**< reception of basic trigger frame */ 4073 uint32 he_rxtrig_murts; /**< reception of MU-RTS trigger frame */ 4074 uint32 he_rxtrig_bsrp; /**< reception of BSR poll trigger frame */ 4075 uint32 he_rxhemuppdu_cnt; /**< rxing HE MU PPDU */ 4076 uint32 he_physu_rx; /**< reception of SU frame */ 4077 uint32 he_phyru_rx; /**< reception of RU frame */ 4078 uint32 he_txtbppdu; /**< increments on transmission of every TB PPDU */ 4079 uint32 he_null_tbppdu; /**< null TB PPDU's sent as a response to basic trigger frame */ 4080 uint32 he_rxhesuppdu_cnt; /**< rxing SU PPDU */ 4081 uint32 he_rxhesureppdu_cnt; /**< rxing Range Extension(RE) SU PPDU */ 4082 uint32 he_null_zero_agg; /**< null AMPDU's transmitted in response to basic trigger 4083 * because of zero aggregation 4084 */ 4085 uint32 he_null_bsrp_rsp; /**< null AMPDU's txed in response to BSR poll */ 4086 uint32 he_null_fifo_empty; /**< null AMPDU's in response to basic trigger 4087 * because of no frames in fifo's 4088 */ 4089 uint32 he_myAID_cnt; 4090 uint32 he_rxtrig_bfm_cnt; 4091 uint32 he_rxtrig_mubar; 4092 uint32 rxheru[WL_RU_TYPE_MAX]; /**< HE of rx pkts */ 4093 uint32 txheru[WL_RU_TYPE_MAX]; 4094 uint32 he_mgmt_tbppdu; 4095 uint32 he_cs_req_tx_cancel; 4096 uint32 he_wrong_nss; 4097 uint32 he_trig_unsupp_rate; 4098 uint32 he_rxtrig_nfrp; 4099 uint32 he_rxtrig_bqrp; 4100 uint32 he_rxtrig_gcrmubar; 4101 } wl_he_cnt_wlc_v3_t; 4102 4103 /* he counters Version 4 */ 4104 #define HE_COUNTERS_V4 (4) 4105 typedef struct wl_he_cnt_wlc_v4 { 4106 uint16 version; 4107 uint16 len; 4108 uint32 he_rxtrig_myaid; /**< rxed valid trigger frame with myaid */ 4109 uint32 he_rxtrig_rand; /**< rxed valid trigger frame with random aid */ 4110 uint32 he_colormiss_cnt; /**< for bss color mismatch cases */ 4111 uint32 he_txmampdu; /**< for multi-TID AMPDU transmission */ 4112 uint32 he_txmtid_back; /**< for multi-TID BACK transmission */ 4113 uint32 he_rxmtid_back; /**< reception of multi-TID BACK */ 4114 uint32 he_rxmsta_back; /**< reception of multi-STA BACK */ 4115 uint32 he_txfrag; /**< transmission of Dynamic fragmented packets */ 4116 uint32 he_rxdefrag; /**< reception of dynamic fragmented packets */ 4117 uint32 he_txtrig; /**< transmission of trigger frames */ 4118 uint32 he_rxtrig_basic; /**< reception of basic trigger frame */ 4119 uint32 he_rxtrig_murts; /**< reception of MU-RTS trigger frame */ 4120 uint32 he_rxtrig_bsrp; /**< reception of BSR poll trigger frame */ 4121 uint32 he_rxtsrt_hemuppdu_cnt; /**< rxing HE MU PPDU */ 4122 uint32 he_physu_rx; /**< reception of SU frame */ 4123 uint32 he_phyru_rx; /**< reception of RU frame */ 4124 uint32 he_txtbppdu; /**< increments on transmission of every TB PPDU */ 4125 uint32 he_null_tbppdu; /**< null TB PPDU's sent as a response to basic trigger frame */ 4126 uint32 he_rxstrt_hesuppdu_cnt; /**< rxing SU PPDU */ 4127 uint32 he_rxstrt_hesureppdu_cnt; /**< rxing Range Extension(RE) SU PPDU */ 4128 uint32 he_null_zero_agg; /**< null AMPDU's transmitted in response to basic trigger 4129 * because of zero aggregation 4130 */ 4131 uint32 he_null_bsrp_rsp; /**< null AMPDU's txed in response to BSR poll */ 4132 uint32 he_null_fifo_empty; /**< null AMPDU's in response to basic trigger 4133 * because of no frames in fifo's 4134 */ 4135 uint32 he_myAID_cnt; 4136 uint32 he_rxtrig_bfm_cnt; 4137 uint32 he_rxtrig_mubar; 4138 uint32 rxheru[WL_RU_TYPE_MAX]; /**< HE of rx pkts */ 4139 uint32 txheru[WL_RU_TYPE_MAX]; 4140 uint32 he_mgmt_tbppdu; 4141 uint32 he_cs_req_tx_cancel; 4142 uint32 he_wrong_nss; 4143 uint32 he_trig_unsupp_rate; 4144 uint32 he_rxtrig_nfrp; 4145 uint32 he_rxtrig_bqrp; 4146 uint32 he_rxtrig_gcrmubar; 4147 uint32 he_rxtrig_basic_htpack; /**< triggers received with HTP ack policy */ 4148 uint32 he_rxtrig_ed_cncl; /**< count of cancelled packets 4149 * becasue of cs_req in trigger frame 4150 */ 4151 uint32 he_rxtrig_suppr_null_tbppdu; /**< count of null frame sent becasue of 4152 * suppression scenarios 4153 */ 4154 uint32 he_ulmu_disable; /**< number of UL MU disable scenario's handled in ucode */ 4155 uint32 he_ulmu_data_disable; /**<number of UL MU data disable scenarios 4156 * handled in ucode 4157 */ 4158 } wl_he_cnt_wlc_v4_t; 4159 4160 #ifndef HE_COUNTERS_VERSION_ENABLED 4161 #define HE_COUNTERS_VERSION (HE_COUNTERS_V1) 4162 typedef wl_he_cnt_wlc_v1_t wl_he_cnt_wlc_t; 4163 #endif /* HE_COUNTERS_VERSION_ENABLED */ 4164 4165 /* he omi counters Version 1 */ 4166 #define HE_OMI_COUNTERS_V1 (1) 4167 typedef struct wl_he_omi_cnt_wlc_v1 { 4168 uint16 version; 4169 uint16 len; 4170 uint32 he_omitx_sched; /* Count for total number of OMIs scheduled */ 4171 uint32 he_omitx_success; /* Count for OMI Tx success */ 4172 uint32 he_omitx_retries; /* Count for OMI retries as TxDone not set */ 4173 uint32 he_omitx_dur; /* Accumulated duration of OMI completion time */ 4174 uint32 he_omitx_ulmucfg; /* count for UL MU enable/disable change req */ 4175 uint32 he_omitx_ulmucfg_ack; /* count for UL MU enable/disable req txed successfully */ 4176 uint32 he_omitx_txnsts; /* count for Txnsts change req */ 4177 uint32 he_omitx_txnsts_ack; /* count for Txnsts change req txed successfully */ 4178 uint32 he_omitx_rxnss; /* count for Rxnss change req */ 4179 uint32 he_omitx_rxnss_ack; /* count for Rxnss change req txed successfully */ 4180 uint32 he_omitx_bw; /* count for BW change req */ 4181 uint32 he_omitx_bw_ack; /* count for BW change req txed successfully */ 4182 uint32 he_omitx_ersudis; /* count for ER SU enable/disable req */ 4183 uint32 he_omitx_ersudis_ack; /* count for ER SU enable/disable req txed successfully */ 4184 uint32 he_omitx_dlmursdrec; /* count for Resound recommendation change req */ 4185 uint32 he_omitx_dlmursdrec_ack; /* count for Resound recommendation req txed successfully */ 4186 } wl_he_omi_cnt_wlc_v1_t; 4187 4188 /* WL_IFSTATS_XTLV_WL_SLICE_TXBF */ 4189 /* beamforming counters version 1 */ 4190 #define TXBF_ECOUNTERS_V1 (1u) 4191 #define WL_TXBF_CNT_ARRAY_SZ (8u) 4192 typedef struct wl_txbf_ecounters_v1 { 4193 uint16 version; 4194 uint16 len; 4195 /* transmit beamforming stats */ 4196 uint16 txndpa; /* null data packet announcements */ 4197 uint16 txndp; /* null data packets */ 4198 uint16 txbfpoll; /* beamforming report polls */ 4199 uint16 txsf; /* subframes */ 4200 uint16 txcwrts; /* contention window rts */ 4201 uint16 txcwcts; /* contention window cts */ 4202 uint16 txbfm; 4203 /* receive beamforming stats */ 4204 uint16 rxndpa_u; /* unicast NDPAs */ 4205 uint16 rxndpa_m; /* multicast NDPAs */ 4206 uint16 rxbfpoll; /* unicast bf-polls */ 4207 uint16 bferpt; /* beamforming reports */ 4208 uint16 rxsf; 4209 uint16 rxcwrts; 4210 uint16 rxcwcts; 4211 uint16 rxtrig_bfpoll; 4212 uint16 unused_uint16; /* pad */ 4213 /* sounding stats - interval capture */ 4214 uint16 rxnontb_sound[WL_TXBF_CNT_ARRAY_SZ]; /* non-TB sounding for last 8 captures */ 4215 uint16 rxtb_sound[WL_TXBF_CNT_ARRAY_SZ]; /* TB sounding count for last 8 captures */ 4216 uint32 cap_dur_ms[WL_TXBF_CNT_ARRAY_SZ]; /* last 8 capture durations (in ms) */ 4217 uint32 cap_last_ts; /* timestamp of last sample capture */ 4218 } wl_txbf_ecounters_v1_t; 4219 4220 /* security vulnerabilities counters */ 4221 typedef struct { 4222 uint32 ie_unknown; /* number of unknown IEs */ 4223 uint32 ie_invalid_length; /* number of IEs with invalid length */ 4224 uint32 ie_invalid_data; /* number of IEs with invalid data */ 4225 uint32 ipv6_invalid_length; /* number of IPv6 packets with invalid payload length */ 4226 } wl_secvln_cnt_t; 4227 4228 /* Reinit reasons - do not put anything else other than reinit reasons here */ 4229 typedef struct { 4230 uint32 rsn[WL_REINIT_RC_LAST]; 4231 } reinit_rsns_t; 4232 4233 /* MACXSTAT counters for ucodex (corerev >= 64) */ 4234 typedef struct { 4235 uint32 macxsusp; 4236 uint32 m2vmsg; 4237 uint32 v2mmsg; 4238 uint32 mboxout; 4239 uint32 musnd; 4240 uint32 sfb2v; 4241 } wl_cnt_ge64mcxst_v1_t; 4242 4243 /** MACSTAT counters for ucode (corerev >= 40) */ 4244 typedef struct { 4245 /* MAC counters: 32-bit version of d11.h's macstat_t */ 4246 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 4247 * Control Management (includes retransmissions) 4248 */ 4249 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 4250 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 4251 uint32 txackfrm; /**< number of ACK frames sent out */ 4252 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 4253 uint32 txbcnfrm; /**< beacons transmitted */ 4254 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 4255 uint32 txampdu; /**< number of AMPDUs transmitted */ 4256 uint32 txmpdu; /**< number of MPDUs transmitted */ 4257 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 4258 * or BCN) 4259 */ 4260 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 4261 * driver enqueued frames 4262 */ 4263 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 4264 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 4265 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 4266 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 4267 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */ 4268 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 4269 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 4270 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 4271 uint32 rxstrt; /**< Number of received frames with a good PLCP 4272 * (i.e. passing parity check) 4273 */ 4274 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 4275 uint32 rxmgucastmbss; /**< number of received mgmt frames with good FCS and matching RA */ 4276 uint32 rxctlucast; /**< number of received CNTRL frames with good FCS and matching RA */ 4277 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 4278 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 4279 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 4280 uint32 rxdtocast; /**< number of received DATA frames (good FCS and not matching RA) */ 4281 uint32 rxmgocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 4282 uint32 rxctlocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 4283 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 4284 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 4285 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 4286 uint32 rxmgmcast; /**< number of RX Management multicast frames received by the MAC */ 4287 uint32 rxctlmcast; /**< number of RX Control multicast frames received by the MAC 4288 * (unlikely to see these) 4289 */ 4290 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 4291 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 4292 * other BSS (WDS FRAME) 4293 */ 4294 uint32 rxbeaconobss; /**< beacons received from other BSS */ 4295 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 4296 * expecting a response 4297 */ 4298 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 4299 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 4300 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 4301 uint32 rxf1ovfl; /**< number of receive fifo 1 overflows */ 4302 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 4303 uint32 missbcn_dbg; /**< number of beacon missed to receive */ 4304 uint32 pmqovfl; /**< number of PMQ overflows */ 4305 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 4306 * the PRQ fifo 4307 */ 4308 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 4309 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 4310 * not get ACK 4311 */ 4312 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 4313 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 4314 * fifo because a probe response could not be sent out within 4315 * the time limit defined in M_PRS_MAXTIME 4316 */ 4317 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 4318 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 4319 uint32 txinrtstxop; /**< number of data frame transmissions during rts txop */ 4320 uint32 rxback; /**< blockack rxcnt */ 4321 uint32 txback; /**< blockack txcnt */ 4322 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 4323 uint32 rxdrop20s; /**< drop secondary cnt */ 4324 uint32 rxtoolate; /**< receive too late */ 4325 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 4326 /* All counter variables have to be of uint32. */ 4327 } wl_cnt_ge40mcst_v1_t; 4328 4329 /** MACSTAT counters for ucode (corerev < 40) */ 4330 typedef struct { 4331 /* MAC counters: 32-bit version of d11.h's macstat_t */ 4332 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 4333 * Control Management (includes retransmissions) 4334 */ 4335 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 4336 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 4337 uint32 txackfrm; /**< number of ACK frames sent out */ 4338 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 4339 uint32 txbcnfrm; /**< beacons transmitted */ 4340 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 4341 uint32 txampdu; /**< number of AMPDUs transmitted */ 4342 uint32 txmpdu; /**< number of MPDUs transmitted */ 4343 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 4344 * or BCN) 4345 */ 4346 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 4347 * driver enqueued frames 4348 */ 4349 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 4350 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 4351 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 4352 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 4353 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */ 4354 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 4355 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 4356 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 4357 uint32 rxstrt; /**< Number of received frames with a good PLCP 4358 * (i.e. passing parity check) 4359 */ 4360 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 4361 uint32 rxmgucastmbss; /**< number of received mgmt frames with good FCS and matching RA */ 4362 uint32 rxctlucast; /**< number of received CNTRL frames with good FCS and matching RA */ 4363 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 4364 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 4365 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 4366 uint32 rxdtocast; /**< number of received DATA frames (good FCS and not matching RA) */ 4367 uint32 rxmgocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 4368 uint32 rxctlocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 4369 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 4370 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 4371 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 4372 uint32 rxmgmcast; /**< number of RX Management multicast frames received by the MAC */ 4373 uint32 rxctlmcast; /**< number of RX Control multicast frames received by the MAC 4374 * (unlikely to see these) 4375 */ 4376 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 4377 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 4378 * other BSS (WDS FRAME) 4379 */ 4380 uint32 rxbeaconobss; /**< beacons received from other BSS */ 4381 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 4382 * expecting a response 4383 */ 4384 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 4385 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 4386 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 4387 uint32 dbgoff46; 4388 uint32 dbgoff47; 4389 uint32 dbgoff48; /**< Used for counting txstatus queue overflow (corerev <= 4) */ 4390 uint32 pmqovfl; /**< number of PMQ overflows */ 4391 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 4392 * the PRQ fifo 4393 */ 4394 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 4395 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 4396 * not get ACK 4397 */ 4398 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 4399 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 4400 * fifo because a probe response could not be sent out within 4401 * the time limit defined in M_PRS_MAXTIME 4402 */ 4403 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 4404 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 4405 uint32 txinrtstxop; /**< number of data frame transmissions during rts txop */ 4406 uint32 rxback; /**< blockack rxcnt */ 4407 uint32 txback; /**< blockack txcnt */ 4408 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 4409 uint32 phywatch; 4410 uint32 rxtoolate; /**< receive too late */ 4411 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 4412 /* All counter variables have to be of uint32. */ 4413 } wl_cnt_lt40mcst_v1_t; 4414 4415 /** MACSTAT counters for ucode (corerev >= 80) */ 4416 typedef struct { 4417 /* MAC counters: 32-bit version of d11.h's macstat_t */ 4418 /* Start of PSM2HOST stats(72) block */ 4419 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 4420 * Control Management (includes retransmissions) 4421 */ 4422 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 4423 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 4424 uint32 txackfrm; /**< number of ACK frames sent out */ 4425 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 4426 uint32 txbcnfrm; /**< beacons transmitted */ 4427 uint32 txampdu; /**< number of AMPDUs transmitted */ 4428 uint32 txmpdu; /**< number of MPDUs transmitted */ 4429 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 4430 * or BCN) 4431 */ 4432 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 4433 * driver enqueued frames 4434 */ 4435 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 4436 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 4437 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 4438 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 4439 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */ 4440 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 4441 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 4442 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 4443 uint32 rxstrt; /**< Number of received frames with a good PLCP 4444 * (i.e. passing parity check) 4445 */ 4446 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 4447 uint32 rxmgucastmbss; /**< number of received mgmt frames with good FCS and matching RA */ 4448 uint32 rxctlucast; /**< number of received CNTRL frames with good FCS and matching RA */ 4449 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 4450 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 4451 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 4452 uint32 rxdtocast; /**< number of received DATA frames (good FCS and not matching RA) */ 4453 uint32 rxmgocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 4454 uint32 rxctlocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 4455 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 4456 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 4457 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 4458 uint32 rxmgmcast; /**< number of RX Management multicast frames received by the MAC */ 4459 uint32 rxctlmcast; /**< number of RX Control multicast frames received by the MAC 4460 * (unlikely to see these) 4461 */ 4462 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 4463 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 4464 * other BSS (WDS FRAME) 4465 */ 4466 uint32 rxbeaconobss; /**< beacons received from other BSS */ 4467 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 4468 * expecting a response 4469 */ 4470 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 4471 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 4472 uint32 missbcn_dbg; /**< number of beacon missed to receive */ 4473 uint32 pmqovfl; /**< number of PMQ overflows */ 4474 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 4475 * the PRQ fifo 4476 */ 4477 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 4478 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 4479 * not get ACK 4480 */ 4481 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 4482 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 4483 * fifo because a probe response could not be sent out within 4484 * the time limit defined in M_PRS_MAXTIME 4485 */ 4486 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 4487 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 4488 uint32 txinrtstxop; /**< number of data frame transmissions during rts txop */ 4489 uint32 rxback; /**< blockack rxcnt */ 4490 uint32 txback; /**< blockack txcnt */ 4491 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 4492 uint32 rxdrop20s; /**< drop secondary cnt */ 4493 uint32 rxtoolate; /**< receive too late */ 4494 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 4495 uint32 rxtrig_myaid; /* New counters added in corerev 80 */ 4496 uint32 rxtrig_rand; 4497 uint32 goodfcs; 4498 uint32 colormiss; 4499 uint32 txmampdu; 4500 uint32 rxmtidback; 4501 uint32 rxmstaback; 4502 uint32 txfrag; 4503 /* End of PSM2HOST stats block */ 4504 /* start of rxerror overflow counter(24) block which are modified/added in corerev 80 */ 4505 uint32 phyovfl; 4506 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 4507 uint32 rxf1ovfl; /**< number of receive fifo 1 overflows */ 4508 uint32 lenfovfl; 4509 uint32 weppeof; 4510 uint32 badplcp; 4511 uint32 msduthresh; 4512 uint32 strmeof; 4513 uint32 stsfifofull; 4514 uint32 stsfifoerr; 4515 uint32 PAD[6]; 4516 uint32 rxerr_stat; 4517 uint32 ctx_fifo_full; 4518 uint32 PAD0[9]; 4519 uint32 ctmode_ufc_cnt; 4520 uint32 PAD1[28]; /* PAD added for counter elements to be added soon */ 4521 } wl_cnt_ge80mcst_v1_t; 4522 4523 typedef struct { 4524 uint32 fifocount; 4525 uint32 txfunfl[]; 4526 } wl_cnt_ge80_txfunfl_v1_t; 4527 4528 /** MACSTAT counters for "wl counter" version <= 10 */ 4529 /* With ucode before its macstat cnts cleaned up */ 4530 typedef struct { 4531 /* MAC counters: 32-bit version of d11.h's macstat_t */ 4532 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 4533 * Control Management (includes retransmissions) 4534 */ 4535 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 4536 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 4537 uint32 txackfrm; /**< number of ACK frames sent out */ 4538 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 4539 uint32 txbcnfrm; /**< beacons transmitted */ 4540 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 4541 uint32 txfbw; /**< transmit at fallback bw (dynamic bw) */ 4542 uint32 PAD0; /**< number of MPDUs transmitted */ 4543 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 4544 * or BCN) 4545 */ 4546 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 4547 * driver enqueued frames 4548 */ 4549 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 4550 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 4551 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 4552 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 4553 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not 4554 * data/control/management 4555 */ 4556 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 4557 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 4558 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 4559 uint32 rxstrt; /**< Number of received frames with a good PLCP 4560 * (i.e. passing parity check) 4561 */ 4562 uint32 rxdfrmucastmbss; /* number of received DATA frames with good FCS and matching RA */ 4563 uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ 4564 uint32 rxcfrmucast; /**< number of received CNTRL frames with good FCS and matching RA */ 4565 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 4566 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 4567 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 4568 uint32 rxdfrmocast; /**< number of received DATA frames (good FCS and not matching RA) */ 4569 uint32 rxmfrmocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 4570 uint32 rxcfrmocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 4571 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 4572 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 4573 uint32 rxdfrmmcast; /**< number of RX Data multicast frames received by the MAC */ 4574 uint32 rxmfrmmcast; /**< number of RX Management multicast frames received by the MAC */ 4575 uint32 rxcfrmmcast; /**< number of RX Control multicast frames received by the MAC 4576 * (unlikely to see these) 4577 */ 4578 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 4579 uint32 rxdfrmucastobss; /**< number of unicast frames addressed to the MAC from 4580 * other BSS (WDS FRAME) 4581 */ 4582 uint32 rxbeaconobss; /**< beacons received from other BSS */ 4583 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 4584 * expecting a response 4585 */ 4586 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 4587 uint32 PAD1; 4588 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 4589 uint32 rxf1ovfl; /**< Number of receive fifo 1 overflows (obsolete) */ 4590 uint32 rxf2ovfl; /**< Number of receive fifo 2 overflows (obsolete) */ 4591 uint32 txsfovfl; /**< Number of transmit status fifo overflows (obsolete) */ 4592 uint32 pmqovfl; /**< number of PMQ overflows */ 4593 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 4594 * the PRQ fifo 4595 */ 4596 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 4597 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 4598 * not get ACK 4599 */ 4600 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 4601 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 4602 * fifo because a probe response could not be sent out within 4603 * the time limit defined in M_PRS_MAXTIME 4604 */ 4605 uint32 rxnack; /**< obsolete */ 4606 uint32 frmscons; /**< obsolete */ 4607 uint32 txnack; /**< obsolete */ 4608 uint32 rxback; /**< blockack rxcnt */ 4609 uint32 txback; /**< blockack txcnt */ 4610 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 4611 uint32 rxdrop20s; /**< drop secondary cnt */ 4612 uint32 rxtoolate; /**< receive too late */ 4613 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 4614 /* All counter variables have to be of uint32. */ 4615 } wl_cnt_v_le10_mcst_t; 4616 4617 #define MAX_RX_FIFO 3 4618 #define WL_RXFIFO_CNT_VERSION 1 /* current version of wl_rxfifo_cnt_t */ 4619 typedef struct { 4620 /* Counters for frames received from rx fifos */ 4621 uint16 version; 4622 uint16 length; /* length of entire structure */ 4623 uint32 rxf_data[MAX_RX_FIFO]; /* data frames from rx fifo */ 4624 uint32 rxf_mgmtctl[MAX_RX_FIFO]; /* mgmt/ctl frames from rx fifo */ 4625 } wl_rxfifo_cnt_t; 4626 4627 typedef struct { 4628 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 4629 uint16 length; /**< length of entire structure */ 4630 4631 /* transmit stat counters */ 4632 uint32 txframe; /**< tx data frames */ 4633 uint32 txbyte; /**< tx data bytes */ 4634 uint32 txretrans; /**< tx mac retransmits */ 4635 uint32 txerror; /**< tx data errors (derived: sum of others) */ 4636 uint32 txctl; /**< tx management frames */ 4637 uint32 txprshort; /**< tx short preamble frames */ 4638 uint32 txserr; /**< tx status errors */ 4639 uint32 txnobuf; /**< tx out of buffers errors */ 4640 uint32 txnoassoc; /**< tx discard because we're not associated */ 4641 uint32 txrunt; /**< tx runt frames */ 4642 uint32 txchit; /**< tx header cache hit (fastpath) */ 4643 uint32 txcmiss; /**< tx header cache miss (slowpath) */ 4644 4645 /* transmit chip error counters */ 4646 uint32 txuflo; /**< tx fifo underflows */ 4647 uint32 txphyerr; /**< tx phy errors (indicated in tx status) */ 4648 uint32 txphycrs; 4649 4650 /* receive stat counters */ 4651 uint32 rxframe; /**< rx data frames */ 4652 uint32 rxbyte; /**< rx data bytes */ 4653 uint32 rxerror; /**< rx data errors (derived: sum of others) */ 4654 uint32 rxctl; /**< rx management frames */ 4655 uint32 rxnobuf; /**< rx out of buffers errors */ 4656 uint32 rxnondata; /**< rx non data frames in the data channel errors */ 4657 uint32 rxbadds; /**< rx bad DS errors */ 4658 uint32 rxbadcm; /**< rx bad control or management frames */ 4659 uint32 rxfragerr; /**< rx fragmentation errors */ 4660 uint32 rxrunt; /**< rx runt frames */ 4661 uint32 rxgiant; /**< rx giant frames */ 4662 uint32 rxnoscb; /**< rx no scb error */ 4663 uint32 rxbadproto; /**< rx invalid frames */ 4664 uint32 rxbadsrcmac; /**< rx frames with Invalid Src Mac */ 4665 uint32 rxbadda; /**< rx frames tossed for invalid da */ 4666 uint32 rxfilter; /**< rx frames filtered out */ 4667 4668 /* receive chip error counters */ 4669 uint32 rxoflo; /**< rx fifo overflow errors */ 4670 uint32 rxuflo[NFIFO]; /**< rx dma descriptor underflow errors */ 4671 4672 uint32 d11cnt_txrts_off; /**< d11cnt txrts value when reset d11cnt */ 4673 uint32 d11cnt_rxcrc_off; /**< d11cnt rxcrc value when reset d11cnt */ 4674 uint32 d11cnt_txnocts_off; /**< d11cnt txnocts value when reset d11cnt */ 4675 4676 /* misc counters */ 4677 uint32 dmade; /**< tx/rx dma descriptor errors */ 4678 uint32 dmada; /**< tx/rx dma data errors */ 4679 uint32 dmape; /**< tx/rx dma descriptor protocol errors */ 4680 uint32 reset; /**< reset count */ 4681 uint32 tbtt; /**< cnts the TBTT int's */ 4682 uint32 txdmawar; 4683 uint32 pkt_callback_reg_fail; /**< callbacks register failure */ 4684 4685 /* MAC counters: 32-bit version of d11.h's macstat_t */ 4686 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 4687 * Control Management (includes retransmissions) 4688 */ 4689 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 4690 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 4691 uint32 txackfrm; /**< number of ACK frames sent out */ 4692 uint32 txdnlfrm; /**< Not used */ 4693 uint32 txbcnfrm; /**< beacons transmitted */ 4694 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 4695 uint32 rxtoolate; /**< receive too late */ 4696 uint32 txfbw; /**< transmit at fallback bw (dynamic bw) */ 4697 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 4698 * or BCN) 4699 */ 4700 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 4701 * driver enqueued frames 4702 */ 4703 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 4704 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 4705 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not 4706 * data/control/management 4707 */ 4708 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 4709 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 4710 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 4711 uint32 rxstrt; /**< Number of received frames with a good PLCP 4712 * (i.e. passing parity check) 4713 */ 4714 uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ 4715 uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ 4716 uint32 rxcfrmucast; /**< number of received CNTRL frames with good FCS and matching RA */ 4717 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 4718 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 4719 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 4720 uint32 rxdfrmocast; /**< number of received DATA frames (good FCS and not matching RA) */ 4721 uint32 rxmfrmocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 4722 uint32 rxcfrmocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 4723 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 4724 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 4725 uint32 rxdfrmmcast; /**< number of RX Data multicast frames received by the MAC */ 4726 uint32 rxmfrmmcast; /**< number of RX Management multicast frames received by the MAC */ 4727 uint32 rxcfrmmcast; /**< number of RX Control multicast frames received by the MAC 4728 * (unlikely to see these) 4729 */ 4730 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 4731 uint32 rxdfrmucastobss; /**< number of unicast frames addressed to the MAC from 4732 * other BSS (WDS FRAME) 4733 */ 4734 uint32 rxbeaconobss; /**< beacons received from other BSS */ 4735 uint32 rxrsptmout; /**< Number of response timeouts for transmitted frames 4736 * expecting a response 4737 */ 4738 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 4739 uint32 rxf0ovfl; /**< Number of receive fifo 0 overflows */ 4740 uint32 rxf1ovfl; /**< Number of receive fifo 1 overflows (obsolete) */ 4741 uint32 rxf2ovfl; /**< Number of receive fifo 2 overflows (obsolete) */ 4742 uint32 txsfovfl; /**< Number of transmit status fifo overflows (obsolete) */ 4743 uint32 pmqovfl; /**< Number of PMQ overflows */ 4744 uint32 rxcgprqfrm; /**< Number of received Probe requests that made it into 4745 * the PRQ fifo 4746 */ 4747 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 4748 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 4749 * not get ACK 4750 */ 4751 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 4752 uint32 prs_timeout; /**< Number of probe requests that were dropped from the PRQ 4753 * fifo because a probe response could not be sent out within 4754 * the time limit defined in M_PRS_MAXTIME 4755 */ 4756 uint32 rxnack; /**< obsolete */ 4757 uint32 frmscons; /**< obsolete */ 4758 uint32 txnack; /**< obsolete */ 4759 uint32 rxback; /**< blockack rxcnt */ 4760 uint32 txback; /**< blockack txcnt */ 4761 4762 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 4763 uint32 txfrag; /**< dot11TransmittedFragmentCount */ 4764 uint32 txmulti; /**< dot11MulticastTransmittedFrameCount */ 4765 uint32 txfail; /**< dot11FailedCount */ 4766 uint32 txretry; /**< dot11RetryCount */ 4767 uint32 txretrie; /**< dot11MultipleRetryCount */ 4768 uint32 rxdup; /**< dot11FrameduplicateCount */ 4769 uint32 txrts; /**< dot11RTSSuccessCount */ 4770 uint32 txnocts; /**< dot11RTSFailureCount */ 4771 uint32 txnoack; /**< dot11ACKFailureCount */ 4772 uint32 rxfrag; /**< dot11ReceivedFragmentCount */ 4773 uint32 rxmulti; /**< dot11MulticastReceivedFrameCount */ 4774 uint32 rxcrc; /**< dot11FCSErrorCount */ 4775 uint32 txfrmsnt; /**< dot11TransmittedFrameCount (bogus MIB?) */ 4776 uint32 rxundec; /**< dot11WEPUndecryptableCount */ 4777 4778 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 4779 uint32 tkipmicfaill; /**< TKIPLocalMICFailures */ 4780 uint32 tkipcntrmsr; /**< TKIPCounterMeasuresInvoked */ 4781 uint32 tkipreplay; /**< TKIPReplays */ 4782 uint32 ccmpfmterr; /**< CCMPFormatErrors */ 4783 uint32 ccmpreplay; /**< CCMPReplays */ 4784 uint32 ccmpundec; /**< CCMPDecryptErrors */ 4785 uint32 fourwayfail; /**< FourWayHandshakeFailures */ 4786 uint32 wepundec; /**< dot11WEPUndecryptableCount */ 4787 uint32 wepicverr; /**< dot11WEPICVErrorCount */ 4788 uint32 decsuccess; /**< DecryptSuccessCount */ 4789 uint32 tkipicverr; /**< TKIPICVErrorCount */ 4790 uint32 wepexcluded; /**< dot11WEPExcludedCount */ 4791 4792 uint32 txchanrej; /**< Tx frames suppressed due to channel rejection */ 4793 uint32 psmwds; /**< Count PSM watchdogs */ 4794 uint32 phywatchdog; /**< Count Phy watchdogs (triggered by ucode) */ 4795 4796 /* MBSS counters, AP only */ 4797 uint32 prq_entries_handled; /**< PRQ entries read in */ 4798 uint32 prq_undirected_entries; /**< which were bcast bss & ssid */ 4799 uint32 prq_bad_entries; /**< which could not be translated to info */ 4800 uint32 atim_suppress_count; /**< TX suppressions on ATIM fifo */ 4801 uint32 bcn_template_not_ready; /**< Template marked in use on send bcn ... */ 4802 uint32 bcn_template_not_ready_done; /**< ...but "DMA done" interrupt rcvd */ 4803 uint32 late_tbtt_dpc; /**< TBTT DPC did not happen in time */ 4804 4805 /* per-rate receive stat counters */ 4806 uint32 rx1mbps; /**< packets rx at 1Mbps */ 4807 uint32 rx2mbps; /**< packets rx at 2Mbps */ 4808 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 4809 uint32 rx6mbps; /**< packets rx at 6Mbps */ 4810 uint32 rx9mbps; /**< packets rx at 9Mbps */ 4811 uint32 rx11mbps; /**< packets rx at 11Mbps */ 4812 uint32 rx12mbps; /**< packets rx at 12Mbps */ 4813 uint32 rx18mbps; /**< packets rx at 18Mbps */ 4814 uint32 rx24mbps; /**< packets rx at 24Mbps */ 4815 uint32 rx36mbps; /**< packets rx at 36Mbps */ 4816 uint32 rx48mbps; /**< packets rx at 48Mbps */ 4817 uint32 rx54mbps; /**< packets rx at 54Mbps */ 4818 uint32 rx108mbps; /**< packets rx at 108mbps */ 4819 uint32 rx162mbps; /**< packets rx at 162mbps */ 4820 uint32 rx216mbps; /**< packets rx at 216 mbps */ 4821 uint32 rx270mbps; /**< packets rx at 270 mbps */ 4822 uint32 rx324mbps; /**< packets rx at 324 mbps */ 4823 uint32 rx378mbps; /**< packets rx at 378 mbps */ 4824 uint32 rx432mbps; /**< packets rx at 432 mbps */ 4825 uint32 rx486mbps; /**< packets rx at 486 mbps */ 4826 uint32 rx540mbps; /**< packets rx at 540 mbps */ 4827 4828 /* pkteng rx frame stats */ 4829 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 4830 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 4831 4832 uint32 rfdisable; /**< count of radio disables */ 4833 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 4834 uint32 bphy_badplcp; 4835 4836 uint32 txexptime; /**< Tx frames suppressed due to timer expiration */ 4837 4838 uint32 txmpdu_sgi; /**< count for sgi transmit */ 4839 uint32 rxmpdu_sgi; /**< count for sgi received */ 4840 uint32 txmpdu_stbc; /**< count for stbc transmit */ 4841 uint32 rxmpdu_stbc; /**< count for stbc received */ 4842 4843 uint32 rxundec_mcst; /**< dot11WEPUndecryptableCount */ 4844 4845 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 4846 uint32 tkipmicfaill_mcst; /**< TKIPLocalMICFailures */ 4847 uint32 tkipcntrmsr_mcst; /**< TKIPCounterMeasuresInvoked */ 4848 uint32 tkipreplay_mcst; /**< TKIPReplays */ 4849 uint32 ccmpfmterr_mcst; /**< CCMPFormatErrors */ 4850 uint32 ccmpreplay_mcst; /**< CCMPReplays */ 4851 uint32 ccmpundec_mcst; /**< CCMPDecryptErrors */ 4852 uint32 fourwayfail_mcst; /**< FourWayHandshakeFailures */ 4853 uint32 wepundec_mcst; /**< dot11WEPUndecryptableCount */ 4854 uint32 wepicverr_mcst; /**< dot11WEPICVErrorCount */ 4855 uint32 decsuccess_mcst; /**< DecryptSuccessCount */ 4856 uint32 tkipicverr_mcst; /**< TKIPICVErrorCount */ 4857 uint32 wepexcluded_mcst; /**< dot11WEPExcludedCount */ 4858 4859 uint32 dma_hang; /**< count for dma hang */ 4860 uint32 reinit; /**< count for reinit */ 4861 4862 uint32 pstatxucast; /**< count of ucast frames xmitted on all psta assoc */ 4863 uint32 pstatxnoassoc; /**< count of txnoassoc frames xmitted on all psta assoc */ 4864 uint32 pstarxucast; /**< count of ucast frames received on all psta assoc */ 4865 uint32 pstarxbcmc; /**< count of bcmc frames received on all psta */ 4866 uint32 pstatxbcmc; /**< count of bcmc frames transmitted on all psta */ 4867 4868 uint32 cso_passthrough; /**< hw cso required but passthrough */ 4869 uint32 cso_normal; /**< hw cso hdr for normal process */ 4870 uint32 chained; /**< number of frames chained */ 4871 uint32 chainedsz1; /**< number of chain size 1 frames */ 4872 uint32 unchained; /**< number of frames not chained */ 4873 uint32 maxchainsz; /**< max chain size so far */ 4874 uint32 currchainsz; /**< current chain size */ 4875 uint32 rxdrop20s; /**< drop secondary cnt */ 4876 uint32 pciereset; /**< Secondary Bus Reset issued by driver */ 4877 uint32 cfgrestore; /**< configspace restore by driver */ 4878 uint32 reinitreason[NREINITREASONCOUNT]; /**< reinitreason counters; 0: Unknown reason */ 4879 uint32 rxrtry; /**< num of received packets with retry bit on */ 4880 uint32 txmpdu; /**< macstat cnt only valid in ver 11. number of MPDUs txed. */ 4881 uint32 rxnodelim; /**< macstat cnt only valid in ver 11. 4882 * number of occasions that no valid delimiter is detected 4883 * by ampdu parser. 4884 */ 4885 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 4886 4887 /* detailed control/management frames */ 4888 uint32 txbar; /**< Number of TX BAR */ 4889 uint32 rxbar; /**< Number of RX BAR */ 4890 uint32 txpspoll; /**< Number of TX PS-poll */ 4891 uint32 rxpspoll; /**< Number of RX PS-poll */ 4892 uint32 txnull; /**< Number of TX NULL_DATA */ 4893 uint32 rxnull; /**< Number of RX NULL_DATA */ 4894 uint32 txqosnull; /**< Number of TX NULL_QoSDATA */ 4895 uint32 rxqosnull; /**< Number of RX NULL_QoSDATA */ 4896 uint32 txassocreq; /**< Number of TX ASSOC request */ 4897 uint32 rxassocreq; /**< Number of RX ASSOC request */ 4898 uint32 txreassocreq; /**< Number of TX REASSOC request */ 4899 uint32 rxreassocreq; /**< Number of RX REASSOC request */ 4900 uint32 txdisassoc; /**< Number of TX DISASSOC */ 4901 uint32 rxdisassoc; /**< Number of RX DISASSOC */ 4902 uint32 txassocrsp; /**< Number of TX ASSOC response */ 4903 uint32 rxassocrsp; /**< Number of RX ASSOC response */ 4904 uint32 txreassocrsp; /**< Number of TX REASSOC response */ 4905 uint32 rxreassocrsp; /**< Number of RX REASSOC response */ 4906 uint32 txauth; /**< Number of TX AUTH */ 4907 uint32 rxauth; /**< Number of RX AUTH */ 4908 uint32 txdeauth; /**< Number of TX DEAUTH */ 4909 uint32 rxdeauth; /**< Number of RX DEAUTH */ 4910 uint32 txprobereq; /**< Number of TX probe request */ 4911 uint32 rxprobereq; /**< Number of RX probe request */ 4912 uint32 txprobersp; /**< Number of TX probe response */ 4913 uint32 rxprobersp; /**< Number of RX probe response */ 4914 uint32 txaction; /**< Number of TX action frame */ 4915 uint32 rxaction; /**< Number of RX action frame */ 4916 uint32 ampdu_wds; /**< Number of AMPDU watchdogs */ 4917 uint32 txlost; /**< Number of lost packets reported in txs */ 4918 uint32 txdatamcast; /**< Number of TX multicast data packets */ 4919 uint32 txdatabcast; /**< Number of TX broadcast data packets */ 4920 uint32 txbcast; /* Broadcast TransmittedFrameCount */ 4921 uint32 txdropped; /* tx dropped pkts */ 4922 uint32 rxbcast; /* BroadcastReceivedFrameCount */ 4923 uint32 rxdropped; /* rx dropped pkts (derived: sum of others) */ 4924 4925 /* This structure is deprecated and used only for ver <= 11. 4926 * All counter variables have to be of uint32. 4927 * Please refer to the following twiki before editing. 4928 * http://hwnbu-twiki.sj.broadcom.com/bin/view/ 4929 * Mwgroup/WlCounters#wlc_layer_counters_non_xTLV 4930 */ 4931 } wl_cnt_ver_11_t; 4932 4933 typedef struct { 4934 uint16 version; /* see definition of WL_CNT_T_VERSION */ 4935 uint16 length; /* length of entire structure */ 4936 4937 /* transmit stat counters */ 4938 uint32 txframe; /* tx data frames */ 4939 uint32 txbyte; /* tx data bytes */ 4940 uint32 txretrans; /* tx mac retransmits */ 4941 uint32 txerror; /* tx data errors (derived: sum of others) */ 4942 uint32 txctl; /* tx management frames */ 4943 uint32 txprshort; /* tx short preamble frames */ 4944 uint32 txserr; /* tx status errors */ 4945 uint32 txnobuf; /* tx out of buffers errors */ 4946 uint32 txnoassoc; /* tx discard because we're not associated */ 4947 uint32 txrunt; /* tx runt frames */ 4948 uint32 txchit; /* tx header cache hit (fastpath) */ 4949 uint32 txcmiss; /* tx header cache miss (slowpath) */ 4950 4951 /* transmit chip error counters */ 4952 uint32 txuflo; /* tx fifo underflows */ 4953 uint32 txphyerr; /* tx phy errors (indicated in tx status) */ 4954 uint32 txphycrs; 4955 4956 /* receive stat counters */ 4957 uint32 rxframe; /* rx data frames */ 4958 uint32 rxbyte; /* rx data bytes */ 4959 uint32 rxerror; /* rx data errors (derived: sum of others) */ 4960 uint32 rxctl; /* rx management frames */ 4961 uint32 rxnobuf; /* rx out of buffers errors */ 4962 uint32 rxnondata; /* rx non data frames in the data channel errors */ 4963 uint32 rxbadds; /* rx bad DS errors */ 4964 uint32 rxbadcm; /* rx bad control or management frames */ 4965 uint32 rxfragerr; /* rx fragmentation errors */ 4966 uint32 rxrunt; /* rx runt frames */ 4967 uint32 rxgiant; /* rx giant frames */ 4968 uint32 rxnoscb; /* rx no scb error */ 4969 uint32 rxbadproto; /* rx invalid frames */ 4970 uint32 rxbadsrcmac; /* rx frames with Invalid Src Mac */ 4971 uint32 rxbadda; /* rx frames tossed for invalid da */ 4972 uint32 rxfilter; /* rx frames filtered out */ 4973 4974 /* receive chip error counters */ 4975 uint32 rxoflo; /* rx fifo overflow errors */ 4976 uint32 rxuflo[NFIFO]; /* rx dma descriptor underflow errors */ 4977 4978 uint32 d11cnt_txrts_off; /* d11cnt txrts value when reset d11cnt */ 4979 uint32 d11cnt_rxcrc_off; /* d11cnt rxcrc value when reset d11cnt */ 4980 uint32 d11cnt_txnocts_off; /* d11cnt txnocts value when reset d11cnt */ 4981 4982 /* misc counters */ 4983 uint32 dmade; /* tx/rx dma descriptor errors */ 4984 uint32 dmada; /* tx/rx dma data errors */ 4985 uint32 dmape; /* tx/rx dma descriptor protocol errors */ 4986 uint32 reset; /* reset count */ 4987 uint32 tbtt; /* cnts the TBTT int's */ 4988 uint32 txdmawar; 4989 uint32 pkt_callback_reg_fail; /* callbacks register failure */ 4990 4991 /* MAC counters: 32-bit version of d11.h's macstat_t */ 4992 uint32 txallfrm; /* total number of frames sent, incl. Data, ACK, RTS, CTS, 4993 * Control Management (includes retransmissions) 4994 */ 4995 uint32 txrtsfrm; /* number of RTS sent out by the MAC */ 4996 uint32 txctsfrm; /* number of CTS sent out by the MAC */ 4997 uint32 txackfrm; /* number of ACK frames sent out */ 4998 uint32 txdnlfrm; /* Not used */ 4999 uint32 txbcnfrm; /* beacons transmitted */ 5000 uint32 txfunfl[8]; /* per-fifo tx underflows */ 5001 uint32 txtplunfl; /* Template underflows (mac was too slow to transmit ACK/CTS 5002 * or BCN) 5003 */ 5004 uint32 txphyerror; /* Transmit phy error, type of error is reported in tx-status for 5005 * driver enqueued frames 5006 */ 5007 uint32 rxfrmtoolong; /* Received frame longer than legal limit (2346 bytes) */ 5008 uint32 rxfrmtooshrt; /* Received frame did not contain enough bytes for its frame type */ 5009 uint32 rxinvmachdr; /* Either the protocol version != 0 or frame type not 5010 * data/control/management 5011 */ 5012 uint32 rxbadfcs; /* number of frames for which the CRC check failed in the MAC */ 5013 uint32 rxbadplcp; /* parity check of the PLCP header failed */ 5014 uint32 rxcrsglitch; /* PHY was able to correlate the preamble but not the header */ 5015 uint32 rxstrt; /* Number of received frames with a good PLCP 5016 * (i.e. passing parity check) 5017 */ 5018 uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ 5019 uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ 5020 uint32 rxcfrmucast; /* number of received CNTRL frames with good FCS and matching RA */ 5021 uint32 rxrtsucast; /* number of unicast RTS addressed to the MAC (good FCS) */ 5022 uint32 rxctsucast; /* number of unicast CTS addressed to the MAC (good FCS) */ 5023 uint32 rxackucast; /* number of ucast ACKS received (good FCS) */ 5024 uint32 rxdfrmocast; /* number of received DATA frames (good FCS and not matching RA) */ 5025 uint32 rxmfrmocast; /* number of received MGMT frames (good FCS and not matching RA) */ 5026 uint32 rxcfrmocast; /* number of received CNTRL frame (good FCS and not matching RA) */ 5027 uint32 rxrtsocast; /* number of received RTS not addressed to the MAC */ 5028 uint32 rxctsocast; /* number of received CTS not addressed to the MAC */ 5029 uint32 rxdfrmmcast; /* number of RX Data multicast frames received by the MAC */ 5030 uint32 rxmfrmmcast; /* number of RX Management multicast frames received by the MAC */ 5031 uint32 rxcfrmmcast; /* number of RX Control multicast frames received by the MAC 5032 * (unlikely to see these) 5033 */ 5034 uint32 rxbeaconmbss; /* beacons received from member of BSS */ 5035 uint32 rxdfrmucastobss; /* number of unicast frames addressed to the MAC from 5036 * other BSS (WDS FRAME) 5037 */ 5038 uint32 rxbeaconobss; /* beacons received from other BSS */ 5039 uint32 rxrsptmout; /* Number of response timeouts for transmitted frames 5040 * expecting a response 5041 */ 5042 uint32 bcntxcancl; /* transmit beacons canceled due to receipt of beacon (IBSS) */ 5043 uint32 rxf0ovfl; /* Number of receive fifo 0 overflows */ 5044 uint32 rxf1ovfl; /* Number of receive fifo 1 overflows (obsolete) */ 5045 uint32 rxf2ovfl; /* Number of receive fifo 2 overflows (obsolete) */ 5046 uint32 txsfovfl; /* Number of transmit status fifo overflows (obsolete) */ 5047 uint32 pmqovfl; /* Number of PMQ overflows */ 5048 uint32 rxcgprqfrm; /* Number of received Probe requests that made it into 5049 * the PRQ fifo 5050 */ 5051 uint32 rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ 5052 uint32 txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did 5053 * not get ACK 5054 */ 5055 uint32 txcgprssuc; /* Tx Probe Response Success (ACK was received) */ 5056 uint32 prs_timeout; /* Number of probe requests that were dropped from the PRQ 5057 * fifo because a probe response could not be sent out within 5058 * the time limit defined in M_PRS_MAXTIME 5059 */ 5060 uint32 rxnack; /* obsolete */ 5061 uint32 frmscons; /* obsolete */ 5062 uint32 txnack; /* obsolete */ 5063 uint32 txglitch_nack; /* obsolete */ 5064 uint32 txburst; /* obsolete */ 5065 5066 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 5067 uint32 txfrag; /* dot11TransmittedFragmentCount */ 5068 uint32 txmulti; /* dot11MulticastTransmittedFrameCount */ 5069 uint32 txfail; /* dot11FailedCount */ 5070 uint32 txretry; /* dot11RetryCount */ 5071 uint32 txretrie; /* dot11MultipleRetryCount */ 5072 uint32 rxdup; /* dot11FrameduplicateCount */ 5073 uint32 txrts; /* dot11RTSSuccessCount */ 5074 uint32 txnocts; /* dot11RTSFailureCount */ 5075 uint32 txnoack; /* dot11ACKFailureCount */ 5076 uint32 rxfrag; /* dot11ReceivedFragmentCount */ 5077 uint32 rxmulti; /* dot11MulticastReceivedFrameCount */ 5078 uint32 rxcrc; /* dot11FCSErrorCount */ 5079 uint32 txfrmsnt; /* dot11TransmittedFrameCount (bogus MIB?) */ 5080 uint32 rxundec; /* dot11WEPUndecryptableCount */ 5081 5082 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5083 uint32 tkipmicfaill; /* TKIPLocalMICFailures */ 5084 uint32 tkipcntrmsr; /* TKIPCounterMeasuresInvoked */ 5085 uint32 tkipreplay; /* TKIPReplays */ 5086 uint32 ccmpfmterr; /* CCMPFormatErrors */ 5087 uint32 ccmpreplay; /* CCMPReplays */ 5088 uint32 ccmpundec; /* CCMPDecryptErrors */ 5089 uint32 fourwayfail; /* FourWayHandshakeFailures */ 5090 uint32 wepundec; /* dot11WEPUndecryptableCount */ 5091 uint32 wepicverr; /* dot11WEPICVErrorCount */ 5092 uint32 decsuccess; /* DecryptSuccessCount */ 5093 uint32 tkipicverr; /* TKIPICVErrorCount */ 5094 uint32 wepexcluded; /* dot11WEPExcludedCount */ 5095 5096 uint32 txchanrej; /* Tx frames suppressed due to channel rejection */ 5097 uint32 psmwds; /* Count PSM watchdogs */ 5098 uint32 phywatchdog; /* Count Phy watchdogs (triggered by ucode) */ 5099 5100 /* MBSS counters, AP only */ 5101 uint32 prq_entries_handled; /* PRQ entries read in */ 5102 uint32 prq_undirected_entries; /* which were bcast bss & ssid */ 5103 uint32 prq_bad_entries; /* which could not be translated to info */ 5104 uint32 atim_suppress_count; /* TX suppressions on ATIM fifo */ 5105 uint32 bcn_template_not_ready; /* Template marked in use on send bcn ... */ 5106 uint32 bcn_template_not_ready_done; /* ...but "DMA done" interrupt rcvd */ 5107 uint32 late_tbtt_dpc; /* TBTT DPC did not happen in time */ 5108 5109 /* per-rate receive stat counters */ 5110 uint32 rx1mbps; /* packets rx at 1Mbps */ 5111 uint32 rx2mbps; /* packets rx at 2Mbps */ 5112 uint32 rx5mbps5; /* packets rx at 5.5Mbps */ 5113 uint32 rx6mbps; /* packets rx at 6Mbps */ 5114 uint32 rx9mbps; /* packets rx at 9Mbps */ 5115 uint32 rx11mbps; /* packets rx at 11Mbps */ 5116 uint32 rx12mbps; /* packets rx at 12Mbps */ 5117 uint32 rx18mbps; /* packets rx at 18Mbps */ 5118 uint32 rx24mbps; /* packets rx at 24Mbps */ 5119 uint32 rx36mbps; /* packets rx at 36Mbps */ 5120 uint32 rx48mbps; /* packets rx at 48Mbps */ 5121 uint32 rx54mbps; /* packets rx at 54Mbps */ 5122 uint32 rx108mbps; /* packets rx at 108mbps */ 5123 uint32 rx162mbps; /* packets rx at 162mbps */ 5124 uint32 rx216mbps; /* packets rx at 216 mbps */ 5125 uint32 rx270mbps; /* packets rx at 270 mbps */ 5126 uint32 rx324mbps; /* packets rx at 324 mbps */ 5127 uint32 rx378mbps; /* packets rx at 378 mbps */ 5128 uint32 rx432mbps; /* packets rx at 432 mbps */ 5129 uint32 rx486mbps; /* packets rx at 486 mbps */ 5130 uint32 rx540mbps; /* packets rx at 540 mbps */ 5131 5132 /* pkteng rx frame stats */ 5133 uint32 pktengrxducast; /* unicast frames rxed by the pkteng code */ 5134 uint32 pktengrxdmcast; /* multicast frames rxed by the pkteng code */ 5135 5136 uint32 rfdisable; /* count of radio disables */ 5137 uint32 bphy_rxcrsglitch; /* PHY count of bphy glitches */ 5138 5139 uint32 txexptime; /* Tx frames suppressed due to timer expiration */ 5140 5141 uint32 txmpdu_sgi; /* count for sgi transmit */ 5142 uint32 rxmpdu_sgi; /* count for sgi received */ 5143 uint32 txmpdu_stbc; /* count for stbc transmit */ 5144 uint32 rxmpdu_stbc; /* count for stbc received */ 5145 5146 uint32 rxundec_mcst; /* dot11WEPUndecryptableCount */ 5147 5148 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5149 uint32 tkipmicfaill_mcst; /* TKIPLocalMICFailures */ 5150 uint32 tkipcntrmsr_mcst; /* TKIPCounterMeasuresInvoked */ 5151 uint32 tkipreplay_mcst; /* TKIPReplays */ 5152 uint32 ccmpfmterr_mcst; /* CCMPFormatErrors */ 5153 uint32 ccmpreplay_mcst; /* CCMPReplays */ 5154 uint32 ccmpundec_mcst; /* CCMPDecryptErrors */ 5155 uint32 fourwayfail_mcst; /* FourWayHandshakeFailures */ 5156 uint32 wepundec_mcst; /* dot11WEPUndecryptableCount */ 5157 uint32 wepicverr_mcst; /* dot11WEPICVErrorCount */ 5158 uint32 decsuccess_mcst; /* DecryptSuccessCount */ 5159 uint32 tkipicverr_mcst; /* TKIPICVErrorCount */ 5160 uint32 wepexcluded_mcst; /* dot11WEPExcludedCount */ 5161 5162 uint32 dma_hang; /* count for stbc received */ 5163 uint32 rxrtry; /* number of packets with retry bit set to 1 */ 5164 } wl_cnt_ver_7_t; 5165 5166 typedef struct { 5167 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 5168 uint16 length; /**< length of entire structure */ 5169 5170 /* transmit stat counters */ 5171 uint32 txframe; /**< tx data frames */ 5172 uint32 txbyte; /**< tx data bytes */ 5173 uint32 txretrans; /**< tx mac retransmits */ 5174 uint32 txerror; /**< tx data errors (derived: sum of others) */ 5175 uint32 txctl; /**< tx management frames */ 5176 uint32 txprshort; /**< tx short preamble frames */ 5177 uint32 txserr; /**< tx status errors */ 5178 uint32 txnobuf; /**< tx out of buffers errors */ 5179 uint32 txnoassoc; /**< tx discard because we're not associated */ 5180 uint32 txrunt; /**< tx runt frames */ 5181 uint32 txchit; /**< tx header cache hit (fastpath) */ 5182 uint32 txcmiss; /**< tx header cache miss (slowpath) */ 5183 5184 /* transmit chip error counters */ 5185 uint32 txuflo; /**< tx fifo underflows */ 5186 uint32 txphyerr; /**< tx phy errors (indicated in tx status) */ 5187 uint32 txphycrs; 5188 5189 /* receive stat counters */ 5190 uint32 rxframe; /**< rx data frames */ 5191 uint32 rxbyte; /**< rx data bytes */ 5192 uint32 rxerror; /**< rx data errors (derived: sum of others) */ 5193 uint32 rxctl; /**< rx management frames */ 5194 uint32 rxnobuf; /**< rx out of buffers errors */ 5195 uint32 rxnondata; /**< rx non data frames in the data channel errors */ 5196 uint32 rxbadds; /**< rx bad DS errors */ 5197 uint32 rxbadcm; /**< rx bad control or management frames */ 5198 uint32 rxfragerr; /**< rx fragmentation errors */ 5199 uint32 rxrunt; /**< rx runt frames */ 5200 uint32 rxgiant; /**< rx giant frames */ 5201 uint32 rxnoscb; /**< rx no scb error */ 5202 uint32 rxbadproto; /**< rx invalid frames */ 5203 uint32 rxbadsrcmac; /**< rx frames with Invalid Src Mac */ 5204 uint32 rxbadda; /**< rx frames tossed for invalid da */ 5205 uint32 rxfilter; /**< rx frames filtered out */ 5206 5207 /* receive chip error counters */ 5208 uint32 rxoflo; /**< rx fifo overflow errors */ 5209 uint32 rxuflo[NFIFO]; /**< rx dma descriptor underflow errors */ 5210 5211 uint32 d11cnt_txrts_off; /**< d11cnt txrts value when reset d11cnt */ 5212 uint32 d11cnt_rxcrc_off; /**< d11cnt rxcrc value when reset d11cnt */ 5213 uint32 d11cnt_txnocts_off; /**< d11cnt txnocts value when reset d11cnt */ 5214 5215 /* misc counters */ 5216 uint32 dmade; /**< tx/rx dma descriptor errors */ 5217 uint32 dmada; /**< tx/rx dma data errors */ 5218 uint32 dmape; /**< tx/rx dma descriptor protocol errors */ 5219 uint32 reset; /**< reset count */ 5220 uint32 tbtt; /**< cnts the TBTT int's */ 5221 uint32 txdmawar; 5222 uint32 pkt_callback_reg_fail; /**< callbacks register failure */ 5223 5224 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5225 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 5226 * Control Management (includes retransmissions) 5227 */ 5228 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 5229 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 5230 uint32 txackfrm; /**< number of ACK frames sent out */ 5231 uint32 txdnlfrm; /**< Not used */ 5232 uint32 txbcnfrm; /**< beacons transmitted */ 5233 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 5234 uint32 rxtoolate; /**< receive too late */ 5235 uint32 txfbw; /**< transmit at fallback bw (dynamic bw) */ 5236 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 5237 * or BCN) 5238 */ 5239 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 5240 * driver enqueued frames 5241 */ 5242 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 5243 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 5244 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not 5245 * data/control/management 5246 */ 5247 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 5248 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 5249 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 5250 uint32 rxstrt; /**< Number of received frames with a good PLCP 5251 * (i.e. passing parity check) 5252 */ 5253 uint32 rxdfrmucastmbss; /**< # of received DATA frames with good FCS and matching RA */ 5254 uint32 rxmfrmucastmbss; /**< # of received mgmt frames with good FCS and matching RA */ 5255 uint32 rxcfrmucast; /**< # of received CNTRL frames with good FCS and matching RA */ 5256 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 5257 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 5258 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 5259 uint32 rxdfrmocast; /**< # of received DATA frames (good FCS and not matching RA) */ 5260 uint32 rxmfrmocast; /**< # of received MGMT frames (good FCS and not matching RA) */ 5261 uint32 rxcfrmocast; /**< # of received CNTRL frame (good FCS and not matching RA) */ 5262 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 5263 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 5264 uint32 rxdfrmmcast; /**< number of RX Data multicast frames received by the MAC */ 5265 uint32 rxmfrmmcast; /**< number of RX Management multicast frames received by the MAC */ 5266 uint32 rxcfrmmcast; /**< number of RX Control multicast frames received by the MAC 5267 * (unlikely to see these) 5268 */ 5269 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 5270 uint32 rxdfrmucastobss; /**< number of unicast frames addressed to the MAC from 5271 * other BSS (WDS FRAME) 5272 */ 5273 uint32 rxbeaconobss; /**< beacons received from other BSS */ 5274 uint32 rxrsptmout; /**< Number of response timeouts for transmitted frames 5275 * expecting a response 5276 */ 5277 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 5278 uint32 rxf0ovfl; /**< Number of receive fifo 0 overflows */ 5279 uint32 rxf1ovfl; /**< Number of receive fifo 1 overflows (obsolete) */ 5280 uint32 rxf2ovfl; /**< Number of receive fifo 2 overflows (obsolete) */ 5281 uint32 txsfovfl; /**< Number of transmit status fifo overflows (obsolete) */ 5282 uint32 pmqovfl; /**< Number of PMQ overflows */ 5283 uint32 rxcgprqfrm; /**< Number of received Probe requests that made it into 5284 * the PRQ fifo 5285 */ 5286 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 5287 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 5288 * not get ACK 5289 */ 5290 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 5291 uint32 prs_timeout; /**< Number of probe requests that were dropped from the PRQ 5292 * fifo because a probe response could not be sent out within 5293 * the time limit defined in M_PRS_MAXTIME 5294 */ 5295 uint32 rxnack; /**< Number of NACKS received (Afterburner) */ 5296 uint32 frmscons; /**< Number of frames completed without transmission because of an 5297 * Afterburner re-queue 5298 */ 5299 uint32 txnack; /**< obsolete */ 5300 uint32 rxback; /**< blockack rxcnt */ 5301 uint32 txback; /**< blockack txcnt */ 5302 5303 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 5304 uint32 txfrag; /**< dot11TransmittedFragmentCount */ 5305 uint32 txmulti; /**< dot11MulticastTransmittedFrameCount */ 5306 uint32 txfail; /**< dot11FailedCount */ 5307 uint32 txretry; /**< dot11RetryCount */ 5308 uint32 txretrie; /**< dot11MultipleRetryCount */ 5309 uint32 rxdup; /**< dot11FrameduplicateCount */ 5310 uint32 txrts; /**< dot11RTSSuccessCount */ 5311 uint32 txnocts; /**< dot11RTSFailureCount */ 5312 uint32 txnoack; /**< dot11ACKFailureCount */ 5313 uint32 rxfrag; /**< dot11ReceivedFragmentCount */ 5314 uint32 rxmulti; /**< dot11MulticastReceivedFrameCount */ 5315 uint32 rxcrc; /**< dot11FCSErrorCount */ 5316 uint32 txfrmsnt; /**< dot11TransmittedFrameCount (bogus MIB?) */ 5317 uint32 rxundec; /**< dot11WEPUndecryptableCount */ 5318 5319 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5320 uint32 tkipmicfaill; /**< TKIPLocalMICFailures */ 5321 uint32 tkipcntrmsr; /**< TKIPCounterMeasuresInvoked */ 5322 uint32 tkipreplay; /**< TKIPReplays */ 5323 uint32 ccmpfmterr; /**< CCMPFormatErrors */ 5324 uint32 ccmpreplay; /**< CCMPReplays */ 5325 uint32 ccmpundec; /**< CCMPDecryptErrors */ 5326 uint32 fourwayfail; /**< FourWayHandshakeFailures */ 5327 uint32 wepundec; /**< dot11WEPUndecryptableCount */ 5328 uint32 wepicverr; /**< dot11WEPICVErrorCount */ 5329 uint32 decsuccess; /**< DecryptSuccessCount */ 5330 uint32 tkipicverr; /**< TKIPICVErrorCount */ 5331 uint32 wepexcluded; /**< dot11WEPExcludedCount */ 5332 5333 uint32 rxundec_mcst; /**< dot11WEPUndecryptableCount */ 5334 5335 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5336 uint32 tkipmicfaill_mcst; /**< TKIPLocalMICFailures */ 5337 uint32 tkipcntrmsr_mcst; /**< TKIPCounterMeasuresInvoked */ 5338 uint32 tkipreplay_mcst; /**< TKIPReplays */ 5339 uint32 ccmpfmterr_mcst; /**< CCMPFormatErrors */ 5340 uint32 ccmpreplay_mcst; /**< CCMPReplays */ 5341 uint32 ccmpundec_mcst; /**< CCMPDecryptErrors */ 5342 uint32 fourwayfail_mcst; /**< FourWayHandshakeFailures */ 5343 uint32 wepundec_mcst; /**< dot11WEPUndecryptableCount */ 5344 uint32 wepicverr_mcst; /**< dot11WEPICVErrorCount */ 5345 uint32 decsuccess_mcst; /**< DecryptSuccessCount */ 5346 uint32 tkipicverr_mcst; /**< TKIPICVErrorCount */ 5347 uint32 wepexcluded_mcst; /**< dot11WEPExcludedCount */ 5348 5349 uint32 txchanrej; /**< Tx frames suppressed due to channel rejection */ 5350 uint32 txexptime; /**< Tx frames suppressed due to timer expiration */ 5351 uint32 psmwds; /**< Count PSM watchdogs */ 5352 uint32 phywatchdog; /**< Count Phy watchdogs (triggered by ucode) */ 5353 5354 /* MBSS counters, AP only */ 5355 uint32 prq_entries_handled; /**< PRQ entries read in */ 5356 uint32 prq_undirected_entries; /**< which were bcast bss & ssid */ 5357 uint32 prq_bad_entries; /**< which could not be translated to info */ 5358 uint32 atim_suppress_count; /**< TX suppressions on ATIM fifo */ 5359 uint32 bcn_template_not_ready; /**< Template marked in use on send bcn ... */ 5360 uint32 bcn_template_not_ready_done; /**< ...but "DMA done" interrupt rcvd */ 5361 uint32 late_tbtt_dpc; /**< TBTT DPC did not happen in time */ 5362 5363 /* per-rate receive stat counters */ 5364 uint32 rx1mbps; /**< packets rx at 1Mbps */ 5365 uint32 rx2mbps; /**< packets rx at 2Mbps */ 5366 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 5367 uint32 rx6mbps; /**< packets rx at 6Mbps */ 5368 uint32 rx9mbps; /**< packets rx at 9Mbps */ 5369 uint32 rx11mbps; /**< packets rx at 11Mbps */ 5370 uint32 rx12mbps; /**< packets rx at 12Mbps */ 5371 uint32 rx18mbps; /**< packets rx at 18Mbps */ 5372 uint32 rx24mbps; /**< packets rx at 24Mbps */ 5373 uint32 rx36mbps; /**< packets rx at 36Mbps */ 5374 uint32 rx48mbps; /**< packets rx at 48Mbps */ 5375 uint32 rx54mbps; /**< packets rx at 54Mbps */ 5376 uint32 rx108mbps; /**< packets rx at 108mbps */ 5377 uint32 rx162mbps; /**< packets rx at 162mbps */ 5378 uint32 rx216mbps; /**< packets rx at 216 mbps */ 5379 uint32 rx270mbps; /**< packets rx at 270 mbps */ 5380 uint32 rx324mbps; /**< packets rx at 324 mbps */ 5381 uint32 rx378mbps; /**< packets rx at 378 mbps */ 5382 uint32 rx432mbps; /**< packets rx at 432 mbps */ 5383 uint32 rx486mbps; /**< packets rx at 486 mbps */ 5384 uint32 rx540mbps; /**< packets rx at 540 mbps */ 5385 5386 /* pkteng rx frame stats */ 5387 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 5388 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 5389 5390 uint32 rfdisable; /**< count of radio disables */ 5391 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 5392 uint32 bphy_badplcp; 5393 5394 uint32 txmpdu_sgi; /**< count for sgi transmit */ 5395 uint32 rxmpdu_sgi; /**< count for sgi received */ 5396 uint32 txmpdu_stbc; /**< count for stbc transmit */ 5397 uint32 rxmpdu_stbc; /**< count for stbc received */ 5398 5399 uint32 rxdrop20s; /**< drop secondary cnt */ 5400 /* All counter variables have to be of uint32. */ 5401 } wl_cnt_ver_6_t; 5402 5403 #define WL_DELTA_STATS_T_VERSION 2 /**< current version of wl_delta_stats_t struct */ 5404 5405 typedef struct { 5406 uint16 version; /**< see definition of WL_DELTA_STATS_T_VERSION */ 5407 uint16 length; /**< length of entire structure */ 5408 5409 /* transmit stat counters */ 5410 uint32 txframe; /**< tx data frames */ 5411 uint32 txbyte; /**< tx data bytes */ 5412 uint32 txretrans; /**< tx mac retransmits */ 5413 uint32 txfail; /**< tx failures */ 5414 5415 /* receive stat counters */ 5416 uint32 rxframe; /**< rx data frames */ 5417 uint32 rxbyte; /**< rx data bytes */ 5418 5419 /* per-rate receive stat counters */ 5420 uint32 rx1mbps; /**< packets rx at 1Mbps */ 5421 uint32 rx2mbps; /**< packets rx at 2Mbps */ 5422 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 5423 uint32 rx6mbps; /**< packets rx at 6Mbps */ 5424 uint32 rx9mbps; /**< packets rx at 9Mbps */ 5425 uint32 rx11mbps; /**< packets rx at 11Mbps */ 5426 uint32 rx12mbps; /**< packets rx at 12Mbps */ 5427 uint32 rx18mbps; /**< packets rx at 18Mbps */ 5428 uint32 rx24mbps; /**< packets rx at 24Mbps */ 5429 uint32 rx36mbps; /**< packets rx at 36Mbps */ 5430 uint32 rx48mbps; /**< packets rx at 48Mbps */ 5431 uint32 rx54mbps; /**< packets rx at 54Mbps */ 5432 uint32 rx108mbps; /**< packets rx at 108mbps */ 5433 uint32 rx162mbps; /**< packets rx at 162mbps */ 5434 uint32 rx216mbps; /**< packets rx at 216 mbps */ 5435 uint32 rx270mbps; /**< packets rx at 270 mbps */ 5436 uint32 rx324mbps; /**< packets rx at 324 mbps */ 5437 uint32 rx378mbps; /**< packets rx at 378 mbps */ 5438 uint32 rx432mbps; /**< packets rx at 432 mbps */ 5439 uint32 rx486mbps; /**< packets rx at 486 mbps */ 5440 uint32 rx540mbps; /**< packets rx at 540 mbps */ 5441 5442 /* phy stats */ 5443 uint32 rxbadplcp; 5444 uint32 rxcrsglitch; 5445 uint32 bphy_rxcrsglitch; 5446 uint32 bphy_badplcp; 5447 5448 uint32 slice_index; /**< Slice for which stats are reported */ 5449 5450 } wl_delta_stats_t; 5451 5452 /* Partial statistics counter report */ 5453 #define WL_CNT_CTL_MGT_FRAMES 0 5454 5455 typedef struct { 5456 uint16 type; 5457 uint16 len; 5458 5459 /* detailed control/management frames */ 5460 uint32 txnull; 5461 uint32 rxnull; 5462 uint32 txqosnull; 5463 uint32 rxqosnull; 5464 uint32 txassocreq; 5465 uint32 rxassocreq; 5466 uint32 txreassocreq; 5467 uint32 rxreassocreq; 5468 uint32 txdisassoc; 5469 uint32 rxdisassoc; 5470 uint32 txassocrsp; 5471 uint32 rxassocrsp; 5472 uint32 txreassocrsp; 5473 uint32 rxreassocrsp; 5474 uint32 txauth; 5475 uint32 rxauth; 5476 uint32 txdeauth; 5477 uint32 rxdeauth; 5478 uint32 txprobereq; 5479 uint32 rxprobereq; 5480 uint32 txprobersp; 5481 uint32 rxprobersp; 5482 uint32 txaction; 5483 uint32 rxaction; 5484 uint32 txrts; 5485 uint32 rxrts; 5486 uint32 txcts; 5487 uint32 rxcts; 5488 uint32 txack; 5489 uint32 rxack; 5490 uint32 txbar; 5491 uint32 rxbar; 5492 uint32 txback; 5493 uint32 rxback; 5494 uint32 txpspoll; 5495 uint32 rxpspoll; 5496 } wl_ctl_mgt_cnt_t; 5497 5498 typedef struct { 5499 uint32 packets; 5500 uint32 bytes; 5501 } wl_traffic_stats_t; 5502 5503 typedef struct { 5504 uint16 version; /**< see definition of WL_WME_CNT_VERSION */ 5505 uint16 length; /**< length of entire structure */ 5506 5507 wl_traffic_stats_t tx[AC_COUNT]; /**< Packets transmitted */ 5508 wl_traffic_stats_t tx_failed[AC_COUNT]; /**< Packets dropped or failed to transmit */ 5509 wl_traffic_stats_t rx[AC_COUNT]; /**< Packets received */ 5510 wl_traffic_stats_t rx_failed[AC_COUNT]; /**< Packets failed to receive */ 5511 5512 wl_traffic_stats_t forward[AC_COUNT]; /**< Packets forwarded by AP */ 5513 5514 wl_traffic_stats_t tx_expired[AC_COUNT]; /**< packets dropped due to lifetime expiry */ 5515 5516 } wl_wme_cnt_t; 5517 5518 struct wl_msglevel2 { 5519 uint32 low; 5520 uint32 high; 5521 }; 5522 5523 /* A versioned structure for setting and retrieving debug message levels. */ 5524 #define WL_MSGLEVEL_STRUCT_VERSION_1 1 5525 5526 typedef struct wl_msglevel_v1 { 5527 uint16 version; 5528 uint16 length; 5529 uint32 msglevel1; 5530 uint32 msglevel2; 5531 uint32 msglevel3; 5532 /* add another uint32 when full */ 5533 } wl_msglevel_v1_t; 5534 5535 #define WL_ICMP_IPV6_CFG_VERSION 1 5536 #define WL_ICMP_IPV6_CLEAR_ALL (1 << 0) 5537 5538 typedef struct wl_icmp_ipv6_cfg { 5539 uint16 version; 5540 uint16 length; 5541 uint16 fixed_length; 5542 uint16 flags; 5543 uint32 num_ipv6; 5544 /* num_ipv6 to follow */ 5545 struct ipv6_addr host_ipv6[]; 5546 } wl_icmp_ipv6_cfg_t; 5547 5548 #define WL_ICMP_CFG_IPV6_FIXED_LEN OFFSETOF(wl_icmp_ipv6_cfg_t, host_ipv6) 5549 #define WL_ICMP_CFG_IPV6_LEN(count) (WL_ICMP_CFG_IPV6_FIXED_LEN + \ 5550 ((count) * sizeof(struct ipv6_addr))) 5551 5552 typedef struct wl_mkeep_alive_pkt { 5553 uint16 version; /* Version for mkeep_alive */ 5554 uint16 length; /* length of fixed parameters in the structure */ 5555 uint32 period_msec; /* high bit on means immediate send */ 5556 uint16 len_bytes; 5557 uint8 keep_alive_id; /* 0 - 3 for N = 4 */ 5558 uint8 data[1]; 5559 } wl_mkeep_alive_pkt_t; 5560 5561 #define WL_MKEEP_ALIVE_VERSION 1 5562 #define WL_MKEEP_ALIVE_FIXED_LEN OFFSETOF(wl_mkeep_alive_pkt_t, data) 5563 /* 1/2 second precision since idle time is a seconds counter anyway */ 5564 #define WL_MKEEP_ALIVE_PRECISION 500 5565 #define WL_MKEEP_ALIVE_PERIOD_MASK 0x7FFFFFFF 5566 #define WL_MKEEP_ALIVE_IMMEDIATE 0x80000000 5567 5568 /** TCP Keep-Alive conn struct */ 5569 typedef struct wl_mtcpkeep_alive_conn_pkt { 5570 struct ether_addr saddr; /**< src mac address */ 5571 struct ether_addr daddr; /**< dst mac address */ 5572 struct ipv4_addr sipaddr; /**< source IP addr */ 5573 struct ipv4_addr dipaddr; /**< dest IP addr */ 5574 uint16 sport; /**< src port */ 5575 uint16 dport; /**< dest port */ 5576 uint32 seq; /**< seq number */ 5577 uint32 ack; /**< ACK number */ 5578 uint16 tcpwin; /**< TCP window */ 5579 uint16 PAD; 5580 } wl_mtcpkeep_alive_conn_pkt_t; 5581 5582 /** TCP Keep-Alive interval struct */ 5583 typedef struct wl_mtcpkeep_alive_timers_pkt { 5584 uint16 interval; /**< interval timer */ 5585 uint16 retry_interval; /**< retry_interval timer */ 5586 uint16 retry_count; /**< retry_count */ 5587 } wl_mtcpkeep_alive_timers_pkt_t; 5588 5589 typedef struct wake_info { 5590 uint32 wake_reason; 5591 uint32 wake_info_len; /**< size of packet */ 5592 uint8 packet[]; 5593 } wake_info_t; 5594 5595 typedef struct wake_pkt { 5596 uint32 wake_pkt_len; /**< size of packet */ 5597 uint8 packet[]; 5598 } wake_pkt_t; 5599 5600 #define WL_MTCPKEEP_ALIVE_VERSION 1 5601 5602 /* #ifdef WLBA */ 5603 5604 #define WLC_BA_CNT_VERSION 1 /**< current version of wlc_ba_cnt_t */ 5605 5606 /** block ack related stats */ 5607 typedef struct wlc_ba_cnt { 5608 uint16 version; /**< WLC_BA_CNT_VERSION */ 5609 uint16 length; /**< length of entire structure */ 5610 5611 /* transmit stat counters */ 5612 uint32 txpdu; /**< pdus sent */ 5613 uint32 txsdu; /**< sdus sent */ 5614 uint32 txfc; /**< tx side flow controlled packets */ 5615 uint32 txfci; /**< tx side flow control initiated */ 5616 uint32 txretrans; /**< retransmitted pdus */ 5617 uint32 txbatimer; /**< ba resend due to timer */ 5618 uint32 txdrop; /**< dropped packets */ 5619 uint32 txaddbareq; /**< addba req sent */ 5620 uint32 txaddbaresp; /**< addba resp sent */ 5621 uint32 txdelba; /**< delba sent */ 5622 uint32 txba; /**< ba sent */ 5623 uint32 txbar; /**< bar sent */ 5624 uint32 txpad[4]; /**< future */ 5625 5626 /* receive side counters */ 5627 uint32 rxpdu; /**< pdus recd */ 5628 uint32 rxqed; /**< pdus buffered before sending up */ 5629 uint32 rxdup; /**< duplicate pdus */ 5630 uint32 rxnobuf; /**< pdus discarded due to no buf */ 5631 uint32 rxaddbareq; /**< addba req recd */ 5632 uint32 rxaddbaresp; /**< addba resp recd */ 5633 uint32 rxdelba; /**< delba recd */ 5634 uint32 rxba; /**< ba recd */ 5635 uint32 rxbar; /**< bar recd */ 5636 uint32 rxinvba; /**< invalid ba recd */ 5637 uint32 rxbaholes; /**< ba recd with holes */ 5638 uint32 rxunexp; /**< unexpected packets */ 5639 uint32 rxpad[4]; /**< future */ 5640 } wlc_ba_cnt_t; 5641 /* #endif WLBA */ 5642 5643 /** structure for per-tid ampdu control */ 5644 struct ampdu_tid_control { 5645 uint8 tid; /* tid */ 5646 uint8 enable; /* enable/disable */ 5647 }; 5648 5649 /** struct for ampdu tx/rx aggregation control */ 5650 struct ampdu_aggr { 5651 int8 aggr_override; /**< aggr overrided by dongle. Not to be set by host. */ 5652 uint16 conf_TID_bmap; /**< bitmap of TIDs to configure */ 5653 uint16 enab_TID_bmap; /**< enable/disable per TID */ 5654 }; 5655 5656 /** structure for identifying ea/tid for sending addba/delba */ 5657 struct ampdu_ea_tid { 5658 struct ether_addr ea; /**< Station address */ 5659 uint8 tid; /**< tid */ 5660 uint8 initiator; /**< 0 is recipient, 1 is originator */ 5661 }; 5662 5663 /** structure for identifying retry/tid for retry_limit_tid/rr_retry_limit_tid */ 5664 struct ampdu_retry_tid { 5665 uint8 tid; /**< tid */ 5666 uint8 retry; /**< retry value */ 5667 }; 5668 5669 #define BDD_FNAME_LEN 32 /**< Max length of friendly name */ 5670 typedef struct bdd_fname { 5671 uint8 len; /**< length of friendly name */ 5672 uchar name[BDD_FNAME_LEN]; /**< friendly name */ 5673 } bdd_fname_t; 5674 5675 /* structure for addts arguments */ 5676 /** For ioctls that take a list of TSPEC */ 5677 struct tslist { 5678 int32 count; /**< number of tspecs */ 5679 struct tsinfo_arg tsinfo[]; /**< variable length array of tsinfo */ 5680 }; 5681 5682 /* WLTDLS */ 5683 /**structure for tdls iovars */ 5684 typedef struct tdls_iovar { 5685 struct ether_addr ea; /**< Station address */ 5686 uint8 mode; /**< mode: depends on iovar */ 5687 uint8 PAD; 5688 chanspec_t chanspec; 5689 uint8 PAD[6]; 5690 } tdls_iovar_t; 5691 5692 #define TDLS_WFD_IE_SIZE 512 5693 /**structure for tdls wfd ie */ 5694 typedef struct tdls_wfd_ie_iovar { 5695 struct ether_addr ea; /**< Station address */ 5696 uint8 mode; 5697 uint8 PAD; 5698 uint16 length; 5699 uint8 data[TDLS_WFD_IE_SIZE]; 5700 } tdls_wfd_ie_iovar_t; 5701 /* #endif WLTDLS */ 5702 5703 /** structure for addts/delts arguments */ 5704 typedef struct tspec_arg { 5705 uint16 version; /**< see definition of TSPEC_ARG_VERSION */ 5706 uint16 length; /**< length of entire structure */ 5707 uint32 flag; /**< bit field */ 5708 /* TSPEC Arguments */ 5709 struct tsinfo_arg tsinfo; /**< TS Info bit field */ 5710 uint8 PAD; 5711 uint16 nom_msdu_size; /**< (Nominal or fixed) MSDU Size (bytes) */ 5712 uint16 max_msdu_size; /**< Maximum MSDU Size (bytes) */ 5713 uint32 min_srv_interval; /**< Minimum Service Interval (us) */ 5714 uint32 max_srv_interval; /**< Maximum Service Interval (us) */ 5715 uint32 inactivity_interval; /**< Inactivity Interval (us) */ 5716 uint32 suspension_interval; /**< Suspension Interval (us) */ 5717 uint32 srv_start_time; /**< Service Start Time (us) */ 5718 uint32 min_data_rate; /**< Minimum Data Rate (bps) */ 5719 uint32 mean_data_rate; /**< Mean Data Rate (bps) */ 5720 uint32 peak_data_rate; /**< Peak Data Rate (bps) */ 5721 uint32 max_burst_size; /**< Maximum Burst Size (bytes) */ 5722 uint32 delay_bound; /**< Delay Bound (us) */ 5723 uint32 min_phy_rate; /**< Minimum PHY Rate (bps) */ 5724 uint16 surplus_bw; /**< Surplus Bandwidth Allowance (range 1.0 to 8.0) */ 5725 uint16 medium_time; /**< Medium Time (32 us/s periods) */ 5726 uint8 dialog_token; /**< dialog token */ 5727 uint8 PAD[3]; 5728 } tspec_arg_t; 5729 5730 /** tspec arg for desired station */ 5731 typedef struct tspec_per_sta_arg { 5732 struct ether_addr ea; 5733 uint8 PAD[2]; 5734 struct tspec_arg ts; 5735 } tspec_per_sta_arg_t; 5736 5737 /** structure for max bandwidth for each access category */ 5738 typedef struct wme_max_bandwidth { 5739 uint32 ac[AC_COUNT]; /**< max bandwidth for each access category */ 5740 } wme_max_bandwidth_t; 5741 5742 #define WL_WME_MBW_PARAMS_IO_BYTES (sizeof(wme_max_bandwidth_t)) 5743 5744 /* current version of wl_tspec_arg_t struct */ 5745 #define TSPEC_ARG_VERSION 2 /**< current version of wl_tspec_arg_t struct */ 5746 #define TSPEC_ARG_LENGTH 55 /**< argument length from tsinfo to medium_time */ 5747 #define TSPEC_DEFAULT_DIALOG_TOKEN 42 /**< default dialog token */ 5748 #define TSPEC_DEFAULT_SBW_FACTOR 0x3000 /**< default surplus bw */ 5749 5750 #define WL_WOWL_KEEPALIVE_MAX_PACKET_SIZE 80 5751 #define WLC_WOWL_MAX_KEEPALIVE 2 5752 5753 /** Packet lifetime configuration per ac */ 5754 typedef struct wl_lifetime { 5755 uint32 ac; /**< access class */ 5756 uint32 lifetime; /**< Packet lifetime value in ms */ 5757 } wl_lifetime_t; 5758 5759 /** Management time configuration */ 5760 typedef struct wl_lifetime_mg { 5761 uint32 mgmt_bitmap; /**< Mgmt subtype */ 5762 uint32 lifetime; /**< Packet lifetime value in us */ 5763 } wl_lifetime_mg_t; 5764 5765 /* MAC Sample Capture related */ 5766 #define WL_MACCAPTR_DEFSTART_PTR 0xA00 5767 #define WL_MACCAPTR_DEFSTOP_PTR 0xA3F 5768 #define WL_MACCAPTR_DEFSZ 0x3F 5769 5770 #define WL_MACCAPTR_DEF_MASK 0xFFFFFFFF 5771 5772 typedef enum { 5773 WL_MACCAPT_TRIG = 0, 5774 WL_MACCAPT_STORE = 1, 5775 WL_MACCAPT_TRANS = 2, 5776 WL_MACCAPT_MATCH = 3 5777 } maccaptr_optn; 5778 5779 typedef enum { 5780 WL_MACCAPT_STRT = 1, 5781 WL_MACCAPT_STOP = 2, 5782 WL_MACCAPT_RST = 3 5783 } maccaptr_cmd_t; 5784 5785 /* MAC Sample Capture Set-up Paramters */ 5786 typedef struct wl_maccapture_params { 5787 uint8 gpio_sel; 5788 uint8 la_mode; /* TRUE: GPIO Out Enabled */ 5789 uint8 PAD[2]; 5790 uint32 start_ptr; /* Start address to store */ 5791 uint32 stop_ptr; /* Stop address to store */ 5792 uint8 optn_bmp; /* Options */ 5793 uint8 PAD[3]; 5794 /* Don't change the order after this nor 5795 * add anything in betw. Code uses offsets to populate 5796 * registers 5797 */ 5798 uint32 tr_mask; /* Trigger Mask */ 5799 uint32 tr_val; /* Trigger Value */ 5800 uint32 s_mask; /* Store Mode Mask */ 5801 uint32 x_mask; /* Trans. Mode Mask */ 5802 uint32 m_mask; /* Match Mode Mask */ 5803 uint32 m_val; /* Match Value */ 5804 maccaptr_cmd_t cmd; /* Start / Stop */ 5805 } wl_maccapture_params_t; 5806 5807 /** Channel Switch Announcement param */ 5808 typedef struct wl_chan_switch { 5809 uint8 mode; /**< value 0 or 1 */ 5810 uint8 count; /**< count # of beacons before switching */ 5811 chanspec_t chspec; /**< chanspec */ 5812 uint8 reg; /**< regulatory class */ 5813 uint8 frame_type; /**< csa frame type, unicast or broadcast */ 5814 } wl_chan_switch_t; 5815 5816 enum { 5817 PFN_LIST_ORDER, 5818 PFN_RSSI 5819 }; 5820 5821 enum { 5822 DISABLE, 5823 ENABLE 5824 }; 5825 5826 enum { 5827 OFF_ADAPT, 5828 SMART_ADAPT, 5829 STRICT_ADAPT, 5830 SLOW_ADAPT 5831 }; 5832 5833 #define SORT_CRITERIA_BIT 0 5834 #define AUTO_NET_SWITCH_BIT 1 5835 #define ENABLE_BKGRD_SCAN_BIT 2 5836 #define IMMEDIATE_SCAN_BIT 3 5837 #define AUTO_CONNECT_BIT 4 5838 #define ENABLE_BD_SCAN_BIT 5 5839 #define ENABLE_ADAPTSCAN_BIT 6 5840 #define IMMEDIATE_EVENT_BIT 8 5841 #define SUPPRESS_SSID_BIT 9 5842 #define ENABLE_NET_OFFLOAD_BIT 10 5843 /** report found/lost events for SSID and BSSID networks seperately */ 5844 #define REPORT_SEPERATELY_BIT 11 5845 5846 #define SORT_CRITERIA_MASK 0x0001 5847 #define AUTO_NET_SWITCH_MASK 0x0002 5848 #define ENABLE_BKGRD_SCAN_MASK 0x0004 5849 #define IMMEDIATE_SCAN_MASK 0x0008 5850 #define AUTO_CONNECT_MASK 0x0010 5851 5852 #define ENABLE_BD_SCAN_MASK 0x0020 5853 #define ENABLE_ADAPTSCAN_MASK 0x00c0 5854 #define IMMEDIATE_EVENT_MASK 0x0100 5855 #define SUPPRESS_SSID_MASK 0x0200 5856 #define ENABLE_NET_OFFLOAD_MASK 0x0400 5857 /** report found/lost events for SSID and BSSID networks seperately */ 5858 #define REPORT_SEPERATELY_MASK 0x0800 5859 5860 #define PFN_VERSION 2 5861 5862 #define PFN_COMPLETE 1 5863 #define PFN_INCOMPLETE 0 5864 5865 #define DEFAULT_BESTN 2 5866 #define DEFAULT_MSCAN 0 5867 #define DEFAULT_REPEAT 10 5868 #define DEFAULT_EXP 2 5869 5870 #define PFN_PARTIAL_SCAN_BIT 0 5871 #define PFN_PARTIAL_SCAN_MASK 1 5872 5873 #define PFN_SWC_RSSI_WINDOW_MAX 8 5874 #define PFN_SWC_MAX_NUM_APS 16 5875 #define PFN_HOTLIST_MAX_NUM_APS 64 5876 5877 #define MAX_EPNO_HIDDEN_SSID 8 5878 #define MAX_WHITELIST_SSID 2 5879 5880 /* Version 1 and 2 for various scan results structures defined below */ 5881 #define PFN_SCANRESULTS_VERSION_V1 1 5882 #define PFN_SCANRESULTS_VERSION_V2 2 5883 5884 /** PFN network info structure */ 5885 typedef struct wl_pfn_subnet_info_v1 { 5886 struct ether_addr BSSID; 5887 uint8 channel; /**< channel number only */ 5888 uint8 SSID_len; 5889 uint8 SSID[32]; 5890 } wl_pfn_subnet_info_v1_t; 5891 5892 typedef struct wl_pfn_subnet_info_v2 { 5893 struct ether_addr BSSID; 5894 uint8 channel; /**< channel number only */ 5895 uint8 SSID_len; 5896 union { 5897 uint8 SSID[32]; 5898 uint16 index; 5899 } u; 5900 } wl_pfn_subnet_info_v2_t; 5901 5902 typedef struct wl_pfn_net_info_v1 { 5903 wl_pfn_subnet_info_v1_t pfnsubnet; 5904 int16 RSSI; /**< receive signal strength (in dBm) */ 5905 uint16 timestamp; /**< age in seconds */ 5906 } wl_pfn_net_info_v1_t; 5907 5908 typedef struct wl_pfn_net_info_v2 { 5909 wl_pfn_subnet_info_v2_t pfnsubnet; 5910 int16 RSSI; /**< receive signal strength (in dBm) */ 5911 uint16 timestamp; /**< age in seconds */ 5912 } wl_pfn_net_info_v2_t; 5913 5914 /* Version 1 and 2 for various lbest scan results structures below */ 5915 #define PFN_LBEST_SCAN_RESULT_VERSION_V1 1 5916 #define PFN_LBEST_SCAN_RESULT_VERSION_V2 2 5917 5918 #define MAX_CHBKT_PER_RESULT 4 5919 5920 typedef struct wl_pfn_lnet_info_v1 { 5921 wl_pfn_subnet_info_v1_t pfnsubnet; /**< BSSID + channel + SSID len + SSID */ 5922 uint16 flags; /**< partial scan, etc */ 5923 int16 RSSI; /**< receive signal strength (in dBm) */ 5924 uint32 timestamp; /**< age in miliseconds */ 5925 uint16 rtt0; /**< estimated distance to this AP in centimeters */ 5926 uint16 rtt1; /**< standard deviation of the distance to this AP in centimeters */ 5927 } wl_pfn_lnet_info_v1_t; 5928 5929 typedef struct wl_pfn_lnet_info_v2 { 5930 wl_pfn_subnet_info_v2_t pfnsubnet; /**< BSSID + channel + SSID len + SSID */ 5931 uint16 flags; /**< partial scan, etc */ 5932 int16 RSSI; /**< receive signal strength (in dBm) */ 5933 uint32 timestamp; /**< age in miliseconds */ 5934 uint16 rtt0; /**< estimated distance to this AP in centimeters */ 5935 uint16 rtt1; /**< standard deviation of the distance to this AP in centimeters */ 5936 } wl_pfn_lnet_info_v2_t; 5937 5938 typedef struct wl_pfn_lscanresults_v1 { 5939 uint32 version; 5940 uint32 status; 5941 uint32 count; 5942 wl_pfn_lnet_info_v1_t netinfo[1]; 5943 } wl_pfn_lscanresults_v1_t; 5944 5945 typedef struct wl_pfn_lscanresults_v2 { 5946 uint32 version; 5947 uint16 status; 5948 uint16 count; 5949 uint32 scan_ch_buckets[MAX_CHBKT_PER_RESULT]; 5950 wl_pfn_lnet_info_v2_t netinfo[1]; 5951 } wl_pfn_lscanresults_v2_t; 5952 5953 /**this is used to report on 1-* pfn scan results */ 5954 typedef struct wl_pfn_scanresults_v1 { 5955 uint32 version; 5956 uint32 status; 5957 uint32 count; 5958 wl_pfn_net_info_v1_t netinfo[1]; 5959 } wl_pfn_scanresults_v1_t; 5960 5961 typedef struct wl_pfn_scanresults_v2 { 5962 uint32 version; 5963 uint32 status; 5964 uint32 count; 5965 uint32 scan_ch_bucket; 5966 wl_pfn_net_info_v2_t netinfo[1]; 5967 } wl_pfn_scanresults_v2_t; 5968 5969 typedef struct wl_pfn_significant_net { 5970 uint16 flags; 5971 uint16 channel; 5972 struct ether_addr BSSID; 5973 int8 rssi[PFN_SWC_RSSI_WINDOW_MAX]; 5974 } wl_pfn_significant_net_t; 5975 5976 #define PFN_SWC_SCANRESULT_VERSION 1 5977 5978 typedef struct wl_pfn_swc_results { 5979 uint32 version; 5980 uint32 pkt_count; /**< No. of results in current frame */ 5981 uint32 total_count; /**< Total expected results */ 5982 wl_pfn_significant_net_t list[]; 5983 } wl_pfn_swc_results_t; 5984 typedef struct wl_pfn_net_info_bssid { 5985 struct ether_addr BSSID; 5986 uint8 channel; /**< channel number only */ 5987 int8 RSSI; /**< receive signal strength (in dBm) */ 5988 uint16 flags; /**< (e.g. partial scan, off channel) */ 5989 uint16 timestamp; /**< age in seconds */ 5990 } wl_pfn_net_info_bssid_t; 5991 5992 typedef struct wl_pfn_scanhist_bssid { 5993 uint32 version; 5994 uint32 status; 5995 uint32 count; 5996 wl_pfn_net_info_bssid_t netinfo[1]; 5997 } wl_pfn_scanhist_bssid_t; 5998 5999 /* Version 1 and 2 for various single scan result */ 6000 #define PFN_SCANRESULT_VERSION_V1 1 6001 #define PFN_SCANRESULT_VERSION_V2 2 6002 6003 /* used to report exactly one scan result */ 6004 /* plus reports detailed scan info in bss_info */ 6005 typedef struct wl_pfn_scanresult_v1 { 6006 uint32 version; 6007 uint32 status; 6008 uint32 count; 6009 wl_pfn_net_info_v1_t netinfo; 6010 wl_bss_info_v109_t bss_info; 6011 } wl_pfn_scanresult_v1_t; 6012 6013 typedef struct wl_pfn_scanresult_v2 { 6014 uint32 version; 6015 uint32 status; 6016 uint32 count; 6017 wl_pfn_net_info_v2_t netinfo; 6018 wl_bss_info_v109_t bss_info; 6019 } wl_pfn_scanresult_v2_t; 6020 6021 typedef struct wl_pfn_scanresult_v2_1 { 6022 uint32 version; 6023 uint32 status; 6024 uint32 count; 6025 wl_pfn_net_info_v2_t netinfo; 6026 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 6027 } wl_pfn_scanresult_v2_1_t; 6028 6029 /**PFN data structure */ 6030 typedef struct wl_pfn_param { 6031 int32 version; /**< PNO parameters version */ 6032 int32 scan_freq; /**< Scan frequency */ 6033 int32 lost_network_timeout; /**< Timeout in sec. to declare 6034 * discovered network as lost 6035 */ 6036 int16 flags; /**< Bit field to control features 6037 * of PFN such as sort criteria auto 6038 * enable switch and background scan 6039 */ 6040 int16 rssi_margin; /**< Margin to avoid jitter for choosing a 6041 * PFN based on RSSI sort criteria 6042 */ 6043 uint8 bestn; /**< number of best networks in each scan */ 6044 uint8 mscan; /**< number of scans recorded */ 6045 uint8 repeat; /**< Minimum number of scan intervals 6046 *before scan frequency changes in adaptive scan 6047 */ 6048 uint8 exp; /**< Exponent of 2 for maximum scan interval */ 6049 int32 slow_freq; /**< slow scan period */ 6050 } wl_pfn_param_t; 6051 6052 typedef struct wl_pfn_bssid { 6053 struct ether_addr macaddr; 6054 /* Bit4: suppress_lost, Bit3: suppress_found */ 6055 uint16 flags; 6056 } wl_pfn_bssid_t; 6057 typedef struct wl_pfn_significant_bssid { 6058 struct ether_addr macaddr; 6059 int8 rssi_low_threshold; 6060 int8 rssi_high_threshold; 6061 } wl_pfn_significant_bssid_t; 6062 #define WL_PFN_SUPPRESSFOUND_MASK 0x08 6063 #define WL_PFN_SUPPRESSLOST_MASK 0x10 6064 #define WL_PFN_SSID_IMPRECISE_MATCH 0x80 6065 #define WL_PFN_SSID_SAME_NETWORK 0x10000 6066 #define WL_PFN_SUPPRESS_AGING_MASK 0x20000 6067 #define WL_PFN_FLUSH_ALL_SSIDS 0x40000 6068 6069 #define WL_PFN_IOVAR_FLAG_MASK 0xFFFF00FF 6070 #define WL_PFN_RSSI_MASK 0xff00 6071 #define WL_PFN_RSSI_SHIFT 8 6072 6073 typedef struct wl_pfn_cfg { 6074 uint32 reporttype; 6075 int32 channel_num; 6076 uint16 channel_list[WL_NUMCHANNELS]; 6077 uint32 flags; 6078 } wl_pfn_cfg_t; 6079 6080 #define WL_PFN_SSID_CFG_VERSION 1 6081 #define WL_PFN_SSID_CFG_CLEAR 0x1 6082 6083 typedef struct wl_pfn_ssid_params { 6084 int8 min5G_rssi; /* minimum 5GHz RSSI for a BSSID to be considered */ 6085 int8 min2G_rssi; /* minimum 2.4GHz RSSI for a BSSID to be considered */ 6086 int16 init_score_max; /* The maximum score that a network can have before bonuses */ 6087 6088 int16 cur_bssid_bonus; /* Add to current bssid */ 6089 int16 same_ssid_bonus; /* score bonus for all networks with the same network flag */ 6090 int16 secure_bonus; /* score bonus for networks that are not open */ 6091 int16 band_5g_bonus; 6092 } wl_pfn_ssid_params_t; 6093 6094 typedef struct wl_ssid_ext_params { 6095 int8 min5G_rssi; /* minimum 5GHz RSSI for a BSSID to be considered */ 6096 int8 min2G_rssi; /* minimum 2.4GHz RSSI for a BSSID to be considered */ 6097 int16 init_score_max; /* The maximum score that a network can have before bonuses */ 6098 int16 cur_bssid_bonus; /* Add to current bssid */ 6099 int16 same_ssid_bonus; /* score bonus for all networks with the same network flag */ 6100 int16 secure_bonus; /* score bonus for networks that are not open */ 6101 int16 band_5g_bonus; 6102 } wl_ssid_ext_params_t; 6103 6104 typedef struct wl_pfn_ssid_cfg { 6105 uint16 version; 6106 uint16 flags; 6107 wl_ssid_ext_params_t params; 6108 } wl_pfn_ssid_cfg_t; 6109 6110 #define CH_BUCKET_REPORT_NONE 0 6111 #define CH_BUCKET_REPORT_SCAN_COMPLETE_ONLY 1 6112 #define CH_BUCKET_REPORT_FULL_RESULT 2 6113 #define CH_BUCKET_REPORT_SCAN_COMPLETE (CH_BUCKET_REPORT_SCAN_COMPLETE_ONLY | \ 6114 CH_BUCKET_REPORT_FULL_RESULT) 6115 #define CH_BUCKET_REPORT_REGULAR 0 6116 #define CH_BUCKET_GSCAN 4 6117 6118 typedef struct wl_pfn_gscan_ch_bucket_cfg { 6119 uint8 bucket_end_index; 6120 uint8 bucket_freq_multiple; 6121 uint8 flag; 6122 uint8 reserved; 6123 uint16 repeat; 6124 uint16 max_freq_multiple; 6125 } wl_pfn_gscan_ch_bucket_cfg_t; 6126 6127 typedef struct wl_pfn_capabilities { 6128 uint16 max_mscan; 6129 uint16 max_bestn; 6130 uint16 max_swc_bssid; 6131 uint16 max_hotlist_bssid; 6132 } wl_pfn_capabilities_t; 6133 6134 #define GSCAN_SEND_ALL_RESULTS_MASK (1 << 0) 6135 #define GSCAN_ALL_BUCKETS_IN_FIRST_SCAN_MASK (1 << 3) 6136 #define GSCAN_CFG_FLAGS_ONLY_MASK (1 << 7) 6137 #define WL_GSCAN_CFG_VERSION 1 6138 typedef struct wl_pfn_gscan_cfg { 6139 uint16 version; 6140 /** 6141 * BIT0 1 = send probes/beacons to HOST 6142 * BIT1 Reserved 6143 * BIT2 Reserved 6144 * Add any future flags here 6145 * BIT7 1 = no other useful cfg sent 6146 */ 6147 uint8 flags; 6148 /** Buffer filled threshold in % to generate an event */ 6149 uint8 buffer_threshold; 6150 /** 6151 * No. of BSSIDs with "change" to generate an evt 6152 * change - crosses rssi threshold/lost 6153 */ 6154 uint8 swc_nbssid_threshold; 6155 /* Max=8 (for now) Size of rssi cache buffer */ 6156 uint8 swc_rssi_window_size; 6157 uint8 count_of_channel_buckets; 6158 uint8 retry_threshold; 6159 uint16 lost_ap_window; 6160 wl_pfn_gscan_ch_bucket_cfg_t channel_bucket[1]; 6161 } wl_pfn_gscan_cfg_t; 6162 6163 #define WL_PFN_REPORT_ALLNET 0 6164 #define WL_PFN_REPORT_SSIDNET 1 6165 #define WL_PFN_REPORT_BSSIDNET 2 6166 6167 #define WL_PFN_CFG_FLAGS_PROHIBITED 0x00000001 /* Accept and use prohibited channels */ 6168 #define WL_PFN_CFG_FLAGS_RESERVED 0xfffffffe /**< Remaining reserved for future use */ 6169 6170 typedef struct wl_pfn { 6171 wlc_ssid_t ssid; /**< ssid name and its length */ 6172 int32 flags; /**< bit2: hidden */ 6173 int32 infra; /**< BSS Vs IBSS */ 6174 int32 auth; /**< Open Vs Closed */ 6175 int32 wpa_auth; /**< WPA type */ 6176 int32 wsec; /**< wsec value */ 6177 } wl_pfn_t; 6178 6179 typedef struct wl_pfn_list { 6180 uint32 version; 6181 uint32 enabled; 6182 uint32 count; 6183 wl_pfn_t pfn[1]; 6184 } wl_pfn_list_t; 6185 6186 #define PFN_SSID_EXT_VERSION 1 6187 6188 typedef struct wl_pfn_ext { 6189 uint8 flags; 6190 int8 rssi_thresh; /* RSSI threshold, track only if RSSI > threshold */ 6191 uint16 wpa_auth; /* Match the wpa auth type defined in wlioctl_defs.h */ 6192 uint8 ssid[DOT11_MAX_SSID_LEN]; 6193 uint8 ssid_len; 6194 uint8 pad; 6195 } wl_pfn_ext_t; 6196 typedef struct wl_pfn_ext_list { 6197 uint16 version; 6198 uint16 count; 6199 wl_pfn_ext_t pfn_ext[1]; 6200 } wl_pfn_ext_list_t; 6201 6202 #define WL_PFN_SSID_EXT_FOUND 0x1 6203 #define WL_PFN_SSID_EXT_LOST 0x2 6204 typedef struct wl_pfn_result_ssid { 6205 uint8 flags; 6206 int8 rssi; 6207 /* channel number */ 6208 uint16 channel; 6209 /* Assume idx in order of cfg */ 6210 uint32 index; 6211 } wl_pfn_result_ssid_crc32_t; 6212 6213 typedef struct wl_pfn_ssid_ext_result { 6214 uint16 version; 6215 uint16 count; 6216 wl_pfn_result_ssid_crc32_t net[1]; 6217 } wl_pfn_ssid_ext_result_t; 6218 6219 #define PFN_EXT_AUTH_CODE_OPEN 1 /* open */ 6220 #define PFN_EXT_AUTH_CODE_PSK 2 /* WPA_PSK or WPA2PSK */ 6221 #define PFN_EXT_AUTH_CODE_EAPOL 4 /* any EAPOL */ 6222 6223 #define WL_PFN_HIDDEN_BIT 2 6224 #define WL_PFN_HIDDEN_MASK 0x4 6225 6226 #ifndef BESTN_MAX 6227 #define BESTN_MAX 10 6228 #endif // endif 6229 6230 #ifndef MSCAN_MAX 6231 #define MSCAN_MAX 90 6232 #endif // endif 6233 6234 /* Dynamic scan configuration for motion profiles */ 6235 6236 #define WL_PFN_MPF_VERSION 1 6237 6238 /* Valid group IDs, may be expanded in the future */ 6239 #define WL_PFN_MPF_GROUP_SSID 0 6240 #define WL_PFN_MPF_GROUP_BSSID 1 6241 #define WL_PFN_MPF_MAX_GROUPS 2 6242 6243 /* Max number of MPF states supported in this time */ 6244 #define WL_PFN_MPF_STATES_MAX 4 6245 6246 /* Flags for the mpf-specific stuff */ 6247 #define WL_PFN_MPF_ADAPT_ON_BIT 0 6248 #define WL_PFN_MPF_ADAPTSCAN_BIT 1 6249 6250 #define WL_PFN_MPF_ADAPT_ON_MASK 0x0001 6251 #define WL_PFN_MPF_ADAPTSCAN_MASK 0x0006 6252 6253 /* Per-state timing values */ 6254 typedef struct wl_pfn_mpf_state_params { 6255 int32 scan_freq; /* Scan frequency (secs) */ 6256 int32 lost_network_timeout; /* Timeout to declare net lost (secs) */ 6257 int16 flags; /* Space for flags: ADAPT etc */ 6258 uint8 exp; /* Exponent of 2 for max interval for SMART/STRICT_ADAPT */ 6259 uint8 repeat; /* Number of scans before changing adaptation level */ 6260 int32 slow_freq; /* Slow scan period for SLOW_ADAPT */ 6261 } wl_pfn_mpf_state_params_t; 6262 6263 typedef struct wl_pfn_mpf_param { 6264 uint16 version; /* Structure version */ 6265 uint16 groupid; /* Group ID: 0 (SSID), 1 (BSSID), other: reserved */ 6266 wl_pfn_mpf_state_params_t state[WL_PFN_MPF_STATES_MAX]; 6267 } wl_pfn_mpf_param_t; 6268 6269 /* Structure for setting pfn_override iovar */ 6270 typedef struct wl_pfn_override_param { 6271 uint16 version; /* Structure version */ 6272 uint16 start_offset; /* Seconds from now to apply new params */ 6273 uint16 duration; /* Seconds to keep new params applied */ 6274 uint16 reserved; 6275 wl_pfn_mpf_state_params_t override; 6276 } wl_pfn_override_param_t; 6277 #define WL_PFN_OVERRIDE_VERSION 1 6278 6279 /* 6280 * Definitions for base MPF configuration 6281 */ 6282 6283 #define WL_MPF_VERSION 1 6284 #define WL_MPF_MAX_BITS 3 6285 #define WL_MPF_MAX_STATES (1 << WL_MPF_MAX_BITS) 6286 6287 #define WL_MPF_STATE_NAME_MAX 12 6288 6289 typedef struct wl_mpf_val { 6290 uint16 val; /* Value of GPIO bits */ 6291 uint16 state; /* State identifier */ 6292 char name[WL_MPF_STATE_NAME_MAX]; /* Optional name */ 6293 } wl_mpf_val_t; 6294 6295 typedef struct wl_mpf_map { 6296 uint16 version; 6297 uint16 type; 6298 uint16 mask; /* Which GPIO bits to use */ 6299 uint8 count; /* Count of state/value mappings */ 6300 uint8 PAD; 6301 wl_mpf_val_t vals[WL_MPF_MAX_STATES]; 6302 } wl_mpf_map_t; 6303 6304 #define WL_MPF_STATE_AUTO (0xFFFF) /* (uint16)-1) */ 6305 6306 typedef struct wl_mpf_state { 6307 uint16 version; 6308 uint16 type; 6309 uint16 state; /* Get/Set */ 6310 uint8 force; /* 0 - auto (HW) state, 1 - forced state */ 6311 char name[WL_MPF_STATE_NAME_MAX]; /* Get/Set: Optional/actual name */ 6312 uint8 PAD; 6313 } wl_mpf_state_t; 6314 /* 6315 * WLFCTS definition 6316 */ 6317 typedef struct wl_txstatus_additional_info { 6318 uint32 rspec; 6319 uint32 enq_ts; 6320 uint32 last_ts; 6321 uint32 entry_ts; 6322 uint16 seq; 6323 uint8 rts_cnt; 6324 uint8 tx_cnt; 6325 } wl_txstatus_additional_info_t; 6326 6327 /** Service discovery */ 6328 typedef struct { 6329 uint8 transaction_id; /**< Transaction id */ 6330 uint8 protocol; /**< Service protocol type */ 6331 uint16 query_len; /**< Length of query */ 6332 uint16 response_len; /**< Length of response */ 6333 uint8 qrbuf[]; 6334 } wl_p2po_qr_t; 6335 6336 typedef struct { 6337 uint16 period; /**< extended listen period */ 6338 uint16 interval; /**< extended listen interval */ 6339 uint16 count; /* count to repeat */ 6340 uint16 pad; /* pad for 32bit align */ 6341 } wl_p2po_listen_t; 6342 6343 /** GAS state machine tunable parameters. Structure field values of 0 means use the default. */ 6344 typedef struct wl_gas_config { 6345 uint16 max_retransmit; /**< Max # of firmware/driver retransmits on no Ack 6346 * from peer (on top of the ucode retries). 6347 */ 6348 uint16 response_timeout; /**< Max time to wait for a GAS-level response 6349 * after sending a packet. 6350 */ 6351 uint16 max_comeback_delay; /**< Max GAS response comeback delay. 6352 * Exceeding this fails the GAS exchange. 6353 */ 6354 uint16 max_retries; /**< Max # of GAS state machine retries on failure 6355 * of a GAS frame exchange. 6356 */ 6357 } wl_gas_config_t; 6358 6359 /** P2P Find Offload parameters */ 6360 typedef struct wl_p2po_find_config { 6361 uint16 version; /**< Version of this struct */ 6362 uint16 length; /**< sizeof(wl_p2po_find_config_t) */ 6363 int32 search_home_time; /**< P2P search state home time when concurrent 6364 * connection exists. -1 for default. 6365 */ 6366 uint8 num_social_channels; 6367 /**< Number of social channels up to WL_P2P_SOCIAL_CHANNELS_MAX. 6368 * 0 means use default social channels. 6369 */ 6370 uint8 flags; 6371 uint16 social_channels[1]; /**< Variable length array of social channels */ 6372 } wl_p2po_find_config_t; 6373 #define WL_P2PO_FIND_CONFIG_VERSION 2 /**< value for version field */ 6374 6375 /** wl_p2po_find_config_t flags */ 6376 #define P2PO_FIND_FLAG_SCAN_ALL_APS 0x01 /**< Whether to scan for all APs in the p2po_find 6377 * periodic scans of all channels. 6378 * 0 means scan for only P2P devices. 6379 * 1 means scan for P2P devices plus non-P2P APs. 6380 */ 6381 6382 /** For adding a WFDS service to seek */ 6383 typedef struct { 6384 uint32 seek_hdl; /**< unique id chosen by host */ 6385 uint8 addr[6]; /**< Seek service from a specific device with this 6386 * MAC address, all 1's for any device. 6387 */ 6388 uint8 service_hash[P2P_WFDS_HASH_LEN]; 6389 uint8 service_name_len; 6390 uint8 service_name[MAX_WFDS_SEEK_SVC_NAME_LEN]; 6391 /**< Service name to seek, not null terminated */ 6392 uint8 service_info_req_len; 6393 uint8 service_info_req[1]; /**< Service info request, not null terminated. 6394 * Variable length specified by service_info_req_len. 6395 * Maximum length is MAX_WFDS_SEEK_SVC_INFO_LEN. 6396 */ 6397 } wl_p2po_wfds_seek_add_t; 6398 6399 /** For deleting a WFDS service to seek */ 6400 typedef struct { 6401 uint32 seek_hdl; /**< delete service specified by id */ 6402 } wl_p2po_wfds_seek_del_t; 6403 6404 /** For adding a WFDS service to advertise */ 6405 #include <packed_section_start.h> 6406 typedef BWL_PRE_PACKED_STRUCT struct { 6407 uint32 advertise_hdl; /**< unique id chosen by host */ 6408 uint8 service_hash[P2P_WFDS_HASH_LEN]; 6409 uint32 advertisement_id; 6410 uint16 service_config_method; 6411 uint8 service_name_len; 6412 uint8 service_name[MAX_WFDS_SVC_NAME_LEN]; 6413 /**< Service name , not null terminated */ 6414 uint8 service_status; 6415 uint16 service_info_len; 6416 uint8 service_info[1]; /**< Service info, not null terminated. 6417 * Variable length specified by service_info_len. 6418 * Maximum length is MAX_WFDS_ADV_SVC_INFO_LEN. 6419 */ 6420 } BWL_POST_PACKED_STRUCT wl_p2po_wfds_advertise_add_t; 6421 #include <packed_section_end.h> 6422 6423 /** For deleting a WFDS service to advertise */ 6424 typedef struct { 6425 uint32 advertise_hdl; /**< delete service specified by hdl */ 6426 } wl_p2po_wfds_advertise_del_t; 6427 6428 /** P2P Offload discovery mode for the p2po_state iovar */ 6429 typedef enum { 6430 WL_P2PO_DISC_STOP, 6431 WL_P2PO_DISC_LISTEN, 6432 WL_P2PO_DISC_DISCOVERY 6433 } disc_mode_t; 6434 6435 /* ANQP offload */ 6436 6437 #define ANQPO_MAX_QUERY_SIZE 256 6438 typedef struct { 6439 uint16 max_retransmit; /**< ~0 use default, max retransmit on no ACK from peer */ 6440 uint16 response_timeout; /**< ~0 use default, msec to wait for resp after tx packet */ 6441 uint16 max_comeback_delay; /**< ~0 use default, max comeback delay in resp else fail */ 6442 uint16 max_retries; /**< ~0 use default, max retries on failure */ 6443 uint16 query_len; /**< length of ANQP query */ 6444 uint8 query_data[1]; /**< ANQP encoded query (max ANQPO_MAX_QUERY_SIZE) */ 6445 } wl_anqpo_set_t; 6446 6447 #define WL_ANQPO_FLAGS_BSSID_WILDCARD 0x0001 6448 #define WL_ANQPO_PEER_LIST_VERSION_2 2 6449 typedef struct { 6450 uint16 channel; /**< channel of the peer */ 6451 struct ether_addr addr; /**< addr of the peer */ 6452 } wl_anqpo_peer_v1_t; 6453 typedef struct { 6454 uint16 channel; /**< channel of the peer */ 6455 struct ether_addr addr; /**< addr of the peer */ 6456 uint32 flags; /**< 0x01-Peer is MBO Capable */ 6457 } wl_anqpo_peer_v2_t; 6458 6459 #define ANQPO_MAX_PEER_LIST 64 6460 typedef struct { 6461 uint16 count; /**< number of peers in list */ 6462 wl_anqpo_peer_v1_t peer[1]; /**< max ANQPO_MAX_PEER_LIST */ 6463 } wl_anqpo_peer_list_v1_t; 6464 6465 typedef struct { 6466 uint16 version; /**<VERSION */ 6467 uint16 length; /**< length of entire structure */ 6468 uint16 count; /**< number of peers in list */ 6469 wl_anqpo_peer_v2_t peer[1]; /**< max ANQPO_MAX_PEER_LIST */ 6470 } wl_anqpo_peer_list_v2_t; 6471 6472 #ifndef WL_ANQPO_PEER_LIST_TYPEDEF_HAS_ALIAS 6473 typedef wl_anqpo_peer_list_v1_t wl_anqpo_peer_list_t; 6474 typedef wl_anqpo_peer_v1_t wl_anqpo_peer_t; 6475 #endif /* WL_ANQPO_PEER_LIST_TYPEDEF_HAS_ALIAS */ 6476 6477 #define ANQPO_MAX_IGNORE_SSID 64 6478 typedef struct { 6479 uint8 is_clear; /**< set to clear list (not used on GET) */ 6480 uint8 PAD; 6481 uint16 count; /**< number of SSID in list */ 6482 wlc_ssid_t ssid[1]; /**< max ANQPO_MAX_IGNORE_SSID */ 6483 } wl_anqpo_ignore_ssid_list_t; 6484 6485 #define ANQPO_MAX_IGNORE_BSSID 64 6486 typedef struct { 6487 uint8 is_clear; /**< set to clear list (not used on GET) */ 6488 uint8 PAD; 6489 uint16 count; /**< number of addr in list */ 6490 struct ether_addr bssid[]; /**< max ANQPO_MAX_IGNORE_BSSID */ 6491 } wl_anqpo_ignore_bssid_list_t; 6492 6493 struct toe_ol_stats_t { 6494 /** Num of tx packets that don't need to be checksummed */ 6495 uint32 tx_summed; 6496 6497 /* Num of tx packets where checksum is filled by offload engine */ 6498 uint32 tx_iph_fill; 6499 uint32 tx_tcp_fill; 6500 uint32 tx_udp_fill; 6501 uint32 tx_icmp_fill; 6502 6503 /* Num of rx packets where toe finds out if checksum is good or bad */ 6504 uint32 rx_iph_good; 6505 uint32 rx_iph_bad; 6506 uint32 rx_tcp_good; 6507 uint32 rx_tcp_bad; 6508 uint32 rx_udp_good; 6509 uint32 rx_udp_bad; 6510 uint32 rx_icmp_good; 6511 uint32 rx_icmp_bad; 6512 6513 /* Num of tx packets in which csum error is injected */ 6514 uint32 tx_tcp_errinj; 6515 uint32 tx_udp_errinj; 6516 uint32 tx_icmp_errinj; 6517 6518 /* Num of rx packets in which csum error is injected */ 6519 uint32 rx_tcp_errinj; 6520 uint32 rx_udp_errinj; 6521 uint32 rx_icmp_errinj; 6522 }; 6523 6524 /** Arp offload statistic counts */ 6525 struct arp_ol_stats_t { 6526 uint32 host_ip_entries; /**< Host IP table addresses (more than one if multihomed) */ 6527 uint32 host_ip_overflow; /**< Host IP table additions skipped due to overflow */ 6528 6529 uint32 arp_table_entries; /**< ARP table entries */ 6530 uint32 arp_table_overflow; /**< ARP table additions skipped due to overflow */ 6531 6532 uint32 host_request; /**< ARP requests from host */ 6533 uint32 host_reply; /**< ARP replies from host */ 6534 uint32 host_service; /**< ARP requests from host serviced by ARP Agent */ 6535 6536 uint32 peer_request; /**< ARP requests received from network */ 6537 uint32 peer_request_drop; /**< ARP requests from network that were dropped */ 6538 uint32 peer_reply; /**< ARP replies received from network */ 6539 uint32 peer_reply_drop; /**< ARP replies from network that were dropped */ 6540 uint32 peer_service; /**< ARP request from host serviced by ARP Agent */ 6541 }; 6542 6543 /** NS offload statistic counts */ 6544 struct nd_ol_stats_t { 6545 uint32 host_ip_entries; /**< Host IP table addresses (more than one if multihomed) */ 6546 uint32 host_ip_overflow; /**< Host IP table additions skipped due to overflow */ 6547 uint32 peer_request; /**< NS requests received from network */ 6548 uint32 peer_request_drop; /**< NS requests from network that were dropped */ 6549 uint32 peer_reply_drop; /**< NA replies from network that were dropped */ 6550 uint32 peer_service; /**< NS request from host serviced by firmware */ 6551 }; 6552 6553 /* 6554 * Neighbor Discovery Offloading 6555 */ 6556 enum { 6557 WL_ND_IPV6_ADDR_TYPE_UNICAST = 0, 6558 WL_ND_IPV6_ADDR_TYPE_ANYCAST 6559 }; 6560 6561 typedef struct wl_nd_host_ip_addr { 6562 struct ipv6_addr ip_addr; /* host ip address */ 6563 uint8 type; /* type of address */ 6564 uint8 pad[3]; 6565 } wl_nd_host_ip_addr_t; 6566 6567 typedef struct wl_nd_host_ip_list { 6568 uint32 count; 6569 wl_nd_host_ip_addr_t host_ip[1]; 6570 } wl_nd_host_ip_list_t; 6571 6572 #define WL_ND_HOSTIP_IOV_VER 1 6573 6574 enum { 6575 WL_ND_HOSTIP_OP_VER = 0, /* get version */ 6576 WL_ND_HOSTIP_OP_ADD, /* add address */ 6577 WL_ND_HOSTIP_OP_DEL, /* delete specified address */ 6578 WL_ND_HOSTIP_OP_DEL_UC, /* delete all unicast address */ 6579 WL_ND_HOSTIP_OP_DEL_AC, /* delete all anycast address */ 6580 WL_ND_HOSTIP_OP_DEL_ALL, /* delete all addresses */ 6581 WL_ND_HOSTIP_OP_LIST, /* get list of host ip address */ 6582 WL_ND_HOSTIP_OP_MAX 6583 }; 6584 6585 typedef struct wl_nd_hostip { 6586 uint16 version; /* version of iovar buf */ 6587 uint16 op_type; /* operation type */ 6588 uint32 length; /* length of entire structure */ 6589 union { 6590 wl_nd_host_ip_addr_t host_ip; /* set param for add */ 6591 uint16 version; /* get return for ver */ 6592 } u; 6593 } wl_nd_hostip_t; 6594 6595 #define WL_ND_HOSTIP_FIXED_LEN OFFSETOF(wl_nd_hostip_t, u) 6596 #define WL_ND_HOSTIP_WITH_ADDR_LEN (WL_ND_HOSTIP_FIXED_LEN + sizeof(wl_nd_host_ip_addr_t)) 6597 6598 /* 6599 * Keep-alive packet offloading. 6600 */ 6601 6602 /** 6603 * NAT keep-alive packets format: specifies the re-transmission period, the packet 6604 * length, and packet contents. 6605 */ 6606 typedef struct wl_keep_alive_pkt { 6607 uint32 period_msec; /** Retransmission period (0 to disable packet re-transmits) */ 6608 uint16 len_bytes; /* Size of packet to transmit (0 to disable packet re-transmits) */ 6609 uint8 data[1]; /** Variable length packet to transmit. Contents should include 6610 * entire ethernet packet (enet header, IP header, UDP header, 6611 * and UDP payload) in network byte order. 6612 */ 6613 } wl_keep_alive_pkt_t; 6614 6615 #define WL_KEEP_ALIVE_FIXED_LEN OFFSETOF(wl_keep_alive_pkt_t, data) 6616 6617 #define MAX_RSSI_COUNT 8 6618 typedef struct rssi_struct { 6619 int8 val[MAX_RSSI_COUNT]; /**< rssi values in AFs */ 6620 int16 sum; /**< total rssi sum */ 6621 uint8 cnt; /**< number rssi samples */ 6622 uint8 idx; /**< next rssi location */ 6623 } rssi_struct_t; 6624 6625 #ifdef WLDFSP 6626 #define DFSP_EVT_OFFSET OFFSETOF(dfsp_event_data_t, ie) 6627 #define DFSP_EVT_FLAGS_AP_ASSOC (1 << 0) 6628 #define DFSP_EVT_FLAGS_AP_BCNMON (1 << 1) 6629 #define DFSP_EVT_FLAGS_PROXY_BCSA (1 << 2) 6630 #define DFSP_EVT_FLAGS_PROXY_UCSA (1 << 3) 6631 #define DFSP_EVT_FLAGS_PROXY_PCSA (1 << 4) 6632 6633 typedef struct dfsp_event_data { 6634 uint16 flags; /* indicate what triggers the event */ 6635 uint16 ie_len; 6636 uint8 ie[]; /* variable length */ 6637 } dfsp_event_data_t; 6638 6639 /* Proxy Channel Switch Announcement is a collection of IEs */ 6640 typedef struct dfsp_pcsa { 6641 dot11_ext_csa_ie_t ecsa; 6642 dot11_mesh_csp_ie_t mcsp; 6643 dot11_wide_bw_chan_switch_ie_t wbcs; 6644 } dfsp_pcsa_t; 6645 6646 /* DFS Proxy */ 6647 #define DFSP_CFG_VERSION 1 6648 #define DFSP_FLAGS_ENAB 0x1 6649 typedef struct dfsp_cfg { 6650 uint16 version; 6651 uint16 len; 6652 uint16 flags; /**< bit 1 to enable/disable the feature */ 6653 uint16 max_bcn_miss_dur; /**< maximum beacon miss duration before ceasing data tx */ 6654 uint8 mcsp_ttl; /**< remaining number of hops allowed for pcsa message */ 6655 uint8 bcsa_cnt; /**< repeat numbers of broadcast CSA */ 6656 chanspec_t mon_chan; /**< passive monitoring channel spec */ 6657 struct ether_addr mon_bssid; /**< broadcast means monitoring all */ 6658 uint16 max_bcn_miss_dur_af; /**< maximum beacon miss duration before ceasing AF tx */ 6659 } dfsp_cfg_t; 6660 6661 #define DFSP_UCSA_VERSION 1 6662 typedef struct dfsp_ucsa { 6663 uint16 version; 6664 uint16 len; 6665 struct ether_addr address; 6666 uint8 enable; 6667 uint8 retry_cnt; /**< just in case host needs to control the value */ 6668 } dfsp_ucsa_t; 6669 6670 typedef struct dfsp_ucsa_tbl { 6671 uint8 tbl_num; 6672 uint8 tbl[]; 6673 } dfsp_ucsa_tbl_t; 6674 6675 typedef struct dfsp_stats { 6676 uint32 dfsp_csainfra; 6677 uint32 dfsp_csabcnmon; 6678 uint32 dfsp_bcsarx; 6679 uint32 dfsp_ucsarx; 6680 uint32 dfsp_pcsarx; 6681 uint32 dfsp_bcsatx; 6682 uint32 dfsp_ucsatx; 6683 uint32 dfsp_pcsatx; 6684 uint32 dfsp_ucsatxfail; 6685 uint32 dfsp_evtnotif; 6686 uint32 dfsp_evtsuspect; 6687 uint32 dfsp_evtresume; 6688 } dfsp_stats_t; 6689 #endif /* WLDFSP */ 6690 6691 /* 6692 * ptk_start: iovar to start 4-way handshake for secured ranging 6693 */ 6694 6695 /* ptk negotiation security type - determines negotiation parameters */ 6696 typedef enum { 6697 WL_PTK_START_SEC_TYPE_PMK = 1 6698 } wl_ptk_start_sec_type_t; 6699 6700 /* ptk negotiation role */ 6701 typedef enum { 6702 ROLE_NONE = 0x0, 6703 ROLE_AUTH = 0x1, 6704 ROLE_SUP = 0x2, 6705 ROLE_STATIC = 0x3, 6706 ROLE_INVALID = 0xff, 6707 WL_PTK_START_ROLE_NONE = ROLE_NONE, 6708 WL_PTK_START_ROLE_AUTH = ROLE_AUTH, 6709 WL_PTK_START_ROLE_SUP = ROLE_SUP, 6710 WL_PTK_START_ROLE_STATIC = ROLE_STATIC, 6711 WL_PTK_START_ROLE_INVALID = ROLE_INVALID 6712 } wl_ptk_start_role_t; 6713 6714 typedef struct wl_ptk_start_tlv { 6715 uint16 id; 6716 uint16 len; 6717 uint8 data[1]; 6718 } wl_ptk_start_tlv_t; 6719 6720 typedef enum { 6721 WL_PTK_START_TLV_PMK = 1 /* uint8[] */ 6722 } wl_ptk_start_tlv_type; 6723 6724 typedef enum { 6725 WL_PTK_START_FLAG_NO_DATA_PROT = 1, /* data frame protection disabled */ 6726 WL_PTK_START_FLAG_GEN_FTM_TPK = 2 /* Generate FTM Toast/Seq Protection Key */ 6727 } wl_ptk_start_flags_t; 6728 6729 typedef struct wl_ptk_start_iov { 6730 uint16 version; 6731 uint16 len; /* length of entire iov from version */ 6732 wl_ptk_start_flags_t flags; 6733 wl_ptk_start_sec_type_t sec_type; 6734 wl_ptk_start_role_t role; 6735 struct ether_addr peer_addr; 6736 uint16 pad; /* reserved/32 bit alignment */ 6737 wl_ptk_start_tlv_t tlvs[1]; 6738 } wl_ptk_start_iov_t; 6739 6740 /* 6741 * Dongle pattern matching filter. 6742 */ 6743 6744 #define MAX_WAKE_PACKET_CACHE_BYTES 128 /**< Maximum cached wake packet */ 6745 6746 #define MAX_WAKE_PACKET_BYTES (DOT11_A3_HDR_LEN + \ 6747 DOT11_QOS_LEN + \ 6748 sizeof(struct dot11_llc_snap_header) + \ 6749 ETHER_MAX_DATA) 6750 6751 typedef struct pm_wake_packet { 6752 uint32 status; /**< Is the wake reason a packet (if all the other field's valid) */ 6753 uint32 pattern_id; /**< Pattern ID that matched */ 6754 uint32 original_packet_size; 6755 uint32 saved_packet_size; 6756 uint8 packet[MAX_WAKE_PACKET_CACHE_BYTES]; 6757 } pm_wake_packet_t; 6758 6759 /* Packet filter types. Currently, only pattern matching is supported. */ 6760 typedef enum wl_pkt_filter_type { 6761 WL_PKT_FILTER_TYPE_PATTERN_MATCH=0, /**< Pattern matching filter */ 6762 WL_PKT_FILTER_TYPE_MAGIC_PATTERN_MATCH=1, /**< Magic packet match */ 6763 WL_PKT_FILTER_TYPE_PATTERN_LIST_MATCH=2, /**< A pattern list (match all to match filter) */ 6764 WL_PKT_FILTER_TYPE_ENCRYPTED_PATTERN_MATCH=3, /**< SECURE WOWL magic / net pattern match */ 6765 WL_PKT_FILTER_TYPE_APF_MATCH=4, /* Android packet filter match */ 6766 WL_PKT_FILTER_TYPE_PATTERN_MATCH_TIMEOUT=5, /* Pattern matching filter with timeout event */ 6767 WL_PKT_FILTER_TYPE_IMMEDIATE_PATTERN_MATCH=6, /* Immediately pattern matching filter */ 6768 WL_PKT_FILTYER_TYPE_MAX = 7, /* Pkt filter type MAX */ 6769 } wl_pkt_filter_type_t; 6770 6771 #define WL_PKT_FILTER_TYPE wl_pkt_filter_type_t 6772 6773 /* String mapping for types that may be used by applications or debug */ 6774 #define WL_PKT_FILTER_TYPE_NAMES \ 6775 { "PATTERN", WL_PKT_FILTER_TYPE_PATTERN_MATCH }, \ 6776 { "MAGIC", WL_PKT_FILTER_TYPE_MAGIC_PATTERN_MATCH }, \ 6777 { "PATLIST", WL_PKT_FILTER_TYPE_PATTERN_LIST_MATCH }, \ 6778 { "SECURE WOWL", WL_PKT_FILTER_TYPE_ENCRYPTED_PATTERN_MATCH }, \ 6779 { "APF", WL_PKT_FILTER_TYPE_APF_MATCH }, \ 6780 { "PATTERN TIMEOUT", WL_PKT_FILTER_TYPE_PATTERN_MATCH_TIMEOUT }, \ 6781 { "IMMEDIATE", WL_PKT_FILTER_TYPE_IMMEDIATE_PATTERN_MATCH } 6782 6783 /** Secured WOWL packet was encrypted, need decrypted before check filter match */ 6784 typedef struct wl_pkt_decrypter { 6785 uint8* (*dec_cb)(void* dec_ctx, const void *sdu, int sending); 6786 void* dec_ctx; 6787 } wl_pkt_decrypter_t; 6788 6789 /** 6790 * Pattern matching filter. Specifies an offset within received packets to 6791 * start matching, the pattern to match, the size of the pattern, and a bitmask 6792 * that indicates which bits within the pattern should be matched. 6793 */ 6794 typedef struct wl_pkt_filter_pattern { 6795 uint32 offset; /**< Offset within received packet to start pattern matching. 6796 * Offset '0' is the first byte of the ethernet header. 6797 */ 6798 uint32 size_bytes; /**< Size of the pattern. Bitmask must be the same size. */ 6799 uint8 mask_and_pattern[]; /**< Variable length mask and pattern data. mask starts 6800 * at offset 0. Pattern immediately follows mask. for 6801 * secured pattern, put the descrypter pointer to the 6802 * beginning, mask and pattern postponed correspondingly 6803 */ 6804 } wl_pkt_filter_pattern_t; 6805 6806 /** A pattern list is a numerically specified list of modified pattern structures. */ 6807 typedef struct wl_pkt_filter_pattern_listel { 6808 uint16 rel_offs; /**< Offset to begin match (relative to 'base' below) */ 6809 uint16 base_offs; /**< Base for offset (defined below) */ 6810 uint16 size_bytes; /**< Size of mask/pattern */ 6811 uint16 match_flags; /**< Addition flags controlling the match */ 6812 uint8 mask_and_data[]; /**< Variable length mask followed by data, each size_bytes */ 6813 } wl_pkt_filter_pattern_listel_t; 6814 6815 typedef struct wl_pkt_filter_pattern_list { 6816 uint8 list_cnt; /**< Number of elements in the list */ 6817 uint8 PAD1[1]; /**< Reserved (possible version: reserved) */ 6818 uint16 totsize; /**< Total size of this pattern list (includes this struct) */ 6819 uint8 patterns[]; /**< Variable number of wl_pkt_filter_pattern_listel_t elements */ 6820 } wl_pkt_filter_pattern_list_t; 6821 6822 typedef struct wl_apf_program { 6823 uint16 version; 6824 uint16 instr_len; /* number of instruction blocks */ 6825 uint32 inst_ts; /* program installation timestamp */ 6826 uint8 instrs[]; /* variable length instructions */ 6827 } wl_apf_program_t; 6828 6829 typedef struct wl_pkt_filter_pattern_timeout { 6830 uint32 offset; /* Offset within received packet to start pattern matching. 6831 * Offset '0' is the first byte of the ethernet header. 6832 */ 6833 uint32 size_bytes; /* Size of the pattern. Bitmask must be the same size. */ 6834 uint32 timeout; /* Timeout(seconds) */ 6835 uint8 mask_and_pattern[]; /* Variable length mask and pattern data. 6836 * mask starts at offset 0. Pattern 6837 * immediately follows mask. 6838 */ 6839 } wl_pkt_filter_pattern_timeout_t; 6840 6841 /** IOVAR "pkt_filter_add" parameter. Used to install packet filters. */ 6842 typedef struct wl_pkt_filter { 6843 uint32 id; /**< Unique filter id, specified by app. */ 6844 uint32 type; /**< Filter type (WL_PKT_FILTER_TYPE_xxx). */ 6845 uint32 negate_match; /**< Negate the result of filter matches */ 6846 union { /* Filter definitions */ 6847 wl_pkt_filter_pattern_t pattern; /**< Pattern matching filter */ 6848 wl_pkt_filter_pattern_list_t patlist; /**< List of patterns to match */ 6849 wl_apf_program_t apf_program; /* apf program */ 6850 wl_pkt_filter_pattern_timeout_t pattern_timeout; /* Pattern timeout event filter */ 6851 } u; 6852 /* Do NOT add structure members after the filter definitions, since they 6853 * may include variable length arrays. 6854 */ 6855 } wl_pkt_filter_t; 6856 6857 /** IOVAR "tcp_keep_set" parameter. Used to install tcp keep_alive stuff. */ 6858 typedef struct wl_tcp_keep_set { 6859 uint32 val1; 6860 uint32 val2; 6861 } wl_tcp_keep_set_t; 6862 6863 #define WL_PKT_FILTER_FIXED_LEN OFFSETOF(wl_pkt_filter_t, u) 6864 #define WL_PKT_FILTER_PATTERN_FIXED_LEN OFFSETOF(wl_pkt_filter_pattern_t, mask_and_pattern) 6865 #define WL_PKT_FILTER_PATTERN_LIST_FIXED_LEN OFFSETOF(wl_pkt_filter_pattern_list_t, patterns) 6866 #define WL_PKT_FILTER_PATTERN_LISTEL_FIXED_LEN \ 6867 OFFSETOF(wl_pkt_filter_pattern_listel_t, mask_and_data) 6868 #define WL_PKT_FILTER_PATTERN_TIMEOUT_FIXED_LEN \ 6869 OFFSETOF(wl_pkt_filter_pattern_timeout_t, mask_and_pattern) 6870 6871 #define WL_APF_INTERNAL_VERSION 1 6872 #define WL_APF_PROGRAM_MAX_SIZE (2 * 1024) 6873 #define WL_APF_PROGRAM_FIXED_LEN OFFSETOF(wl_apf_program_t, instrs) 6874 #define WL_APF_PROGRAM_LEN(apf_program) \ 6875 ((apf_program)->instr_len * sizeof((apf_program)->instrs[0])) 6876 #define WL_APF_PROGRAM_TOTAL_LEN(apf_program) \ 6877 (WL_APF_PROGRAM_FIXED_LEN + WL_APF_PROGRAM_LEN(apf_program)) 6878 6879 /** IOVAR "pkt_filter_enable" parameter. */ 6880 typedef struct wl_pkt_filter_enable { 6881 uint32 id; /**< Unique filter id */ 6882 uint32 enable; /**< Enable/disable bool */ 6883 } wl_pkt_filter_enable_t; 6884 6885 /** IOVAR "pkt_filter_list" parameter. Used to retrieve a list of installed filters. */ 6886 typedef struct wl_pkt_filter_list { 6887 uint32 num; /**< Number of installed packet filters */ 6888 uint8 filter[]; /**< Variable array of packet filters. */ 6889 } wl_pkt_filter_list_t; 6890 6891 #define WL_PKT_FILTER_LIST_FIXED_LEN OFFSETOF(wl_pkt_filter_list_t, filter) 6892 6893 /** IOVAR "pkt_filter_stats" parameter. Used to retrieve debug statistics. */ 6894 typedef struct wl_pkt_filter_stats { 6895 uint32 num_pkts_matched; /**< # filter matches for specified filter id */ 6896 uint32 num_pkts_forwarded; /**< # packets fwded from dongle to host for all filters */ 6897 uint32 num_pkts_discarded; /**< # packets discarded by dongle for all filters */ 6898 } wl_pkt_filter_stats_t; 6899 6900 /** IOVAR "pkt_filter_ports" parameter. Configure TCP/UDP port filters. */ 6901 typedef struct wl_pkt_filter_ports { 6902 uint8 version; /**< Be proper */ 6903 uint8 reserved; /**< Be really proper */ 6904 uint16 count; /**< Number of ports following */ 6905 /* End of fixed data */ 6906 uint16 ports[1]; /**< Placeholder for ports[<count>] */ 6907 } wl_pkt_filter_ports_t; 6908 6909 #define WL_PKT_FILTER_PORTS_FIXED_LEN OFFSETOF(wl_pkt_filter_ports_t, ports) 6910 6911 #define WL_PKT_FILTER_PORTS_VERSION 0 6912 #if defined(WL_PKT_FLTR_EXT) && !defined(WL_PKT_FLTR_EXT_DISABLED) 6913 #define WL_PKT_FILTER_PORTS_MAX 256 6914 #else 6915 #define WL_PKT_FILTER_PORTS_MAX 128 6916 #endif /* WL_PKT_FLTR_EXT && !WL_PKT_FLTR_EXT_DISABLED */ 6917 6918 #define RSN_REPLAY_LEN 8 6919 typedef struct _gtkrefresh { 6920 uint8 KCK[RSN_KCK_LENGTH]; 6921 uint8 KEK[RSN_KEK_LENGTH]; 6922 uint8 ReplayCounter[RSN_REPLAY_LEN]; 6923 } gtk_keyinfo_t, *pgtk_keyinfo_t; 6924 6925 /** Sequential Commands ioctl */ 6926 typedef struct wl_seq_cmd_ioctl { 6927 uint32 cmd; /**< common ioctl definition */ 6928 uint32 len; /**< length of user buffer */ 6929 } wl_seq_cmd_ioctl_t; 6930 6931 #define WL_SEQ_CMD_ALIGN_BYTES 4 6932 6933 /** 6934 * These are the set of get IOCTLs that should be allowed when using 6935 * IOCTL sequence commands. These are issued implicitly by wl.exe each time 6936 * it is invoked. We never want to buffer these, or else wl.exe will stop working. 6937 */ 6938 #define WL_SEQ_CMDS_GET_IOCTL_FILTER(cmd) \ 6939 (((cmd) == WLC_GET_MAGIC) || \ 6940 ((cmd) == WLC_GET_VERSION) || \ 6941 ((cmd) == WLC_GET_AP) || \ 6942 ((cmd) == WLC_GET_INSTANCE)) 6943 6944 #define MAX_PKTENG_SWEEP_STEPS 40 6945 typedef struct wl_pkteng { 6946 uint32 flags; 6947 uint32 delay; /**< Inter-packet delay */ 6948 uint32 nframes; /**< Number of frames */ 6949 uint32 length; /**< Packet length */ 6950 uint8 seqno; /**< Enable/disable sequence no. */ 6951 struct ether_addr dest; /**< Destination address */ 6952 struct ether_addr src; /**< Source address */ 6953 uint8 sweep_steps; /**< Number of sweep power */ 6954 uint8 PAD[2]; 6955 } wl_pkteng_t; 6956 6957 /* IOVAR pkteng_sweep_counters response structure */ 6958 #define WL_PKTENG_SWEEP_COUNTERS_VERSION 1 6959 typedef struct wl_pkteng_sweep_ctrs { 6960 uint16 version; /**< Version - 1 */ 6961 uint16 size; /**< Complete Size including sweep_counters */ 6962 uint16 sweep_steps; /**< Number of steps */ 6963 uint16 PAD; 6964 uint16 sweep_counter[]; /**< Array of frame counters */ 6965 } wl_pkteng_sweep_ctrs_t; 6966 6967 /* IOVAR pkteng_rx_pkt response structure */ 6968 #define WL_PKTENG_RX_PKT_VERSION 1 6969 typedef struct wl_pkteng_rx_pkt { 6970 uint16 version; /**< Version - 1 */ 6971 uint16 size; /**< Complete Size including the packet */ 6972 uint8 payload[]; /**< Packet payload */ 6973 } wl_pkteng_rx_pkt_t; 6974 6975 #define WL_PKTENG_RU_FILL_VER_1 1u 6976 #define WL_PKTENG_RU_FILL_VER_2 2u 6977 // struct for ru packet engine 6978 typedef struct wl_pkteng_ru_v1 { 6979 uint16 version; /* ver is 1 */ 6980 uint16 length; /* size of complete structure */ 6981 uint8 bw; /* bandwidth info */ 6982 uint8 ru_alloc_val; /* ru allocation index number */ 6983 uint8 mcs_val; /* mcs allocated value */ 6984 uint8 nss_val; /* num of spatial streams */ 6985 uint32 num_bytes; /* approx num of bytes to calculate other required params */ 6986 uint8 cp_ltf_val ; /* GI and LTF symbol size */ 6987 uint8 he_ltf_symb ; /* num of HE-LTF symbols */ 6988 uint8 stbc; /* STBC support */ 6989 uint8 coding_val; /* BCC/LDPC coding support */ 6990 uint8 pe_category; /* PE duration 0/8/16usecs */ 6991 uint8 dcm; /* dual carrier modulation */ 6992 uint8 mumimo_ltfmode; /* ltf mode */ 6993 uint8 trig_tx; /* form and transmit the trigger frame */ 6994 uint8 trig_type; /* type of trigger frame */ 6995 uint8 trig_period; /* trigger tx periodicity TBD */ 6996 struct ether_addr dest; /* destination address for un-associated mode */ 6997 } wl_pkteng_ru_v1_t; 6998 6999 typedef struct wl_pkteng_ru_v2 { 7000 uint16 version; /* ver is 1 */ 7001 uint16 length; /* size of complete structure */ 7002 uint8 bw; /* bandwidth info */ 7003 uint8 ru_alloc_val; /* ru allocation index number */ 7004 uint8 mcs_val; /* mcs allocated value */ 7005 uint8 nss_val; /* num of spatial streams */ 7006 uint32 num_bytes; /* approx num of bytes to calculate other required params */ 7007 struct ether_addr dest; /* destination address for un-associated mode */ 7008 uint8 cp_ltf_val ; /* GI and LTF symbol size */ 7009 uint8 he_ltf_symb ; /* num of HE-LTF symbols */ 7010 uint8 stbc; /* STBC support */ 7011 uint8 coding_val; /* BCC/LDPC coding support */ 7012 uint8 pe_category; /* PE duration 0/8/16usecs */ 7013 uint8 dcm; /* dual carrier modulation */ 7014 uint8 mumimo_ltfmode; /* ltf mode */ 7015 uint8 trig_tx; /* form and transmit the trigger frame */ 7016 uint8 trig_type; /* type of trigger frame */ 7017 uint8 trig_period; /* trigger tx periodicity TBD */ 7018 uint8 tgt_rssi; /* target rssi value in encoded format */ 7019 uint8 pad[3]; /* 3 byte padding to make structure size a multiple of 32bits */ 7020 } wl_pkteng_ru_v2_t; 7021 7022 #ifndef WL_PKTENG_RU_VER 7023 /* App uses the latest version - source picks it up from wlc_types.h */ 7024 typedef wl_pkteng_ru_v2_t wl_pkteng_ru_fill_t; 7025 #endif // endif 7026 7027 typedef struct wl_trig_frame_info { 7028 /* Structure versioning and structure length params */ 7029 uint16 version; 7030 uint16 length; 7031 /* Below params are the fields related to trigger frame contents */ 7032 /* Common Info Params Figure 9-52d - 11ax Draft 1.1 */ 7033 uint16 lsig_len; 7034 uint16 trigger_type; 7035 uint16 cascade_indication; 7036 uint16 cs_req; 7037 uint16 bw; 7038 uint16 cp_ltf_type; 7039 uint16 mu_mimo_ltf_mode; 7040 uint16 num_he_ltf_syms; 7041 uint16 stbc; 7042 uint16 ldpc_extra_symb; 7043 uint16 ap_tx_pwr; 7044 uint16 afactor; 7045 uint16 pe_disambiguity; 7046 uint16 spatial_resuse; 7047 uint16 doppler; 7048 uint16 he_siga_rsvd; 7049 uint16 cmn_info_rsvd; 7050 /* User Info Params Figure 9-52e - 11ax Draft 1.1 */ 7051 uint16 aid12; 7052 uint16 ru_alloc; 7053 uint16 coding_type; 7054 uint16 mcs; 7055 uint16 dcm; 7056 uint16 ss_alloc; 7057 uint16 tgt_rssi; 7058 uint16 usr_info_rsvd; 7059 } wl_trig_frame_info_t; 7060 7061 /* wl pkteng_stats related definitions */ 7062 #define WL_PKTENG_STATS_V1 (1) 7063 #define WL_PKTENG_STATS_V2 (2) 7064 7065 typedef struct wl_pkteng_stats_v1 { 7066 uint32 lostfrmcnt; /**< RX PER test: no of frames lost (skip seqno) */ 7067 int32 rssi; /**< RSSI */ 7068 int32 snr; /**< signal to noise ratio */ 7069 uint16 rxpktcnt[NUM_80211_RATES+1]; 7070 uint8 rssi_qdb; /**< qdB portion of the computed rssi */ 7071 uint8 version; 7072 } wl_pkteng_stats_v1_t; 7073 7074 typedef struct wl_pkteng_stats_v2 { 7075 uint32 lostfrmcnt; /**< RX PER test: no of frames lost (skip seqno) */ 7076 int32 rssi; /**< RSSI */ 7077 int32 snr; /**< signal to noise ratio */ 7078 uint16 rxpktcnt[NUM_80211_RATES+1]; 7079 uint8 rssi_qdb; /**< qdB portion of the computed rssi */ 7080 uint8 version; 7081 uint16 length; 7082 uint16 pad; 7083 int32 rssi_per_core[WL_RSSI_ANT_MAX]; 7084 int32 rssi_per_core_qdb[WL_RSSI_ANT_MAX]; 7085 } wl_pkteng_stats_v2_t; 7086 7087 #ifndef WL_PKTENG_STATS_TYPEDEF_HAS_ALIAS 7088 typedef wl_pkteng_stats_v1_t wl_pkteng_stats_t; 7089 #endif /* WL_PKTENG_STATS_TYPEDEF_HAS_ALIAS */ 7090 7091 typedef struct wl_txcal_params { 7092 wl_pkteng_t pkteng; 7093 uint8 gidx_start; 7094 int8 gidx_step; 7095 uint8 gidx_stop; 7096 uint8 PAD; 7097 } wl_txcal_params_t; 7098 7099 typedef struct wl_txcal_gainidx { 7100 uint8 num_actv_cores; 7101 uint8 gidx_start_percore[WL_STA_ANT_MAX]; 7102 uint8 gidx_stop_percore[WL_STA_ANT_MAX]; 7103 uint8 PAD[3]; 7104 } wl_txcal_gainidx_t; 7105 7106 typedef struct wl_txcal_params_v2 { 7107 wl_pkteng_t pkteng; 7108 int8 gidx_step; 7109 uint8 pwr_start[WL_STA_ANT_MAX]; 7110 uint8 pwr_stop[WL_STA_ANT_MAX]; 7111 uint8 init_start_idx; 7112 uint8 gidx_start_percore[WL_STA_ANT_MAX]; 7113 uint8 gidx_stop_percore[WL_STA_ANT_MAX]; 7114 uint16 version; 7115 } wl_txcal_params_v2_t; 7116 7117 typedef wl_txcal_params_t wl_txcal_params_v1_t; 7118 7119 typedef struct wl_rssilog_params { 7120 uint8 enable; 7121 uint8 rssi_threshold; 7122 uint8 time_threshold; 7123 uint8 pad; 7124 } wl_rssilog_params_t; 7125 7126 typedef struct wl_sslpnphy_papd_debug_data { 7127 uint8 psat_pwr; 7128 uint8 psat_indx; 7129 uint8 final_idx; 7130 uint8 start_idx; 7131 int32 min_phase; 7132 int32 voltage; 7133 int8 temperature; 7134 uint8 PAD[3]; 7135 } wl_sslpnphy_papd_debug_data_t; 7136 typedef struct wl_sslpnphy_debug_data { 7137 int16 papdcompRe [64]; 7138 int16 papdcompIm [64]; 7139 } wl_sslpnphy_debug_data_t; 7140 typedef struct wl_sslpnphy_spbdump_data { 7141 uint16 tbl_length; 7142 int16 spbreal[256]; 7143 int16 spbimg[256]; 7144 } wl_sslpnphy_spbdump_data_t; 7145 typedef struct wl_sslpnphy_percal_debug_data { 7146 uint32 cur_idx; 7147 uint32 tx_drift; 7148 uint8 prev_cal_idx; 7149 uint8 PAD[3]; 7150 uint32 percal_ctr; 7151 int32 nxt_cal_idx; 7152 uint32 force_1idxcal; 7153 uint32 onedxacl_req; 7154 int32 last_cal_volt; 7155 int8 last_cal_temp; 7156 uint8 PAD[3]; 7157 uint32 vbat_ripple; 7158 uint32 exit_route; 7159 int32 volt_winner; 7160 } wl_sslpnphy_percal_debug_data_t; 7161 7162 typedef enum { 7163 wowl_pattern_type_bitmap = 0, 7164 wowl_pattern_type_arp, 7165 wowl_pattern_type_na 7166 } wowl_pattern_type_t; 7167 7168 typedef struct wl_wowl_pattern { 7169 uint32 masksize; /**< Size of the mask in #of bytes */ 7170 uint32 offset; /**< Pattern byte offset in packet */ 7171 uint32 patternoffset; /**< Offset of start of pattern in the structure */ 7172 uint32 patternsize; /**< Size of the pattern itself in #of bytes */ 7173 uint32 id; /**< id */ 7174 uint32 reasonsize; /**< Size of the wakeup reason code */ 7175 wowl_pattern_type_t type; /**< Type of pattern */ 7176 /* Mask follows the structure above */ 7177 /* Pattern follows the mask is at 'patternoffset' from the start */ 7178 } wl_wowl_pattern_t; 7179 7180 typedef struct wl_wowl_pattern_list { 7181 uint32 count; 7182 wl_wowl_pattern_t pattern[1]; 7183 } wl_wowl_pattern_list_t; 7184 7185 typedef struct wl_wowl_wakeind { 7186 uint8 pci_wakeind; /**< Whether PCI PMECSR PMEStatus bit was set */ 7187 uint32 ucode_wakeind; /**< What wakeup-event indication was set by ucode */ 7188 } wl_wowl_wakeind_t; 7189 7190 /** per AC rate control related data structure */ 7191 typedef struct wl_txrate_class { 7192 uint8 init_rate; 7193 uint8 min_rate; 7194 uint8 max_rate; 7195 } wl_txrate_class_t; 7196 7197 /** structure for Overlap BSS scan arguments */ 7198 typedef struct wl_obss_scan_arg { 7199 int16 passive_dwell; 7200 int16 active_dwell; 7201 int16 bss_widthscan_interval; 7202 int16 passive_total; 7203 int16 active_total; 7204 int16 chanwidth_transition_delay; 7205 int16 activity_threshold; 7206 } wl_obss_scan_arg_t; 7207 7208 #define WL_OBSS_SCAN_PARAM_LEN sizeof(wl_obss_scan_arg_t) 7209 7210 /** RSSI event notification configuration. */ 7211 typedef struct wl_rssi_event { 7212 uint32 rate_limit_msec; /**< # of events posted to application will be limited to 7213 * one per specified period (0 to disable rate limit). 7214 */ 7215 uint8 num_rssi_levels; /**< Number of entries in rssi_levels[] below */ 7216 int8 rssi_levels[MAX_RSSI_LEVELS]; /**< Variable number of RSSI levels. An event 7217 * will be posted each time the RSSI of received 7218 * beacons/packets crosses a level. 7219 */ 7220 int8 pad[3]; 7221 } wl_rssi_event_t; 7222 7223 #define RSSI_MONITOR_VERSION 1 7224 #define RSSI_MONITOR_STOP (1 << 0) 7225 typedef struct wl_rssi_monitor_cfg { 7226 uint8 version; 7227 uint8 flags; 7228 int8 max_rssi; 7229 int8 min_rssi; 7230 } wl_rssi_monitor_cfg_t; 7231 7232 typedef struct wl_rssi_monitor_evt { 7233 uint8 version; 7234 int8 cur_rssi; 7235 uint16 pad; 7236 } wl_rssi_monitor_evt_t; 7237 7238 /* CCA based channel quality event configuration (ID values for both config and report) */ 7239 #define WL_CHAN_QUAL_CCA 0 7240 #define WL_CHAN_QUAL_NF 1 7241 #define WL_CHAN_QUAL_NF_LTE 2 7242 #define WL_CHAN_QUAL_TOTAL 3 /* The total IDs supported in both config and report */ 7243 /* Additional channel quality event support in report only (>= 0x100) 7244 * Notice that uint8 is used in configuration struct wl_chan_qual_metric_t, but uint16 is 7245 * used for report in struct cca_chan_qual_event_t. So the ID values beyond 8-bit are used 7246 * for reporting purpose only. 7247 */ 7248 #define WL_CHAN_QUAL_FULL_CCA (0x100u | WL_CHAN_QUAL_CCA) /* CCA: ibss vs. obss */ 7249 #define WL_CHAN_QUAL_FULLPM_CCA (0x200u | WL_CHAN_QUAL_CCA) /* CCA: me vs. notme, PM vs. !PM */ 7250 7251 #define MAX_CHAN_QUAL_LEVELS 8 7252 7253 typedef struct wl_chan_qual_metric { 7254 uint8 id; /**< metric ID */ 7255 uint8 num_levels; /**< Number of entries in rssi_levels[] below */ 7256 uint16 flags; 7257 int16 htol[MAX_CHAN_QUAL_LEVELS]; /**< threshold level array: hi-to-lo */ 7258 int16 ltoh[MAX_CHAN_QUAL_LEVELS]; /**< threshold level array: lo-to-hi */ 7259 } wl_chan_qual_metric_t; 7260 7261 typedef struct wl_chan_qual_event { 7262 uint32 rate_limit_msec; /**< # of events posted to application will be limited to 7263 * one per specified period (0 to disable rate limit). 7264 */ 7265 uint16 flags; 7266 uint16 num_metrics; 7267 wl_chan_qual_metric_t metric[WL_CHAN_QUAL_TOTAL]; /**< metric array */ 7268 } wl_chan_qual_event_t; 7269 typedef struct wl_action_obss_coex_req { 7270 uint8 info; 7271 uint8 num; 7272 uint8 ch_list[1]; 7273 } wl_action_obss_coex_req_t; 7274 7275 /** IOVar parameter block for small MAC address array with type indicator */ 7276 #define WL_IOV_MAC_PARAM_LEN 4 7277 7278 /** This value is hardcoded to be 16 and MUST match PKTQ_MAX_PREC value defined elsewhere */ 7279 #define WL_IOV_PKTQ_LOG_PRECS 16 7280 7281 #include <packed_section_start.h> 7282 typedef BWL_PRE_PACKED_STRUCT struct { 7283 uint32 num_addrs; 7284 uint8 addr_type[WL_IOV_MAC_PARAM_LEN]; 7285 struct ether_addr ea[WL_IOV_MAC_PARAM_LEN]; 7286 } BWL_POST_PACKED_STRUCT wl_iov_mac_params_t; 7287 #include <packed_section_end.h> 7288 7289 /** This is extra info that follows wl_iov_mac_params_t */ 7290 typedef struct { 7291 uint32 addr_info[WL_IOV_MAC_PARAM_LEN]; 7292 } wl_iov_mac_extra_params_t; 7293 7294 /** Combined structure */ 7295 typedef struct { 7296 wl_iov_mac_params_t params; 7297 wl_iov_mac_extra_params_t extra_params; 7298 } wl_iov_mac_full_params_t; 7299 7300 /** Parameter block for PKTQ_LOG statistics */ 7301 /* NOTE: this structure cannot change! It is exported to wlu as a binary format 7302 * A new format revision number must be created if the interface changes 7303 * The latest is v05; previous v01...v03 are no longer supported, v04 has 7304 * common base with v05 7305 */ 7306 #define PKTQ_LOG_COUNTERS_V4 \ 7307 /* packets requested to be stored */ \ 7308 uint32 requested; \ 7309 /* packets stored */ \ 7310 uint32 stored; \ 7311 /* packets saved, because a lowest priority queue has given away one packet */ \ 7312 uint32 saved; \ 7313 /* packets saved, because an older packet from the same queue has been dropped */ \ 7314 uint32 selfsaved; \ 7315 /* packets dropped, because pktq is full with higher precedence packets */ \ 7316 uint32 full_dropped; \ 7317 /* packets dropped because pktq per that precedence is full */ \ 7318 uint32 dropped; \ 7319 /* packets dropped, in order to save one from a queue of a highest priority */ \ 7320 uint32 sacrificed; \ 7321 /* packets droped because of hardware/transmission error */ \ 7322 uint32 busy; \ 7323 /* packets re-sent because they were not received */ \ 7324 uint32 retry; \ 7325 /* packets retried again (ps pretend) prior to moving power save mode */ \ 7326 uint32 ps_retry; \ 7327 /* suppressed packet count */ \ 7328 uint32 suppress; \ 7329 /* packets finally dropped after retry limit */ \ 7330 uint32 retry_drop; \ 7331 /* the high-water mark of the queue capacity for packets - goes to zero as queue fills */ \ 7332 uint32 max_avail; \ 7333 /* the high-water mark of the queue utilisation for packets - ('inverse' of max_avail) */ \ 7334 uint32 max_used; \ 7335 /* the maximum capacity of the queue */ \ 7336 uint32 queue_capacity; \ 7337 /* count of rts attempts that failed to receive cts */ \ 7338 uint32 rtsfail; \ 7339 /* count of packets sent (acked) successfully */ \ 7340 uint32 acked; \ 7341 /* running total of phy rate of packets sent successfully */ \ 7342 uint32 txrate_succ; \ 7343 /* running total of phy 'main' rate */ \ 7344 uint32 txrate_main; \ 7345 /* actual data transferred successfully */ \ 7346 uint32 throughput; \ 7347 /* time difference since last pktq_stats */ \ 7348 uint32 time_delta; 7349 7350 typedef struct { 7351 PKTQ_LOG_COUNTERS_V4 7352 } pktq_log_counters_v04_t; 7353 7354 /** v5 is the same as V4 with extra parameter */ 7355 typedef struct { 7356 PKTQ_LOG_COUNTERS_V4 7357 /** cumulative time to transmit */ 7358 uint32 airtime; 7359 } pktq_log_counters_v05_t; 7360 7361 typedef struct { 7362 uint8 num_prec[WL_IOV_MAC_PARAM_LEN]; 7363 pktq_log_counters_v04_t counters[WL_IOV_MAC_PARAM_LEN][WL_IOV_PKTQ_LOG_PRECS]; 7364 uint32 counter_info[WL_IOV_MAC_PARAM_LEN]; 7365 uint32 pspretend_time_delta[WL_IOV_MAC_PARAM_LEN]; 7366 char headings[]; 7367 } pktq_log_format_v04_t; 7368 7369 typedef struct { 7370 uint8 num_prec[WL_IOV_MAC_PARAM_LEN]; 7371 pktq_log_counters_v05_t counters[WL_IOV_MAC_PARAM_LEN][WL_IOV_PKTQ_LOG_PRECS]; 7372 uint32 counter_info[WL_IOV_MAC_PARAM_LEN]; 7373 uint32 pspretend_time_delta[WL_IOV_MAC_PARAM_LEN]; 7374 char headings[]; 7375 } pktq_log_format_v05_t; 7376 7377 typedef struct { 7378 uint32 version; 7379 wl_iov_mac_params_t params; 7380 union { 7381 pktq_log_format_v04_t v04; 7382 pktq_log_format_v05_t v05; 7383 } pktq_log; 7384 } wl_iov_pktq_log_t; 7385 7386 /* PKTQ_LOG_AUTO, PKTQ_LOG_DEF_PREC flags introduced in v05, they are ignored by v04 */ 7387 #define PKTQ_LOG_AUTO (1 << 31) 7388 #define PKTQ_LOG_DEF_PREC (1 << 30) 7389 7390 typedef struct wl_pfn_macaddr_cfg_0 { 7391 uint8 version; 7392 uint8 reserved; 7393 struct ether_addr macaddr; 7394 } wl_pfn_macaddr_cfg_0_t; 7395 #define LEGACY1_WL_PFN_MACADDR_CFG_VER 0 7396 #define WL_PFN_MAC_OUI_ONLY_MASK 1 7397 #define WL_PFN_SET_MAC_UNASSOC_MASK 2 7398 #define WL_PFN_RESTRICT_LA_MAC_MASK 4 7399 #define WL_PFN_MACADDR_FLAG_MASK 0x7 7400 /** To configure pfn_macaddr */ 7401 typedef struct wl_pfn_macaddr_cfg { 7402 uint8 version; 7403 uint8 flags; 7404 struct ether_addr macaddr; 7405 } wl_pfn_macaddr_cfg_t; 7406 #define WL_PFN_MACADDR_CFG_VER 1 7407 7408 /* 7409 * SCB_BS_DATA iovar definitions start. 7410 */ 7411 #define SCB_BS_DATA_STRUCT_VERSION 1 7412 7413 /** The actual counters maintained for each station */ 7414 typedef struct { 7415 /* The following counters are a subset of what pktq_stats provides per precedence. */ 7416 uint32 retry; /**< packets re-sent because they were not received */ 7417 uint32 retry_drop; /**< packets finally dropped after retry limit */ 7418 uint32 rtsfail; /**< count of rts attempts that failed to receive cts */ 7419 uint32 acked; /**< count of packets sent (acked) successfully */ 7420 uint32 txrate_succ; /**< running total of phy rate of packets sent successfully */ 7421 uint32 txrate_main; /**< running total of phy 'main' rate */ 7422 uint32 throughput; /**< actual data transferred successfully */ 7423 uint32 time_delta; /**< time difference since last pktq_stats */ 7424 uint32 airtime; /**< cumulative total medium access delay in useconds */ 7425 } iov_bs_data_counters_t; 7426 7427 /** The structure for individual station information. */ 7428 #include <packed_section_start.h> 7429 typedef BWL_PRE_PACKED_STRUCT struct { 7430 struct ether_addr station_address; /**< The station MAC address */ 7431 uint16 station_flags; /**< Bit mask of flags, for future use. */ 7432 iov_bs_data_counters_t station_counters; /**< The actual counter values */ 7433 } BWL_POST_PACKED_STRUCT iov_bs_data_record_t; 7434 #include <packed_section_end.h> 7435 7436 #include <packed_section_start.h> 7437 typedef BWL_PRE_PACKED_STRUCT struct { 7438 uint16 structure_version; /**< Structure version number (for wl/wlu matching) */ 7439 uint16 structure_count; /**< Number of iov_bs_data_record_t records following */ 7440 iov_bs_data_record_t structure_record[1]; /**< 0 - structure_count records */ 7441 } BWL_POST_PACKED_STRUCT iov_bs_data_struct_t; 7442 #include <packed_section_end.h> 7443 7444 /* Bitmask of options that can be passed in to the iovar. */ 7445 enum { 7446 SCB_BS_DATA_FLAG_NO_RESET = (1<<0) /**< Do not clear the counters after reading */ 7447 }; 7448 /* 7449 * SCB_BS_DATA iovar definitions end. 7450 */ 7451 7452 typedef struct wlc_extlog_cfg { 7453 int32 max_number; 7454 uint16 module; /**< bitmap */ 7455 uint8 level; 7456 uint8 flag; 7457 uint16 version; 7458 uint16 PAD; 7459 } wlc_extlog_cfg_t; 7460 7461 typedef struct log_record { 7462 uint32 time; 7463 uint16 module; 7464 uint16 id; 7465 uint8 level; 7466 uint8 sub_unit; 7467 uint8 seq_num; 7468 uint8 pad; 7469 int32 arg; 7470 char str[MAX_ARGSTR_LEN]; 7471 char PAD[4-MAX_ARGSTR_LEN%4]; 7472 } log_record_t; 7473 7474 typedef struct wlc_extlog_req { 7475 uint32 from_last; 7476 uint32 num; 7477 } wlc_extlog_req_t; 7478 7479 typedef struct wlc_extlog_results { 7480 uint16 version; 7481 uint16 record_len; 7482 uint32 num; 7483 log_record_t logs[1]; 7484 } wlc_extlog_results_t; 7485 7486 typedef struct log_idstr { 7487 uint16 id; 7488 uint16 flag; 7489 uint8 arg_type; 7490 const char *fmt_str; 7491 } log_idstr_t; 7492 7493 #define FMTSTRF_USER 1 7494 7495 /* flat ID definitions 7496 * New definitions HAVE TO BE ADDED at the end of the table. Otherwise, it will 7497 * affect backward compatibility with pre-existing apps 7498 */ 7499 typedef enum { 7500 FMTSTR_DRIVER_UP_ID = 0, 7501 FMTSTR_DRIVER_DOWN_ID = 1, 7502 FMTSTR_SUSPEND_MAC_FAIL_ID = 2, 7503 FMTSTR_NO_PROGRESS_ID = 3, 7504 FMTSTR_RFDISABLE_ID = 4, 7505 FMTSTR_REG_PRINT_ID = 5, 7506 FMTSTR_EXPTIME_ID = 6, 7507 FMTSTR_JOIN_START_ID = 7, 7508 FMTSTR_JOIN_COMPLETE_ID = 8, 7509 FMTSTR_NO_NETWORKS_ID = 9, 7510 FMTSTR_SECURITY_MISMATCH_ID = 10, 7511 FMTSTR_RATE_MISMATCH_ID = 11, 7512 FMTSTR_AP_PRUNED_ID = 12, 7513 FMTSTR_KEY_INSERTED_ID = 13, 7514 FMTSTR_DEAUTH_ID = 14, 7515 FMTSTR_DISASSOC_ID = 15, 7516 FMTSTR_LINK_UP_ID = 16, 7517 FMTSTR_LINK_DOWN_ID = 17, 7518 FMTSTR_RADIO_HW_OFF_ID = 18, 7519 FMTSTR_RADIO_HW_ON_ID = 19, 7520 FMTSTR_EVENT_DESC_ID = 20, 7521 FMTSTR_PNP_SET_POWER_ID = 21, 7522 FMTSTR_RADIO_SW_OFF_ID = 22, 7523 FMTSTR_RADIO_SW_ON_ID = 23, 7524 FMTSTR_PWD_MISMATCH_ID = 24, 7525 FMTSTR_FATAL_ERROR_ID = 25, 7526 FMTSTR_AUTH_FAIL_ID = 26, 7527 FMTSTR_ASSOC_FAIL_ID = 27, 7528 FMTSTR_IBSS_FAIL_ID = 28, 7529 FMTSTR_EXTAP_FAIL_ID = 29, 7530 FMTSTR_MAX_ID 7531 } log_fmtstr_id_t; 7532 7533 /** 11k Neighbor Report element (unversioned, deprecated) */ 7534 typedef struct nbr_element { 7535 uint8 id; 7536 uint8 len; 7537 struct ether_addr bssid; 7538 uint32 bssid_info; 7539 uint8 reg; 7540 uint8 channel; 7541 uint8 phytype; 7542 uint8 pad; 7543 } nbr_element_t; 7544 #define NBR_ADD_STATIC 0 7545 #define NBR_ADD_DYNAMIC 1 7546 7547 #define WL_RRM_NBR_RPT_VER 1 7548 7549 #define WL_NBR_RPT_FLAG_BSS_PREF_FROM_AP 0x01 7550 /** 11k Neighbor Report element */ 7551 typedef struct nbr_rpt_elem { 7552 uint8 version; 7553 uint8 id; 7554 uint8 len; 7555 uint8 pad; 7556 struct ether_addr bssid; 7557 uint8 pad_1[2]; 7558 uint32 bssid_info; 7559 uint8 reg; 7560 uint8 channel; 7561 uint8 phytype; 7562 uint8 addtype; /* static for manual add or dynamic if auto-learning of neighbors */ 7563 wlc_ssid_t ssid; 7564 chanspec_t chanspec; 7565 uint8 bss_trans_preference; 7566 uint8 flags; 7567 } nbr_rpt_elem_t; 7568 7569 typedef enum event_msgs_ext_command { 7570 EVENTMSGS_NONE = 0, 7571 EVENTMSGS_SET_BIT = 1, 7572 EVENTMSGS_RESET_BIT = 2, 7573 EVENTMSGS_SET_MASK = 3 7574 } event_msgs_ext_command_t; 7575 7576 #define EVENTMSGS_VER 1 7577 #define EVENTMSGS_EXT_STRUCT_SIZE OFFSETOF(eventmsgs_ext_t, mask[0]) 7578 7579 /* len- for SET it would be mask size from the application to the firmware */ 7580 /* for GET it would be actual firmware mask size */ 7581 /* maxgetsize - is only used for GET. indicate max mask size that the */ 7582 /* application can read from the firmware */ 7583 typedef struct eventmsgs_ext 7584 { 7585 uint8 ver; 7586 uint8 command; 7587 uint8 len; 7588 uint8 maxgetsize; 7589 uint8 mask[1]; 7590 } eventmsgs_ext_t; 7591 7592 #include <packed_section_start.h> 7593 typedef BWL_PRE_PACKED_STRUCT struct pcie_bus_tput_params { 7594 /** no of host dma descriptors programmed by the firmware before a commit */ 7595 uint16 max_dma_descriptors; 7596 7597 uint16 host_buf_len; /**< length of host buffer */ 7598 dmaaddr_t host_buf_addr; /**< physical address for bus_throughput_buf */ 7599 } BWL_POST_PACKED_STRUCT pcie_bus_tput_params_t; 7600 #include <packed_section_end.h> 7601 7602 typedef struct pcie_bus_tput_stats { 7603 uint16 time_taken; /**< no of secs the test is run */ 7604 uint16 nbytes_per_descriptor; /**< no of bytes of data dma ed per descriptor */ 7605 7606 /** no of desciptors for which dma is sucessfully completed within the test time */ 7607 uint32 count; 7608 } pcie_bus_tput_stats_t; 7609 7610 #define HOST_WAKEUP_DATA_VER 1 7611 #include <packed_section_start.h> 7612 /* Bus interface host wakeup data */ 7613 typedef BWL_PRE_PACKED_STRUCT struct wl_host_wakeup_data { 7614 uint16 ver; 7615 uint16 len; 7616 uchar data[1]; /* wakeup data */ 7617 } BWL_POST_PACKED_STRUCT wl_host_wakeup_data_t; 7618 #include <packed_section_end.h> 7619 7620 #define HOST_WAKEUP_DATA_VER_2 2 7621 #include <packed_section_start.h> 7622 /* Bus interface host wakeup data */ 7623 typedef BWL_PRE_PACKED_STRUCT struct wl_host_wakeup_data_v2 { 7624 uint16 ver; 7625 uint16 len; 7626 uint32 gpio_toggle_time; /* gpio toggle time in ms */ 7627 uchar data[1]; /* wakeup data */ 7628 } BWL_POST_PACKED_STRUCT wl_host_wakeup_data_v2_t; 7629 #include <packed_section_end.h> 7630 7631 typedef struct keepalives_max_idle { 7632 uint16 keepalive_count; /**< nmbr of keepalives per bss_max_idle period */ 7633 uint8 mkeepalive_index; /**< mkeepalive_index for keepalive frame to be used */ 7634 uint8 PAD; /**< to align next field */ 7635 uint16 max_interval; /**< seconds */ 7636 } keepalives_max_idle_t; 7637 7638 #define PM_IGNORE_BCMC_PROXY_ARP (1 << 0) 7639 #define PM_IGNORE_BCMC_ALL_DMS_ACCEPTED (1 << 1) 7640 7641 /* ##### HMAP section ##### */ 7642 #define PCIE_MAX_HMAP_WINDOWS 8 7643 #define PCIE_HMAPTEST_VERSION 2 7644 #define HMAPTEST_INVALID_OFFSET 0xFFFFFFFFu 7645 #define HMAPTEST_DEFAULT_WRITE_PATTERN 0xBABECAFEu 7646 #define HMAPTEST_ACCESS_ARM 0 7647 #define HMAPTEST_ACCESS_M2M 1 7648 #define HMAPTEST_ACCESS_D11 2 7649 #define HMAPTEST_ACCESS_NONE 3 7650 7651 typedef struct pcie_hmaptest { 7652 uint16 version; /* Version */ 7653 uint16 length; /* Length of entire structure */ 7654 uint32 xfer_len; 7655 uint32 accesstype; 7656 uint32 is_write; 7657 uint32 is_invalid; 7658 uint32 host_addr_hi; 7659 uint32 host_addr_lo; 7660 uint32 host_offset; 7661 uint32 value; /* 4 byte value to be filled in case of write access test */ 7662 uint32 delay; /* wait time in seconds before initiating access from dongle */ 7663 } pcie_hmaptest_t; 7664 7665 /* HMAP window register set */ 7666 typedef struct hmapwindow { 7667 uint32 baseaddr_lo; /* BaseAddrLower */ 7668 uint32 baseaddr_hi; /* BaseAddrUpper */ 7669 uint32 windowlength; /* Window Length */ 7670 } hmapwindow_t; 7671 7672 #define PCIE_HMAP_VERSION 1 7673 typedef struct pcie_hmap { 7674 uint16 version; /**< Version */ 7675 uint16 length; /**< Length of entire structure */ 7676 uint32 enable; /**< status of HMAP enabled/disabled */ 7677 uint32 nwindows; /* no. of HMAP windows enabled */ 7678 uint32 window_config; /* HMAP window_config register */ 7679 uint32 hmap_violationaddr_lo; /* violating address lo */ 7680 uint32 hmap_violationaddr_hi; /* violating addr hi */ 7681 uint32 hmap_violation_info; /* violation info */ 7682 hmapwindow_t hwindows[]; /* Multiple hwindows */ 7683 } pcie_hmap_t; 7684 7685 /* ##### Power Stats section ##### */ 7686 7687 #define WL_PWRSTATS_VERSION 2 7688 7689 /** Input structure for pwrstats IOVAR */ 7690 typedef struct wl_pwrstats_query { 7691 uint16 length; /**< Number of entries in type array. */ 7692 uint16 type[1]; /**< Types (tags) to retrieve. 7693 * Length 0 (no types) means get all. 7694 */ 7695 } wl_pwrstats_query_t; 7696 7697 /** This structure is for version 2; version 1 will be deprecated in by FW */ 7698 #include <packed_section_start.h> 7699 typedef BWL_PRE_PACKED_STRUCT struct wl_pwrstats { 7700 uint16 version; /**< Version = 2 is TLV format */ 7701 uint16 length; /**< Length of entire structure */ 7702 uint8 data[1]; /**< TLV data, a series of structures, 7703 * each starting with type and length. 7704 * 7705 * Padded as necessary so each section 7706 * starts on a 4-byte boundary. 7707 * 7708 * Both type and len are uint16, but the 7709 * upper nibble of length is reserved so 7710 * valid len values are 0-4095. 7711 */ 7712 } BWL_POST_PACKED_STRUCT wl_pwrstats_t; 7713 #include <packed_section_end.h> 7714 #define WL_PWR_STATS_HDRLEN OFFSETOF(wl_pwrstats_t, data) 7715 7716 /* Bits for wake reasons */ 7717 #define WLC_PMD_WAKE_SET 0x1 7718 #define WLC_PMD_PM_AWAKE_BCN 0x2 7719 /* BIT:3 is no longer being used */ 7720 #define WLC_PMD_SCAN_IN_PROGRESS 0x8 7721 #define WLC_PMD_RM_IN_PROGRESS 0x10 7722 #define WLC_PMD_AS_IN_PROGRESS 0x20 7723 #define WLC_PMD_PM_PEND 0x40 7724 #define WLC_PMD_PS_POLL 0x80 7725 #define WLC_PMD_CHK_UNALIGN_TBTT 0x100 7726 #define WLC_PMD_APSD_STA_UP 0x200 7727 #define WLC_PMD_TX_PEND_WAR 0x400 /* obsolete, can be reused */ 7728 #define WLC_PMD_NAN_AWAKE 0x400 /* Reusing for NAN */ 7729 #define WLC_PMD_GPTIMER_STAY_AWAKE 0x800 7730 #define WLC_PMD_PM2_RADIO_SOFF_PEND 0x2000 7731 #define WLC_PMD_NON_PRIM_STA_UP 0x4000 7732 #define WLC_PMD_AP_UP 0x8000 7733 7734 typedef struct wlc_pm_debug { 7735 uint32 timestamp; /**< timestamp in millisecond */ 7736 uint32 reason; /**< reason(s) for staying awake */ 7737 } wlc_pm_debug_t; 7738 7739 /** WL_PWRSTATS_TYPE_PM_AWAKE1 structures (for 6.25 firmware) */ 7740 #define WLC_STA_AWAKE_STATES_MAX_V1 30 7741 #define WLC_PMD_EVENT_MAX_V1 32 7742 /** Data sent as part of pwrstats IOVAR (and EXCESS_PM_WAKE event) */ 7743 #include <packed_section_start.h> 7744 typedef BWL_PRE_PACKED_STRUCT struct pm_awake_data_v1 { 7745 uint32 curr_time; /**< ms */ 7746 uint32 hw_macc; /**< HW maccontrol */ 7747 uint32 sw_macc; /**< SW maccontrol */ 7748 uint32 pm_dur; /**< Total sleep time in PM, msecs */ 7749 uint32 mpc_dur; /**< Total sleep time in MPC, msecs */ 7750 7751 /* int32 drifts = remote - local; +ve drift => local-clk slow */ 7752 int32 last_drift; /**< Most recent TSF drift from beacon */ 7753 int32 min_drift; /**< Min TSF drift from beacon in magnitude */ 7754 int32 max_drift; /**< Max TSF drift from beacon in magnitude */ 7755 7756 uint32 avg_drift; /**< Avg TSF drift from beacon */ 7757 7758 /* Wake history tracking */ 7759 uint8 pmwake_idx; /**< for stepping through pm_state */ 7760 wlc_pm_debug_t pm_state[WLC_STA_AWAKE_STATES_MAX_V1]; /**< timestamped wake bits */ 7761 uint32 pmd_event_wake_dur[WLC_PMD_EVENT_MAX_V1]; /**< cumulative usecs per wake reason */ 7762 uint32 drift_cnt; /**< Count of drift readings over which avg_drift was computed */ 7763 } BWL_POST_PACKED_STRUCT pm_awake_data_v1_t; 7764 #include <packed_section_end.h> 7765 7766 #include <packed_section_start.h> 7767 typedef BWL_PRE_PACKED_STRUCT struct wl_pwr_pm_awake_stats_v1 { 7768 uint16 type; /**< WL_PWRSTATS_TYPE_PM_AWAKE */ 7769 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 7770 7771 pm_awake_data_v1_t awake_data; 7772 uint32 frts_time; /**< Cumulative ms spent in frts since driver load */ 7773 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 7774 } BWL_POST_PACKED_STRUCT wl_pwr_pm_awake_stats_v1_t; 7775 #include <packed_section_end.h> 7776 7777 /** WL_PWRSTATS_TYPE_PM_AWAKE2 structures. Data sent as part of pwrstats IOVAR */ 7778 typedef struct pm_awake_data_v2 { 7779 uint32 curr_time; /**< ms */ 7780 uint32 hw_macc; /**< HW maccontrol */ 7781 uint32 sw_macc; /**< SW maccontrol */ 7782 uint32 pm_dur; /**< Total sleep time in PM, msecs */ 7783 uint32 mpc_dur; /**< Total sleep time in MPC, msecs */ 7784 7785 /* int32 drifts = remote - local; +ve drift => local-clk slow */ 7786 int32 last_drift; /**< Most recent TSF drift from beacon */ 7787 int32 min_drift; /**< Min TSF drift from beacon in magnitude */ 7788 int32 max_drift; /**< Max TSF drift from beacon in magnitude */ 7789 7790 uint32 avg_drift; /**< Avg TSF drift from beacon */ 7791 7792 /* Wake history tracking */ 7793 7794 /* pmstate array (type wlc_pm_debug_t) start offset */ 7795 uint16 pm_state_offset; 7796 /** pmstate number of array entries */ 7797 uint16 pm_state_len; 7798 7799 /** array (type uint32) start offset */ 7800 uint16 pmd_event_wake_dur_offset; 7801 /** pmd_event_wake_dur number of array entries */ 7802 uint16 pmd_event_wake_dur_len; 7803 7804 uint32 drift_cnt; /**< Count of drift readings over which avg_drift was computed */ 7805 uint8 pmwake_idx; /**< for stepping through pm_state */ 7806 uint8 flags; /**< bit0: 1-sleep, 0- wake. bit1: 0-bit0 invlid, 1-bit0 valid */ 7807 uint8 pad[2]; 7808 uint32 frts_time; /**< Cumulative ms spent in frts since driver load */ 7809 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 7810 } pm_awake_data_v2_t; 7811 7812 typedef struct wl_pwr_pm_awake_stats_v2 { 7813 uint16 type; /**< WL_PWRSTATS_TYPE_PM_AWAKE */ 7814 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 7815 7816 pm_awake_data_v2_t awake_data; 7817 } wl_pwr_pm_awake_stats_v2_t; 7818 7819 /* bit0: 1-sleep, 0- wake. bit1: 0-bit0 invlid, 1-bit0 valid */ 7820 #define WL_PWR_PM_AWAKE_STATS_WAKE 0x02 7821 #define WL_PWR_PM_AWAKE_STATS_ASLEEP 0x03 7822 #define WL_PWR_PM_AWAKE_STATS_WAKE_MASK 0x03 7823 7824 /* WL_PWRSTATS_TYPE_PM_AWAKE Version 2 structures taken from 4324/43342 */ 7825 /* These structures are only to be used with 4324/43342 devices */ 7826 7827 #define WL_STA_AWAKE_STATES_MAX_V2 30 7828 #define WL_PMD_EVENT_MAX_V2 32 7829 #define MAX_P2P_BSS_DTIM_PRD 4 7830 7831 #include <packed_section_start.h> 7832 typedef BWL_PRE_PACKED_STRUCT struct ucode_dbg_v2 { 7833 uint32 macctrl; 7834 uint16 m_p2p_hps; 7835 uint16 m_p2p_bss_dtim_prd[MAX_P2P_BSS_DTIM_PRD]; 7836 uint32 psmdebug[20]; 7837 uint32 phydebug[20]; 7838 uint32 psm_brc; 7839 uint32 ifsstat; 7840 } BWL_POST_PACKED_STRUCT ucode_dbg_v2_t; 7841 #include <packed_section_end.h> 7842 7843 #include <packed_section_start.h> 7844 typedef BWL_PRE_PACKED_STRUCT struct pmalert_awake_data_v2 { 7845 uint32 curr_time; /* ms */ 7846 uint32 hw_macc; /* HW maccontrol */ 7847 uint32 sw_macc; /* SW maccontrol */ 7848 uint32 pm_dur; /* Total sleep time in PM, msecs */ 7849 uint32 mpc_dur; /* Total sleep time in MPC, msecs */ 7850 7851 /* int32 drifts = remote - local; +ve drift => local-clk slow */ 7852 int32 last_drift; /* Most recent TSF drift from beacon */ 7853 int32 min_drift; /* Min TSF drift from beacon in magnitude */ 7854 int32 max_drift; /* Max TSF drift from beacon in magnitude */ 7855 7856 uint32 avg_drift; /* Avg TSF drift from beacon */ 7857 7858 /* Wake history tracking */ 7859 uint8 pmwake_idx; /* for stepping through pm_state */ 7860 wlc_pm_debug_t pm_state[WL_STA_AWAKE_STATES_MAX_V2]; /* timestamped wake bits */ 7861 uint32 pmd_event_wake_dur[WL_PMD_EVENT_MAX_V2]; /* cumulative usecs per wake reason */ 7862 uint32 drift_cnt; /* Count of drift readings over which avg_drift was computed */ 7863 uint32 start_event_dur[WL_PMD_EVENT_MAX_V2]; /* start event-duration */ 7864 ucode_dbg_v2_t ud; 7865 uint32 frts_time; /* Cumulative ms spent in frts since driver load */ 7866 uint32 frts_end_cnt; /* No of times frts ended since driver load */ 7867 } BWL_POST_PACKED_STRUCT pmalert_awake_data_v2_t; 7868 #include <packed_section_end.h> 7869 7870 #include <packed_section_start.h> 7871 typedef BWL_PRE_PACKED_STRUCT struct pm_alert_data_v2 { 7872 uint32 version; 7873 uint32 length; /* Length of entire structure */ 7874 uint32 reasons; /* reason(s) for pm_alert */ 7875 /* Following fields are present only for reasons 7876 * PM_DUR_EXCEEDED, MPC_DUR_EXCEEDED & CONST_AWAKE_DUR_EXCEEDED 7877 */ 7878 uint32 prev_stats_time; /* msecs */ 7879 uint32 prev_pm_dur; /* msecs */ 7880 uint32 prev_mpc_dur; /* msecs */ 7881 pmalert_awake_data_v2_t awake_data; 7882 } BWL_POST_PACKED_STRUCT pm_alert_data_v2_t; 7883 #include <packed_section_end.h> 7884 7885 #include <packed_section_start.h> 7886 typedef BWL_PRE_PACKED_STRUCT struct wl_pwr_pm_awake_status_v2 { 7887 uint16 type; /* WL_PWRSTATS_TYPE_PM_AWAKE */ 7888 uint16 len; /* Up to 4K-1, top 4 bits are reserved */ 7889 7890 pmalert_awake_data_v2_t awake_data; 7891 uint32 frts_time; /* Cumulative ms spent in frts since driver load */ 7892 uint32 frts_end_cnt; /* No of times frts ended since driver load */ 7893 } BWL_POST_PACKED_STRUCT wl_pwr_pm_awake_status_v2_t; 7894 #include <packed_section_end.h> 7895 7896 /* Below are latest definitions from PHO25178RC100_BRANCH_6_50 */ 7897 /* wl_pwr_pm_awake_stats_v1_t is used for WL_PWRSTATS_TYPE_PM_AWAKE */ 7898 /* Use regs from d11.h instead of raw addresses for */ 7899 /* (at least) the chip independent registers */ 7900 typedef struct ucode_dbg_ext { 7901 uint32 x120; 7902 uint32 x124; 7903 uint32 x154; 7904 uint32 x158; 7905 uint32 x15c; 7906 uint32 x180; 7907 uint32 x184; 7908 uint32 x188; 7909 uint32 x18c; 7910 uint32 x1a0; 7911 uint32 x1a8; 7912 uint32 x1e0; 7913 uint32 scr_x14; 7914 uint32 scr_x2b; 7915 uint32 scr_x2c; 7916 uint32 scr_x2d; 7917 uint32 scr_x2e; 7918 7919 uint16 x40a; 7920 uint16 x480; 7921 uint16 x490; 7922 uint16 x492; 7923 uint16 x4d8; 7924 uint16 x4b8; 7925 uint16 x4ba; 7926 uint16 x4bc; 7927 uint16 x4be; 7928 uint16 x500; 7929 uint16 x50e; 7930 uint16 x522; 7931 uint16 x546; 7932 uint16 x578; 7933 uint16 x602; 7934 uint16 x646; 7935 uint16 x648; 7936 uint16 x666; 7937 uint16 x670; 7938 uint16 x690; 7939 uint16 x692; 7940 uint16 x6a0; 7941 uint16 x6a2; 7942 uint16 x6a4; 7943 uint16 x6b2; 7944 uint16 x7c0; 7945 7946 uint16 shm_x20; 7947 uint16 shm_x4a; 7948 uint16 shm_x5e; 7949 uint16 shm_x5f; 7950 uint16 shm_xaab; 7951 uint16 shm_x74a; 7952 uint16 shm_x74b; 7953 uint16 shm_x74c; 7954 uint16 shm_x74e; 7955 uint16 shm_x756; 7956 uint16 shm_x75b; 7957 uint16 shm_x7b9; 7958 uint16 shm_x7d4; 7959 7960 uint16 shm_P2P_HPS; 7961 uint16 shm_P2P_intr[16]; 7962 uint16 shm_P2P_perbss[48]; 7963 } ucode_dbg_ext_t; 7964 7965 #include <packed_section_start.h> 7966 typedef BWL_PRE_PACKED_STRUCT struct pm_alert_data_v1 { 7967 uint32 version; 7968 uint32 length; /**< Length of entire structure */ 7969 uint32 reasons; /**< reason(s) for pm_alert */ 7970 /* Following fields are present only for reasons 7971 * PM_DUR_EXCEEDED, MPC_DUR_EXCEEDED & CONST_AWAKE_DUR_EXCEEDED 7972 */ 7973 uint32 prev_stats_time; /**< msecs */ 7974 uint32 prev_pm_dur; /**< msecs */ 7975 uint32 prev_mpc_dur; /**< msecs */ 7976 pm_awake_data_v1_t awake_data; 7977 uint32 start_event_dur[WLC_PMD_EVENT_MAX_V1]; /**< start event-duration */ 7978 ucode_dbg_v2_t ud; 7979 uint32 frts_time; /**< Cumulative ms spent in frts since driver load */ 7980 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 7981 ucode_dbg_ext_t ud_ext; 7982 uint32 prev_frts_dur; /**< ms */ 7983 } BWL_POST_PACKED_STRUCT pm_alert_data_v1_t; 7984 #include <packed_section_end.h> 7985 7986 /* End of 43342/4324 v2 structure definitions */ 7987 7988 /* Original bus structure is for HSIC */ 7989 7990 typedef struct bus_metrics { 7991 uint32 suspend_ct; /**< suspend count */ 7992 uint32 resume_ct; /**< resume count */ 7993 uint32 disconnect_ct; /**< disconnect count */ 7994 uint32 reconnect_ct; /**< reconnect count */ 7995 uint32 active_dur; /**< msecs in bus, usecs for user */ 7996 uint32 suspend_dur; /**< msecs in bus, usecs for user */ 7997 uint32 disconnect_dur; /**< msecs in bus, usecs for user */ 7998 } bus_metrics_t; 7999 8000 /** Bus interface info for USB/HSIC */ 8001 #include <packed_section_start.h> 8002 typedef BWL_PRE_PACKED_STRUCT struct wl_pwr_usb_hsic_stats { 8003 uint16 type; /**< WL_PWRSTATS_TYPE_USB_HSIC */ 8004 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 8005 8006 bus_metrics_t hsic; /**< stats from hsic bus driver */ 8007 } BWL_POST_PACKED_STRUCT wl_pwr_usb_hsic_stats_t; 8008 #include <packed_section_end.h> 8009 8010 /* PCIe Event counter tlv IDs */ 8011 enum pcie_cnt_xtlv_id { 8012 PCIE_CNT_XTLV_METRICS = 0x1, /**< PCIe Bus Metrics */ 8013 PCIE_CNT_XTLV_BUS_CNT = 0x2 /**< PCIe Bus counters */ 8014 }; 8015 8016 typedef struct pcie_bus_metrics { 8017 uint32 d3_suspend_ct; /**< suspend count */ 8018 uint32 d0_resume_ct; /**< resume count */ 8019 uint32 perst_assrt_ct; /**< PERST# assert count */ 8020 uint32 perst_deassrt_ct; /**< PERST# de-assert count */ 8021 uint32 active_dur; /**< msecs */ 8022 uint32 d3_suspend_dur; /**< msecs */ 8023 uint32 perst_dur; /**< msecs */ 8024 uint32 l0_cnt; /**< L0 entry count */ 8025 uint32 l0_usecs; /**< L0 duration in usecs */ 8026 uint32 l1_cnt; /**< L1 entry count */ 8027 uint32 l1_usecs; /**< L1 duration in usecs */ 8028 uint32 l1_1_cnt; /**< L1_1ss entry count */ 8029 uint32 l1_1_usecs; /**< L1_1ss duration in usecs */ 8030 uint32 l1_2_cnt; /**< L1_2ss entry count */ 8031 uint32 l1_2_usecs; /**< L1_2ss duration in usecs */ 8032 uint32 l2_cnt; /**< L2 entry count */ 8033 uint32 l2_usecs; /**< L2 duration in usecs */ 8034 uint32 timestamp; /**< Timestamp on when stats are collected */ 8035 uint32 num_h2d_doorbell; /**< # of doorbell interrupts - h2d */ 8036 uint32 num_d2h_doorbell; /**< # of doorbell interrupts - d2h */ 8037 uint32 num_submissions; /**< # of submissions */ 8038 uint32 num_completions; /**< # of completions */ 8039 uint32 num_rxcmplt; /**< # of rx completions */ 8040 uint32 num_rxcmplt_drbl; /**< of drbl interrupts for rx complt. */ 8041 uint32 num_txstatus; /**< # of tx completions */ 8042 uint32 num_txstatus_drbl; /**< of drbl interrupts for tx complt. */ 8043 uint32 deepsleep_count; /**< # of times chip went to deepsleep */ 8044 uint32 deepsleep_dur; /**< # of msecs chip was in deepsleep */ 8045 uint32 ltr_active_ct; /**< # of times chip went to LTR ACTIVE */ 8046 uint32 ltr_active_dur; /**< # of msecs chip was in LTR ACTIVE */ 8047 uint32 ltr_sleep_ct; /**< # of times chip went to LTR SLEEP */ 8048 uint32 ltr_sleep_dur; /**< # of msecs chip was in LTR SLEEP */ 8049 } pcie_bus_metrics_t; 8050 8051 typedef struct pcie_cnt { 8052 uint32 ltr_state; /**< Current LTR state */ 8053 uint32 l0_sr_cnt; /**< SR count during L0 */ 8054 uint32 l2l3_sr_cnt; /**< SR count during L2L3 */ 8055 uint32 d3_ack_sr_cnt; /**< srcount during last D3-ACK */ 8056 uint32 d3_sr_cnt; /**< SR count during D3 */ 8057 uint32 d3_info_start; /**< D3 INFORM received time */ 8058 uint32 d3_info_enter_cnt; /**< # of D3 INFORM received */ 8059 uint32 d3_cnt; /**< # of real D3 */ 8060 uint32 d3_ack_sent_cnt; /**< # of D3 ACK sent count */ 8061 uint32 d3_drop_cnt_event; /**< # of events dropped during D3 */ 8062 uint32 d2h_req_q_len; /**< # of Packet pending in D2H request queue */ 8063 uint32 hw_reason; /**< Last Host wake assert reason */ 8064 uint32 hw_assert_cnt; /**< # of times Host wake Asserted */ 8065 uint32 host_ready_cnt; /**< # of Host ready interrupts */ 8066 uint32 hw_assert_reason_0; /**< timestamp when hw_reason is TRAP */ 8067 uint32 hw_assert_reason_1; /**< timestamp when hw_reason is WL_EVENT */ 8068 uint32 hw_assert_reason_2; /**< timestamp when hw_reason is DATA */ 8069 uint32 hw_assert_reason_3; /**< timestamp when hw_reason is DELAYED_WAKE */ 8070 uint32 last_host_ready; /**< Timestamp of last Host ready */ 8071 bool hw_asserted; /**< Flag to indicate if Host wake is Asserted */ 8072 bool event_delivery_pend; /**< No resources to send event */ 8073 uint16 pad; /**< Word alignment for scripts */ 8074 } pcie_cnt_t; 8075 8076 /** Bus interface info for PCIE */ 8077 typedef struct wl_pwr_pcie_stats { 8078 uint16 type; /**< WL_PWRSTATS_TYPE_PCIE */ 8079 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 8080 pcie_bus_metrics_t pcie; /**< stats from pcie bus driver */ 8081 } wl_pwr_pcie_stats_t; 8082 8083 /** Scan information history per category */ 8084 typedef struct scan_data { 8085 uint32 count; /**< Number of scans performed */ 8086 uint32 dur; /**< Total time (in us) used */ 8087 } scan_data_t; 8088 8089 typedef struct wl_pwr_scan_stats { 8090 uint16 type; /**< WL_PWRSTATS_TYPE_SCAN */ 8091 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 8092 8093 /* Scan history */ 8094 scan_data_t user_scans; /**< User-requested scans: (i/e/p)scan */ 8095 scan_data_t assoc_scans; /**< Scans initiated by association requests */ 8096 scan_data_t roam_scans; /**< Scans initiated by the roam engine */ 8097 scan_data_t pno_scans[8]; /**< For future PNO bucketing (BSSID, SSID, etc) */ 8098 scan_data_t other_scans; /**< Scan engine usage not assigned to the above */ 8099 } wl_pwr_scan_stats_t; 8100 8101 typedef struct wl_pwr_connect_stats { 8102 uint16 type; /**< WL_PWRSTATS_TYPE_SCAN */ 8103 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 8104 8105 /* Connection (Association + Key exchange) data */ 8106 uint32 count; /**< Number of connections performed */ 8107 uint32 dur; /**< Total time (in ms) used */ 8108 } wl_pwr_connect_stats_t; 8109 8110 typedef struct wl_pwr_phy_stats { 8111 uint16 type; /**< WL_PWRSTATS_TYPE_PHY */ 8112 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 8113 uint32 tx_dur; /**< TX Active duration in us */ 8114 uint32 rx_dur; /**< RX Active duration in us */ 8115 } wl_pwr_phy_stats_t; 8116 8117 typedef struct wl_mimo_meas_metrics_v1 { 8118 uint16 type; 8119 uint16 len; 8120 /* Total time(us) idle in MIMO RX chain configuration */ 8121 uint32 total_idle_time_mimo; 8122 /* Total time(us) idle in SISO RX chain configuration */ 8123 uint32 total_idle_time_siso; 8124 /* Total receive time (us) in SISO RX chain configuration */ 8125 uint32 total_rx_time_siso; 8126 /* Total receive time (us) in MIMO RX chain configuration */ 8127 uint32 total_rx_time_mimo; 8128 /* Total 1-chain transmit time(us) */ 8129 uint32 total_tx_time_1chain; 8130 /* Total 2-chain transmit time(us) */ 8131 uint32 total_tx_time_2chain; 8132 /* Total 3-chain transmit time(us) */ 8133 uint32 total_tx_time_3chain; 8134 } wl_mimo_meas_metrics_v1_t; 8135 8136 typedef struct wl_mimo_meas_metrics { 8137 uint16 type; 8138 uint16 len; 8139 /* Total time(us) idle in MIMO RX chain configuration */ 8140 uint32 total_idle_time_mimo; 8141 /* Total time(us) idle in SISO RX chain configuration */ 8142 uint32 total_idle_time_siso; 8143 /* Total receive time (us) in SISO RX chain configuration */ 8144 uint32 total_rx_time_siso; 8145 /* Total receive time (us) in MIMO RX chain configuration */ 8146 uint32 total_rx_time_mimo; 8147 /* Total 1-chain transmit time(us) */ 8148 uint32 total_tx_time_1chain; 8149 /* Total 2-chain transmit time(us) */ 8150 uint32 total_tx_time_2chain; 8151 /* Total 3-chain transmit time(us) */ 8152 uint32 total_tx_time_3chain; 8153 /* End of original, OCL fields start here */ 8154 /* Total time(us) idle in ocl mode */ 8155 uint32 total_idle_time_ocl; 8156 /* Total receive time (us) in ocl mode */ 8157 uint32 total_rx_time_ocl; 8158 /* End of OCL fields, internal adjustment fields here */ 8159 /* Total SIFS idle time in MIMO mode */ 8160 uint32 total_sifs_time_mimo; 8161 /* Total SIFS idle time in SISO mode */ 8162 uint32 total_sifs_time_siso; 8163 } wl_mimo_meas_metrics_t; 8164 8165 typedef struct wl_pwr_slice_index { 8166 uint16 type; /* WL_PWRSTATS_TYPE_SLICE_INDEX */ 8167 uint16 len; 8168 8169 uint32 slice_index; /* Slice index for which stats are meant for */ 8170 } wl_pwr_slice_index_t; 8171 8172 typedef struct wl_pwr_tsync_stats { 8173 uint16 type; /**< WL_PWRSTATS_TYPE_TSYNC */ 8174 uint16 len; 8175 uint32 avb_uptime; /**< AVB uptime in msec */ 8176 } wl_pwr_tsync_stats_t; 8177 8178 typedef struct wl_pwr_ops_stats { 8179 uint16 type; /* WL_PWRSTATS_TYPE_OPS_STATS */ 8180 uint16 len; /* total length includes fixed fields */ 8181 uint32 partial_ops_dur; /* Total time(in usec) partial ops duration */ 8182 uint32 full_ops_dur; /* Total time(in usec) full ops duration */ 8183 } wl_pwr_ops_stats_t; 8184 8185 typedef struct wl_pwr_bcntrim_stats { 8186 uint16 type; /* WL_PWRSTATS_TYPE_BCNTRIM_STATS */ 8187 uint16 len; /* total length includes fixed fields */ 8188 uint8 associated; /* STA is associated ? */ 8189 uint8 slice_idx; /* on which slice STA is associated */ 8190 uint16 pad; /* padding */ 8191 uint32 slice_beacon_seen; /* number of beacons seen on the Infra 8192 * interface on this slice 8193 */ 8194 uint32 slice_beacon_trimmed; /* number beacons actually trimmed on this slice */ 8195 uint32 total_beacon_seen; /* total number of beacons seen on the Infra interface */ 8196 uint32 total_beacon_trimmed; /* total beacons actually trimmed */ 8197 } wl_pwr_bcntrim_stats_t; 8198 8199 typedef struct wl_pwr_slice_index_band { 8200 uint16 type; /* WL_PWRSTATS_TYPE_SLICE_INDEX_BAND_INFO */ 8201 uint16 len; /* Total length includes fixed fields */ 8202 uint16 index; /* Slice Index */ 8203 int16 bandtype; /* Slice Bandtype */ 8204 } wl_pwr_slice_index_band_t; 8205 8206 typedef struct wl_pwr_psbw_stats { 8207 uint16 type; /* WL_PWRSTATS_TYPE_PSBW_STATS */ 8208 uint16 len; /* total length includes fixed fields */ 8209 uint8 slice_idx; /* on which slice STA is associated */ 8210 uint8 pad[3]; 8211 uint32 slice_enable_dur; /* time(ms) psbw remains enabled on this slice */ 8212 uint32 total_enable_dur; /* time(ms) psbw remains enabled total */ 8213 } wl_pwr_psbw_stats_t; 8214 8215 /* ##### End of Power Stats section ##### */ 8216 8217 /** IPV4 Arp offloads for ndis context */ 8218 #include <packed_section_start.h> 8219 BWL_PRE_PACKED_STRUCT struct hostip_id { 8220 struct ipv4_addr ipa; 8221 uint8 id; 8222 } BWL_POST_PACKED_STRUCT; 8223 #include <packed_section_end.h> 8224 8225 /* Return values */ 8226 #define ND_REPLY_PEER 0x1 /**< Reply was sent to service NS request from peer */ 8227 #define ND_REQ_SINK 0x2 /**< Input packet should be discarded */ 8228 #define ND_FORCE_FORWARD 0X3 /**< For the dongle to forward req to HOST */ 8229 8230 /** Neighbor Solicitation Response Offload IOVAR param */ 8231 #include <packed_section_start.h> 8232 typedef BWL_PRE_PACKED_STRUCT struct nd_param { 8233 struct ipv6_addr host_ip[2]; 8234 struct ipv6_addr solicit_ip; 8235 struct ipv6_addr remote_ip; 8236 uint8 host_mac[ETHER_ADDR_LEN]; 8237 uint32 offload_id; 8238 } BWL_POST_PACKED_STRUCT nd_param_t; 8239 #include <packed_section_end.h> 8240 8241 typedef struct wl_pfn_roam_thresh { 8242 uint32 pfn_alert_thresh; /**< time in ms */ 8243 uint32 roam_alert_thresh; /**< time in ms */ 8244 } wl_pfn_roam_thresh_t; 8245 8246 /* Reasons for wl_pmalert_t */ 8247 #define PM_DUR_EXCEEDED (1<<0) 8248 #define MPC_DUR_EXCEEDED (1<<1) 8249 #define ROAM_ALERT_THRESH_EXCEEDED (1<<2) 8250 #define PFN_ALERT_THRESH_EXCEEDED (1<<3) 8251 #define CONST_AWAKE_DUR_ALERT (1<<4) 8252 #define CONST_AWAKE_DUR_RECOVERY (1<<5) 8253 8254 #define MIN_PM_ALERT_LEN 9 8255 8256 /** Data sent in EXCESS_PM_WAKE event */ 8257 #define WL_PM_ALERT_VERSION 3 8258 8259 /** This structure is for version 3; version 2 will be deprecated in by FW */ 8260 #include <packed_section_start.h> 8261 typedef BWL_PRE_PACKED_STRUCT struct wl_pmalert { 8262 uint16 version; /**< Version = 3 is TLV format */ 8263 uint16 length; /**< Length of entire structure */ 8264 uint32 reasons; /**< reason(s) for pm_alert */ 8265 uint8 data[1]; /**< TLV data, a series of structures, 8266 * each starting with type and length. 8267 * 8268 * Padded as necessary so each section 8269 * starts on a 4-byte boundary. 8270 * 8271 * Both type and len are uint16, but the 8272 * upper nibble of length is reserved so 8273 * valid len values are 0-4095. 8274 */ 8275 } BWL_POST_PACKED_STRUCT wl_pmalert_t; 8276 #include <packed_section_end.h> 8277 8278 /* Type values for the data section */ 8279 #define WL_PMALERT_FIXED 0 /**< struct wl_pmalert_fixed_t, fixed fields */ 8280 #define WL_PMALERT_PMSTATE 1 /**< struct wl_pmalert_pmstate_t, variable */ 8281 #define WL_PMALERT_EVENT_DUR 2 /**< struct wl_pmalert_event_dur_t, variable */ 8282 #define WL_PMALERT_UCODE_DBG 3 /**< struct wl_pmalert_ucode_dbg_v1, variable */ 8283 #define WL_PMALERT_PS_ALLOWED_HIST 4 /**< struct wl_pmalert_ps_allowed_history, variable */ 8284 #define WL_PMALERT_EXT_UCODE_DBG 5 /**< struct wl_pmalert_ext_ucode_dbg_t, variable */ 8285 #define WL_PMALERT_EPM_START_EVENT_DUR 6 /**< struct wl_pmalert_event_dur_t, variable */ 8286 #define WL_PMALERT_UCODE_DBG_V2 7 /**< struct wl_pmalert_ucode_dbg_v2, variable */ 8287 8288 typedef struct wl_pmalert_fixed { 8289 uint16 type; /**< WL_PMALERT_FIXED */ 8290 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 8291 uint32 prev_stats_time; /**< msecs */ 8292 uint32 curr_time; /**< ms */ 8293 uint32 prev_pm_dur; /**< msecs */ 8294 uint32 pm_dur; /**< Total sleep time in PM, msecs */ 8295 uint32 prev_mpc_dur; /**< msecs */ 8296 uint32 mpc_dur; /**< Total sleep time in MPC, msecs */ 8297 uint32 hw_macc; /**< HW maccontrol */ 8298 uint32 sw_macc; /**< SW maccontrol */ 8299 8300 /* int32 drifts = remote - local; +ve drift -> local-clk slow */ 8301 int32 last_drift; /**< Most recent TSF drift from beacon */ 8302 int32 min_drift; /**< Min TSF drift from beacon in magnitude */ 8303 int32 max_drift; /**< Max TSF drift from beacon in magnitude */ 8304 8305 uint32 avg_drift; /**< Avg TSF drift from beacon */ 8306 uint32 drift_cnt; /**< Count of drift readings over which avg_drift was computed */ 8307 uint32 frts_time; /**< Cumulative ms spent in data frts since driver load */ 8308 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 8309 uint32 prev_frts_dur; /**< Data frts duration at start of pm-period */ 8310 uint32 cal_dur; /**< Cumulative ms spent in calibration */ 8311 uint32 prev_cal_dur; /**< cal duration at start of pm-period */ 8312 } wl_pmalert_fixed_t; 8313 8314 typedef struct wl_pmalert_pmstate { 8315 uint16 type; /**< WL_PMALERT_PMSTATE */ 8316 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 8317 8318 uint8 pmwake_idx; /**< for stepping through pm_state */ 8319 uint8 pad[3]; 8320 /* Array of pmstate; len of array is based on tlv len */ 8321 wlc_pm_debug_t pmstate[1]; 8322 } wl_pmalert_pmstate_t; 8323 8324 typedef struct wl_pmalert_event_dur { 8325 uint16 type; /**< WL_PMALERT_EVENT_DUR */ 8326 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 8327 8328 /* Array of event_dur, len of array is based on tlv len */ 8329 uint32 event_dur[1]; 8330 } wl_pmalert_event_dur_t; 8331 8332 #include <packed_section_start.h> 8333 BWL_PRE_PACKED_STRUCT struct wl_pmalert_ucode_dbg_v1 { 8334 uint16 type; /* WL_PMALERT_UCODE_DBG */ 8335 uint16 len; /* Up to 4K-1, top 4 bits are reserved */ 8336 uint32 macctrl; 8337 uint16 m_p2p_hps; 8338 uint32 psm_brc; 8339 uint32 ifsstat; 8340 uint16 m_p2p_bss_dtim_prd[MAX_P2P_BSS_DTIM_PRD]; 8341 uint32 psmdebug[20]; 8342 uint32 phydebug[20]; 8343 uint16 M_P2P_BSS[3][12]; 8344 uint16 M_P2P_PRE_TBTT[3]; 8345 8346 /* Following is valid only for corerevs<40 */ 8347 uint16 xmtfifordy; 8348 8349 /* Following 3 are valid only for 11ac corerevs (>=40) */ 8350 uint16 psm_maccommand; 8351 uint16 txe_status1; 8352 uint16 AQMFifoReady; 8353 } BWL_POST_PACKED_STRUCT; 8354 #include <packed_section_end.h> 8355 8356 #include <packed_section_start.h> 8357 BWL_PRE_PACKED_STRUCT struct wl_pmalert_ucode_dbg_v2 { 8358 uint16 type; /**< WL_PMALERT_UCODE_DBG_V2 */ 8359 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 8360 uint32 macctrl; 8361 uint16 m_p2p_hps; 8362 uint32 psm_brc; 8363 uint32 ifsstat; 8364 uint16 m_p2p_bss_dtim_prd[MAX_P2P_BSS_DTIM_PRD]; 8365 uint32 psmdebug[20]; 8366 uint32 phydebug[20]; 8367 uint16 M_P2P_BSS[3][12]; 8368 uint16 M_P2P_PRE_TBTT[3]; 8369 8370 /* Following is valid only for corerevs<40 */ 8371 uint16 xmtfifordy; 8372 8373 /* Following 3 are valid only for 11ac corerevs (>=40) */ 8374 uint16 psm_maccommand; 8375 uint16 txe_status1; 8376 uint32 AQMFifoReady; 8377 } BWL_POST_PACKED_STRUCT; 8378 #include <packed_section_end.h> 8379 8380 typedef struct wlc_ps_debug { 8381 uint32 timestamp; /**< timestamp in millisecond */ 8382 uint32 ps_mask; /**< reason(s) for disallowing ps */ 8383 } wlc_ps_debug_t; 8384 8385 typedef struct wl_pmalert_ps_allowed_hist { 8386 uint16 type; /**< WL_PMALERT_PS_ALLOWED_HIST */ 8387 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 8388 uint32 ps_allowed_start_idx; 8389 /* Array of ps_debug, len of array is based on tlv len */ 8390 wlc_ps_debug_t ps_debug[1]; 8391 } wl_pmalert_ps_allowed_hist_t; 8392 8393 /* Structures and constants used for "vndr_ie" IOVar interface */ 8394 #define VNDR_IE_CMD_LEN 4 /**< length of the set command string: 8395 * "add", "del" (+ NUL) 8396 */ 8397 8398 #define VNDR_IE_INFO_HDR_LEN (sizeof(uint32)) 8399 8400 #include <packed_section_start.h> 8401 typedef BWL_PRE_PACKED_STRUCT struct { 8402 uint32 pktflag; /**< bitmask indicating which packet(s) contain this IE */ 8403 vndr_ie_t vndr_ie_data; /**< vendor IE data */ 8404 } BWL_POST_PACKED_STRUCT vndr_ie_info_t; 8405 #include <packed_section_end.h> 8406 8407 #include <packed_section_start.h> 8408 typedef BWL_PRE_PACKED_STRUCT struct { 8409 int32 iecount; /**< number of entries in the vndr_ie_list[] array */ 8410 vndr_ie_info_t vndr_ie_list[1]; /**< variable size list of vndr_ie_info_t structs */ 8411 } BWL_POST_PACKED_STRUCT vndr_ie_buf_t; 8412 #include <packed_section_end.h> 8413 8414 #include <packed_section_start.h> 8415 typedef BWL_PRE_PACKED_STRUCT struct { 8416 char cmd[VNDR_IE_CMD_LEN]; /**< vndr_ie IOVar set command : "add", "del" + NUL */ 8417 vndr_ie_buf_t vndr_ie_buffer; /**< buffer containing Vendor IE list information */ 8418 } BWL_POST_PACKED_STRUCT vndr_ie_setbuf_t; 8419 #include <packed_section_end.h> 8420 8421 /** tag_ID/length/value_buffer tuple */ 8422 #include <packed_section_start.h> 8423 typedef BWL_PRE_PACKED_STRUCT struct { 8424 uint8 id; 8425 uint8 len; 8426 uint8 data[1]; 8427 } BWL_POST_PACKED_STRUCT tlv_t; 8428 #include <packed_section_end.h> 8429 8430 #include <packed_section_start.h> 8431 typedef BWL_PRE_PACKED_STRUCT struct { 8432 uint32 pktflag; /**< bitmask indicating which packet(s) contain this IE */ 8433 tlv_t ie_data; /**< IE data */ 8434 } BWL_POST_PACKED_STRUCT ie_info_t; 8435 #include <packed_section_end.h> 8436 8437 #include <packed_section_start.h> 8438 typedef BWL_PRE_PACKED_STRUCT struct { 8439 int32 iecount; /**< number of entries in the ie_list[] array */ 8440 ie_info_t ie_list[1]; /**< variable size list of ie_info_t structs */ 8441 } BWL_POST_PACKED_STRUCT ie_buf_t; 8442 #include <packed_section_end.h> 8443 8444 #include <packed_section_start.h> 8445 typedef BWL_PRE_PACKED_STRUCT struct { 8446 char cmd[VNDR_IE_CMD_LEN]; /**< ie IOVar set command : "add" + NUL */ 8447 ie_buf_t ie_buffer; /**< buffer containing IE list information */ 8448 } BWL_POST_PACKED_STRUCT ie_setbuf_t; 8449 #include <packed_section_end.h> 8450 8451 #include <packed_section_start.h> 8452 typedef BWL_PRE_PACKED_STRUCT struct { 8453 uint32 pktflag; /**< bitmask indicating which packet(s) contain this IE */ 8454 uint8 id; /**< IE type */ 8455 } BWL_POST_PACKED_STRUCT ie_getbuf_t; 8456 #include <packed_section_end.h> 8457 8458 /* structures used to define format of wps ie data from probe requests */ 8459 /* passed up to applications via iovar "prbreq_wpsie" */ 8460 typedef struct sta_prbreq_wps_ie_hdr { 8461 struct ether_addr staAddr; 8462 uint16 ieLen; 8463 } sta_prbreq_wps_ie_hdr_t; 8464 8465 #include <packed_section_start.h> 8466 typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_data { 8467 sta_prbreq_wps_ie_hdr_t hdr; 8468 uint8 ieData[1]; 8469 } BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_data_t; 8470 #include <packed_section_end.h> 8471 8472 #include <packed_section_start.h> 8473 typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_list { 8474 uint32 totLen; 8475 uint8 ieDataList[1]; 8476 } BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_list_t; 8477 #include <packed_section_end.h> 8478 8479 #include <packed_section_start.h> 8480 typedef BWL_PRE_PACKED_STRUCT struct { 8481 uint32 flags; 8482 chanspec_t chanspec; /**< txpwr report for this channel */ 8483 chanspec_t local_chanspec; /**< channel on which we are associated */ 8484 uint8 local_max; /**< local max according to the AP */ 8485 uint8 local_constraint; /**< local constraint according to the AP */ 8486 int8 antgain[2]; /**< Ant gain for each band - from SROM */ 8487 uint8 rf_cores; /**< count of RF Cores being reported */ 8488 uint8 est_Pout[4]; /**< Latest tx power out estimate per RF chain */ 8489 uint8 est_Pout_act[4]; /**< Latest tx power out estimate per RF chain w/o adjustment */ 8490 uint8 est_Pout_cck; /**< Latest CCK tx power out estimate */ 8491 uint8 tx_power_max[4]; /**< Maximum target power among all rates */ 8492 uint32 tx_power_max_rate_ind[4]; /**< Index of the rate with the max target power */ 8493 int8 sar; /**< SAR limit for display by wl executable */ 8494 int8 channel_bandwidth; /**< 20, 40 or 80 MHz bandwidth? */ 8495 uint8 version; /**< Version of the data format wlu <--> driver */ 8496 uint8 display_core; /**< Displayed curpower core */ 8497 int8 target_offsets[4]; /**< Target power offsets for current rate per core */ 8498 uint32 last_tx_ratespec; /**< Ratespec for last transmition */ 8499 uint32 user_target; /**< user limit */ 8500 uint32 ppr_len; /**< length of each ppr serialization buffer */ 8501 int8 SARLIMIT[MAX_STREAMS_SUPPORTED]; 8502 uint8 pprdata[1]; /**< ppr serialization buffer */ 8503 } BWL_POST_PACKED_STRUCT tx_pwr_rpt_t; 8504 #include <packed_section_end.h> 8505 8506 typedef struct tx_pwr_ru_rate_info { 8507 uint16 version; 8508 uint16 ru_alloc; 8509 uint16 mcs; 8510 uint16 nss; 8511 uint16 num_he_ltf_syms; 8512 uint16 ldpc; 8513 uint16 gi; 8514 uint16 txmode; 8515 uint16 dcm; 8516 uint16 tx_chain; 8517 } tx_pwr_ru_rate_info_t; 8518 8519 #define TX_PWR_RU_RATE_INFO_VER 1 8520 8521 /* TLV ID for curpower report, ID < 63 is reserved for ppr module */ 8522 typedef enum tx_pwr_tlv_id { 8523 TX_PWR_RPT_RU_RATE_INFO_ID = 64 8524 } tx_pwr_tlv_id_t; 8525 8526 #include <packed_section_start.h> 8527 typedef BWL_PRE_PACKED_STRUCT struct { 8528 struct ipv4_addr ipv4_addr; 8529 struct ether_addr nexthop; 8530 } BWL_POST_PACKED_STRUCT ibss_route_entry_t; 8531 #include <packed_section_end.h> 8532 8533 #include <packed_section_start.h> 8534 typedef BWL_PRE_PACKED_STRUCT struct { 8535 uint32 num_entry; 8536 ibss_route_entry_t route_entry[1]; 8537 } BWL_POST_PACKED_STRUCT ibss_route_tbl_t; 8538 #include <packed_section_end.h> 8539 8540 #define MAX_IBSS_ROUTE_TBL_ENTRY 64 8541 8542 #define TXPWR_TARGET_VERSION 0 8543 #include <packed_section_start.h> 8544 typedef BWL_PRE_PACKED_STRUCT struct { 8545 int32 version; /**< version number */ 8546 chanspec_t chanspec; /**< txpwr report for this channel */ 8547 int8 txpwr[WL_STA_ANT_MAX]; /**< Max tx target power, in qdb */ 8548 uint8 rf_cores; /**< count of RF Cores being reported */ 8549 } BWL_POST_PACKED_STRUCT txpwr_target_max_t; 8550 #include <packed_section_end.h> 8551 8552 #define BSS_PEER_INFO_PARAM_CUR_VER 0 8553 /** Input structure for IOV_BSS_PEER_INFO */ 8554 #include <packed_section_start.h> 8555 typedef BWL_PRE_PACKED_STRUCT struct { 8556 uint16 version; 8557 struct ether_addr ea; /**< peer MAC address */ 8558 } BWL_POST_PACKED_STRUCT bss_peer_info_param_t; 8559 #include <packed_section_end.h> 8560 8561 #define BSS_PEER_INFO_CUR_VER 0 8562 8563 #include <packed_section_start.h> 8564 typedef BWL_PRE_PACKED_STRUCT struct { 8565 uint16 version; 8566 struct ether_addr ea; 8567 int32 rssi; 8568 uint32 tx_rate; /**< current tx rate */ 8569 uint32 rx_rate; /**< current rx rate */ 8570 wl_rateset_t rateset; /**< rateset in use */ 8571 uint32 age; /**< age in seconds */ 8572 } BWL_POST_PACKED_STRUCT bss_peer_info_t; 8573 #include <packed_section_end.h> 8574 8575 #define BSS_PEER_LIST_INFO_CUR_VER 0 8576 8577 #include <packed_section_start.h> 8578 typedef BWL_PRE_PACKED_STRUCT struct { 8579 uint16 version; 8580 uint16 bss_peer_info_len; /**< length of bss_peer_info_t */ 8581 uint32 count; /**< number of peer info */ 8582 bss_peer_info_t peer_info[1]; /**< peer info */ 8583 } BWL_POST_PACKED_STRUCT bss_peer_list_info_t; 8584 #include <packed_section_end.h> 8585 8586 #define BSS_PEER_LIST_INFO_FIXED_LEN OFFSETOF(bss_peer_list_info_t, peer_info) 8587 8588 #define AIBSS_BCN_FORCE_CONFIG_VER_0 0 8589 8590 /** structure used to configure AIBSS beacon force xmit */ 8591 #include <packed_section_start.h> 8592 typedef BWL_PRE_PACKED_STRUCT struct { 8593 uint16 version; 8594 uint16 len; 8595 uint32 initial_min_bcn_dur; /**< dur in ms to check a bcn in bcn_flood period */ 8596 uint32 min_bcn_dur; /**< dur in ms to check a bcn after bcn_flood period */ 8597 uint32 bcn_flood_dur; /**< Initial bcn xmit period in ms */ 8598 } BWL_POST_PACKED_STRUCT aibss_bcn_force_config_t; 8599 #include <packed_section_end.h> 8600 8601 #define AIBSS_TXFAIL_CONFIG_VER_0 0 8602 #define AIBSS_TXFAIL_CONFIG_VER_1 1 8603 #define AIBSS_TXFAIL_CONFIG_CUR_VER AIBSS_TXFAIL_CONFIG_VER_1 8604 8605 /** structure used to configure aibss tx fail event */ 8606 #include <packed_section_start.h> 8607 typedef BWL_PRE_PACKED_STRUCT struct { 8608 uint16 version; 8609 uint16 len; 8610 uint32 bcn_timeout; /**< dur in seconds to receive 1 bcn */ 8611 uint32 max_tx_retry; /**< no of consecutive no acks to send txfail event */ 8612 uint32 max_atim_failure; /**< no of consecutive atim failure */ 8613 } BWL_POST_PACKED_STRUCT aibss_txfail_config_t; 8614 #include <packed_section_end.h> 8615 8616 #include <packed_section_start.h> 8617 typedef BWL_PRE_PACKED_STRUCT struct wl_aibss_if { 8618 uint16 version; 8619 uint16 len; 8620 uint32 flags; 8621 struct ether_addr addr; 8622 chanspec_t chspec; 8623 } BWL_POST_PACKED_STRUCT wl_aibss_if_t; 8624 #include <packed_section_end.h> 8625 8626 #include <packed_section_start.h> 8627 typedef BWL_PRE_PACKED_STRUCT struct wlc_ipfo_route_entry { 8628 struct ipv4_addr ip_addr; 8629 struct ether_addr nexthop; 8630 } BWL_POST_PACKED_STRUCT wlc_ipfo_route_entry_t; 8631 #include <packed_section_end.h> 8632 8633 #include <packed_section_start.h> 8634 typedef BWL_PRE_PACKED_STRUCT struct wlc_ipfo_route_tbl { 8635 uint32 num_entry; 8636 wlc_ipfo_route_entry_t route_entry[1]; 8637 } BWL_POST_PACKED_STRUCT wlc_ipfo_route_tbl_t; 8638 #include <packed_section_end.h> 8639 8640 /* Version of wlc_btc_stats_t structure. 8641 * Increment whenever a change is made to wlc_btc_stats_t 8642 */ 8643 #define BTCX_STATS_VER_4 4 8644 typedef struct wlc_btc_stats_v4 { 8645 uint16 version; /* version number of struct */ 8646 uint16 valid; /* Size of this struct */ 8647 uint32 stats_update_timestamp; /* tStamp when data is updated. */ 8648 uint32 btc_status; /* Hybrid/TDM indicator: Bit2:Hybrid, Bit1:TDM,Bit0:CoexEnabled */ 8649 uint32 bt_req_type_map; /* BT Antenna Req types since last stats sample */ 8650 uint32 bt_req_cnt; /* #BT antenna requests since last stats sampl */ 8651 uint32 bt_gnt_cnt; /* #BT antenna grants since last stats sample */ 8652 uint32 bt_gnt_dur; /* usec BT owns antenna since last stats sample */ 8653 uint16 bt_abort_cnt; /* #Times WL was preempted due to BT since WL up */ 8654 uint16 bt_rxf1ovfl_cnt; /* #Time PSNULL retry count exceeded since WL up */ 8655 uint16 bt_latency_cnt; /* #Time ucode high latency detected since WL up */ 8656 uint16 bt_succ_pm_protect_cnt; /* successful PM protection */ 8657 uint16 bt_succ_cts_cnt; /* successful CTS2A protection */ 8658 uint16 bt_wlan_tx_preempt_cnt; /* WLAN TX Preemption */ 8659 uint16 bt_wlan_rx_preempt_cnt; /* WLAN RX Preemption */ 8660 uint16 bt_ap_tx_after_pm_cnt; /* AP TX even after PM protection */ 8661 uint16 bt_peraud_cumu_gnt_cnt; /* Grant cnt for periodic audio */ 8662 uint16 bt_peraud_cumu_deny_cnt; /* Deny cnt for periodic audio */ 8663 uint16 bt_a2dp_cumu_gnt_cnt; /* Grant cnt for A2DP */ 8664 uint16 bt_a2dp_cumu_deny_cnt; /* Deny cnt for A2DP */ 8665 uint16 bt_sniff_cumu_gnt_cnt; /* Grant cnt for Sniff */ 8666 uint16 bt_sniff_cumu_deny_cnt; /* Deny cnt for Sniff */ 8667 uint16 bt_dcsn_map; /* Accumulated decision bitmap once Ant grant */ 8668 uint16 bt_dcsn_cnt; /* Accumulated decision bitmap counters once Ant grant */ 8669 uint16 bt_a2dp_hiwat_cnt; /* Ant grant by a2dp high watermark */ 8670 uint16 bt_datadelay_cnt; /* Ant grant by acl/a2dp datadelay */ 8671 uint16 bt_crtpri_cnt; /* Ant grant by critical BT task */ 8672 uint16 bt_pri_cnt; /* Ant grant by high BT task */ 8673 uint16 a2dpbuf1cnt; /* Ant request with a2dp buffercnt 1 */ 8674 uint16 a2dpbuf2cnt; /* Ant request with a2dp buffercnt 2 */ 8675 uint16 a2dpbuf3cnt; /* Ant request with a2dp buffercnt 3 */ 8676 uint16 a2dpbuf4cnt; /* Ant request with a2dp buffercnt 4 */ 8677 uint16 a2dpbuf5cnt; /* Ant request with a2dp buffercnt 5 */ 8678 uint16 a2dpbuf6cnt; /* Ant request with a2dp buffercnt 6 */ 8679 uint16 a2dpbuf7cnt; /* Ant request with a2dp buffercnt 7 */ 8680 uint16 a2dpbuf8cnt; /* Ant request with a2dp buffercnt 8 */ 8681 uint16 antgrant_lt10ms; /* Ant grant duration cnt 0~10ms */ 8682 uint16 antgrant_lt30ms; /* Ant grant duration cnt 10~30ms */ 8683 uint16 antgrant_lt60ms; /* Ant grant duration cnt 30~60ms */ 8684 uint16 antgrant_ge60ms; /* Ant grant duration cnt 60~ms */ 8685 } wlc_btc_stats_v4_t; 8686 8687 #define BTCX_STATS_VER_3 3 8688 8689 typedef struct wlc_btc_stats_v3 { 8690 uint16 version; /* version number of struct */ 8691 uint16 valid; /* Size of this struct */ 8692 uint32 stats_update_timestamp; /* tStamp when data is updated. */ 8693 uint32 btc_status; /* Hybrid/TDM indicator: Bit2:Hybrid, Bit1:TDM,Bit0:CoexEnabled */ 8694 uint32 bt_req_type_map; /* BT Antenna Req types since last stats sample */ 8695 uint32 bt_req_cnt; /* #BT antenna requests since last stats sampl */ 8696 uint32 bt_gnt_cnt; /* #BT antenna grants since last stats sample */ 8697 uint32 bt_gnt_dur; /* usec BT owns antenna since last stats sample */ 8698 uint16 bt_abort_cnt; /* #Times WL was preempted due to BT since WL up */ 8699 uint16 bt_rxf1ovfl_cnt; /* #Time PSNULL retry count exceeded since WL up */ 8700 uint16 bt_latency_cnt; /* #Time ucode high latency detected since WL up */ 8701 uint16 rsvd; /* pad to align struct to 32bit bndry */ 8702 uint16 bt_succ_pm_protect_cnt; /* successful PM protection */ 8703 uint16 bt_succ_cts_cnt; /* successful CTS2A protection */ 8704 uint16 bt_wlan_tx_preempt_cnt; /* WLAN TX Preemption */ 8705 uint16 bt_wlan_rx_preempt_cnt; /* WLAN RX Preemption */ 8706 uint16 bt_ap_tx_after_pm_cnt; /* AP TX even after PM protection */ 8707 uint16 bt_peraud_cumu_gnt_cnt; /* Grant cnt for periodic audio */ 8708 uint16 bt_peraud_cumu_deny_cnt; /* Deny cnt for periodic audio */ 8709 uint16 bt_a2dp_cumu_gnt_cnt; /* Grant cnt for A2DP */ 8710 uint16 bt_a2dp_cumu_deny_cnt; /* Deny cnt for A2DP */ 8711 uint16 bt_sniff_cumu_gnt_cnt; /* Grant cnt for Sniff */ 8712 uint16 bt_sniff_cumu_deny_cnt; /* Deny cnt for Sniff */ 8713 uint8 pad; /* Padding */ 8714 uint8 slice_index; /* Slice to report */ 8715 } wlc_btc_stats_v3_t; 8716 8717 #define BTCX_STATS_VER_2 2 8718 8719 typedef struct wlc_btc_stats_v2 { 8720 uint16 version; /* version number of struct */ 8721 uint16 valid; /* Size of this struct */ 8722 uint32 stats_update_timestamp; /* tStamp when data is updated. */ 8723 uint32 btc_status; /* Hybrid/TDM indicator: Bit2:Hybrid, Bit1:TDM,Bit0:CoexEnabled */ 8724 uint32 bt_req_type_map; /* BT Antenna Req types since last stats sample */ 8725 uint32 bt_req_cnt; /* #BT antenna requests since last stats sampl */ 8726 uint32 bt_gnt_cnt; /* #BT antenna grants since last stats sample */ 8727 uint32 bt_gnt_dur; /* usec BT owns antenna since last stats sample */ 8728 uint16 bt_abort_cnt; /* #Times WL was preempted due to BT since WL up */ 8729 uint16 bt_rxf1ovfl_cnt; /* #Time PSNULL retry count exceeded since WL up */ 8730 uint16 bt_latency_cnt; /* #Time ucode high latency detected since WL up */ 8731 uint16 rsvd; /* pad to align struct to 32bit bndry */ 8732 } wlc_btc_stats_v2_t; 8733 8734 /* Durations for each bt task in millisecond */ 8735 #define WL_BTCX_DURSTATS_VER_1 (1u) 8736 typedef struct wlc_btcx_durstats_v1 { 8737 uint16 version; /* version number of struct */ 8738 uint16 valid; /* validity of this struct */ 8739 uint32 stats_update_timestamp; /* tStamp when data is updated */ 8740 uint16 bt_acl_dur; /* acl duration in ms */ 8741 uint16 bt_sco_dur; /* sco duration in ms */ 8742 uint16 bt_esco_dur; /* esco duration in ms */ 8743 uint16 bt_a2dp_dur; /* a2dp duration in ms */ 8744 uint16 bt_sniff_dur; /* sniff duration in ms */ 8745 uint16 bt_pscan_dur; /* page scan duration in ms */ 8746 uint16 bt_iscan_dur; /* inquiry scan duration in ms */ 8747 uint16 bt_page_dur; /* paging duration in ms */ 8748 uint16 bt_inquiry_dur; /* inquiry duration in ms */ 8749 uint16 bt_mss_dur; /* mss duration in ms */ 8750 uint16 bt_park_dur; /* park duration in ms */ 8751 uint16 bt_rssiscan_dur; /* rssiscan duration in ms */ 8752 uint16 bt_iscan_sco_dur; /* inquiry scan sco duration in ms */ 8753 uint16 bt_pscan_sco_dur; /* page scan sco duration in ms */ 8754 uint16 bt_tpoll_dur; /* tpoll duration in ms */ 8755 uint16 bt_sacq_dur; /* sacq duration in ms */ 8756 uint16 bt_sdata_dur; /* sdata duration in ms */ 8757 uint16 bt_rs_listen_dur; /* rs listen duration in ms */ 8758 uint16 bt_rs_burst_dur; /* rs brust duration in ms */ 8759 uint16 bt_ble_adv_dur; /* ble adv duration in ms */ 8760 uint16 bt_ble_scan_dur; /* ble scan duration in ms */ 8761 uint16 bt_ble_init_dur; /* ble init duration in ms */ 8762 uint16 bt_ble_conn_dur; /* ble connection duration in ms */ 8763 uint16 bt_task_lmp_dur; /* lmp duration in ms */ 8764 uint16 bt_esco_retran_dur; /* esco retransmission duration in ms */ 8765 uint16 bt_task26_dur; /* task26 duration in ms */ 8766 uint16 bt_task27_dur; /* task27 duration in ms */ 8767 uint16 bt_task28_dur; /* task28 duration in ms */ 8768 uint16 bt_task_pred_dur; /* prediction task duration in ms */ 8769 uint16 bt_multihid_dur; /* multihid duration in ms */ 8770 } wlc_btcx_durstats_v1_t; 8771 8772 #define WL_IPFO_ROUTE_TBL_FIXED_LEN 4 8773 #define WL_MAX_IPFO_ROUTE_TBL_ENTRY 64 8774 8775 /* Global ASSERT Logging */ 8776 #define ASSERTLOG_CUR_VER 0x0100 8777 #define MAX_ASSRTSTR_LEN 64 8778 8779 typedef struct assert_record { 8780 uint32 time; 8781 uint8 seq_num; 8782 int8 str[MAX_ASSRTSTR_LEN]; 8783 } assert_record_t; 8784 8785 typedef struct assertlog_results { 8786 uint16 version; 8787 uint16 record_len; 8788 uint32 num; 8789 assert_record_t logs[1]; 8790 } assertlog_results_t; 8791 8792 #define LOGRRC_FIX_LEN 8 8793 #define IOBUF_ALLOWED_NUM_OF_LOGREC(type, len) ((len - LOGRRC_FIX_LEN)/sizeof(type)) 8794 /* BCMWAPI_WAI */ 8795 #define IV_LEN 16 /* same as SMS4_WPI_PN_LEN */ 8796 struct wapi_sta_msg_t 8797 { 8798 uint16 msg_type; 8799 uint16 datalen; 8800 uint8 vap_mac[6]; 8801 uint8 reserve_data1[2]; 8802 uint8 sta_mac[6]; 8803 uint8 reserve_data2[2]; 8804 uint8 gsn[IV_LEN]; 8805 uint8 wie[TLV_BODY_LEN_MAX + TLV_HDR_LEN]; /* 257 */ 8806 uint8 pad[3]; /* padding for alignment */ 8807 }; 8808 /* #endif BCMWAPI_WAI */ 8809 /* chanim acs record */ 8810 typedef struct { 8811 uint8 valid; 8812 uint8 trigger; 8813 chanspec_t selected_chspc; 8814 int8 bgnoise; 8815 uint32 glitch_cnt; 8816 uint8 ccastats; 8817 uint8 chan_idle; 8818 uint32 timestamp; 8819 } chanim_acs_record_t; 8820 8821 typedef struct { 8822 chanim_acs_record_t acs_record[CHANIM_ACS_RECORD]; 8823 uint8 count; 8824 uint32 timestamp; 8825 } wl_acs_record_t; 8826 8827 #define WL_CHANIM_STATS_V2 2 8828 #define CCASTATS_V2_MAX 9 8829 typedef struct chanim_stats_v2 { 8830 uint32 glitchcnt; /**< normalized as per second count */ 8831 uint32 badplcp; /**< normalized as per second count */ 8832 uint8 ccastats[CCASTATS_V2_MAX]; /**< normalized as 0-255 */ 8833 int8 bgnoise; /**< background noise level (in dBm) */ 8834 chanspec_t chanspec; /**< ctrl chanspec of the interface */ 8835 uint32 timestamp; /**< time stamp at which the stats are collected */ 8836 uint32 bphy_glitchcnt; /**< normalized as per second count */ 8837 uint32 bphy_badplcp; /**< normalized as per second count */ 8838 uint8 chan_idle; /**< normalized as 0~255 */ 8839 uint8 PAD[3]; 8840 } chanim_stats_v2_t; 8841 8842 typedef struct chanim_stats { 8843 uint32 glitchcnt; /**< normalized as per second count */ 8844 uint32 badplcp; /**< normalized as per second count */ 8845 uint8 ccastats[CCASTATS_MAX]; /**< normalized as 0-255 */ 8846 int8 bgnoise; /**< background noise level (in dBm) */ 8847 uint8 pad_1[11 - CCASTATS_MAX]; 8848 chanspec_t chanspec; /**< ctrl chanspec of the interface */ 8849 uint8 pad_2[2]; 8850 uint32 timestamp; /**< time stamp at which the stats are collected */ 8851 uint32 bphy_glitchcnt; /**< normalized as per second count */ 8852 uint32 bphy_badplcp; /**< normalized as per second count */ 8853 uint8 chan_idle; /**< normalized as 0~255 */ 8854 uint8 PAD[3]; 8855 } chanim_stats_t; 8856 8857 #define WL_CHANIM_STATS_VERSION 3 8858 typedef struct { 8859 uint32 buflen; 8860 uint32 version; 8861 uint32 count; 8862 chanim_stats_t stats[1]; 8863 } wl_chanim_stats_t; 8864 8865 #define WL_CHANIM_STATS_FIXED_LEN OFFSETOF(wl_chanim_stats_t, stats) 8866 8867 /** Noise measurement metrics. */ 8868 #define NOISE_MEASURE_KNOISE 0x1 8869 8870 /** scb probe parameter */ 8871 typedef struct { 8872 uint32 scb_timeout; 8873 uint32 scb_activity_time; 8874 uint32 scb_max_probe; 8875 } wl_scb_probe_t; 8876 8877 /* structure/defines for selective mgmt frame (smf) stats support */ 8878 8879 #define SMFS_VERSION 1 8880 /** selected mgmt frame (smf) stats element */ 8881 typedef struct wl_smfs_elem { 8882 uint32 count; 8883 uint16 code; /**< SC or RC code */ 8884 uint8 PAD[2]; 8885 } wl_smfs_elem_t; 8886 8887 typedef struct wl_smf_stats { 8888 uint32 version; 8889 uint16 length; /**< reserved for future usage */ 8890 uint8 type; 8891 uint8 codetype; 8892 uint32 ignored_cnt; 8893 uint32 malformed_cnt; 8894 uint32 count_total; /**< count included the interested group */ 8895 wl_smfs_elem_t elem[1]; 8896 } wl_smf_stats_t; 8897 8898 #define WL_SMFSTATS_FIXED_LEN OFFSETOF(wl_smf_stats_t, elem); 8899 8900 enum { 8901 SMFS_CODETYPE_SC, 8902 SMFS_CODETYPE_RC 8903 }; 8904 8905 typedef enum smfs_type { 8906 SMFS_TYPE_AUTH, 8907 SMFS_TYPE_ASSOC, 8908 SMFS_TYPE_REASSOC, 8909 SMFS_TYPE_DISASSOC_TX, 8910 SMFS_TYPE_DISASSOC_RX, 8911 SMFS_TYPE_DEAUTH_TX, 8912 SMFS_TYPE_DEAUTH_RX, 8913 SMFS_TYPE_MAX 8914 } smfs_type_t; 8915 8916 /* #ifdef PHYMON */ 8917 8918 #define PHYMON_VERSION 1 8919 8920 typedef struct wl_phycal_core_state { 8921 /* Tx IQ/LO calibration coeffs */ 8922 int16 tx_iqlocal_a; 8923 int16 tx_iqlocal_b; 8924 int8 tx_iqlocal_ci; 8925 int8 tx_iqlocal_cq; 8926 int8 tx_iqlocal_di; 8927 int8 tx_iqlocal_dq; 8928 int8 tx_iqlocal_ei; 8929 int8 tx_iqlocal_eq; 8930 int8 tx_iqlocal_fi; 8931 int8 tx_iqlocal_fq; 8932 8933 /** Rx IQ calibration coeffs */ 8934 int16 rx_iqcal_a; 8935 int16 rx_iqcal_b; 8936 8937 uint8 tx_iqlocal_pwridx; /**< Tx Power Index for Tx IQ/LO calibration */ 8938 uint8 PAD[3]; 8939 uint32 papd_epsilon_table[64]; /**< PAPD epsilon table */ 8940 int16 papd_epsilon_offset; /**< PAPD epsilon offset */ 8941 uint8 curr_tx_pwrindex; /**< Tx power index */ 8942 int8 idle_tssi; /**< Idle TSSI */ 8943 int8 est_tx_pwr; /**< Estimated Tx Power (dB) */ 8944 int8 est_rx_pwr; /**< Estimated Rx Power (dB) from RSSI */ 8945 uint16 rx_gaininfo; /**< Rx gain applied on last Rx pkt */ 8946 uint16 init_gaincode; /**< initgain required for ACI */ 8947 int8 estirr_tx; 8948 int8 estirr_rx; 8949 } wl_phycal_core_state_t; 8950 8951 typedef struct wl_phycal_state { 8952 int32 version; 8953 int8 num_phy_cores; /**< number of cores */ 8954 int8 curr_temperature; /**< on-chip temperature sensor reading */ 8955 chanspec_t chspec; /**< channspec for this state */ 8956 uint8 aci_state; /**< ACI state: ON/OFF */ 8957 uint8 PAD; 8958 uint16 crsminpower; /**< crsminpower required for ACI */ 8959 uint16 crsminpowerl; /**< crsminpowerl required for ACI */ 8960 uint16 crsminpoweru; /**< crsminpoweru required for ACI */ 8961 wl_phycal_core_state_t phycal_core[1]; 8962 } wl_phycal_state_t; 8963 8964 #define WL_PHYCAL_STAT_FIXED_LEN OFFSETOF(wl_phycal_state_t, phycal_core) 8965 /* endif PHYMON */ 8966 8967 /** discovery state */ 8968 typedef struct wl_p2p_disc_st { 8969 uint8 state; /**< see state */ 8970 uint8 PAD; 8971 chanspec_t chspec; /**< valid in listen state */ 8972 uint16 dwell; /**< valid in listen state, in ms */ 8973 } wl_p2p_disc_st_t; 8974 8975 /** scan request */ 8976 typedef struct wl_p2p_scan { 8977 uint8 type; /**< 'S' for WLC_SCAN, 'E' for "escan" */ 8978 uint8 reserved[3]; 8979 /* scan or escan parms... */ 8980 } wl_p2p_scan_t; 8981 8982 /** i/f request */ 8983 typedef struct wl_p2p_if { 8984 struct ether_addr addr; 8985 uint8 type; /**< see i/f type */ 8986 uint8 PAD; 8987 chanspec_t chspec; /**< for p2p_ifadd GO */ 8988 } wl_p2p_if_t; 8989 8990 /** i/f query */ 8991 typedef struct wl_p2p_ifq { 8992 uint32 bsscfgidx; 8993 char ifname[BCM_MSG_IFNAME_MAX]; 8994 } wl_p2p_ifq_t; 8995 8996 /** OppPS & CTWindow */ 8997 typedef struct wl_p2p_ops { 8998 uint8 ops; /**< 0: disable 1: enable */ 8999 uint8 ctw; /**< >= 10 */ 9000 } wl_p2p_ops_t; 9001 9002 /** absence and presence request */ 9003 typedef struct wl_p2p_sched_desc { 9004 uint32 start; 9005 uint32 interval; 9006 uint32 duration; 9007 uint32 count; /**< see count */ 9008 } wl_p2p_sched_desc_t; 9009 9010 typedef struct wl_p2p_sched { 9011 uint8 type; /**< see schedule type */ 9012 uint8 action; /**< see schedule action */ 9013 uint8 option; /**< see schedule option */ 9014 uint8 PAD; 9015 wl_p2p_sched_desc_t desc[1]; 9016 } wl_p2p_sched_t; 9017 9018 typedef struct wl_p2p_wfds_hash { 9019 uint32 advt_id; 9020 uint16 nw_cfg_method; 9021 uint8 wfds_hash[6]; 9022 uint8 name_len; 9023 uint8 service_name[MAX_WFDS_SVC_NAME_LEN]; 9024 uint8 PAD[3]; 9025 } wl_p2p_wfds_hash_t; 9026 9027 typedef struct wl_p2p_config_params { 9028 uint16 enable; /**< 0: disable 1: enable */ 9029 uint16 chanspec; /* GO chanspec */ 9030 wlc_ssid_t ssid; /* SSID */ 9031 } wl_p2p_config_params_t; 9032 9033 typedef struct wl_bcmdcs_data { 9034 uint32 reason; 9035 chanspec_t chspec; 9036 uint8 PAD[2]; 9037 } wl_bcmdcs_data_t; 9038 /* ifdef EXT_STA */ 9039 /** 9040 * Format of IHV data passed to OID_DOT11_NIC_SPECIFIC_EXTENSION. 9041 */ 9042 typedef struct _IHV_NIC_SPECIFIC_EXTENSION { 9043 uint8 oui[4]; /**< vendor specific OUI value */ 9044 uint32 event; /**< event code */ 9045 uint8 ihvData[1]; /**< ihv data */ 9046 } IHV_NIC_SPECIFIC_EXTENSION, *PIHV_NIC_SPECIFIC_EXTENSION; 9047 #define IHV_NIC_SPECIFIC_EXTENTION_HEADER OFFSETOF(IHV_NIC_SPECIFIC_EXTENSION, ihvData[0]) 9048 /* EXT_STA */ 9049 /** NAT configuration */ 9050 typedef struct { 9051 uint32 ipaddr; /**< interface ip address */ 9052 uint32 ipaddr_mask; /**< interface ip address mask */ 9053 uint32 ipaddr_gateway; /**< gateway ip address */ 9054 uint8 mac_gateway[6]; /**< gateway mac address */ 9055 uint8 PAD[2]; 9056 uint32 ipaddr_dns; /**< DNS server ip address, valid only for public if */ 9057 uint8 mac_dns[6]; /**< DNS server mac address, valid only for public if */ 9058 uint8 GUID[38]; /**< interface GUID */ 9059 } nat_if_info_t; 9060 9061 typedef struct { 9062 uint32 op; /**< operation code */ 9063 uint8 pub_if; /**< set for public if, clear for private if */ 9064 uint8 PAD[3]; 9065 nat_if_info_t if_info; /**< interface info */ 9066 } nat_cfg_t; 9067 9068 typedef struct { 9069 int32 state; /**< NAT state returned */ 9070 } nat_state_t; 9071 9072 typedef struct flush_txfifo { 9073 uint32 txfifobmp; 9074 uint32 hwtxfifoflush; 9075 struct ether_addr ea; 9076 uint8 PAD[2]; 9077 } flush_txfifo_t; 9078 9079 enum { 9080 SPATIAL_MODE_2G_IDX = 0, 9081 SPATIAL_MODE_5G_LOW_IDX, 9082 SPATIAL_MODE_5G_MID_IDX, 9083 SPATIAL_MODE_5G_HIGH_IDX, 9084 SPATIAL_MODE_5G_UPPER_IDX, 9085 SPATIAL_MODE_MAX_IDX 9086 }; 9087 9088 #define WLC_TXCORE_MAX 4 /**< max number of txcore supports */ 9089 #define WLC_TXCORE_MAX_OLD 2 /**< backward compatibilty for TXCAL */ 9090 #define WLC_SUBBAND_MAX 4 /**< max number of sub-band supports */ 9091 typedef struct { 9092 uint8 band2g[WLC_TXCORE_MAX]; 9093 uint8 band5g[WLC_SUBBAND_MAX][WLC_TXCORE_MAX]; 9094 } sar_limit_t; 9095 9096 #define MAX_NUM_TXCAL_MEAS 128 9097 #define MAX_NUM_PWR_STEP 40 9098 #define TXCAL_IOVAR_VERSION 0x1 9099 9100 #define TXCAL_GAINSWEEP_VER (TXCAL_GAINSWEEP_VERSION_V2) 9101 #define TXCAL_GAINSWEEP_VERSION_V2 2 9102 9103 /* Below macro defines the latest txcal iovar version updated */ 9104 /* This macro also reflects in the 'txcal_ver' iovar */ 9105 #define TXCAL_IOVAR_LATEST TXCAL_GAINSWEEP_VER 9106 9107 /* below are used for bphy/ofdm separated LSC */ 9108 #define TXCAL_PWR_BPHY 0 9109 #define TXCAL_PWR_OFDM 1 9110 9111 typedef struct wl_txcal_meas_percore { 9112 uint16 tssi[MAX_NUM_TXCAL_MEAS]; 9113 int16 pwr[MAX_NUM_TXCAL_MEAS]; 9114 } wl_txcal_meas_percore_t; 9115 9116 typedef struct wl_txcal_meas_ncore { 9117 uint16 version; 9118 uint8 valid_cnt; 9119 uint8 num_core; 9120 wl_txcal_meas_percore_t txcal_percore[1]; 9121 } wl_txcal_meas_ncore_t; 9122 9123 typedef struct wl_txcal_power_tssi_percore { 9124 int16 tempsense; 9125 int16 pwr_start; 9126 uint8 pwr_start_idx; 9127 uint8 num_entries; 9128 uint16 pad; 9129 uint8 tssi[MAX_NUM_PWR_STEP]; 9130 } wl_txcal_power_tssi_percore_t; 9131 9132 typedef struct wl_txcal_power_tssi_ncore { 9133 uint16 version; 9134 uint8 set_core; 9135 uint8 channel; 9136 uint8 num_core; 9137 uint8 gen_tbl; 9138 uint8 ofdm; 9139 uint8 pad; 9140 wl_txcal_power_tssi_percore_t tssi_percore[4]; 9141 } wl_txcal_power_tssi_ncore_t; 9142 9143 typedef struct wl_txcal_meas { 9144 uint16 tssi[WLC_TXCORE_MAX][MAX_NUM_TXCAL_MEAS]; 9145 int16 pwr[WLC_TXCORE_MAX][MAX_NUM_TXCAL_MEAS]; 9146 uint8 valid_cnt; 9147 uint8 PAD; 9148 } wl_txcal_meas_t; 9149 9150 typedef struct wl_txcal_meas_old { 9151 uint16 tssi[WLC_TXCORE_MAX_OLD][MAX_NUM_TXCAL_MEAS]; 9152 int16 pwr[WLC_TXCORE_MAX_OLD][MAX_NUM_TXCAL_MEAS]; 9153 uint8 valid_cnt; 9154 uint8 PAD; 9155 } wl_txcal_meas_old_t; 9156 9157 typedef struct wl_txcal_power_tssi { 9158 uint8 set_core; 9159 uint8 channel; 9160 int16 tempsense[WLC_TXCORE_MAX]; 9161 int16 pwr_start[WLC_TXCORE_MAX]; 9162 uint8 pwr_start_idx[WLC_TXCORE_MAX]; 9163 uint8 num_entries[WLC_TXCORE_MAX]; 9164 uint8 tssi[WLC_TXCORE_MAX][MAX_NUM_PWR_STEP]; 9165 uint8 gen_tbl; 9166 uint8 ofdm; 9167 } wl_txcal_power_tssi_t; 9168 9169 typedef struct wl_txcal_power_tssi_old { 9170 uint8 set_core; 9171 uint8 channel; 9172 int16 tempsense[WLC_TXCORE_MAX_OLD]; 9173 int16 pwr_start[WLC_TXCORE_MAX_OLD]; 9174 uint8 pwr_start_idx[WLC_TXCORE_MAX_OLD]; 9175 uint8 num_entries[WLC_TXCORE_MAX_OLD]; 9176 uint8 tssi[WLC_TXCORE_MAX_OLD][MAX_NUM_PWR_STEP]; 9177 uint8 gen_tbl; 9178 uint8 ofdm; 9179 } wl_txcal_power_tssi_old_t; 9180 9181 typedef struct wl_olpc_pwr { 9182 uint16 version; 9183 uint8 core; 9184 uint8 channel; 9185 int16 tempsense; 9186 uint8 olpc_idx; 9187 uint8 ofdm; 9188 } wl_olpc_pwr_t; 9189 9190 typedef struct wl_rfem_temp_vdet_temp { 9191 uint8 vdet_fem_t1; 9192 int8 rfem_temp_t1; 9193 uint8 vdet_fem_t2; 9194 int8 rfem_temp_t2; 9195 } wl_rfem_temp_vdet_temp_t; 9196 9197 typedef struct wl_rfem_temp_vin_tssi { 9198 uint16 vin_chip_v1; 9199 int16 tssi_chip_v1; 9200 uint16 vin_chip_v2; 9201 int16 tssi_chip_v2; 9202 } wl_rfem_temp_vin_tssi_t; 9203 9204 typedef struct wl_txcal_tempsense { 9205 uint16 version; 9206 uint8 valid_cnt; 9207 uint8 core; 9208 int16 ref_temperature; 9209 int16 meas_temperature; 9210 wl_rfem_temp_vdet_temp_t vdet_temp; 9211 wl_rfem_temp_vin_tssi_t vin_tssi; 9212 } wl_txcal_tempsense_t; 9213 9214 /** IOVAR "mempool" parameter. Used to retrieve a list of memory pool statistics. */ 9215 typedef struct wl_mempool_stats { 9216 int32 num; /**< Number of memory pools */ 9217 bcm_mp_stats_t s[1]; /**< Variable array of memory pool stats. */ 9218 } wl_mempool_stats_t; 9219 9220 typedef struct { 9221 uint32 ipaddr; 9222 uint32 ipaddr_netmask; 9223 uint32 ipaddr_gateway; 9224 } nwoe_ifconfig_t; 9225 9226 /* Both powersel_params and lpc_params are used by IOVAR lpc_params. 9227 * The powersel_params is replaced by lpc_params in later WLC versions. 9228 */ 9229 typedef struct powersel_params { 9230 /* LPC Params exposed via IOVAR */ 9231 int32 tp_ratio_thresh; /**< Throughput ratio threshold */ 9232 uint8 rate_stab_thresh; /**< Thresh for rate stability based on nupd */ 9233 uint8 pwr_stab_thresh; /**< Number of successes before power step down */ 9234 uint8 pwr_sel_exp_time; /**< Time lapse for expiry of database */ 9235 uint8 PAD; 9236 } powersel_params_t; 9237 9238 #define WL_LPC_PARAMS_VER_2 2 9239 #define WL_LPC_PARAMS_CURRENT_VERSION WL_LPC_PARAMS_VER_2 9240 9241 typedef struct lpc_params { 9242 uint16 version; 9243 uint16 length; 9244 /* LPC Params exposed via IOVAR */ 9245 uint8 rate_stab_thresh; /**< Thresh for rate stability based on nupd */ 9246 uint8 pwr_stab_thresh; /**< Number of successes before power step down */ 9247 uint8 lpc_exp_time; /**< Time lapse for expiry of database */ 9248 uint8 pwrup_slow_step; /**< Step size for slow step up */ 9249 uint8 pwrup_fast_step; /**< Step size for fast step up */ 9250 uint8 pwrdn_slow_step; /**< Step size for slow step down */ 9251 } lpc_params_t; 9252 9253 /* tx pkt delay statistics */ 9254 #define SCB_RETRY_SHORT_DEF 7 /**< Default Short retry Limit */ 9255 #define WLPKTDLY_HIST_NBINS 16 /**< number of bins used in the Delay histogram */ 9256 9257 /** structure to store per-AC delay statistics */ 9258 typedef struct scb_delay_stats { 9259 uint32 txmpdu_lost; /**< number of MPDUs lost */ 9260 uint32 txmpdu_cnt[SCB_RETRY_SHORT_DEF]; /**< retry times histogram */ 9261 uint32 delay_sum[SCB_RETRY_SHORT_DEF]; /**< cumulative packet latency */ 9262 uint32 delay_min; /**< minimum packet latency observed */ 9263 uint32 delay_max; /**< maximum packet latency observed */ 9264 uint32 delay_avg; /**< packet latency average */ 9265 uint32 delay_hist[WLPKTDLY_HIST_NBINS]; /**< delay histogram */ 9266 uint32 delay_count; /**< minimum number of time period units before 9267 consequent packet delay events can be generated 9268 */ 9269 uint32 prev_txmpdu_cnt; /**< Previous value of txmpdu_cnt[] during last iteration */ 9270 uint32 prev_delay_sum; /**< Previous value of delay_sum[] during last iteration */ 9271 } scb_delay_stats_t; 9272 9273 /** structure for txdelay event */ 9274 typedef struct txdelay_event { 9275 uint8 status; 9276 uint8 PAD[3]; 9277 int32 rssi; 9278 chanim_stats_t chanim_stats; 9279 scb_delay_stats_t delay_stats[AC_COUNT]; 9280 } txdelay_event_t; 9281 9282 /** structure for txdelay parameters */ 9283 typedef struct txdelay_params { 9284 uint16 ratio; /**< Avg Txdelay Delta */ 9285 uint8 cnt; /**< Sample cnt */ 9286 uint8 period; /**< Sample period */ 9287 uint8 tune; /**< Debug */ 9288 uint8 PAD; 9289 } txdelay_params_t; 9290 #define MAX_TXDELAY_STATS_SCBS 6 9291 #define TXDELAY_STATS_VERSION 1 9292 9293 enum { 9294 TXDELAY_STATS_PARTIAL_RESULT = 0, 9295 TXDELAY_STATS_FULL_RESULT = 1 9296 }; 9297 9298 typedef struct scb_total_delay_stats { 9299 struct ether_addr ea; 9300 uint8 pad[2]; 9301 scb_delay_stats_t dlystats[AC_COUNT]; 9302 } scb_total_delay_stats_t; 9303 9304 typedef struct txdelay_stats { 9305 uint32 version; 9306 uint32 full_result; /* 0:Partial, 1:full */ 9307 uint32 scb_cnt; /* in:requested, out:returned */ 9308 scb_total_delay_stats_t scb_delay_stats[1]; 9309 } txdelay_stats_t; 9310 9311 #define WL_TXDELAY_STATS_FIXED_SIZE \ 9312 (sizeof(txdelay_stats_t)+(MAX_TXDELAY_STATS_SCBS-1)*sizeof(scb_total_delay_stats_t)) 9313 enum { 9314 WNM_SERVICE_DMS = 1, 9315 WNM_SERVICE_FMS = 2, 9316 WNM_SERVICE_TFS = 3 9317 }; 9318 9319 /** Definitions for WNM/NPS TCLAS */ 9320 typedef struct wl_tclas { 9321 uint8 user_priority; 9322 uint8 fc_len; 9323 dot11_tclas_fc_t fc; 9324 } wl_tclas_t; 9325 9326 #define WL_TCLAS_FIXED_SIZE OFFSETOF(wl_tclas_t, fc) 9327 9328 typedef struct wl_tclas_list { 9329 uint32 num; 9330 wl_tclas_t tclas[]; 9331 } wl_tclas_list_t; 9332 9333 /** Definitions for WNM/NPS Traffic Filter Service */ 9334 typedef struct wl_tfs_req { 9335 uint8 tfs_id; 9336 uint8 tfs_actcode; 9337 uint8 tfs_subelem_id; 9338 uint8 send; 9339 } wl_tfs_req_t; 9340 9341 typedef struct wl_tfs_filter { 9342 uint8 status; /**< Status returned by the AP */ 9343 uint8 tclas_proc; /**< TCLAS processing value (0:and, 1:or) */ 9344 uint8 tclas_cnt; /**< count of all wl_tclas_t in tclas array */ 9345 uint8 tclas[1]; /**< VLA of wl_tclas_t */ 9346 } wl_tfs_filter_t; 9347 #define WL_TFS_FILTER_FIXED_SIZE OFFSETOF(wl_tfs_filter_t, tclas) 9348 9349 typedef struct wl_tfs_fset { 9350 struct ether_addr ea; /**< Address of AP/STA involved with this filter set */ 9351 uint8 tfs_id; /**< TFS ID field chosen by STA host */ 9352 uint8 status; /**< Internal status TFS_STATUS_xxx */ 9353 uint8 actcode; /**< Action code DOT11_TFS_ACTCODE_xxx */ 9354 uint8 token; /**< Token used in last request frame */ 9355 uint8 notify; /**< Notify frame sent/received because of this set */ 9356 uint8 filter_cnt; /**< count of all wl_tfs_filter_t in filter array */ 9357 uint8 filter[1]; /**< VLA of wl_tfs_filter_t */ 9358 } wl_tfs_fset_t; 9359 #define WL_TFS_FSET_FIXED_SIZE OFFSETOF(wl_tfs_fset_t, filter) 9360 9361 enum { 9362 TFS_STATUS_DISABLED = 0, /**< TFS filter set disabled by user */ 9363 TFS_STATUS_DISABLING = 1, /**< Empty request just sent to AP */ 9364 TFS_STATUS_VALIDATED = 2, /**< Filter set validated by AP (but maybe not enabled!) */ 9365 TFS_STATUS_VALIDATING = 3, /**< Filter set just sent to AP */ 9366 TFS_STATUS_NOT_ASSOC = 4, /**< STA not associated */ 9367 TFS_STATUS_NOT_SUPPORT = 5, /**< TFS not supported by AP */ 9368 TFS_STATUS_DENIED = 6, /**< Filter set refused by AP (=> all sets are disabled!) */ 9369 }; 9370 9371 typedef struct wl_tfs_status { 9372 uint8 fset_cnt; /**< count of all wl_tfs_fset_t in fset array */ 9373 wl_tfs_fset_t fset[1]; /**< VLA of wl_tfs_fset_t */ 9374 } wl_tfs_status_t; 9375 9376 typedef struct wl_tfs_set { 9377 uint8 send; /**< Immediatly register registered sets on AP side */ 9378 uint8 tfs_id; /**< ID of a specific set (existing or new), or nul for all */ 9379 uint8 actcode; /**< Action code for this filter set */ 9380 uint8 tclas_proc; /**< TCLAS processing operator for this filter set */ 9381 } wl_tfs_set_t; 9382 9383 typedef struct wl_tfs_term { 9384 uint8 del; /**< Delete internal set once confirmation received */ 9385 uint8 tfs_id; /**< ID of a specific set (existing), or nul for all */ 9386 } wl_tfs_term_t; 9387 9388 #define DMS_DEP_PROXY_ARP (1 << 0) 9389 9390 /* Definitions for WNM/NPS Directed Multicast Service */ 9391 enum { 9392 DMS_STATUS_DISABLED = 0, /**< DMS desc disabled by user */ 9393 DMS_STATUS_ACCEPTED = 1, /**< Request accepted by AP */ 9394 DMS_STATUS_NOT_ASSOC = 2, /**< STA not associated */ 9395 DMS_STATUS_NOT_SUPPORT = 3, /**< DMS not supported by AP */ 9396 DMS_STATUS_DENIED = 4, /**< Request denied by AP */ 9397 DMS_STATUS_TERM = 5, /**< Request terminated by AP */ 9398 DMS_STATUS_REMOVING = 6, /**< Remove request just sent */ 9399 DMS_STATUS_ADDING = 7, /**< Add request just sent */ 9400 DMS_STATUS_ERROR = 8, /**< Non compliant AP behvior */ 9401 DMS_STATUS_IN_PROGRESS = 9, /**< Request just sent */ 9402 DMS_STATUS_REQ_MISMATCH = 10 /**< Conditions for sending DMS req not met */ 9403 }; 9404 9405 typedef struct wl_dms_desc { 9406 uint8 user_id; 9407 uint8 status; 9408 uint8 token; 9409 uint8 dms_id; 9410 uint8 tclas_proc; 9411 uint8 mac_len; /**< length of all ether_addr in data array, 0 if STA */ 9412 uint8 tclas_len; /**< length of all wl_tclas_t in data array */ 9413 uint8 data[1]; /**< VLA of 'ether_addr' and 'wl_tclas_t' (in this order ) */ 9414 } wl_dms_desc_t; 9415 9416 #define WL_DMS_DESC_FIXED_SIZE OFFSETOF(wl_dms_desc_t, data) 9417 9418 typedef struct wl_dms_status { 9419 uint32 cnt; 9420 wl_dms_desc_t desc[1]; 9421 } wl_dms_status_t; 9422 9423 typedef struct wl_dms_set { 9424 uint8 send; 9425 uint8 user_id; 9426 uint8 tclas_proc; 9427 } wl_dms_set_t; 9428 9429 typedef struct wl_dms_term { 9430 uint8 del; 9431 uint8 user_id; 9432 } wl_dms_term_t; 9433 9434 typedef struct wl_service_term { 9435 uint8 service; 9436 union { 9437 wl_dms_term_t dms; 9438 } u; 9439 } wl_service_term_t; 9440 9441 /** Definitions for WNM/NPS BSS Transistion */ 9442 #define WL_BSSTRANS_QUERY_VERSION_1 1 9443 typedef struct wl_bsstrans_query { 9444 uint16 version; /* structure version */ 9445 uint16 pad0; /* padding for 4-byte allignment */ 9446 wlc_ssid_t ssid; /* SSID of NBR elem to be queried for */ 9447 uint8 reason; /* Reason code of the BTQ */ 9448 uint8 pad1[3]; /* padding for 4-byte allignment */ 9449 } wl_bsstrans_query_t; 9450 9451 #define BTM_QUERY_NBR_COUNT_MAX 16 9452 9453 #define WL_BTQ_NBR_LIST_VERSION_1 1 9454 typedef struct wl_btq_nbr_list { 9455 uint16 version; /* structure version */ 9456 uint8 count; /* No. of BTQ NBRs returned */ 9457 uint8 pad; /* padding for 4-byte allignment */ 9458 nbr_rpt_elem_t btq_nbt_elem[]; /* BTQ NBR elem in a BTQ NBR list */ 9459 } wl_btq_nbr_list_t; 9460 9461 typedef struct wl_bsstrans_req { 9462 uint16 tbtt; /**< time of BSS to end of life, in unit of TBTT */ 9463 uint16 dur; /**< time of BSS to keep off, in unit of minute */ 9464 uint8 reqmode; /**< request mode of BSS transition request */ 9465 uint8 unicast; /**< request by unicast or by broadcast */ 9466 } wl_bsstrans_req_t; 9467 9468 enum { 9469 BSSTRANS_RESP_AUTO = 0, /**< Currently equivalent to ENABLE */ 9470 BSSTRANS_RESP_DISABLE = 1, /**< Never answer BSS Trans Req frames */ 9471 BSSTRANS_RESP_ENABLE = 2, /**< Always answer Req frames with preset data */ 9472 BSSTRANS_RESP_WAIT = 3, /**< Send ind, wait and/or send preset data (NOT IMPL) */ 9473 BSSTRANS_RESP_IMMEDIATE = 4 /**< After an ind, set data and send resp (NOT IMPL) */ 9474 }; 9475 9476 typedef struct wl_bsstrans_resp { 9477 uint8 policy; 9478 uint8 status; 9479 uint8 delay; 9480 struct ether_addr target; 9481 } wl_bsstrans_resp_t; 9482 9483 /* "wnm_bsstrans_policy" argument programs behavior after BSSTRANS Req reception. 9484 * BSS-Transition feature is used by multiple programs such as NPS-PF, VE-PF, 9485 * Band-steering, Hotspot 2.0 and customer requirements. Each PF and its test plan 9486 * mandates different behavior on receiving BSS-transition request. To accomodate 9487 * such divergent behaviors these policies have been created. 9488 */ 9489 typedef enum { 9490 WL_BSSTRANS_POLICY_ROAM_ALWAYS = 0, /**< Roam (or disassociate) in all cases */ 9491 WL_BSSTRANS_POLICY_ROAM_IF_MODE = 1, /**< Roam only if requested by Request Mode field */ 9492 WL_BSSTRANS_POLICY_ROAM_IF_PREF = 2, /**< Roam only if Preferred BSS provided */ 9493 WL_BSSTRANS_POLICY_WAIT = 3, /**< Wait for deauth and send Accepted status */ 9494 WL_BSSTRANS_POLICY_PRODUCT = 4, /**< Policy for real product use cases (Olympic) */ 9495 WL_BSSTRANS_POLICY_PRODUCT_WBTEXT = 5, /**< Policy for real product use cases (SS) */ 9496 WL_BSSTRANS_POLICY_MBO = 6, /**< Policy for MBO certification */ 9497 WL_BSSTRANS_POLICY_MAX = 7 9498 } wnm_bsstrans_policy_type_t; 9499 9500 /** Definitions for WNM/NPS TIM Broadcast */ 9501 typedef struct wl_timbc_offset { 9502 int16 offset; /**< offset in us */ 9503 uint16 fix_intv; /**< override interval sent from STA */ 9504 uint16 rate_override; /**< use rate override to send high rate TIM broadcast frame */ 9505 uint8 tsf_present; /**< show timestamp in TIM broadcast frame */ 9506 uint8 PAD; 9507 } wl_timbc_offset_t; 9508 9509 typedef struct wl_timbc_set { 9510 uint8 interval; /**< Interval in DTIM wished or required. */ 9511 uint8 flags; /**< Bitfield described below */ 9512 uint16 rate_min; /**< Minimum rate required for High/Low TIM frames. Optionnal */ 9513 uint16 rate_max; /**< Maximum rate required for High/Low TIM frames. Optionnal */ 9514 } wl_timbc_set_t; 9515 9516 enum { 9517 WL_TIMBC_SET_TSF_REQUIRED = 1, /**< Enable TIMBC only if TSF in TIM frames */ 9518 WL_TIMBC_SET_NO_OVERRIDE = 2, /**< ... if AP does not override interval */ 9519 WL_TIMBC_SET_PROXY_ARP = 4, /**< ... if AP support Proxy ARP */ 9520 WL_TIMBC_SET_DMS_ACCEPTED = 8 /**< ... if all DMS desc have been accepted */ 9521 }; 9522 9523 typedef struct wl_timbc_status { 9524 uint8 status_sta; /**< Status from internal state machine (check below) */ 9525 uint8 status_ap; /**< From AP response frame (check 8.4.2.86 from 802.11) */ 9526 uint8 interval; 9527 uint8 pad; 9528 int32 offset; 9529 uint16 rate_high; 9530 uint16 rate_low; 9531 } wl_timbc_status_t; 9532 9533 enum { 9534 WL_TIMBC_STATUS_DISABLE = 0, /**< TIMBC disabled by user */ 9535 WL_TIMBC_STATUS_REQ_MISMATCH = 1, /**< AP settings do no match user requirements */ 9536 WL_TIMBC_STATUS_NOT_ASSOC = 2, /**< STA not associated */ 9537 WL_TIMBC_STATUS_NOT_SUPPORT = 3, /**< TIMBC not supported by AP */ 9538 WL_TIMBC_STATUS_DENIED = 4, /**< Req to disable TIMBC sent to AP */ 9539 WL_TIMBC_STATUS_ENABLE = 5 /**< TIMBC enabled */ 9540 }; 9541 9542 /** Definitions for PM2 Dynamic Fast Return To Sleep */ 9543 typedef struct wl_pm2_sleep_ret_ext { 9544 uint8 logic; /**< DFRTS logic: see WL_DFRTS_LOGIC_* below */ 9545 uint8 PAD; 9546 uint16 low_ms; /**< Low FRTS timeout */ 9547 uint16 high_ms; /**< High FRTS timeout */ 9548 uint16 rx_pkts_threshold; /**< switching threshold: # rx pkts */ 9549 uint16 tx_pkts_threshold; /**< switching threshold: # tx pkts */ 9550 uint16 txrx_pkts_threshold; /**< switching threshold: # (tx+rx) pkts */ 9551 uint32 rx_bytes_threshold; /**< switching threshold: # rx bytes */ 9552 uint32 tx_bytes_threshold; /**< switching threshold: # tx bytes */ 9553 uint32 txrx_bytes_threshold; /**< switching threshold: # (tx+rx) bytes */ 9554 } wl_pm2_sleep_ret_ext_t; 9555 9556 #define WL_DFRTS_LOGIC_OFF 0 /**< Feature is disabled */ 9557 #define WL_DFRTS_LOGIC_OR 1 /**< OR all non-zero threshold conditions */ 9558 #define WL_DFRTS_LOGIC_AND 2 /**< AND all non-zero threshold conditions */ 9559 9560 /* Values for the passive_on_restricted_mode iovar. When set to non-zero, this iovar 9561 * disables automatic conversions of a channel from passively scanned to 9562 * actively scanned. These values only have an effect for country codes such 9563 * as XZ where some 5 GHz channels are defined to be passively scanned. 9564 */ 9565 #define WL_PASSACTCONV_DISABLE_NONE 0 /**< Enable permanent and temporary conversions */ 9566 #define WL_PASSACTCONV_DISABLE_ALL 1 /**< Disable permanent and temporary conversions */ 9567 #define WL_PASSACTCONV_DISABLE_PERM 2 /**< Disable only permanent conversions */ 9568 9569 /* Definitions for Reliable Multicast */ 9570 #define WL_RMC_CNT_VERSION 1 9571 #define WL_RMC_TR_VERSION 1 9572 #define WL_RMC_MAX_CLIENT 32 9573 #define WL_RMC_FLAG_INBLACKLIST 1 9574 #define WL_RMC_FLAG_ACTIVEACKER 2 9575 #define WL_RMC_FLAG_RELMCAST 4 9576 #define WL_RMC_MAX_TABLE_ENTRY 4 9577 9578 #define WL_RMC_VER 1 9579 #define WL_RMC_INDEX_ACK_ALL 255 9580 #define WL_RMC_NUM_OF_MC_STREAMS 4 9581 #define WL_RMC_MAX_TRS_PER_GROUP 1 9582 #define WL_RMC_MAX_TRS_IN_ACKALL 1 9583 #define WL_RMC_ACK_MCAST0 0x02 9584 #define WL_RMC_ACK_MCAST_ALL 0x01 9585 #define WL_RMC_ACTF_TIME_MIN 300 /**< time in ms */ 9586 #define WL_RMC_ACTF_TIME_MAX 20000 /**< time in ms */ 9587 #define WL_RMC_MAX_NUM_TRS 32 /**< maximun transmitters allowed */ 9588 #define WL_RMC_ARTMO_MIN 350 /**< time in ms */ 9589 #define WL_RMC_ARTMO_MAX 40000 /**< time in ms */ 9590 9591 /* RMC events in action frames */ 9592 enum rmc_opcodes { 9593 RELMCAST_ENTRY_OP_DISABLE = 0, /**< Disable multi-cast group */ 9594 RELMCAST_ENTRY_OP_DELETE = 1, /**< Delete multi-cast group */ 9595 RELMCAST_ENTRY_OP_ENABLE = 2, /**< Enable multi-cast group */ 9596 RELMCAST_ENTRY_OP_ACK_ALL = 3 /**< Enable ACK ALL bit in AMT */ 9597 }; 9598 9599 /* RMC operational modes */ 9600 enum rmc_modes { 9601 WL_RMC_MODE_RECEIVER = 0, /**< Receiver mode by default */ 9602 WL_RMC_MODE_TRANSMITTER = 1, /**< Transmitter mode using wl ackreq */ 9603 WL_RMC_MODE_INITIATOR = 2 /**< Initiator mode using wl ackreq */ 9604 }; 9605 9606 /** Each RMC mcast client info */ 9607 typedef struct wl_relmcast_client { 9608 uint8 flag; /**< status of client such as AR, R, or blacklisted */ 9609 uint8 PAD; 9610 int16 rssi; /**< rssi value of RMC client */ 9611 struct ether_addr addr; /**< mac address of RMC client */ 9612 } wl_relmcast_client_t; 9613 9614 /** RMC Counters */ 9615 typedef struct wl_rmc_cnts { 9616 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 9617 uint16 length; /**< length of entire structure */ 9618 uint16 dupcnt; /**< counter for duplicate rmc MPDU */ 9619 uint16 ackreq_err; /**< counter for wl ackreq error */ 9620 uint16 af_tx_err; /**< error count for action frame transmit */ 9621 uint16 null_tx_err; /**< error count for rmc null frame transmit */ 9622 uint16 af_unicast_tx_err; /**< error count for rmc unicast frame transmit */ 9623 uint16 mc_no_amt_slot; /**< No mcast AMT entry available */ 9624 /* Unused. Keep for rom compatibility */ 9625 uint16 mc_no_glb_slot; /**< No mcast entry available in global table */ 9626 uint16 mc_not_mirrored; /**< mcast group is not mirrored */ 9627 uint16 mc_existing_tr; /**< mcast group is already taken by transmitter */ 9628 uint16 mc_exist_in_amt; /**< mcast group is already programmed in amt */ 9629 /* Unused. Keep for rom compatibility */ 9630 uint16 mc_not_exist_in_gbl; /**< mcast group is not in global table */ 9631 uint16 mc_not_exist_in_amt; /**< mcast group is not in AMT table */ 9632 uint16 mc_utilized; /**< mcast addressed is already taken */ 9633 uint16 mc_taken_other_tr; /**< multi-cast addressed is already taken */ 9634 uint32 rmc_rx_frames_mac; /**< no of mc frames received from mac */ 9635 uint32 rmc_tx_frames_mac; /**< no of mc frames transmitted to mac */ 9636 uint32 mc_null_ar_cnt; /**< no. of times NULL AR is received */ 9637 uint32 mc_ar_role_selected; /**< no. of times took AR role */ 9638 uint32 mc_ar_role_deleted; /**< no. of times AR role cancelled */ 9639 uint32 mc_noacktimer_expired; /**< no. of times noack timer expired */ 9640 uint16 mc_no_wl_clk; /**< no wl clk detected when trying to access amt */ 9641 uint16 mc_tr_cnt_exceeded; /**< No of transmitters in the network exceeded */ 9642 } wl_rmc_cnts_t; 9643 9644 /** RMC Status */ 9645 typedef struct wl_relmcast_st { 9646 uint8 ver; /**< version of RMC */ 9647 uint8 num; /**< number of clients detected by transmitter */ 9648 wl_relmcast_client_t clients[WL_RMC_MAX_CLIENT]; 9649 uint16 err; /**< error status (used in infra) */ 9650 uint16 actf_time; /**< action frame time period */ 9651 } wl_relmcast_status_t; 9652 9653 /** Entry for each STA/node */ 9654 typedef struct wl_rmc_entry { 9655 /* operation on multi-cast entry such add, 9656 * delete, ack-all 9657 */ 9658 int8 flag; 9659 struct ether_addr addr; /**< multi-cast group mac address */ 9660 } wl_rmc_entry_t; 9661 9662 /** RMC table */ 9663 typedef struct wl_rmc_entry_table { 9664 uint8 index; /**< index to a particular mac entry in table */ 9665 uint8 opcode; /**< opcodes or operation on entry */ 9666 wl_rmc_entry_t entry[WL_RMC_MAX_TABLE_ENTRY]; 9667 } wl_rmc_entry_table_t; 9668 9669 typedef struct wl_rmc_trans_elem { 9670 struct ether_addr tr_mac; /**< transmitter mac */ 9671 struct ether_addr ar_mac; /**< ar mac */ 9672 uint16 artmo; /**< AR timeout */ 9673 uint8 amt_idx; /**< amt table entry */ 9674 uint8 PAD; 9675 uint16 flag; /**< entry will be acked, not acked, programmed, full etc */ 9676 } wl_rmc_trans_elem_t; 9677 9678 /** RMC transmitters */ 9679 typedef struct wl_rmc_trans_in_network { 9680 uint8 ver; /**< version of RMC */ 9681 uint8 num_tr; /**< number of transmitters in the network */ 9682 wl_rmc_trans_elem_t trs[WL_RMC_MAX_NUM_TRS]; 9683 } wl_rmc_trans_in_network_t; 9684 9685 /** To update vendor specific ie for RMC */ 9686 typedef struct wl_rmc_vsie { 9687 uint8 oui[DOT11_OUI_LEN]; 9688 uint8 PAD; 9689 uint16 payload; /**< IE Data Payload */ 9690 } wl_rmc_vsie_t; 9691 9692 /* structures & defines for proximity detection */ 9693 enum proxd_method { 9694 PROXD_UNDEFINED_METHOD = 0, 9695 PROXD_RSSI_METHOD = 1, 9696 PROXD_TOF_METHOD = 2 9697 }; 9698 9699 /* structures for proximity detection device role */ 9700 #define WL_PROXD_MODE_DISABLE 0 9701 #define WL_PROXD_MODE_NEUTRAL 1 9702 #define WL_PROXD_MODE_INITIATOR 2 9703 #define WL_PROXD_MODE_TARGET 3 9704 9705 #define WL_PROXD_ACTION_STOP 0 9706 #define WL_PROXD_ACTION_START 1 9707 9708 #define WL_PROXD_FLAG_TARGET_REPORT 0x1 9709 #define WL_PROXD_FLAG_REPORT_FAILURE 0x2 9710 #define WL_PROXD_FLAG_INITIATOR_REPORT 0x4 9711 #define WL_PROXD_FLAG_NOCHANSWT 0x8 9712 #define WL_PROXD_FLAG_NETRUAL 0x10 9713 #define WL_PROXD_FLAG_INITIATOR_RPTRTT 0x20 9714 #define WL_PROXD_FLAG_ONEWAY 0x40 9715 #define WL_PROXD_FLAG_SEQ_EN 0x80 9716 9717 #define WL_PROXD_SETFLAG_K 0x1 9718 #define WL_PROXD_SETFLAG_N 0x2 9719 #define WL_PROXD_SETFLAG_S 0x4 9720 9721 #define WL_PROXD_SETFLAG_K 0x1 9722 #define WL_PROXD_SETFLAG_N 0x2 9723 #define WL_PROXD_SETFLAG_S 0x4 9724 9725 #define WL_PROXD_RANDOM_WAKEUP 0x8000 9726 #define WL_PROXD_MAXREPORT 8 9727 9728 typedef struct wl_proxd_iovar { 9729 uint16 method; /**< Proximity Detection method */ 9730 uint16 mode; /**< Mode (neutral, initiator, target) */ 9731 } wl_proxd_iovar_t; 9732 9733 /* 9734 * structures for proximity detection parameters 9735 * consists of two parts, common and method specific params 9736 * common params should be placed at the beginning 9737 */ 9738 9739 typedef struct wl_proxd_params_common { 9740 chanspec_t chanspec; /**< channel spec */ 9741 int16 tx_power; /**< tx power of Proximity Detection(PD) frames (in dBm) */ 9742 uint16 tx_rate; /**< tx rate of PD rames (in 500kbps units) */ 9743 uint16 timeout; /**< timeout value */ 9744 uint16 interval; /**< interval between neighbor finding attempts (in TU) */ 9745 uint16 duration; /**< duration of neighbor finding attempts (in ms) */ 9746 } wl_proxd_params_common_t; 9747 9748 typedef struct wl_proxd_params_rssi_method { 9749 chanspec_t chanspec; /**< chanspec for home channel */ 9750 int16 tx_power; /**< tx power of Proximity Detection frames (in dBm) */ 9751 uint16 tx_rate; /**< tx rate of PD frames, 500kbps units */ 9752 uint16 timeout; /**< state machine wait timeout of the frames (in ms) */ 9753 uint16 interval; /**< interval between neighbor finding attempts (in TU) */ 9754 uint16 duration; /**< duration of neighbor finding attempts (in ms) */ 9755 /* method specific ones go after this line */ 9756 int16 rssi_thresh; /**< RSSI threshold (in dBm) */ 9757 uint16 maxconvergtmo; /**< max wait converge timeout (in ms) */ 9758 } wl_proxd_params_rssi_method_t; 9759 9760 #define Q1_NS 25 /**< Q1 time units */ 9761 9762 #define TOF_BW_NUM 3 /**< number of bandwidth that the TOF can support */ 9763 #define TOF_BW_SEQ_NUM (TOF_BW_NUM+2) /* number of total index */ 9764 enum tof_bw_index { 9765 TOF_BW_20MHZ_INDEX = 0, 9766 TOF_BW_40MHZ_INDEX = 1, 9767 TOF_BW_80MHZ_INDEX = 2, 9768 TOF_BW_SEQTX_INDEX = 3, 9769 TOF_BW_SEQRX_INDEX = 4 9770 }; 9771 9772 #define BANDWIDTH_BASE 20 /**< base value of bandwidth */ 9773 #define TOF_BW_20MHZ (BANDWIDTH_BASE << TOF_BW_20MHZ_INDEX) 9774 #define TOF_BW_40MHZ (BANDWIDTH_BASE << TOF_BW_40MHZ_INDEX) 9775 #define TOF_BW_80MHZ (BANDWIDTH_BASE << TOF_BW_80MHZ_INDEX) 9776 #define TOF_BW_10MHZ 10 9777 9778 #define NFFT_BASE 64 /**< base size of fft */ 9779 #define TOF_NFFT_20MHZ (NFFT_BASE << TOF_BW_20MHZ_INDEX) 9780 #define TOF_NFFT_40MHZ (NFFT_BASE << TOF_BW_40MHZ_INDEX) 9781 #define TOF_NFFT_80MHZ (NFFT_BASE << TOF_BW_80MHZ_INDEX) 9782 9783 typedef struct wl_proxd_params_tof_method { 9784 chanspec_t chanspec; /**< chanspec for home channel */ 9785 int16 tx_power; /**< tx power of Proximity Detection(PD) frames (in dBm) */ 9786 uint16 tx_rate; /**< tx rate of PD rames (in 500kbps units) */ 9787 uint16 timeout; /**< state machine wait timeout of the frames (in ms) */ 9788 uint16 interval; /**< interval between neighbor finding attempts (in TU) */ 9789 uint16 duration; /**< duration of neighbor finding attempts (in ms) */ 9790 /* specific for the method go after this line */ 9791 struct ether_addr tgt_mac; /**< target mac addr for TOF method */ 9792 uint16 ftm_cnt; /**< number of the frames txed by initiator */ 9793 uint16 retry_cnt; /**< number of retransmit attampts for ftm frames */ 9794 int16 vht_rate; /**< ht or vht rate */ 9795 /* add more params required for other methods can be added here */ 9796 } wl_proxd_params_tof_method_t; 9797 9798 typedef struct wl_proxd_seq_config 9799 { 9800 int16 N_tx_log2; 9801 int16 N_rx_log2; 9802 int16 N_tx_scale; 9803 int16 N_rx_scale; 9804 int16 w_len; 9805 int16 w_offset; 9806 } wl_proxd_seq_config_t; 9807 9808 #define WL_PROXD_TUNE_VERSION_1 1 9809 #define WL_PROXD_TUNE_VERSION_2 2 9810 #include <packed_section_start.h> 9811 /* For legacy ranging target (e.g. 43430, 43342) */ 9812 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_params_tof_tune_v1 { 9813 uint32 version; 9814 uint32 Ki; /**< h/w delay K factor for initiator */ 9815 uint32 Kt; /**< h/w delay K factor for target */ 9816 int16 vhtack; /**< enable/disable VHT ACK */ 9817 int16 N_log2[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 9818 int16 w_offset[TOF_BW_NUM]; /**< offset of threshold crossing window(per BW) */ 9819 int16 w_len[TOF_BW_NUM]; /**< length of threshold crossing window(per BW) */ 9820 int32 maxDT; /**< max time difference of T4/T1 or T3/T2 */ 9821 int32 minDT; /**< min time difference of T4/T1 or T3/T2 */ 9822 uint8 totalfrmcnt; /**< total count of transfered measurement frames */ 9823 uint16 rsv_media; /**< reserve media value for TOF */ 9824 uint32 flags; /**< flags */ 9825 uint8 core; /**< core to use for tx */ 9826 uint8 setflags; /* set flags of K, N. S values */ 9827 int16 N_scale[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 9828 uint8 sw_adj; /**< enable sw assisted timestamp adjustment */ 9829 uint8 hw_adj; /**< enable hw assisted timestamp adjustment */ 9830 uint8 seq_en; /**< enable ranging sequence */ 9831 uint8 ftm_cnt[TOF_BW_SEQ_NUM]; /**< number of ftm frames based on bandwidth */ 9832 int16 N_log2_2g; /**< simple threshold crossing for 2g channel */ 9833 int16 N_scale_2g; /**< simple threshold crossing for 2g channel */ 9834 wl_proxd_seq_config_t seq_5g20; 9835 wl_proxd_seq_config_t seq_2g20; /* Thresh crossing params for 2G Sequence */ 9836 uint16 bitflip_thresh; /* bitflip threshold */ 9837 uint16 snr_thresh; /* SNR threshold */ 9838 int8 recv_2g_thresh; /* 2g recieve sensitivity threshold */ 9839 uint32 acs_gdv_thresh; 9840 int8 acs_rssi_thresh; 9841 uint8 smooth_win_en; 9842 int32 emu_delay; 9843 } BWL_POST_PACKED_STRUCT wl_proxd_params_tof_tune_v1_t; 9844 #include <packed_section_end.h> 9845 9846 #include <packed_section_start.h> 9847 /* For legacy ranging initiator (including 4364) */ 9848 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_params_tof_tune_v2 { 9849 uint32 version; 9850 uint32 Ki; /**< h/w delay K factor for initiator */ 9851 uint32 Kt; /**< h/w delay K factor for target */ 9852 int16 vhtack; /**< enable/disable VHT ACK */ 9853 int16 N_log2[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 9854 int16 w_offset[TOF_BW_NUM]; /**< offset of threshold crossing window(per BW) */ 9855 int16 w_len[TOF_BW_NUM]; /**< length of threshold crossing window(per BW) */ 9856 int32 maxDT; /**< max time difference of T4/T1 or T3/T2 */ 9857 int32 minDT; /**< min time difference of T4/T1 or T3/T2 */ 9858 uint8 totalfrmcnt; /**< total count of transfered measurement frames */ 9859 uint16 rsv_media; /**< reserve media value for TOF */ 9860 uint32 flags; /**< flags */ 9861 uint8 core; /**< core to use for tx */ 9862 uint8 setflags; /* set flags of K, N. S values */ 9863 int16 N_scale[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 9864 uint8 sw_adj; /**< enable sw assisted timestamp adjustment */ 9865 uint8 hw_adj; /**< enable hw assisted timestamp adjustment */ 9866 uint8 seq_en; /**< enable ranging sequence */ 9867 uint8 ftm_cnt[TOF_BW_SEQ_NUM]; /**< number of ftm frames based on bandwidth */ 9868 int16 N_log2_2g; /**< simple threshold crossing for 2g channel */ 9869 int16 N_scale_2g; /**< simple threshold crossing for 2g channel */ 9870 wl_proxd_seq_config_t seq_5g20; 9871 wl_proxd_seq_config_t seq_2g20; /* Thresh crossing params for 2G Sequence */ 9872 uint16 bitflip_thresh; /* bitflip threshold */ 9873 uint16 snr_thresh; /* SNR threshold */ 9874 int8 recv_2g_thresh; /* 2g recieve sensitivity threshold */ 9875 uint32 acs_gdv_thresh; 9876 int8 acs_rssi_thresh; 9877 uint8 smooth_win_en; 9878 int32 acs_gdmm_thresh; 9879 int8 acs_delta_rssi_thresh; 9880 int32 emu_delay; 9881 uint8 core_mask; /* core mask selection */ 9882 } BWL_POST_PACKED_STRUCT wl_proxd_params_tof_tune_v2_t; 9883 #include <packed_section_end.h> 9884 9885 #define WL_PROXD_TUNE_VERSION_3 3 9886 /* Future ranging support */ 9887 typedef struct wl_proxd_params_tof_tune_v3 { 9888 uint16 version; 9889 uint16 len; 9890 uint32 Ki; /**< h/w delay K factor for initiator */ 9891 uint32 Kt; /**< h/w delay K factor for target */ 9892 int16 vhtack; /**< enable/disable VHT ACK */ 9893 uint16 PAD; 9894 int16 N_log2[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 9895 uint16 PAD; 9896 int16 w_offset[TOF_BW_NUM]; /**< offset of threshold crossing window(per BW) */ 9897 uint16 PAD; 9898 int16 w_len[TOF_BW_NUM]; /**< length of threshold crossing window(per BW) */ 9899 uint16 PAD; 9900 int32 maxDT; /**< max time difference of T4/T1 or T3/T2 */ 9901 int32 minDT; /**< min time difference of T4/T1 or T3/T2 */ 9902 uint8 totalfrmcnt; /**< total count of transfered measurement frames */ 9903 uint8 PAD[3]; 9904 uint16 rsv_media; /**< reserve media value for TOF */ 9905 uint16 PAD; 9906 uint32 flags; /**< flags */ 9907 uint8 core; /**< core to use for tx */ 9908 uint8 setflags; /* set flags of K, N. S values */ 9909 uint16 PAD; 9910 int16 N_scale[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 9911 uint8 sw_adj; /**< enable sw assisted timestamp adjustment */ 9912 uint8 hw_adj; /**< enable hw assisted timestamp adjustment */ 9913 uint8 seq_en; /**< enable ranging sequence */ 9914 uint8 PAD[3]; 9915 uint8 ftm_cnt[TOF_BW_SEQ_NUM]; /**< number of ftm frames based on bandwidth */ 9916 uint8 PAD[3]; 9917 int16 N_log2_2g; /**< simple threshold crossing for 2g channel */ 9918 int16 N_scale_2g; /**< simple threshold crossing for 2g channel */ 9919 wl_proxd_seq_config_t seq_5g20; 9920 wl_proxd_seq_config_t seq_2g20; /* Thresh crossing params for 2G Sequence */ 9921 uint16 bitflip_thresh; /* bitflip threshold */ 9922 uint16 snr_thresh; /* SNR threshold */ 9923 int8 recv_2g_thresh; /* 2g recieve sensitivity threshold */ 9924 uint8 PAD[3]; 9925 uint32 acs_gdv_thresh; 9926 int8 acs_rssi_thresh; 9927 uint8 smooth_win_en; 9928 uint16 PAD; 9929 int32 acs_gdmm_thresh; 9930 int8 acs_delta_rssi_thresh; 9931 uint8 PAD[3]; 9932 int32 emu_delay; 9933 uint8 core_mask; /* core mask selection */ 9934 uint8 PAD[3]; 9935 } wl_proxd_params_tof_tune_v3_t; 9936 9937 typedef struct wl_proxd_params_iovar { 9938 uint16 method; /**< Proximity Detection method */ 9939 uint8 PAD[2]; 9940 union { 9941 /* common params for pdsvc */ 9942 wl_proxd_params_common_t cmn_params; /**< common parameters */ 9943 /* method specific */ 9944 wl_proxd_params_rssi_method_t rssi_params; /**< RSSI method parameters */ 9945 wl_proxd_params_tof_method_t tof_params; /**< TOF method parameters */ 9946 /* tune parameters */ 9947 wl_proxd_params_tof_tune_v3_t tof_tune; /**< TOF tune parameters */ 9948 } u; /**< Method specific optional parameters */ 9949 } wl_proxd_params_iovar_t; 9950 9951 #define PROXD_COLLECT_GET_STATUS 0 9952 #define PROXD_COLLECT_SET_STATUS 1 9953 #define PROXD_COLLECT_QUERY_HEADER 2 9954 #define PROXD_COLLECT_QUERY_DATA 3 9955 #define PROXD_COLLECT_QUERY_DEBUG 4 9956 #define PROXD_COLLECT_REMOTE_REQUEST 5 9957 #define PROXD_COLLECT_DONE 6 9958 9959 typedef enum { 9960 WL_PROXD_COLLECT_METHOD_TYPE_DISABLE = 0x0, 9961 WL_PROXD_COLLECT_METHOD_TYPE_IOVAR = 0x1, 9962 WL_PROXD_COLLECT_METHOD_TYPE_EVENT = 0x2, 9963 WL_PROXD_COLLECT_METHOD_TYPE_EVENT_LOG = 0x4 9964 } wl_proxd_collect_method_type_t; 9965 9966 typedef uint16 wl_proxd_collect_method_t; /* query status: method to send proxd collect */ 9967 9968 #include <packed_section_start.h> 9969 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_query { 9970 uint32 method; /**< method */ 9971 uint8 request; /**< Query request. */ 9972 uint8 status; /**< bitmask 0 -- disable, 0x1 -- enable collection, */ 9973 /* 0x2 -- Use generic event, 0x4 -- use event log */ 9974 uint16 index; /**< The current frame index [0 to total_frames - 1]. */ 9975 uint16 mode; /**< Initiator or Target */ 9976 uint8 busy; /**< tof sm is busy */ 9977 uint8 remote; /**< Remote collect data */ 9978 } BWL_POST_PACKED_STRUCT wl_proxd_collect_query_t; 9979 #include <packed_section_end.h> 9980 9981 #include <packed_section_start.h> 9982 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_header { 9983 uint16 total_frames; /**< The total frames for this collect. */ 9984 uint16 nfft; /**< nfft value */ 9985 uint16 bandwidth; /**< bandwidth */ 9986 uint16 channel; /**< channel number */ 9987 uint32 chanspec; /**< channel spec */ 9988 uint32 fpfactor; /**< avb timer value factor */ 9989 uint16 fpfactor_shift; /**< avb timer value shift bits */ 9990 int32 distance; /**< distance calculated by fw */ 9991 uint32 meanrtt; /**< mean of RTTs */ 9992 uint32 modertt; /**< mode of RTTs */ 9993 uint32 medianrtt; /**< median of RTTs */ 9994 uint32 sdrtt; /**< standard deviation of RTTs */ 9995 uint32 clkdivisor; /**< clock divisor */ 9996 uint16 chipnum; /**< chip type */ 9997 uint8 chiprev; /**< chip revision */ 9998 uint8 phyver; /**< phy version */ 9999 struct ether_addr localMacAddr; /**< local mac address */ 10000 struct ether_addr remoteMacAddr; /**< remote mac address */ 10001 wl_proxd_params_tof_tune_v3_t params; 10002 } BWL_POST_PACKED_STRUCT wl_proxd_collect_header_t; 10003 #include <packed_section_end.h> 10004 10005 /* ifdef WL_NAN */ 10006 /* ********************** NAN wl interface struct types and defs ******************** */ 10007 /* 10008 * Uses new common IOVAR batch processing mechanism 10009 */ 10010 10011 /* 10012 * NAN config control 10013 * Bits 0 - 23 can be set by host 10014 * Bits 24 - 31 - Internal use for firmware, host cannot set it 10015 */ 10016 10017 /* 10018 * Bit 0 : If set to 1, means event uses nan bsscfg, 10019 * otherwise uses infra bsscfg. Default is using infra bsscfg 10020 */ 10021 #define WL_NAN_CTRL_ROUTE_EVENT_VIA_NAN_BSSCFG 0x000001 10022 /* If set, discovery beacons are transmitted on 2G band */ 10023 #define WL_NAN_CTRL_DISC_BEACON_TX_2G 0x000002 10024 /* If set, sync beacons are transmitted on 2G band */ 10025 #define WL_NAN_CTRL_SYNC_BEACON_TX_2G 0x000004 10026 /* If set, discovery beacons are transmitted on 5G band */ 10027 #define WL_NAN_CTRL_DISC_BEACON_TX_5G 0x000008 10028 /* If set, sync beacons are transmitted on 5G band */ 10029 #define WL_NAN_CTRL_SYNC_BEACON_TX_5G 0x000010 10030 /* If set, auto datapath responses will be sent by FW */ 10031 #define WL_NAN_CTRL_AUTO_DPRESP 0x000020 10032 /* If set, auto datapath confirms will be sent by FW */ 10033 #define WL_NAN_CTRL_AUTO_DPCONF 0x000040 10034 /* If set, auto schedule responses will be sent by FW */ 10035 #define WL_NAN_CTRL_AUTO_SCHEDRESP 0x000080 10036 /* If set, auto schedule confirms will be sent by FW */ 10037 #define WL_NAN_CTRL_AUTO_SCHEDCONF 0x000100 10038 /* If set, proprietary rates are supported by FW */ 10039 #define WL_NAN_CTRL_PROP_RATE 0x000200 10040 /* If set, service awake_dw overrides global dev awake_dw */ 10041 #define WL_NAN_CTRL_SVC_OVERRIDE_DEV_AWAKE_DW 0x000400 10042 /* If set, merge scan will be disabled */ 10043 #define WL_NAN_CTRL_SCAN_DISABLE 0x000800 10044 /* If set, power save will be disabled */ 10045 #define WL_NAN_CTRL_POWER_SAVE_DISABLE 0x001000 10046 /* If set, device will merge to configured CID only */ 10047 #define WL_NAN_CTRL_MERGE_CONF_CID_ONLY 0x002000 10048 /* If set, 5g core will be brought down in single band NAN */ 10049 #define WL_NAN_CTRL_5G_SLICE_POWER_OPT 0x004000 10050 #define WL_NAN_CTRL_DUMP_HEAP 0x008000 10051 /* If set, host generates and assign ndp id for ndp sessions */ 10052 #define WL_NAN_CTRL_HOST_GEN_NDPID 0x010000 10053 /* If set, nan ndp inactivity watchdog will be activated */ 10054 #define WL_NAN_CTRL_DELETE_INACTIVE_PEERS 0x020000 10055 /* If set, nan assoc coex will be activated */ 10056 #define WL_NAN_CTRL_INFRA_ASSOC_COEX 0x040000 10057 /* If set, dam will accept all NDP/RNG request from the peer including counter */ 10058 #define WL_NAN_CTRL_DAM_ACCEPT_ALL 0x080000 10059 /* If set, nan mac ignores role for tx discovery beacon for periodic config */ 10060 #define WL_NAN_CTRL_FASTDISC_IGNO_ROLE 0x100000 10061 /* If set, include NA in NAN beacons (disc beacons for now) */ 10062 #define WL_NAN_CTRL_INCL_NA_IN_BCNS 0x200000 10063 /* If set, host assist will be enabled */ 10064 #define WL_NAN_CTRL_HOST_ASSIST 0x400000 10065 /* If set, host configures NDI associated with the service */ 10066 #define WL_NAN_CTRL_HOST_CFG_SVC_NDI 0x800000 10067 10068 /* Value when all host-configurable bits set */ 10069 #define WL_NAN_CTRL_MAX_MASK 0xFFFFFF 10070 #define WL_NAN_CFG_CTRL_FW_BITS 8 10071 10072 /* Last 8-bits are firmware controlled bits. 10073 * Bit 31: 10074 * If set - indicates that NAN initialization is successful 10075 * Bit 30: 10076 * If set - indicates that NAN MAC cfg creation is successful 10077 * 10078 * NOTE: These are only ready-only bits for host. 10079 * All sets to these bits from host are masked off 10080 */ 10081 #define WL_NAN_PROTO_INIT_DONE (1 << 31) 10082 #define WL_NAN_CFG_CREATE_DONE (1 << 30) 10083 10084 #define WL_NAN_GET_PROTO_INIT_STATUS(x) \ 10085 (((x) & WL_NAN_PROTO_INIT_DONE) ? TRUE:FALSE) 10086 #define WL_NAN_CLEAR_PROTO_INIT_STATUS(x) \ 10087 ((x) &= ~WL_NAN_PROTO_INIT_DONE) 10088 #define WL_NAN_SET_PROTO_INIT_STATUS(x) \ 10089 ((x) |= (WL_NAN_PROTO_INIT_DONE)) 10090 10091 #define WL_NAN_GET_CFG_CREATE_STATUS(x) \ 10092 (((x) & WL_NAN_CFG_CREATE_DONE) ? TRUE:FALSE) 10093 #define WL_NAN_CLEAR_CFG_CREATE_STATUS(x) \ 10094 ((x) &= ~WL_NAN_CFG_CREATE_DONE) 10095 #define WL_NAN_SET_CFG_CREATE_STATUS(x) \ 10096 ((x) |= (WL_NAN_CFG_CREATE_DONE)) 10097 10098 #define WL_NAN_IOCTL_VERSION 0x2 10099 /* < some sufficient ioc buff size for our module */ 10100 #define WL_NAN_IOC_BUFSZ 256 10101 /* some sufficient ioc buff size for dump commands */ 10102 #define WL_NAN_IOC_BUFSZ_EXT 1024 10103 #define WL_NAN_MAX_SIDS_IN_BEACONS 127 /* Max allowed SIDs */ 10104 #define WL_NAN_MASTER_RANK_LEN 8 10105 #define WL_NAN_RANGE_LIMITED 0x0040 /* Publish/Subscribe flags */ 10106 10107 /** The service hash (service id) is exactly this many bytes. */ 10108 #define WL_NAN_SVC_HASH_LEN 6 10109 #define WL_NAN_HASHES_PER_BLOOM 4 /** Number of hash functions per bloom filter */ 10110 10111 /* no. of max last disc results */ 10112 #define WL_NAN_MAX_DISC_RESULTS 3 10113 10114 /* Max len of Rx and Tx filters */ 10115 #define WL_NAN_MAX_SVC_MATCH_FILTER_LEN 255 10116 10117 /* Max service name len */ 10118 #define WL_NAN_MAX_SVC_NAME_LEN 32 10119 10120 /* Type of Data path connection */ 10121 #define WL_NAN_DP_TYPE_UNICAST 0 10122 #define WL_NAN_DP_TYPE_MULTICAST 1 10123 10124 /* MAX security params length PMK field */ 10125 #define WL_NAN_NCS_SK_PMK_LEN 32 10126 10127 /* Post disc attr ID type */ 10128 typedef uint8 wl_nan_post_disc_attr_id_t; 10129 10130 /* 10131 * Component IDs 10132 */ 10133 typedef enum { 10134 WL_NAN_COMPID_CONFIG = 1, 10135 WL_NAN_COMPID_ELECTION = 2, 10136 WL_NAN_COMPID_SD = 3, 10137 WL_NAN_COMPID_TIMESYNC = 4, 10138 WL_NAN_COMPID_DATA_PATH = 5, 10139 WL_NAN_COMPID_DEBUG = 15 /* Keep this at the end */ 10140 } wl_nan_comp_id_t; 10141 10142 #define WL_NAN_COMP_SHIFT 8 10143 #define WL_NAN_COMP_MASK(_c) (0x0F & ((uint8)(_c))) 10144 #define WL_NAN_COMP_ID(_c) (WL_NAN_COMP_MASK(_c) << WL_NAN_COMP_SHIFT) 10145 10146 /* NAN Events */ 10147 10148 /** Instance ID type (unique identifier) */ 10149 typedef uint8 wl_nan_instance_id_t; 10150 10151 /* Publish sent for a subscribe */ 10152 /* WL_NAN_EVENT_REPLIED */ 10153 10154 typedef struct wl_nan_ev_replied { 10155 struct ether_addr sub_mac; /* Subscriber MAC */ 10156 wl_nan_instance_id_t pub_id; /* Publisher Instance ID */ 10157 uint8 sub_id; /* Subscriber ID */ 10158 int8 sub_rssi; /* Subscriber RSSI */ 10159 uint8 pad[3]; 10160 } wl_nan_ev_replied_t; 10161 10162 typedef struct wl_nan_event_replied { 10163 struct ether_addr sub_mac; /* Subscriber MAC */ 10164 wl_nan_instance_id_t pub_id; /* Publisher Instance ID */ 10165 uint8 sub_id; /* Subscriber ID */ 10166 int8 sub_rssi; /* Subscriber RSSI */ 10167 uint8 attr_num; 10168 uint16 attr_list_len; /* sizeof attributes attached to payload */ 10169 uint8 attr_list[0]; /* attributes payload */ 10170 } wl_nan_event_replied_t; 10171 10172 /* NAN Tx status of transmitted frames */ 10173 #define WL_NAN_TXS_FAILURE 0 10174 #define WL_NAN_TXS_SUCCESS 1 10175 10176 /* NAN frame types */ 10177 enum wl_nan_frame_type { 10178 /* discovery frame types */ 10179 WL_NAN_FRM_TYPE_PUBLISH = 1, 10180 WL_NAN_FRM_TYPE_SUBSCRIBE = 2, 10181 WL_NAN_FRM_TYPE_FOLLOWUP = 3, 10182 10183 /* datapath frame types */ 10184 WL_NAN_FRM_TYPE_DP_REQ = 4, 10185 WL_NAN_FRM_TYPE_DP_RESP = 5, 10186 WL_NAN_FRM_TYPE_DP_CONF = 6, 10187 WL_NAN_FRM_TYPE_DP_INSTALL = 7, 10188 WL_NAN_FRM_TYPE_DP_END = 8, 10189 10190 /* schedule frame types */ 10191 WL_NAN_FRM_TYPE_SCHED_REQ = 9, 10192 WL_NAN_FRM_TYPE_SCHED_RESP = 10, 10193 WL_NAN_FRM_TYPE_SCHED_CONF = 11, 10194 WL_NAN_FRM_TYPE_SCHED_UPD = 12, 10195 10196 /* ranging frame types */ 10197 WL_NAN_FRM_TYPE_RNG_REQ = 13, 10198 WL_NAN_FRM_TYPE_RNG_RESP = 14, 10199 WL_NAN_FRM_TYPE_RNG_TERM = 15, 10200 WL_NAN_FRM_TYPE_RNG_REPORT = 16, 10201 10202 WL_NAN_FRM_TYPE_UNSOLICIT_SDF = 17, 10203 WL_NAN_FRM_TYPE_INVALID 10204 }; 10205 typedef uint8 wl_nan_frame_type_t; 10206 10207 /* NAN Reason codes for tx status */ 10208 enum wl_nan_txs_reason_codes { 10209 WL_NAN_REASON_SUCCESS = 1, /* NAN status success */ 10210 WL_NAN_REASON_TIME_OUT = 2, /* timeout reached */ 10211 WL_NAN_REASON_DROPPED = 3, /* pkt dropped due to internal failure */ 10212 WL_NAN_REASON_MAX_RETRIES_DONE = 4 /* Max retries exceeded */ 10213 }; 10214 10215 /* For NAN TX status */ 10216 typedef struct wl_nan_event_txs { 10217 uint8 status; /* For TX status, success or failure */ 10218 uint8 reason_code; /* to identify reason when status is failure */ 10219 uint16 host_seq; /* seq num to keep track of pkts sent by host */ 10220 uint8 type; /* wl_nan_frame_type_t */ 10221 uint8 pad; 10222 uint16 opt_tlvs_len; 10223 uint8 opt_tlvs[]; 10224 } wl_nan_event_txs_t; 10225 10226 /* SD transmit pkt's event status is sent as optional tlv in wl_nan_event_txs_t */ 10227 typedef struct wl_nan_event_sd_txs { 10228 uint8 inst_id; /* Publish or subscribe instance id */ 10229 uint8 req_id; /* Requestor instance id */ 10230 } wl_nan_event_sd_txs_t; 10231 10232 /* nanho fsm tlv WL_NAN_XTLV_NANHO_OOB_TXS(0x0b0a) */ 10233 typedef struct wl_nan_event_nanho_txs { 10234 uint32 fsm_id; /* nho fsm id */ 10235 uint16 seq_id; /* nho seq id */ 10236 uint16 pad; 10237 } wl_nan_event_nanho_txs_t; 10238 10239 /* Subscribe or Publish instance Terminated */ 10240 10241 /* WL_NAN_EVENT_TERMINATED */ 10242 10243 #define NAN_SD_TERM_REASON_TIMEOUT 1 10244 #define NAN_SD_TERM_REASON_HOSTREQ 2 10245 #define NAN_SD_TERM_REASON_FWTERM 3 10246 #define NAN_SD_TERM_REASON_FAIL 4 10247 10248 typedef struct wl_nan_ev_terminated { 10249 uint8 instance_id; /* publish / subscribe instance id */ 10250 uint8 reason; /* 1=timeout, 2=Host/IOVAR, 3=FW Terminated 4=Failure */ 10251 uint8 svctype; /* 0 - Publish, 0x1 - Subscribe */ 10252 uint8 pad; /* Align */ 10253 uint32 tx_cnt; /* Number of SDFs sent */ 10254 } wl_nan_ev_terminated_t; 10255 10256 /* Follow up received against a pub / subscr */ 10257 /* WL_NAN_EVENT_RECEIVE */ 10258 10259 typedef struct wl_nan_ev_receive { 10260 struct ether_addr remote_addr; /* Peer NAN device MAC */ 10261 uint8 local_id; /* Local subscribe or publish ID */ 10262 uint8 remote_id; /* Remote subscribe or publish ID */ 10263 int8 fup_rssi; 10264 uint8 attr_num; 10265 uint16 attr_list_len; /* sizeof attributes attached to payload */ 10266 uint8 attr_list[0]; /* attributes payload */ 10267 } wl_nan_ev_receive_t; 10268 10269 /* WL_NAN_EVENT_DISC_CACHE_TIMEOUT */ 10270 #define WL_NAN_DISC_CACHE_EXPIRY_ENTRIES_MAX 8 10271 10272 typedef struct wl_nan_disc_expired_cache_entry { 10273 uint8 l_sub_id; /* local sub instance_id */ 10274 uint8 r_pub_id; /* remote-matched pub instance_id */ 10275 struct ether_addr r_nmi_addr; /* remote-matched pub nmi addr */ 10276 } wl_nan_disc_expired_cache_entry_t; 10277 10278 typedef struct wl_nan_ev_disc_cache_timeout { 10279 uint16 count; /* no. of expired cache entries */ 10280 uint16 pad; 10281 wl_nan_disc_expired_cache_entry_t cache_exp_list[]; 10282 } wl_nan_ev_disc_cache_timeout_t; 10283 10284 /* For NAN event mask extention */ 10285 #define WL_NAN_EVMASK_EXTN_VER 1 10286 #define WL_NAN_EVMASK_EXTN_LEN 16 /* 16*8 = 128 masks supported */ 10287 10288 typedef struct wl_nan_event_extn { 10289 uint8 ver; 10290 uint8 pad; 10291 uint16 len; 10292 uint8 evmask[]; 10293 } wl_nan_evmask_extn_t; 10294 10295 /* WL_NAN_XTLV_DATA_DP_TXS */ 10296 10297 typedef struct wl_nan_data_dp_txs { 10298 uint8 ndp_id; 10299 uint8 pad; 10300 struct ether_addr indi; /* initiator ndi */ 10301 } wl_nan_data_dp_txs_t; 10302 10303 /* WL_NAN_XTLV_RNG_TXS */ 10304 10305 typedef struct wl_nan_range_txs { 10306 uint8 range_id; 10307 uint8 pad[3]; 10308 } wl_nan_range_txs_t; 10309 10310 #define NAN_MAX_BANDS 2 10311 10312 /* 10313 * TLVs - Below XTLV definitions will be deprecated 10314 * in due course (soon as all other branches update 10315 * to the comp ID based XTLVs listed below). 10316 */ 10317 enum wl_nan_cmd_xtlv_id { 10318 WL_NAN_XTLV_MAC_ADDR = 0x120, 10319 WL_NAN_XTLV_MATCH_RX = 0x121, 10320 WL_NAN_XTLV_MATCH_TX = 0x122, 10321 WL_NAN_XTLV_SVC_INFO = 0x123, 10322 WL_NAN_XTLV_SVC_NAME = 0x124, 10323 WL_NAN_XTLV_SR_FILTER = 0x125, 10324 WL_NAN_XTLV_FOLLOWUP = 0x126, 10325 WL_NAN_XTLV_SVC_LIFE_COUNT = 0x127, 10326 WL_NAN_XTLV_AVAIL = 0x128, 10327 WL_NAN_XTLV_SDF_RX = 0x129, 10328 WL_NAN_XTLV_SDE_CONTROL = 0x12a, 10329 WL_NAN_XTLV_SDE_RANGE_LIMIT = 0x12b, 10330 WL_NAN_XTLV_NAN_AF = 0x12c, 10331 WL_NAN_XTLV_SD_TERMINATE = 0x12d, 10332 WL_NAN_XTLV_CLUSTER_ID = 0x12e, 10333 WL_NAN_XTLV_PEER_RSSI = 0x12f, 10334 WL_NAN_XTLV_BCN_RX = 0x130, 10335 WL_NAN_XTLV_REPLIED = 0x131, /* Publish sent for a subscribe */ 10336 WL_NAN_XTLV_RECEIVED = 0x132, /* FUP Received */ 10337 WL_NAN_XTLV_DISC_RESULTS = 0x133, /* Discovery results */ 10338 WL_NAN_XTLV_TXS = 0x134 /* TX status */ 10339 }; 10340 10341 #define WL_NAN_CMD_GLOBAL 0x00 10342 #define WL_NAN_CMD_CFG_COMP_ID 0x01 10343 #define WL_NAN_CMD_ELECTION_COMP_ID 0x02 10344 #define WL_NAN_CMD_SD_COMP_ID 0x03 10345 #define WL_NAN_CMD_SYNC_COMP_ID 0x04 10346 #define WL_NAN_CMD_DATA_COMP_ID 0x05 10347 #define WL_NAN_CMD_DAM_COMP_ID 0x06 10348 #define WL_NAN_CMD_RANGE_COMP_ID 0x07 10349 #define WL_NAN_CMD_GENERIC_COMP_ID 0x08 10350 #define WL_NAN_CMD_SCHED_COMP_ID 0x09 10351 #define WL_NAN_CMD_NSR_COMP_ID 0x0a /* NAN Save Restore */ 10352 #define WL_NAN_CMD_NANHO_COMP_ID 0x0b /* NAN Host offload */ 10353 #define WL_NAN_CMD_DBG_COMP_ID 0x0f 10354 10355 #define WL_NAN_CMD_COMP_SHIFT 8 10356 #define NAN_CMD(x, y) (((x) << WL_NAN_CMD_COMP_SHIFT) | (y)) 10357 10358 /* 10359 * Module based NAN TLV IDs 10360 */ 10361 typedef enum wl_nan_tlv { 10362 10363 WL_NAN_XTLV_CFG_MATCH_RX = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x01), 10364 WL_NAN_XTLV_CFG_MATCH_TX = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x02), 10365 WL_NAN_XTLV_CFG_SR_FILTER = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x03), 10366 WL_NAN_XTLV_CFG_SVC_NAME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x04), 10367 WL_NAN_XTLV_CFG_NAN_STATUS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x05), 10368 WL_NAN_XTLV_CFG_SVC_LIFE_COUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x06), 10369 WL_NAN_XTLV_CFG_SVC_HASH = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x07), 10370 WL_NAN_XTLV_CFG_SEC_CSID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x08), /* Security CSID */ 10371 WL_NAN_XTLV_CFG_SEC_PMK = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x09), /* Security PMK */ 10372 WL_NAN_XTLV_CFG_SEC_PMKID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0A), 10373 WL_NAN_XTLV_CFG_SEC_SCID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0B), 10374 WL_NAN_XTLV_CFG_VNDR_PAYLOAD = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0C), 10375 WL_NAN_XTLV_CFG_HOST_INDPID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0D), 10376 /* when host ndpid is used */ 10377 WL_NAN_XTLV_CFG_MAC_ADDR = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0E), 10378 /* fast disc time bitmap config */ 10379 WL_NAN_XTLV_CFG_FDISC_TBMP = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0F), 10380 10381 WL_NAN_XTLV_SD_SVC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01), 10382 WL_NAN_XTLV_SD_FOLLOWUP = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x02), 10383 WL_NAN_XTLV_SD_SDF_RX = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x03), 10384 WL_NAN_XTLV_SD_SDE_CONTROL = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x04), 10385 WL_NAN_XTLV_SD_SDE_RANGE_LIMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x05), 10386 WL_NAN_XTLV_SD_NAN_AF = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x06), 10387 WL_NAN_XTLV_SD_TERM = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x07), 10388 WL_NAN_XTLV_SD_REPLIED = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x08), /* Pub sent */ 10389 WL_NAN_XTLV_SD_FUP_RECEIVED = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x09), /* FUP Received */ 10390 WL_NAN_XTLV_SD_DISC_RESULTS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0A), /* Pub RX */ 10391 WL_NAN_XTLV_SD_TXS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0B), /* Tx status */ 10392 WL_NAN_XTLV_SD_SDE_SVC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0C), 10393 WL_NAN_XTLV_SD_SDE_SVC_UPD_IND = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0D), 10394 WL_NAN_XTLV_SD_SVC_NDI = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0E), 10395 WL_NAN_XTLV_SD_NDP_SPEC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0F), 10396 WL_NAN_XTLV_SD_NDPE_TLV_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x10), 10397 WL_NAN_XTLV_SD_NDL_QOS_UPD = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x11), 10398 WL_NAN_XTLV_SD_DISC_CACHE_TIMEOUT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x12), 10399 WL_NAN_XTLV_SD_PEER_NMI = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x13), 10400 10401 WL_NAN_XTLV_SYNC_BCN_RX = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01), 10402 WL_NAN_XTLV_EV_MR_CHANGED = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x02), 10403 10404 WL_NAN_XTLV_DATA_DP_END = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01), 10405 WL_NAN_XTLV_DATA_DP_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02), 10406 WL_NAN_XTLV_DATA_DP_SEC_INST = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03), 10407 WL_NAN_XTLV_DATA_DP_TXS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x04), /* txs for dp */ 10408 WL_NAN_XTLV_DATA_DP_OPAQUE_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x05), 10409 WL_NAN_XTLV_RANGE_INFO = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01), 10410 WL_NAN_XTLV_RNG_TXS = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x02), 10411 10412 WL_NAN_XTLV_EV_SLOT_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x01), 10413 WL_NAN_XTLV_EV_GEN_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x02), 10414 WL_NAN_XTLV_CCA_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x03), 10415 WL_NAN_XTLV_PER_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x04), 10416 WL_NAN_XTLV_CHBOUND_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x05), 10417 WL_NAN_XTLV_SLOT_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x06), 10418 10419 WL_NAN_XTLV_DAM_NA_ATTR = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01), /* na attr */ 10420 WL_NAN_XTLV_HOST_ASSIST_REQ = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x02), /* host assist */ 10421 10422 /* wl_nan_fw_cap_t */ 10423 WL_NAN_XTLV_GEN_FW_CAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01), 10424 /* wl_nan_fw_cap_v2_t */ 10425 WL_NAN_XTLV_GEN_FW_CAP_V2 = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x02), 10426 10427 WL_NAN_XTLV_SCHED_INFO = NAN_CMD(WL_NAN_CMD_SCHED_COMP_ID, 0x01), 10428 10429 /* Nan Save-Restore XTLVs */ 10430 WL_NAN_XTLV_NSR2_PEER = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x21), 10431 WL_NAN_XTLV_NSR2_NDP = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x22), 10432 10433 /* Host offload XTLVs */ 10434 WL_NAN_XTLV_NANHO_PEER_ENTRY = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x01), 10435 WL_NAN_XTLV_NANHO_DCAPLIST = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x02), 10436 WL_NAN_XTLV_NANHO_DCSLIST = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x03), 10437 WL_NAN_XTLV_NANHO_BLOB = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x04), 10438 WL_NAN_XTLV_NANHO_NDP_STATE = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x05), 10439 WL_NAN_XTLV_NANHO_FRM_TPLT = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x06), 10440 WL_NAN_XTLV_NANHO_OOB_NAF = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x07), 10441 WL_NAN_XTLV_NANHO_LOG_ERR_CTRL = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x08), 10442 WL_NAN_XTLV_NANHO_LOG_DBG_CTRL = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x09), 10443 WL_NAN_XTLV_NANHO_OOB_TXS = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0A), 10444 WL_NAN_XTLV_NANHO_DCAP_ATTR = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0B), 10445 WL_NAN_XTLV_NANHO_ELEM_ATTR = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0C), 10446 WL_NAN_XTLV_NANHO_SEC_SA = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0D) 10447 } wl_nan_tlv_t; 10448 10449 /* Sub Module ID's for NAN */ 10450 enum { 10451 NAN_MAC = 0, /* nan mac */ 10452 NAN_DISC = 1, /* nan discovery */ 10453 NAN_DBG = 2, /* nan debug */ 10454 NAN_SCHED = 3, /* nan sched */ 10455 NAN_PEER_ENTRY = 4, /* nan peer entry */ 10456 NAN_AVAIL = 5, /* nan avail */ 10457 NAN_DAM = 6, /* nan dam */ 10458 NAN_FSM = 7, /* nan fsm registry */ 10459 NAN_NDP = 8, /* nan ndp */ 10460 NAN_NDL = 9, /* nan ndl */ 10461 NAN_DP = 10, /* nan dp core */ 10462 NAN_RNG = 11, /* nan ranging */ 10463 NAN_SEC = 12, /* nan sec */ 10464 NAN_LAST = 13 10465 }; 10466 10467 enum wl_nan_sub_cmd_xtlv_id { 10468 10469 /* Special command - Tag zero */ 10470 WL_NAN_CMD_GLB_NAN_VER = NAN_CMD(WL_NAN_CMD_GLOBAL, 0x00), 10471 10472 /* nan cfg sub-commands */ 10473 10474 WL_NAN_CMD_CFG_NAN_INIT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x01), 10475 WL_NAN_CMD_CFG_ROLE = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x02), 10476 WL_NAN_CMD_CFG_HOP_CNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x03), 10477 WL_NAN_CMD_CFG_HOP_LIMIT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x04), 10478 WL_NAN_CMD_CFG_WARMUP_TIME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x05), 10479 WL_NAN_CMD_CFG_STATUS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x06), 10480 WL_NAN_CMD_CFG_OUI = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x07), 10481 WL_NAN_CMD_CFG_COUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x08), 10482 WL_NAN_CMD_CFG_CLEARCOUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x09), 10483 WL_NAN_CMD_CFG_CHANNEL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0A), 10484 WL_NAN_CMD_CFG_BAND = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0B), 10485 WL_NAN_CMD_CFG_CID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0C), 10486 WL_NAN_CMD_CFG_IF_ADDR = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0D), 10487 WL_NAN_CMD_CFG_BCN_INTERVAL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0E), 10488 WL_NAN_CMD_CFG_SDF_TXTIME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0F), 10489 WL_NAN_CMD_CFG_SID_BEACON = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x10), 10490 WL_NAN_CMD_CFG_DW_LEN = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x11), 10491 WL_NAN_CMD_CFG_AVAIL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x12), 10492 WL_NAN_CMD_CFG_WFA_TM = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x13), 10493 WL_NAN_CMD_CFG_EVENT_MASK = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x14), 10494 WL_NAN_CMD_CFG_NAN_CONFIG = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x15), /* ctrl */ 10495 WL_NAN_CMD_CFG_NAN_ENAB = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x16), 10496 WL_NAN_CMD_CFG_ULW = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x17), 10497 WL_NAN_CMD_CFG_NAN_CONFIG2 = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x18), /* ctrl2 */ 10498 WL_NAN_CMD_CFG_DEV_CAP = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x19), 10499 WL_NAN_CMD_CFG_SCAN_PARAMS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1A), 10500 WL_NAN_CMD_CFG_VNDR_PAYLOAD = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1B), 10501 WL_NAN_CMD_CFG_FASTDISC = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1C), 10502 WL_NAN_CMD_CFG_MIN_TX_RATE = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1D), 10503 WL_NAN_CMD_CFG_MAX = WL_NAN_CMD_CFG_MIN_TX_RATE, 10504 10505 /* Add new commands before and update */ 10506 10507 /* nan election sub-commands */ 10508 WL_NAN_CMD_ELECTION_HOST_ENABLE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x01), 10509 WL_NAN_CMD_ELECTION_METRICS_CONFIG = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x02), 10510 WL_NAN_CMD_ELECTION_METRICS_STATE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x03), 10511 WL_NAN_CMD_ELECTION_LEAVE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x03), 10512 WL_NAN_CMD_ELECTION_MERGE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x04), 10513 WL_NAN_CMD_ELECTION_ADVERTISERS = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x05), 10514 WL_NAN_CMD_ELECTION_RSSI_THRESHOLD = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x06), 10515 WL_NAN_CMD_ELECTION_MAX = WL_NAN_CMD_ELECTION_RSSI_THRESHOLD, 10516 /* New commands go before and update */ 10517 10518 /* nan SD sub-commands */ 10519 WL_NAN_CMD_SD_PARAMS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01), 10520 WL_NAN_CMD_SD_PUBLISH = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x02), 10521 WL_NAN_CMD_SD_PUBLISH_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x03), 10522 WL_NAN_CMD_SD_CANCEL_PUBLISH = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x04), 10523 WL_NAN_CMD_SD_SUBSCRIBE = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x05), 10524 WL_NAN_CMD_SD_SUBSCRIBE_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x06), 10525 WL_NAN_CMD_SD_CANCEL_SUBSCRIBE = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x07), 10526 WL_NAN_CMD_SD_VND_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x08), 10527 WL_NAN_CMD_SD_STATS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x09), 10528 WL_NAN_CMD_SD_TRANSMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0A), 10529 WL_NAN_CMD_SD_FUP_TRANSMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0B), 10530 WL_NAN_CMD_SD_CONNECTION = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0C), 10531 WL_NAN_CMD_SD_SHOW = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0D), 10532 WL_NAN_CMD_SD_DISC_CACHE_TIMEOUT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0E), 10533 WL_NAN_CMD_SD_DISC_CACHE_CLEAR = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0F), 10534 WL_NAN_CMD_SD_MAX = WL_NAN_CMD_SD_DISC_CACHE_CLEAR, 10535 10536 /* nan time sync sub-commands */ 10537 10538 WL_NAN_CMD_SYNC_SOCIAL_CHAN = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01), 10539 WL_NAN_CMD_SYNC_AWAKE_DWS = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x02), 10540 WL_NAN_CMD_SYNC_BCN_RSSI_NOTIF_THRESHOLD = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x03), 10541 WL_NAN_CMD_SYNC_MAX = WL_NAN_CMD_SYNC_BCN_RSSI_NOTIF_THRESHOLD, 10542 10543 /* nan2 commands */ 10544 WL_NAN_CMD_DATA_CONFIG = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01), 10545 WL_NAN_CMD_DATA_RSVD02 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02), 10546 WL_NAN_CMD_DATA_RSVD03 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03), 10547 WL_NAN_CMD_DATA_DATAREQ = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x04), 10548 WL_NAN_CMD_DATA_DATARESP = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x05), 10549 WL_NAN_CMD_DATA_DATAEND = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x06), 10550 WL_NAN_CMD_DATA_SCHEDUPD = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x07), 10551 WL_NAN_CMD_DATA_RSVD08 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x08), 10552 WL_NAN_CMD_DATA_CAP = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x9), 10553 WL_NAN_CMD_DATA_STATUS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0A), 10554 WL_NAN_CMD_DATA_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0B), 10555 WL_NAN_CMD_DATA_RSVD0C = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0C), 10556 WL_NAN_CMD_DATA_NDP_SHOW = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0D), 10557 WL_NAN_CMD_DATA_DATACONF = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0E), 10558 WL_NAN_CMD_DATA_MIN_TX_RATE = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0F), 10559 WL_NAN_CMD_DATA_MAX_PEERS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x10), 10560 WL_NAN_CMD_DATA_DP_IDLE_PERIOD = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x11), 10561 WL_NAN_CMD_DATA_DP_OPAQUE_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x12), 10562 WL_NAN_CMD_DATA_DP_HB_DURATION = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x13), 10563 WL_NAN_CMD_DATA_PATH_MAX = WL_NAN_CMD_DATA_DP_HB_DURATION, /* New ones before and update */ 10564 10565 /* nan dam sub-commands */ 10566 WL_NAN_CMD_DAM_CFG = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01), 10567 WL_NAN_CMD_DAM_MAX = WL_NAN_CMD_DAM_CFG, /* New ones before and update */ 10568 10569 /* nan2.0 ranging commands */ 10570 WL_NAN_CMD_RANGE_REQUEST = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01), 10571 WL_NAN_CMD_RANGE_AUTO = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x02), 10572 WL_NAN_CMD_RANGE_RESPONSE = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x03), 10573 WL_NAN_CMD_RANGE_CANCEL = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x04), 10574 WL_NAN_CMD_RANGE_IDLE_COUNT = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x05), 10575 WL_NAN_CMD_RANGE_CANCEL_EXT = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x06), 10576 10577 /* nan debug sub-commands */ 10578 WL_NAN_CMD_DBG_SCAN_PARAMS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x01), 10579 WL_NAN_CMD_DBG_SCAN = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x02), 10580 WL_NAN_CMD_DBG_SCAN_RESULTS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x03), 10581 /* This is now moved under CFG */ 10582 WL_NAN_CMD_DBG_EVENT_MASK = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x04), 10583 WL_NAN_CMD_DBG_EVENT_CHECK = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x05), 10584 WL_NAN_CMD_DBG_DUMP = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x06), 10585 WL_NAN_CMD_DBG_CLEAR = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x07), 10586 WL_NAN_CMD_DBG_RSSI = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x08), 10587 WL_NAN_CMD_DBG_DEBUG = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x09), 10588 WL_NAN_CMD_DBG_TEST1 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0A), 10589 WL_NAN_CMD_DBG_TEST2 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0B), 10590 WL_NAN_CMD_DBG_TEST3 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0C), 10591 WL_NAN_CMD_DBG_DISC_RESULTS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0D), 10592 WL_NAN_CMD_DBG_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0E), 10593 WL_NAN_CMD_DBG_LEVEL = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0F), 10594 WL_NAN_CMD_DBG_MAX = WL_NAN_CMD_DBG_LEVEL, /* New ones before and update */ 10595 10596 /* Generic componenet */ 10597 WL_NAN_CMD_GEN_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01), 10598 WL_NAN_CMD_GEN_FW_CAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x02), 10599 WL_NAN_CMD_GEN_MAX = WL_NAN_CMD_GEN_FW_CAP, 10600 10601 /* NAN Save-Restore */ 10602 WL_NAN_CMD_NSR2 = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x20), 10603 WL_NAN_CMD_NSR2_MAX = WL_NAN_CMD_NSR2, 10604 10605 /* Host offload sub-commands */ 10606 WL_NAN_CMD_NANHO_UPDATE = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x01), /* WILL BE REMOVED */ 10607 WL_NAN_CMD_NANHO_INFO = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x01), 10608 WL_NAN_CMD_NANHO_FRM_TPLT = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x02), /* unused */ 10609 WL_NAN_CMD_NANHO_OOB_NAF = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x03), /* unused */ 10610 WL_NAN_CMD_NANHO_LOG_CTRL = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x04), 10611 WL_NAN_CMD_NANHO_VER = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x05), 10612 WL_NAN_CMD_NANHO_MAX = WL_NAN_CMD_NANHO_VER, 10613 10614 /* Add submodules below, and update WL_NAN_CMD_MAX */ 10615 10616 /* ROML check for this enum should use WL_NAN_CMD_MAX */ 10617 WL_NAN_CMD_MAX = WL_NAN_CMD_NANHO_MAX 10618 }; 10619 10620 /* 10621 * Component/Module based NAN TLV IDs for NAN stats 10622 */ 10623 typedef enum wl_nan_stats_tlv { 10624 WL_NAN_XTLV_SYNC_MAC_STATS = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01), 10625 10626 WL_NAN_XTLV_SD_DISC_STATS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01), 10627 10628 WL_NAN_XTLV_DATA_NDP_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01), 10629 WL_NAN_XTLV_DATA_NDL_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02), 10630 WL_NAN_XTLV_DATA_SEC_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03), 10631 10632 WL_NAN_XTLV_GEN_SCHED_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01), 10633 WL_NAN_XTLV_GEN_PEER_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x02), 10634 WL_NAN_XTLV_GEN_PEER_STATS_DEVCAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x03), 10635 WL_NAN_XTLV_GEN_PEER_STATS_NDP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x04), 10636 WL_NAN_XTLV_GEN_PEER_STATS_SCHED = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x05), 10637 WL_NAN_XTLV_GEN_AVAIL_STATS_SCHED = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x06), 10638 WL_NAN_XTLV_GEN_NDP_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x07), 10639 10640 WL_NAN_XTLV_DAM_STATS = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01), 10641 WL_NAN_XTLV_DAM_AVAIL_STATS = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x02), 10642 10643 WL_NAN_XTLV_RANGE_STATS = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01) 10644 } wl_nan_stats_tlv_t; 10645 10646 /* NAN stats WL_NAN_CMD_GEN_STATS command */ 10647 /* Input data */ 10648 typedef struct wl_nan_cmn_get_stat { 10649 uint32 modules_btmap; /* Bitmap to indicate module stats are needed: 10650 * See NAN Sub Module ID's above 10651 */ 10652 uint8 operation; /* Get, Get and Clear */ 10653 uint8 arg1; /* Submodule control variable1 */ 10654 uint8 arg2; /* Submodule control variable2 */ 10655 uint8 pad; /* May not be needed as TLV's are aligned,add to pass compile chk */ 10656 } wl_nan_cmn_get_stat_t; 10657 10658 /* Output for Stats container */ 10659 typedef struct wl_nan_cmn_stat { 10660 uint32 n_stats; /* Number of different sub TLV stats present in the container */ 10661 uint32 totlen; /* Total Length of stats data in container */ 10662 uint8 stats_tlvs []; /* Stat TLV's container */ 10663 } wl_nan_cmn_stat_t; 10664 10665 /* Defines for operation */ 10666 #define WLA_NAN_STATS_GET 0 10667 #define WLA_NAN_STATS_GET_CLEAR 1 10668 10669 #define WL_NAN_STAT_ALL 0xFFFFFFFF 10670 10671 /* NAN Mac stats */ 10672 10673 typedef struct wl_nan_mac_band_stats { 10674 uint32 bcn_tx; /* 2g/5g disc/sync beacon tx count */ 10675 uint32 bcn_rx; /* 2g/5g disc/sync beacon rx count */ 10676 uint32 dws; /* Number of 2g/5g DW's */ 10677 } wl_nan_mac_band_stats_t; 10678 10679 /* Note: if this struct is changing update wl_nan_slot_ecounters_vX_t version, 10680 * as this struct is sent as payload in wl_nan_slot_ecounter_vX_ts 10681 */ 10682 typedef struct wl_nan_mac_stats { 10683 wl_nan_mac_band_stats_t band[NAN_MAX_BANDS]; /* MAC sync band specific stats */ 10684 uint32 naf_tx; /* NAN AF tx */ 10685 uint32 naf_rx; /* NAN AF rx */ 10686 uint32 sdf_tx; /* SDF tx */ 10687 uint32 sdf_rx; /* SDF rx */ 10688 uint32 cnt_sync_bcn_rx_tu[3]; /* delta bw */ 10689 uint32 cnt_bcn_tx_out_dw; /* TX sync beacon outside dw */ 10690 uint32 cnt_role_am_dw; /* anchor master role due to dw */ 10691 uint32 cnt_am_hop_err; /* wrong hopcount set for AM */ 10692 } wl_nan_mac_stats_t; 10693 10694 /* NAN Sched stats */ 10695 /* Per core Sched stats */ 10696 typedef struct nan_sched_stats_core { 10697 uint32 slotstart; /* slot_start */ 10698 uint32 slotend; /* slot_end */ 10699 uint32 slotskip; /* slot_skip */ 10700 uint32 slotstart_partial; /* slot resume */ 10701 uint32 slotend_partial; /* slot pre-empt */ 10702 uint8 avail_upd_cnt; /* count to track num of times avail has been updated */ 10703 uint8 pad[3]; 10704 } nan_sched_stats_core_t; 10705 /* Common Sched stats */ 10706 typedef struct nan_sched_stats_cmn { 10707 uint32 slot_adj_dw; /* Slot adjusts due to DW changes */ 10708 uint32 slot_dur; /* Total slot duration in TU's */ 10709 } nan_sched_stats_cmn_t; 10710 10711 /* Note: if this struct is changing update wl_nan_slot_ecounters_vX_t version, 10712 * as this struct is sent as payload in wl_nan_slot_ecounters_vX_t 10713 */ 10714 typedef struct nan_sched_stats { 10715 nan_sched_stats_cmn_t cmn; 10716 nan_sched_stats_core_t slice[MAX_NUM_D11CORES]; 10717 } nan_sched_stats_t; 10718 /* End NAN Sched stats */ 10719 10720 /* NAN Discovery stats */ 10721 typedef struct nan_disc_stats { 10722 uint32 pub_tx; /* Publish tx */ 10723 uint32 pub_rx; /* Publish rx */ 10724 uint32 sub_tx; /* Subscribe tx */ 10725 uint32 sub_rx; /* Subscribe rx */ 10726 uint32 fup_tx; /* Followup tx */ 10727 uint32 fup_rx; /* Followup rx */ 10728 uint32 pub_resp_ignored; /* response to incoming publish ignored */ 10729 uint32 sub_resp_ignored; /* response to incoming subscribe ignored */ 10730 } nan_disc_stats_t; 10731 /* NAN Discovery stats end */ 10732 10733 /* statistics for nan sec */ 10734 typedef struct nan_sec_stats_s { 10735 uint32 mic_fail; /* rx mic fail */ 10736 uint32 replay_fail; /* replay counter */ 10737 uint32 tx_fail; /* tx fail (from txstatus) */ 10738 uint32 key_info_err; /* key info field err */ 10739 uint32 ok_sessions; /* successful mx negotiations */ 10740 uint32 fail_sessions; /* failed sessions */ 10741 uint32 keydesc_err; /* key desc error */ 10742 uint32 invalid_cipher; /* cipher suite not valid */ 10743 uint32 pmk_not_found; /* no pmk found for given service or for any reason */ 10744 uint32 no_pmk_for_pmkid; /* no pmk found for give pmkid */ 10745 uint32 key_install_err; /* failed to install keys */ 10746 uint32 no_keydesc_attr; /* key desc attr missing */ 10747 uint32 nonce_mismatch; /* nonce mismatch */ 10748 } nan_sec_stats_t; 10749 10750 /* WL_NAN_XTLV_GEN_PEER_STATS */ 10751 typedef struct wl_nan_peer_stats { 10752 struct ether_addr nmi; 10753 uint8 pad[2]; 10754 uint32 pkt_enq; /* counter for queued pkt of peer */ 10755 10756 /* NDL */ 10757 bool ndl_exist; 10758 uint8 ndl_state; 10759 bool counter_proposed; 10760 uint8 pad1; 10761 10762 /* NDL QoS */ 10763 uint16 local_max_latency; 10764 uint16 peer_max_latency; 10765 uint8 local_min_slots; 10766 uint8 peer_min_slots; 10767 10768 /* security association */ 10769 struct ether_addr sec_laddr; /* local mac addr */ 10770 struct ether_addr sec_raddr; /* remote mac addr */ 10771 uint8 sec_csid; 10772 uint8 pad2; 10773 } wl_nan_peer_stats_t; 10774 10775 /* WL_NAN_XTLV_GEN_PEER_STATS_DEVCAP */ 10776 typedef struct wl_nan_peer_stats_dev_cap { 10777 uint8 mapid; 10778 uint8 awake_dw_2g; 10779 uint8 awake_dw_5g; 10780 uint8 bands_supported; 10781 uint8 op_mode; 10782 uint8 num_antennas; 10783 uint16 chan_switch_time; 10784 uint8 capabilities; 10785 uint8 pad[3]; 10786 } wl_nan_peer_stats_dev_cap_t; 10787 10788 /* WL_NAN_XTLV_GEN_PEER_STATS_NDP */ 10789 typedef struct wl_nan_peer_stats_ndp { 10790 uint8 peer_role; 10791 uint8 ndp_state; 10792 uint8 indp_id; /* initiator ndp id */ 10793 uint8 ndp_ctrl; /* ndp control field */ 10794 struct ether_addr peer_nmi; 10795 struct ether_addr peer_ndi; 10796 struct ether_addr local_ndi; 10797 10798 /* peer scb info */ 10799 bool scb_allocated; 10800 bool scb_found; 10801 uint32 scb_flags; 10802 uint32 scb_flags2; 10803 uint32 scb_flags3; 10804 } wl_nan_peer_stats_ndp_t; 10805 10806 enum { 10807 WL_NAN_SCHED_STAT_SLOT_COMM = 0x01, /* Committed slot */ 10808 WL_NAN_SCHED_STAT_SLOT_COND = 0x02, /* Conditional slot(proposal/counter) */ 10809 WL_NAN_SCHED_STAT_SLOT_NDC = 0x04, /* NDC slot */ 10810 WL_NAN_SCHED_STAT_SLOT_IMMUT = 0x08, /* Immutable slot */ 10811 WL_NAN_SCHED_STAT_SLOT_RANGE = 0x10, /* Ranging slot */ 10812 }; 10813 typedef uint16 wl_nan_stats_sched_slot_info_t; 10814 10815 typedef struct wl_nan_stats_sched_slot { 10816 wl_nan_stats_sched_slot_info_t info; /* capture slot type and more info */ 10817 chanspec_t chanspec; 10818 } wl_nan_stats_sched_slot_t; 10819 10820 /* WL_NAN_XTLV_GEN_PEER_STATS_SCHED, WL_NAN_XTLV_GEN_AVAIL_STATS_SCHED */ 10821 typedef struct wl_nan_stats_sched { 10822 uint8 map_id; 10823 uint8 seq_id; /* seq id from NA attr */ 10824 uint8 slot_dur; 10825 uint8 pad; 10826 uint16 period; 10827 uint16 num_slot; 10828 wl_nan_stats_sched_slot_t slot[]; 10829 } wl_nan_stats_sched_t; 10830 10831 /* WL_NAN_XTLV_GEN_PEER_STATS_SCHED */ 10832 typedef struct wl_nan_peer_stats_sched { 10833 uint8 map_id; 10834 uint8 seq_id; /* seq id from NA attr */ 10835 uint8 slot_dur; 10836 uint8 pad; 10837 uint16 period; 10838 uint16 num_slot; 10839 wl_nan_stats_sched_slot_t slot[]; 10840 } wl_nan_peer_stats_sched_t; 10841 10842 /* WL_NAN_XTLV_RANGE_STATS */ 10843 typedef struct wl_nan_range_stats { 10844 uint16 rng_ssn_estb; 10845 uint16 rng_ssn_fail; 10846 uint16 rng_sched_start; 10847 uint16 rng_sched_end; 10848 uint16 ftm_ssn_success; /* number of succesfull ftm sessions */ 10849 uint16 ftm_ssn_fail; 10850 uint16 num_meas; /* number of ftm frames */ 10851 uint16 num_valid_meas; /* number of ftm frames with valid timestamp */ 10852 } wl_nan_range_stats_t; 10853 10854 /* defines for ndp stats flag */ 10855 10856 #define NAN_NDP_STATS_FLAG_ROLE_MASK 0x01 10857 #define NAN_NDP_STATS_FLAG_ROLE_INIT 0x00 10858 #define NAN_NDP_STATS_FLAG_ROLE_RESP 0x01 10859 10860 #define NAN_NDP_STATS_STATE_BIT_SHIFT 1 10861 #define NAN_NDP_STATS_FLAG_STATE_MASK 0x07 10862 #define NAN_NDP_STATS_FLAG_STATE_IN_PROG 0x00 10863 #define NAN_NDP_STATS_FLAG_STATE_ESTB 0x01 10864 #define NAN_NDP_STATS_FLAG_STATE_TEARDOWN_WAIT 0x02 10865 /* More states can be added here, when needed */ 10866 10867 /* WL_NAN_XTLV_GEN_NDP_STATS */ 10868 typedef struct wl_nan_ndp_stats_s { 10869 uint8 ndp_id; 10870 uint8 indp_id; 10871 uint8 flags; 10872 uint8 nan_sec_csid; 10873 struct ether_addr lndi_addr; 10874 struct ether_addr pnmi_addr; 10875 struct ether_addr pndi_addr; 10876 uint8 PAD[2]; 10877 } wl_nan_ndp_stats_t; 10878 10879 /* WL_NAN_XTLV_EV_SLOT_INFO */ 10880 typedef struct wl_nan_slot_info_s { 10881 /* dw slot start expected */ 10882 uint32 dwst_h; 10883 uint32 dwst_l; 10884 /* dw slot start actual */ 10885 uint32 act_dwst_h; 10886 uint32 act_dwst_l; 10887 uint16 cur_chan[MAX_NUM_D11CORES]; /* sdb channels */ 10888 uint16 dw_chan; /* dw channel */ 10889 uint8 dw_no; /* dw number */ 10890 uint8 slot_seq_no; /* slot seq no. */ 10891 } wl_nan_slot_info_t; 10892 10893 /* WL_NAN_EVENT_MR_CHANGED */ 10894 typedef uint8 wl_nan_mr_changed_t; 10895 #define WL_NAN_AMR_CHANGED 1 10896 #define WL_NAN_IMR_CHANGED 2 10897 10898 /* 10899 * The macro BCMUTILS_ERR_CODES is defined only 10900 * when using the common header file(a new approach) bcmutils/include/bcmerror.h. 10901 * Otherwise, use the error codes from this file. 10902 */ 10903 #ifndef BCMUTILS_ERR_CODES 10904 10905 /** status - TBD BCME_ vs NAN status - range reserved for BCME_ */ 10906 enum { 10907 /* add new status here... */ 10908 WL_NAN_E_INVALID_TOKEN = -2135, /* invalid token or mismatch */ 10909 WL_NAN_E_INVALID_ATTR = -2134, /* generic invalid attr error */ 10910 WL_NAN_E_INVALID_NDL_ATTR = -2133, /* invalid NDL attribute */ 10911 WL_NAN_E_SCB_NORESOURCE = -2132, /* no more peer scb available */ 10912 WL_NAN_E_PEER_NOTAVAIL = -2131, 10913 WL_NAN_E_SCB_EXISTS = -2130, 10914 WL_NAN_E_INVALID_PEER_NDI = -2129, 10915 WL_NAN_E_INVALID_LOCAL_NDI = -2128, 10916 WL_NAN_E_ALREADY_EXISTS = -2127, /* generic NAN error for duplication */ 10917 WL_NAN_E_EXCEED_MAX_NUM_MAPS = -2126, 10918 WL_NAN_E_INVALID_DEV_CHAN_SCHED = -2125, 10919 WL_NAN_E_INVALID_PEER_BLOB_TYPE = -2124, 10920 WL_NAN_E_INVALID_LCL_BLOB_TYPE = -2123, 10921 WL_NAN_E_BCMC_PDPA = -2122, /* BCMC NAF PDPA */ 10922 WL_NAN_E_TIMEOUT = -2121, 10923 WL_NAN_E_HOST_CFG = -2120, 10924 WL_NAN_E_NO_ACK = -2119, 10925 WL_NAN_E_SECINST_FAIL = -2118, 10926 WL_NAN_E_REJECT_NDL = -2117, /* generic NDL rejection error */ 10927 WL_NAN_E_INVALID_NDP_ATTR = -2116, 10928 WL_NAN_E_HOST_REJECTED = -2115, 10929 WL_NAN_E_PCB_NORESOURCE = -2114, 10930 WL_NAN_E_NDC_EXISTS = -2113, 10931 WL_NAN_E_NO_NDC_ENTRY_AVAIL = -2112, 10932 WL_NAN_E_INVALID_NDC_ENTRY = -2111, 10933 WL_NAN_E_SD_TX_LIST_FULL = -2110, 10934 WL_NAN_E_SVC_SUB_LIST_FULL = -2109, 10935 WL_NAN_E_SVC_PUB_LIST_FULL = -2108, 10936 WL_NAN_E_SDF_MAX_LEN_EXCEEDED = -2107, 10937 WL_NAN_E_ZERO_CRB = -2106, /* no CRB between local and peer */ 10938 WL_NAN_E_PEER_NDC_NOT_SELECTED = -2105, /* peer ndc not selected */ 10939 WL_NAN_E_DAM_CHAN_CONFLICT = -2104, /* dam schedule channel conflict */ 10940 WL_NAN_E_DAM_SCHED_PERIOD = -2103, /* dam schedule period mismatch */ 10941 WL_NAN_E_LCL_NDC_NOT_SELECTED = -2102, /* local selected ndc not configured */ 10942 WL_NAN_E_NDL_QOS_INVALID_NA = -2101, /* na doesn't comply with ndl qos */ 10943 WL_NAN_E_CLEAR_NAF_WITH_SA_AS_RNDI = -2100, /* rx clear naf with peer rndi */ 10944 WL_NAN_E_SEC_CLEAR_PKT = -2099, /* rx clear pkt from a peer with sec_sa */ 10945 WL_NAN_E_PROT_NON_PDPA_NAF = -2098, /* rx protected non PDPA frame */ 10946 WL_NAN_E_DAM_DOUBLE_REMOVE = -2097, /* remove peer schedule already removed */ 10947 WL_NAN_E_DAM_DOUBLE_MERGE = -2096, /* merge peer schedule already merged */ 10948 WL_NAN_E_DAM_REJECT_INVALID = -2095, /* reject for invalid schedule */ 10949 WL_NAN_E_DAM_REJECT_RANGE = -2094, 10950 WL_NAN_E_DAM_REJECT_QOS = -2093, 10951 WL_NAN_E_DAM_REJECT_NDC = -2092, 10952 WL_NAN_E_DAM_REJECT_PEER_IMMUT = -2091, 10953 WL_NAN_E_DAM_REJECT_LCL_IMMUT = -2090, 10954 WL_NAN_E_DAM_EXCEED_NUM_SCHED = -2089, 10955 WL_NAN_E_DAM_INVALID_SCHED_MAP = -2088, /* invalid schedule map list */ 10956 WL_NAN_E_DAM_INVALID_LCL_SCHED = -2087, 10957 WL_NAN_E_INVALID_MAP_ID = -2086, 10958 WL_NAN_E_CHAN_OVERLAP_ACROSS_MAP = -2085, 10959 WL_NAN_E_INVALID_CHAN_LIST = -2084, 10960 WL_NAN_E_INVALID_RANGE_TBMP = -2083, 10961 WL_NAN_E_INVALID_IMMUT_SCHED = -2082, 10962 WL_NAN_E_INVALID_NDC_ATTR = -2081, 10963 WL_NAN_E_INVALID_TIME_BITMAP = -2080, 10964 WL_NAN_E_INVALID_NA_ATTR = -2079, 10965 WL_NAN_E_NO_NA_ATTR_IN_AVAIL_MAP = -2078, /* no na attr saved in avail map */ 10966 WL_NAN_E_INVALID_MAP_IDX = -2077, 10967 WL_NAN_E_SEC_SA_NOTFOUND = -2076, 10968 WL_NAN_E_BSSCFG_NOTFOUND = -2075, 10969 WL_NAN_E_SCB_NOTFOUND = -2074, 10970 WL_NAN_E_NCS_SK_KDESC_TYPE = -2073, 10971 WL_NAN_E_NCS_SK_KEY_DESC_VER = -2072, /* key descr ver */ 10972 WL_NAN_E_NCS_SK_KEY_TYPE = -2071, /* key descr type */ 10973 WL_NAN_E_NCS_SK_KEYINFO_FAIL = -2070, /* key info (generic) */ 10974 WL_NAN_E_NCS_SK_KEY_LEN = -2069, /* key len */ 10975 WL_NAN_E_NCS_SK_KDESC_NOT_FOUND = -2068, /* key desc not found */ 10976 WL_NAN_E_NCS_SK_INVALID_PARAMS = -2067, /* invalid args */ 10977 WL_NAN_E_NCS_SK_KDESC_INVALID = -2066, /* key descr is not valid */ 10978 WL_NAN_E_NCS_SK_NONCE_MISMATCH = -2065, 10979 WL_NAN_E_NCS_SK_KDATA_SAVE_FAIL = -2064, /* not able to save key data */ 10980 WL_NAN_E_NCS_SK_AUTH_TOKEN_CALC_FAIL = -2063, 10981 WL_NAN_E_NCS_SK_PTK_CALC_FAIL = -2062, 10982 WL_NAN_E_INVALID_STARTOFFSET = -2061, 10983 WL_NAN_E_BAD_NA_ENTRY_TYPE = -2060, 10984 WL_NAN_E_INVALID_CHANBMP = -2059, 10985 WL_NAN_E_INVALID_OP_CLASS = -2058, 10986 WL_NAN_E_NO_IES = -2057, 10987 WL_NAN_E_NO_PEER_ENTRY_AVAIL = -2056, 10988 WL_NAN_E_INVALID_PEER = -2055, 10989 WL_NAN_E_PEER_EXISTS = -2054, 10990 WL_NAN_E_PEER_NOTFOUND = -2053, 10991 WL_NAN_E_NO_MEM = -2052, 10992 WL_NAN_E_INVALID_OPTION = -2051, 10993 WL_NAN_E_INVALID_BAND = -2050, 10994 WL_NAN_E_INVALID_MAC = -2049, 10995 WL_NAN_E_BAD_INSTANCE = -2048, 10996 /* NAN status code reserved from -2048 to -3071 */ 10997 /* Do NOT add new status below -2048 */ 10998 WL_NAN_E_ERROR = -1, 10999 WL_NAN_E_OK = 0 11000 }; 11001 11002 #endif /* BCMUTILS_ERR_CODES */ 11003 11004 /* Error codes used in vendor specific attribute in Data Path Termination frames */ 11005 enum { 11006 WL_NAN_DPEND_E_OK = 0, 11007 WL_NAN_DPEND_E_ERROR = 1, 11008 WL_NAN_DPEND_E_HOST_CMD = 2, 11009 WL_NAN_DPEND_E_HOST_REJECTED = 3, /* host rejected rx frame */ 11010 WL_NAN_DPEND_E_RESOURCE_LIMIT = 4, 11011 WL_NAN_DPEND_E_NO_ACK_RCV = 5, 11012 WL_NAN_DPEND_E_TIMEOUT = 6, 11013 WL_NAN_DPEND_E_NO_ELT = 7, /* rx frame missing element container */ 11014 WL_NAN_DPEND_E_NO_NDP_ATTR = 8, 11015 WL_NAN_DPEND_E_NO_AVAIL_ATTR = 9, 11016 WL_NAN_DPEND_E_NO_NDC_ATTR = 10, 11017 WL_NAN_DPEND_E_NO_RANGE_BM = 11, 11018 WL_NAN_DPEND_E_INVALID_NDP_ATTR = 12, 11019 WL_NAN_DPEND_E_INVALID_NDC_ATTR = 13, 11020 WL_NAN_DPEND_E_INVALID_IMMUT = 14, 11021 WL_NAN_DPEND_E_INVALID_NDL_QOS = 15, 11022 WL_NAN_DPEND_E_INVALID_SEC_PARAMS = 16, 11023 WL_NAN_DPEND_E_REJECT_AVAIL = 17, 11024 WL_NAN_DPEND_E_REJECT_NDL = 18, 11025 WL_NAN_DPEND_E_SCB_NORESOURCE = 19 11026 }; 11027 11028 typedef int32 wl_nan_status_t; 11029 11030 /** nan cmd list entry */ 11031 enum wl_nan_sub_cmd_input_flags { 11032 WL_NAN_SUB_CMD_FLAG_NONE = 0, 11033 WL_NAN_SUB_CMD_FLAG_SKIP = 1, /* Skip to next sub-command on error */ 11034 WL_NAN_SUB_CMD_FLAG_TERMINATE = 2, /* Terminate processing and return */ 11035 WL_NAN_SUB_CMD_FLAG_LAST /* Keep this at the end */ 11036 }; 11037 11038 /** container for nan events */ 11039 typedef struct wl_nan_ioc { 11040 uint16 version; /**< interface command or event version */ 11041 uint16 id; /**< nan ioctl cmd ID */ 11042 uint16 len; /**< total length of all tlv records in data[] */ 11043 uint16 pad; /**< pad to be 32 bit aligment */ 11044 uint8 data []; /**< var len payload of bcm_xtlv_t type */ 11045 } wl_nan_ioc_t; 11046 11047 /* 11048 * NAN sub-command data structures 11049 */ 11050 11051 /* 11052 * Config component WL_NAN_CMD_CFG_XXXX sub-commands 11053 * WL_NAN_CMD_CFG_ENABLE 11054 */ 11055 enum wl_nan_config_state { 11056 WL_NAN_CONFIG_STATE_DISABLE = 0, 11057 WL_NAN_CONFIG_STATE_ENABLE = 1 11058 }; 11059 11060 typedef int8 wl_nan_config_state_t; 11061 11062 /* WL_NAN_CMD_CFG_NAN_INIT */ 11063 11064 typedef uint8 wl_nan_init_t; 11065 11066 /* WL_NAN_CMD_CFG_NAN_VERSION */ 11067 typedef uint16 wl_nan_ver_t; 11068 11069 /* WL_NAN_CMD_CFG_NAN_CONFIG */ 11070 typedef uint32 wl_nan_cfg_ctrl_t; 11071 11072 /* WL_NAN_CMD_CFG_NAN_CONFIG2 */ 11073 typedef struct wl_nan_cfg_ctrl2 { 11074 uint32 flags1; /* wl_nan_cfg_ctrl2_flags1 */ 11075 uint32 flags2; /* wl_nan_cfg_ctrl2_flags2 */ 11076 } wl_nan_cfg_ctrl2_t; 11077 11078 enum wl_nan_cfg_ctrl2_flags1 { 11079 /* Allows unicast SDF TX while local device is under NDP/NDL negotiation, 11080 * but Not with the peer SDF destined to. 11081 */ 11082 WL_NAN_CTRL2_FLAG1_ALLOW_SDF_TX_UCAST_IN_PROG = 0x00000001, 11083 /* Allows broadcast SDF TX while local device is under NDP/NDL negotiation */ 11084 WL_NAN_CTRL2_FLAG1_ALLOW_SDF_TX_BCAST_IN_PROG = 0x00000002, 11085 /* Allows the device to send schedule update automatically on local schedule change */ 11086 WL_NAN_CTRL2_FLAG1_AUTO_SCHEDUPD = 0x00000004, 11087 /* Allows the device to handle slot pre_close operations */ 11088 WL_NAN_CTRL2_FLAG1_SLOT_PRE_CLOSE = 0x00000008 11089 }; 11090 #define WL_NAN_CTRL2_FLAGS1_MASK 0x0000000F 11091 11092 #define WL_NAN_CTRL2_FLAGS2_MASK 0x00000000 11093 11094 /* 11095 * WL_NAN_CMD_CFG_BAND, WL_NAN_CMD_CFG_RSSI_THRESHOLD(Get only) 11096 */ 11097 typedef uint8 wl_nan_band_t; 11098 11099 /* 11100 * WL_NAN_CMD_CFG_ROLE 11101 */ 11102 enum wl_nan_role { 11103 WL_NAN_ROLE_AUTO = 0, 11104 WL_NAN_ROLE_NON_MASTER_NON_SYNC = 1, 11105 WL_NAN_ROLE_NON_MASTER_SYNC = 2, 11106 WL_NAN_ROLE_MASTER = 3, 11107 WL_NAN_ROLE_ANCHOR_MASTER = 4 11108 }; 11109 11110 typedef uint8 wl_nan_role_t; 11111 11112 typedef struct wl_nan_device_state 11113 { 11114 wl_nan_role_t role; /* Sync Master, Non-Sync Master */ 11115 uint8 state; /* TBD */ 11116 uint8 hopcount; /* Hops to the Anchor Master */ 11117 struct ether_addr immediate_master; /* Master MAC */ 11118 struct ether_addr anchor_master; /* Anchor Master MAC */ 11119 struct ether_addr cluster_id; /* Cluster ID to which this device belongs to */ 11120 uint8 PAD[3]; 11121 uint32 tsf_high; /* NAN Cluster TSFs */ 11122 uint32 tsf_low; 11123 } wl_nan_device_state_t; 11124 11125 /* 11126 * WL_NAN_CMD_CFG_HOP_CNT, WL_NAN_CMD_CFG_HOP_LIMIT 11127 */ 11128 typedef uint8 wl_nan_hop_count_t; 11129 11130 /* 11131 * WL_NAN_CMD_CFG_WARMUP_TIME 11132 */ 11133 typedef uint32 wl_nan_warmup_time_ticks_t; 11134 11135 /* 11136 * WL_NAN_CMD_CFG_RSSI_THRESHOLD 11137 * rssi_close and rssi_mid are used to transition master to non-master 11138 * role by NAN state machine. rssi thresholds corresponding to the band 11139 * will be updated. 11140 */ 11141 /* To be deprecated */ 11142 typedef struct wl_nan_rssi_threshold { 11143 wl_nan_band_t band; 11144 int8 rssi_close; 11145 int8 rssi_mid; 11146 uint8 pad; 11147 } wl_nan_rssi_threshold_t; 11148 11149 /* WL_NAN_CMD_ELECTION_RSSI_THRESHOLD */ 11150 11151 typedef struct wl_nan_rssi_thld { 11152 int8 rssi_close_2g; 11153 int8 rssi_mid_2g; 11154 int8 rssi_close_5g; 11155 int8 rssi_mid_5g; 11156 } wl_nan_rssi_thld_t; 11157 11158 /* WL_NAN_CMD_DATA_MAX_PEERS */ 11159 11160 typedef uint8 wl_nan_max_peers_t; 11161 11162 /* 11163 * WL_NAN_CMD_CFG_STATUS 11164 */ 11165 11166 typedef enum wl_nan_election_mode { 11167 WL_NAN_ELECTION_RUN_BY_HOST = 1, 11168 WL_NAN_ELECTION_RUN_BY_FW = 2 11169 } wl_nan_election_mode_t; 11170 11171 typedef struct wl_nan_conf_status { 11172 struct ether_addr nmi; /* NAN mgmt interface address */ 11173 uint8 enabled; /* NAN is enabled */ 11174 uint8 role; /* Current nan sync role */ 11175 struct ether_addr cid; /* Current Cluster id */ 11176 uint8 social_chans[2]; /* Social channels */ 11177 uint8 mr[8]; /* Self Master Rank */ 11178 uint8 amr[8]; /* Anchor Master Rank */ 11179 uint32 ambtt; /* Anchor master beacon target time */ 11180 uint32 cluster_tsf_h; /* Current Cluster TSF High */ 11181 uint32 cluster_tsf_l; /* Current Cluster TSF Low */ 11182 uint8 election_mode; /* Election mode, host or firmware */ 11183 uint8 hop_count; /* Current Hop count */ 11184 uint8 imr[8]; /* Immediate Master Rank */ 11185 uint8 pad[4]; /* remove after precommit */ 11186 uint16 opt_tlvs_len; 11187 uint8 opt_tlvs[]; 11188 } wl_nan_conf_status_t; 11189 11190 /* 11191 * WL_NAN_CMD_CFG_OUI 11192 */ 11193 typedef struct wl_nan_oui_type { 11194 uint8 nan_oui[DOT11_OUI_LEN]; 11195 uint8 type; 11196 } wl_nan_oui_type_t; 11197 11198 /* 11199 * WL_NAN_CMD_CFG_COUNT 11200 */ 11201 typedef struct wl_nan_count { 11202 uint32 cnt_bcn_tx; /**< TX disc/sync beacon count */ 11203 uint32 cnt_bcn_rx; /**< RX disc/sync beacon count */ 11204 uint32 cnt_svc_disc_tx; /**< TX svc disc frame count */ 11205 uint32 cnt_svc_disc_rx; /**< RX svc disc frame count */ 11206 } wl_nan_count_t; 11207 /* 11208 * Election component WL_NAN_CMD_ELECTION_XXXX sub-commands 11209 * WL_NAN_CMD_ELECTION_HOST_ENABLE 11210 */ 11211 enum wl_nan_enable_flags { 11212 WL_NAN_DISABLE_FLAG_HOST_ELECTION = 0, 11213 WL_NAN_ENABLE_FLAG_HOST_ELECTION = 1 11214 }; 11215 11216 /* 11217 * 0 - disable host based election 11218 * 1 - enable host based election 11219 */ 11220 typedef uint8 wl_nan_host_enable_t; 11221 11222 /* 11223 * WL_NAN_CMD_ELECTION_METRICS_CONFIG 11224 */ 11225 /* Set only */ 11226 typedef struct wl_nan_election_metric_config { 11227 uint8 random_factor; /* Configured random factor */ 11228 uint8 master_pref; /* configured master preference */ 11229 uint8 pad[2]; 11230 } wl_nan_election_metric_config_t; 11231 11232 /* 11233 * WL_NAN_CMD_ELECTION_METRICS_STATE 11234 */ 11235 /* Get only */ 11236 typedef struct wl_nan_election_metric_state { 11237 uint8 random_factor; /* random factor used in MIs */ 11238 uint8 master_pref; /* Master advertised in MIs */ 11239 uint8 pad[2]; 11240 } wl_nan_election_metric_state_t; 11241 11242 /* 11243 * WL_NAN_CMD_ELECTION_LEAVE 11244 * WL_NAN_CMD_ELECTION_STOP 11245 */ 11246 typedef struct ether_addr wl_nan_cluster_id_t; 11247 11248 #define NHO_SEC_NCS_SK_REPLAY_CNT_LEN 8u 11249 /* kck */ 11250 #define NHO_SEC_NCS_SK_256_KCK_LEN 24u /* refer nan2 r21 7.1.4.1 */ 11251 /* kek */ 11252 #define NHO_SEC_NCS_SK_256_KEK_LEN 32u /* refer nan2 r21 7.1.4.1 */ 11253 /* tk */ 11254 #define NHO_SEC_NCS_SK_256_TK_LEN 32u /* refer nan2 r21 section 7 */ 11255 11256 #define NHO_SEC_NCS_SK_MAX_KEY_LEN (NHO_SEC_NCS_SK_256_KCK_LEN \ 11257 + NHO_SEC_NCS_SK_256_KEK_LEN \ 11258 + NHO_SEC_NCS_SK_256_TK_LEN) 11259 11260 #define NHO_SEC_KEY_INSTALL_FLAG (1 << 0) 11261 #define NHO_SEC_KEY_UNINSTALL_FLAG (1 << 1) 11262 11263 /* WL_NAN_XTLV_NANHO_SEC_SA */ 11264 typedef struct nanho_sec_sa { 11265 int8 csid; /* Cipher suite ID to identify the security type */ 11266 uint8 kck_len; /* KCK len in key_buf */ 11267 uint8 kek_len; /* KEK len in key_buf */ 11268 uint8 tk_len; /* Transient key len in key_buf */ 11269 uint16 flags; 11270 uint16 pad; 11271 struct ether_addr laddr; /* local mac addr */ 11272 struct ether_addr raddr; /* remote mac addr */ 11273 uint8 key_krc[NHO_SEC_NCS_SK_REPLAY_CNT_LEN]; /* Key Replay ctr */ 11274 uint8 key_buf[NHO_SEC_NCS_SK_MAX_KEY_LEN]; /* PTK = KCK + KEK + TK */ 11275 } nanho_sec_sa_t; 11276 11277 /* 11278 * WL_NAN_CMD_ELECTION_MERGE 11279 * 0 - disable cluster merge 11280 * 1 - enable cluster merge 11281 */ 11282 typedef uint8 wl_nan_merge_enable_t; 11283 11284 /* 11285 * WL_NAN_CMD_CFG_ROLE 11286 * role = 0 means configuration by firmware(obsolete); otherwise by host 11287 * when host configures role, also need target master address to sync to 11288 */ 11289 #define NAN_SYNC_MASTER_SELF 1 11290 #define NAN_SYNC_MASTER_USE_TIMING 2 /* Use the tsf timing provided */ 11291 #define NAN_SYNC_MASTER_AMREC_UPD 4 /* provide AM record update */ 11292 11293 /* 11294 struct ether_addr addr: 11295 when NAN_SYNC_MASTER_USE_TIMING is set, addr is the mac of Rx NAN beacon 11296 providing the timing info 11297 ltsf_h, ltsf_l: 11298 The local TSF timestamp filled in by FW in the WL_NAN_EVENT_BCN_RX event; 11299 rtsf_h, rtsf_l: 11300 The timestamp in the Rx beacon frame, filled in by host 11301 uint32 ambtt: 11302 the amtt in the cluster ID attribute in the Rx beacon frame 11303 */ 11304 11305 typedef struct nan_sync_master { 11306 uint8 flag; /* 1: self; 2: use TSF timing; 4: AMR update */ 11307 uint8 hop_count; 11308 struct ether_addr addr; 11309 struct ether_addr cluster_id; 11310 chanspec_t channel; /* bcn reception channel */ 11311 uint32 ltsf_h; 11312 uint32 ltsf_l; 11313 uint32 rtsf_h; 11314 uint32 rtsf_l; 11315 uint8 amr[WL_NAN_MASTER_RANK_LEN]; 11316 uint32 ambtt; 11317 } nan_sync_master_t; 11318 11319 /* NAN advertiser structure */ 11320 /* TODO RSDB: add chspec to indicates core corresponds correct core */ 11321 typedef struct nan_adv_entry { 11322 uint8 age; /* used to remove stale entries */ 11323 uint8 hop_count; /* for NTLV support, use bit7 for virtual NAN peer */ 11324 struct ether_addr addr; 11325 struct ether_addr cluster_id; 11326 chanspec_t channel; /* bcn reception channel */ 11327 uint32 ltsf_h; 11328 uint32 ltsf_l; 11329 uint32 rtsf_h; 11330 uint32 rtsf_l; 11331 uint8 amr[WL_NAN_MASTER_RANK_LEN]; 11332 uint32 ambtt; 11333 int8 rssi[NAN_MAX_BANDS]; /* rssi last af was received at */ 11334 int8 last_rssi[NAN_MAX_BANDS]; /* rssi in the last AF */ 11335 } nan_adv_entry_t; 11336 #define NAN_VIRTUAL_PEER_BIT 0x80 11337 11338 typedef enum { 11339 NAC_CNT_NTLV_AF_TX = 0, /* count of AF containing NTLV tx */ 11340 NAC_CNT_NTLV_AF_RX, /* count of AF containing NTLV rx */ 11341 NAC_CNT_NTLV_TMERR_TX, /* count of NTLV tx timing error */ 11342 NAC_CNT_NTLV_TMERR_RX, /* count of NTLV rx timing error */ 11343 NAC_CNT_NTLV_TM_MISMATCH, /* count of TopMaster mismatch in Rx NTLV processing */ 11344 NAC_CNT_NTLV_ADV_EXISTED, /* count of NTLV ignored bc advertiser existed from bcn */ 11345 NAC_CNT_NTLV_STALED_BCN, /* count of staled bcn from NTLV info */ 11346 NAC_CNT_NTLV_MERGE, /* count of NTLV used for NAN cluster merge */ 11347 NAC_CNT_NTLV_ELECTION_DROP, /* count of NTLV dropped in NAN election */ 11348 NAC_CNT_NTLV_TSF_ADOPT, /* count of NTLV used for NAN TSF adoption */ 11349 NAC_CNT_NTLV_LAST 11350 } nac_cnt_enum_t; 11351 11352 #define NAC_MAX_CNT (NAC_CNT_NTLV_LAST) 11353 11354 typedef struct nac_stats { 11355 uint32 nac_cnt[NAC_MAX_CNT]; 11356 } nac_stats_t; 11357 11358 typedef struct nan_adv_table { 11359 uint8 num_adv; 11360 uint8 adv_size; 11361 uint8 pad[2]; 11362 nan_adv_entry_t adv_nodes[0]; 11363 } nan_adv_table_t; 11364 11365 typedef struct wl_nan_role_cfg { 11366 wl_nan_role_t cfg_role; 11367 wl_nan_role_t cur_role; 11368 uint8 pad[2]; 11369 nan_sync_master_t target_master; 11370 } wl_nan_role_cfg_t; 11371 11372 typedef struct wl_nan_role_config { 11373 wl_nan_role_t role; 11374 struct ether_addr target_master; 11375 uint8 pad; 11376 } wl_nan_role_config_t; 11377 11378 typedef int8 wl_nan_sd_optional_field_types_t; 11379 11380 /* Flag bits for Publish and Subscribe (wl_nan_sd_params_t flags) */ 11381 11382 /* First 8 bits are blocked for mapping 11383 * against svc_control flag bits which goes out 11384 * as part of SDA attribute in air in SDF frames 11385 */ 11386 #define WL_NAN_RANGE_LIMITED 0x0040 11387 11388 /* Event generation indicator (default is continuous) */ 11389 11390 #define WL_NAN_MATCH_ONCE 0x100000 11391 #define WL_NAN_MATCH_NEVER 0x200000 11392 11393 /* Bits specific to Publish */ 11394 11395 #define WL_NAN_PUB_UNSOLICIT 0x1000 /* Unsolicited Tx */ 11396 #define WL_NAN_PUB_SOLICIT 0x2000 /* Solicited Tx */ 11397 #define WL_NAN_PUB_BOTH 0x3000 /* Both the above */ 11398 11399 #define WL_NAN_PUB_BCAST 0x4000 /* bcast solicited Tx only */ 11400 #define WL_NAN_PUB_EVENT 0x8000 /* Event on each solicited Tx */ 11401 #define WL_NAN_PUB_SOLICIT_PENDING 0x10000 /* Used for one-time solicited Publish */ 11402 11403 #define WL_NAN_FOLLOWUP 0x20000 /* Follow-up frames */ 11404 #define WL_NAN_TX_FOLLOWUP 0x40000 /* host generated transmit Follow-up frames */ 11405 11406 /* Bits specific to Subscribe */ 11407 11408 #define WL_NAN_SUB_ACTIVE 0x1000 /* Active subscribe mode */ 11409 #define WL_NAN_SUB_MATCH_IF_SVC_INFO 0x2000 /* Service info in publish */ 11410 11411 #define WL_NAN_TTL_UNTIL_CANCEL 0xFFFFFFFF /* Special values for time to live (ttl) parameter */ 11412 11413 /* 11414 * Publish - runs until first transmission 11415 * Subscribe - runs until first DiscoveryResult event 11416 */ 11417 #define WL_NAN_TTL_FIRST 0 11418 11419 /* Nan Service Based control Flags */ 11420 11421 /* If set, dev will take care of dp_resp */ 11422 #define WL_NAN_SVC_CTRL_AUTO_DPRESP 0x1000000 11423 11424 /* If set, host wont rec event "receive" */ 11425 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_RECEIVE 0x2000000 11426 11427 /* If set, host wont rec event "replied" */ 11428 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_REPLIED 0x4000000 11429 11430 /* If set, host wont rec event "terminated" */ 11431 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_TERMINATED 0x8000000 11432 11433 /* 11434 * WL_NAN_CMD_SD_PARAMS 11435 */ 11436 typedef struct wl_nan_sd_params 11437 { 11438 uint16 length; /* length including options */ 11439 uint8 period; /* period of the unsolicited SDF xmission in DWs */ 11440 uint8 awake_dw; /* interval between two DWs where SDF tx/rx are done */ 11441 uint8 svc_hash[WL_NAN_SVC_HASH_LEN]; /* Hash for the service name */ 11442 uint8 instance_id; /* Instance of the current service */ 11443 int8 proximity_rssi; /* RSSI limit to Rx subscribe or pub SDF 0 no effect */ 11444 uint32 flags; /* bitmap representing aforesaid optional flags */ 11445 int32 ttl; /* TTL for this instance id, -1 will run till cancelled */ 11446 tlv_t optional[1]; /* optional fields in the SDF as appropriate */ 11447 } wl_nan_sd_params_t; 11448 11449 /* 11450 * WL_NAN_CMD_SD_PUBLISH_LIST 11451 * WL_NAN_CMD_SD_SUBSCRIBE_LIST 11452 */ 11453 typedef struct wl_nan_service_info 11454 { 11455 uint8 instance_id; /* Publish instance ID */ 11456 uint8 service_hash[WL_NAN_SVC_HASH_LEN]; /* Hash for service name */ 11457 } wl_nan_service_info_t; 11458 11459 typedef struct wl_nan_service_list 11460 { 11461 uint16 id_count; /* Number of registered publish/subscribe services */ 11462 wl_nan_service_info_t list[1]; /* service info defined by nan_service instance */ 11463 } wl_nan_service_list_t; 11464 11465 /* 11466 * WL_NAN_CMD_CFG_BCN_INTERVAL 11467 */ 11468 typedef uint16 wl_nan_disc_bcn_interval_t; 11469 11470 /* 11471 * WL_NAN_CMD_CFG_SDF_TXTIME 11472 */ 11473 typedef uint16 wl_nan_svc_disc_txtime_t; 11474 11475 /* 11476 * WL_NAN_CMD_CFG_STOP_BCN_TX 11477 */ 11478 typedef uint16 wl_nan_stop_bcn_tx_t; 11479 11480 /* 11481 * WL_NAN_CMD_CFG_SID_BEACON 11482 */ 11483 typedef struct wl_nan_sid_beacon_control { 11484 uint8 sid_enable; /* Flag to indicate the inclusion of Service IDs in Beacons */ 11485 uint8 sid_count; /* Limit for number of publish SIDs to be included in Beacons */ 11486 uint8 sub_sid_count; /* Limit for number of subscribe SIDs to be included in Beacons */ 11487 uint8 pad; 11488 } wl_nan_sid_beacon_control_t; 11489 11490 /* 11491 * WL_NAN_CMD_CFG_DW_LEN 11492 */ 11493 typedef uint16 wl_nan_dw_len_t; 11494 11495 /* 11496 * WL_NAN_CMD_CFG_AWAKE_DW Will be deprecated. 11497 */ 11498 typedef struct wl_nan_awake_dw { 11499 wl_nan_band_t band; /* 0 - b mode 1- a mode */ 11500 uint8 interval; /* 1 or 2 or 4 or 8 or 16 */ 11501 uint16 pad; 11502 } wl_nan_awake_dw_t; 11503 11504 /* 11505 * WL_NAN_CMD_CFG_AWAKE_DWS 11506 */ 11507 typedef struct wl_nan_awake_dws { 11508 uint8 dw_interval_2g; /* 2G DW interval */ 11509 uint8 dw_interval_5g; /* 5G DW interval */ 11510 uint16 pad; 11511 } wl_nan_awake_dws_t; 11512 11513 /* WL_NAN_CMD_SYNC_BCN_RSSI_NOTIF_THRESHOLD */ 11514 11515 typedef struct wl_nan_rssi_notif_thld { 11516 int8 bcn_rssi_2g; 11517 int8 bcn_rssi_5g; 11518 int16 pad; 11519 } wl_nan_rssi_notif_thld_t; 11520 11521 /* 11522 * WL_NAN_CMD_CFG_SOCIAL_CHAN 11523 */ 11524 typedef struct wl_nan_social_channels { 11525 uint8 soc_chan_2g; /* 2G social channel */ 11526 uint8 soc_chan_5g; /* 5G social channel */ 11527 uint16 pad; 11528 } wl_nan_social_channels_t; 11529 11530 /* 11531 * WL_NAN_CMD_SD_CANCEL_PUBLISH 11532 * WL_NAN_CMD_SD_CANCEL_SUBSCRIBE 11533 */ 11534 typedef uint8 wl_nan_instance_id; /* Instance ID of an active publish instance */ 11535 11536 /* 11537 * WL_NAN_CMD_SD_VND_INFO 11538 */ 11539 typedef struct wl_nan_sd_vendor_info 11540 { 11541 uint16 length; /* Size in bytes of the payload following this field */ 11542 uint8 data[]; /* Vendor Information */ 11543 } wl_nan_sd_vendor_info_t; 11544 11545 /* 11546 * WL_NAN_CMD_SD_STATS 11547 */ 11548 typedef struct wl_nan_sd_stats { 11549 uint32 sdftx; 11550 uint32 sdfrx; 11551 uint32 sdsrffail; 11552 uint32 sdrejrssi; 11553 uint32 sdfollowuprx; 11554 uint32 sdsubmatch; 11555 uint32 sdpubreplied; 11556 uint32 sdmftfail1; 11557 uint32 sdmftfail2; 11558 uint32 sdmftfail3; 11559 uint32 sdmftfail4; 11560 } wl_nan_sd_stats_t; 11561 11562 /* Flag bits for sd transmit message (wl_nan_sd_transmit_t flags) */ 11563 11564 /* If set, host wont rec "tx status" event for tx-followup msg */ 11565 #define WL_NAN_FUP_SUPR_EVT_TXS 0x01 11566 /* more flags can be added here */ 11567 11568 /* 11569 * WL_NAN_CMD_SD_TRANSMIT 11570 * WL_NAN_CMD_SD_FUP_TRANSMIT 11571 */ 11572 typedef struct wl_nan_sd_transmit { 11573 uint8 local_service_id; /* Sender Service ID */ 11574 uint8 requestor_service_id; /* Destination Service ID */ 11575 struct ether_addr destination_addr; /* Destination MAC */ 11576 uint16 token; /* follow_up_token when a follow-up 11577 * msg is queued successfully 11578 */ 11579 uint8 priority; /* requested relative prio */ 11580 uint8 flags; /* Flags for tx follow-up msg */ 11581 uint16 opt_len; /* total length of optional tlvs */ 11582 uint8 opt_tlv[]; /* optional tlvs in bcm_xtlv_t type */ 11583 } wl_nan_sd_transmit_t; 11584 11585 /* disc cache timeout for a cache entry */ 11586 typedef uint16 wl_nan_disc_cache_timeout_t; 11587 11588 /* 11589 * WL_NAN_CMD_SYNC_TSRESERVE 11590 */ 11591 /** time slot */ 11592 #define NAN_MAX_TIMESLOT 32 11593 typedef struct wl_nan_timeslot { 11594 uint32 abitmap; /**< available bitmap */ 11595 uint32 chanlist[NAN_MAX_TIMESLOT]; 11596 } wl_nan_timeslot_t; 11597 11598 /* 11599 * Deprecated 11600 * 11601 * WL_NAN_CMD_SYNC_TSRELEASE 11602 */ 11603 typedef uint32 wl_nan_ts_bitmap_t; 11604 11605 /* nan passive scan params */ 11606 #define NAN_SCAN_MAX_CHCNT 8 11607 /* nan merge scan params */ 11608 typedef struct wl_nan_scan_params { 11609 /* dwell time of discovery channel corresponds to band_idx. 11610 * If set to 0 then fw default will be used. 11611 */ 11612 uint16 dwell_time; 11613 /* scan period of discovery channel corresponds to band_idx. 11614 * If set to 0 then fw default will be used. 11615 */ 11616 uint16 scan_period; 11617 /* band index of discovery channel */ 11618 uint8 band_index; 11619 } wl_nan_scan_params_t; 11620 11621 /* 11622 * WL_NAN_CMD_DBG_SCAN 11623 */ 11624 typedef struct wl_nan_dbg_scan { 11625 struct ether_addr cid; 11626 uint8 pad[2]; 11627 } wl_nan_dbg_scan_t; 11628 11629 /* NAN_DBG_LEVEL */ 11630 typedef struct wl_nan_dbg_level { 11631 uint32 nan_err_level; /* for Error levels */ 11632 uint32 nan_dbg_level; /* for bebug logs and trace */ 11633 uint32 nan_info_level; /* for dumps like prhex */ 11634 } wl_nan_dbg_level_t; 11635 11636 /* 11637 * WL_NAN_CMD_DBG_EVENT_MASK 11638 */ 11639 typedef uint32 wl_nan_event_mask_t; 11640 11641 /* 11642 * WL_NAN_CMD_DBG_EVENT_CHECK 11643 */ 11644 typedef uint8 wl_nan_dbg_ifname[BCM_MSG_IFNAME_MAX]; 11645 11646 /* 11647 * WL_NAN_CMD_DBG_DUMP 11648 * WL_NAN_CMD_DBG_CLEAR 11649 */ 11650 enum wl_nan_dbg_dump_type { 11651 WL_NAN_DBG_DT_RSSI_DATA = 1, 11652 WL_NAN_DBG_DT_STATS_DATA = 2, 11653 /* 11654 * Additional enums before this line 11655 */ 11656 WL_NAN_DBG_DT_INVALID 11657 }; 11658 typedef int8 wl_nan_dbg_dump_type_t; 11659 11660 /** various params and ctl swithce for nan_debug instance */ 11661 /* 11662 * WL_NAN_CMD_DBG_DEBUG 11663 */ 11664 typedef struct wl_nan_debug_params { 11665 uint16 cmd; /**< debug cmd to perform a debug action */ 11666 uint16 status; 11667 uint32 msglevel; /**< msg level if enabled */ 11668 uint8 enabled; /**< runtime debuging enabled */ 11669 uint8 collect; 11670 uint8 PAD[2]; 11671 } wl_nan_debug_params_t; 11672 11673 typedef struct wl_nan_sched_svc_timeslot_s { 11674 uint32 abitmap; /* availability bitmap */ 11675 uint32 chanlist[NAN_MAX_TIMESLOT]; 11676 uint8 res; /* resolution: 0 = 16ms, 1 = 32ms, 2 = 64ms 3 = reserved. REfer NAN spec */ 11677 uint8 mapid; /* mapid from NAN spec. Used to differentiate 2G Vs 5G band */ 11678 uint8 PAD[2]; 11679 } wl_nan_sched_svc_timeslot_t; 11680 11681 /* 11682 * WL_NAN_CMD_DATA_DP_IDLE_PERIOD 11683 */ 11684 typedef uint16 wl_nan_ndp_idle_period_t; 11685 11686 /* 11687 * WL_NAN_CMD_DATA_DP_HB_DURATION 11688 */ 11689 typedef uint16 wl_nan_ndp_hb_duration_t; 11690 11691 /* nan cmd IDs */ 11692 enum wl_nan_cmds { 11693 /* nan cfg /disc & dbg ioctls */ 11694 WL_NAN_CMD_ENABLE = 1, 11695 WL_NAN_CMD_ATTR = 2, 11696 WL_NAN_CMD_NAN_JOIN = 3, 11697 WL_NAN_CMD_LEAVE = 4, 11698 WL_NAN_CMD_MERGE = 5, 11699 WL_NAN_CMD_STATUS = 6, 11700 WL_NAN_CMD_TSRESERVE = 7, 11701 WL_NAN_CMD_TSSCHEDULE = 8, 11702 WL_NAN_CMD_TSRELEASE = 9, 11703 WL_NAN_CMD_OUI = 10, 11704 WL_NAN_CMD_OOB_AF = 11, 11705 WL_NAN_CMD_SCAN_PARAMS = 12, 11706 11707 WL_NAN_CMD_COUNT = 15, 11708 WL_NAN_CMD_CLEARCOUNT = 16, 11709 11710 /* discovery engine commands */ 11711 WL_NAN_CMD_PUBLISH = 20, 11712 WL_NAN_CMD_SUBSCRIBE = 21, 11713 WL_NAN_CMD_CANCEL_PUBLISH = 22, 11714 WL_NAN_CMD_CANCEL_SUBSCRIBE = 23, 11715 WL_NAN_CMD_TRANSMIT = 24, 11716 WL_NAN_CMD_CONNECTION = 25, 11717 WL_NAN_CMD_SHOW = 26, 11718 WL_NAN_CMD_STOP = 27, /* stop nan for a given cluster ID */ 11719 /* nan debug iovars & cmds */ 11720 WL_NAN_CMD_SCAN = 47, 11721 WL_NAN_CMD_SCAN_RESULTS = 48, 11722 WL_NAN_CMD_EVENT_MASK = 49, 11723 WL_NAN_CMD_EVENT_CHECK = 50, 11724 WL_NAN_CMD_DUMP = 51, 11725 WL_NAN_CMD_CLEAR = 52, 11726 WL_NAN_CMD_RSSI = 53, 11727 11728 WL_NAN_CMD_DEBUG = 60, 11729 WL_NAN_CMD_TEST1 = 61, 11730 WL_NAN_CMD_TEST2 = 62, 11731 WL_NAN_CMD_TEST3 = 63, 11732 WL_NAN_CMD_DISC_RESULTS = 64, 11733 /* nan 2.0 data path commands */ 11734 WL_NAN_CMD_DATAPATH = 65 11735 }; 11736 11737 /* NAN DP interface commands */ 11738 enum wl_nan_dp_cmds { 11739 /* nan 2.0 ioctls */ 11740 WL_NAN_CMD_DP_CAP = 1000, 11741 WL_NAN_CMD_DP_CONFIG = 1001, 11742 WL_NAN_CMD_DP_CREATE = 1002, 11743 WL_NAN_CMD_DP_AUTO_CONNECT = 1003, 11744 WL_NAN_CMD_DP_DATA_REQ = 1004, 11745 WL_NAN_CMD_DP_DATA_RESP = 1005, 11746 WL_NAN_CMD_DP_SCHED_UPD = 1006, 11747 WL_NAN_CMD_DP_END = 1007, 11748 WL_NAN_CMD_DP_CONNECT = 1008, 11749 WL_NAN_CMD_DP_STATUS = 1009 11750 }; 11751 11752 /* TODO Should remove this fixed length */ 11753 #define WL_NAN_DATA_SVC_SPEC_INFO_LEN 32 /* arbitrary */ 11754 #define WL_NAN_DP_MAX_SVC_INFO 0xFF 11755 #define WL_NAN_DATA_NDP_INST_SUPPORT 16 11756 11757 /* Nan flags (16 bits) */ 11758 #define WL_NAN_DP_FLAG_SVC_INFO 0x0001 11759 #define WL_NAN_DP_FLAG_CONFIRM 0x0002 11760 #define WL_NAN_DP_FLAG_EXPLICIT_CFM 0x0004 11761 #define WL_NAN_DP_FLAG_SECURITY 0x0008 11762 #define WL_NAN_DP_FLAG_HAST_NDL_COUNTER 0x0010 /* Host assisted NDL counter */ 11763 11764 /* NAN Datapath host status */ 11765 #define WL_NAN_DP_STATUS_ACCEPTED 1 11766 #define WL_NAN_DP_STATUS_REJECTED 0 11767 11768 /* to be done */ 11769 typedef struct wl_nan_dp_cap { 11770 uint8 tbd; 11771 } wl_nan_dp_cap_t; 11772 11773 /** The service hash (service id) is exactly this many bytes. */ 11774 #define WL_NAN_SVC_HASH_LEN 6 11775 /** Number of hash functions per bloom filter */ 11776 #define WL_NAN_HASHES_PER_BLOOM 4 11777 /* no. of max last disc results */ 11778 #define WL_NAN_MAX_DISC_RESULTS 3 11779 11780 /* NAN security related defines */ 11781 /* NCS-SK related */ 11782 #define WL_NAN_NCS_SK_PMK_LEN 32 11783 #define WL_NAN_NCS_SK_PMKID_LEN 16 11784 11785 /* recent discovery results */ 11786 typedef struct wl_nan_disc_result_s 11787 { 11788 wl_nan_instance_id_t instance_id; /* instance id of pub/sub req */ 11789 wl_nan_instance_id_t peer_instance_id; /* peer instance id of pub/sub req/resp */ 11790 uint8 svc_hash[WL_NAN_SVC_HASH_LEN]; /* service descp string */ 11791 struct ether_addr peer_mac; /* peer mac address */ 11792 } wl_nan_disc_result_t; 11793 11794 /* list of recent discovery results */ 11795 typedef struct wl_nan_disc_results_s 11796 { 11797 wl_nan_disc_result_t disc_result[WL_NAN_MAX_DISC_RESULTS]; 11798 } wl_nan_disc_results_list_t; 11799 11800 /* nan 1.0 events */ 11801 /* To be deprecated - will be replaced by event_disc_result */ 11802 typedef struct wl_nan_ev_disc_result { 11803 wl_nan_instance_id_t pub_id; 11804 wl_nan_instance_id_t sub_id; 11805 struct ether_addr pub_mac; 11806 uint8 opt_tlvs[0]; 11807 } wl_nan_ev_disc_result_t; 11808 11809 typedef struct wl_nan_event_disc_result { 11810 wl_nan_instance_id_t pub_id; 11811 wl_nan_instance_id_t sub_id; 11812 struct ether_addr pub_mac; 11813 int8 publish_rssi; /* publisher RSSI */ 11814 uint8 attr_num; 11815 uint16 attr_list_len; /* length of the all the attributes in the SDF */ 11816 uint8 attr_list[0]; /* list of NAN attributes */ 11817 } wl_nan_event_disc_result_t; 11818 11819 typedef struct wl_nan_ev_p2p_avail { 11820 struct ether_addr sender; 11821 struct ether_addr p2p_dev_addr; 11822 uint8 dev_role; 11823 uint8 resolution; 11824 uint8 repeat; 11825 uint8 pad[3]; 11826 chanspec_t chanspec; 11827 uint32 avail_bmap; 11828 } wl_nan_ev_p2p_avail_t; 11829 11830 /* 11831 * discovery interface event structures * 11832 */ 11833 11834 enum wl_nan_oob_af_flags { 11835 WL_NAN_OOB_AF_FLAG_SEND_EVENT = 0x0001, /* send tx status event */ 11836 WL_NAN_OOB_AF_FLAG_FLUSH_PCB = 0x0002, /* flush PCB */ 11837 WL_NAN_OOB_AF_FLAG_ADD_DCAP = 0x0004, /* add dev cap attr into NAF body */ 11838 WL_NAN_OOB_AF_FLAG_ADD_ELMT = 0x0008, /* add elmt container attr into NAF body */ 11839 WL_NAN_OOB_AF_FLAG_MFP_REQUIRED = 0x0010 /* MFP required */ 11840 }; 11841 typedef uint16 wl_nan_oob_af_flags_t; 11842 11843 /* mandatory parameters for OOB action frame */ 11844 typedef struct wl_nan_oob_af_params_s 11845 { 11846 uint8 fup_lcl_id; /* local instance ID of follow-up SDF */ 11847 uint8 fup_peer_id; /* peer instance ID of follow-up SDF */ 11848 uint8 sdf_type; /* represented by service control type NAN_SC_XXX */ 11849 uint8 unused_uint8; 11850 uint32 unused_uint32; 11851 struct ether_addr bssid; 11852 struct ether_addr dest; 11853 uint32 pkt_lifetime; 11854 uint8 n2af_sub_type; /* NAN2 AF sub type */ 11855 uint8 retry_cnt; /* NAF tx retry (not 802.11 re-tx) */ 11856 uint16 token; /* NAN host seq num */ 11857 uint16 flags; /* wl_nan_oob_af_flags_t */ 11858 uint32 fsm_id; /* unique fsm id */ 11859 uint16 payload_len; 11860 uint8 payload[1]; 11861 } wl_nan_oob_af_params_t; 11862 11863 /* NAN Ranging */ 11864 11865 /* Bit defines for global flags */ 11866 #define WL_NAN_RANGING_ENABLE 1 /**< enable RTT */ 11867 #define WL_NAN_RANGING_RANGED 2 /**< Report to host if ranged as target */ 11868 typedef struct nan_ranging_config { 11869 uint32 chanspec; /**< Ranging chanspec */ 11870 uint16 timeslot; /**< NAN RTT start time slot 1-511 */ 11871 uint16 duration; /**< NAN RTT duration in ms */ 11872 struct ether_addr allow_mac; /**< peer initiated ranging: the allowed peer mac 11873 * address, a unicast (for one peer) or 11874 * a broadcast for all. Setting it to all zeros 11875 * means responding to none,same as not setting 11876 * the flag bit NAN_RANGING_RESPOND 11877 */ 11878 uint16 flags; 11879 } wl_nan_ranging_config_t; 11880 11881 /** list of peers for self initiated ranging */ 11882 /** Bit defines for per peer flags */ 11883 #define WL_NAN_RANGING_REPORT (1<<0) /**< Enable reporting range to target */ 11884 typedef struct nan_ranging_peer { 11885 uint32 chanspec; /**< desired chanspec for this peer */ 11886 uint32 abitmap; /**< available bitmap */ 11887 struct ether_addr ea; /**< peer MAC address */ 11888 uint8 frmcnt; /**< frame count */ 11889 uint8 retrycnt; /**< retry count */ 11890 uint16 flags; /**< per peer flags, report or not */ 11891 uint16 PAD; 11892 } wl_nan_ranging_peer_t; 11893 typedef struct nan_ranging_list { 11894 uint8 count; /**< number of MAC addresses */ 11895 uint8 num_peers_done; /**< host set to 0, when read, shows number of peers 11896 * completed, success or fail 11897 */ 11898 uint8 num_dws; /**< time period to do the ranging, specified in dws */ 11899 uint8 reserve; /**< reserved field */ 11900 wl_nan_ranging_peer_t rp[1]; /**< variable length array of peers */ 11901 } wl_nan_ranging_list_t; 11902 11903 /* ranging results, a list for self initiated ranging and one for peer initiated ranging */ 11904 /* There will be one structure for each peer */ 11905 #define WL_NAN_RANGING_STATUS_SUCCESS 1 11906 #define WL_NAN_RANGING_STATUS_FAIL 2 11907 #define WL_NAN_RANGING_STATUS_TIMEOUT 3 11908 #define WL_NAN_RANGING_STATUS_ABORT 4 /**< with partial results if sounding count > 0 */ 11909 typedef struct nan_ranging_result { 11910 uint8 status; /**< 1: Success, 2: Fail 3: Timeout 4: Aborted */ 11911 uint8 sounding_count; /**< number of measurements completed (0 = failure) */ 11912 struct ether_addr ea; /**< initiator MAC address */ 11913 uint32 chanspec; /**< Chanspec where the ranging was done */ 11914 uint32 timestamp; /**< 32bits of the TSF timestamp ranging was completed at */ 11915 uint32 distance; /**< mean distance in meters expressed as Q4 number. 11916 * Only valid when sounding_count > 0. Examples: 11917 * 0x08 = 0.5m 11918 * 0x10 = 1m 11919 * 0x18 = 1.5m 11920 * set to 0xffffffff to indicate invalid number 11921 */ 11922 int32 rtt_var; /**< standard deviation in 10th of ns of RTTs measured. 11923 * Only valid when sounding_count > 0 11924 */ 11925 struct ether_addr tgtea; /**< target MAC address */ 11926 uint8 PAD[2]; 11927 } wl_nan_ranging_result_t; 11928 typedef struct nan_ranging_event_data { 11929 uint8 mode; /**< 1: Result of host initiated ranging */ 11930 /* 2: Result of peer initiated ranging */ 11931 uint8 reserved; 11932 uint8 success_count; /**< number of peers completed successfully */ 11933 uint8 count; /**< number of peers in the list */ 11934 wl_nan_ranging_result_t rr[1]; /**< variable array of ranging peers */ 11935 } wl_nan_ranging_event_data_t; 11936 11937 enum { 11938 WL_NAN_STATS_RSSI = 1, 11939 WL_NAN_STATS_DATA = 2, 11940 WL_NAN_STATS_DP = 3, 11941 /* 11942 * ***** ADD before this line **** 11943 */ 11944 WL_NAN_STATS_INVALID 11945 }; 11946 typedef struct wl_nan_dp_stats { 11947 uint32 tbd; /* TBD */ 11948 } wl_nan_dp_stats_t; 11949 11950 typedef struct wl_nan_stats { 11951 /* general */ 11952 uint32 cnt_dw; /* DW slots */ 11953 uint32 cnt_disc_bcn_sch; /* disc beacon slots */ 11954 uint32 cnt_amr_exp; /* count of ambtt expiries resetting roles */ 11955 uint32 cnt_bcn_upd; /* count of beacon template updates */ 11956 uint32 cnt_bcn_tx; /* count of sync & disc bcn tx */ 11957 uint32 cnt_bcn_rx; /* count of sync & disc bcn rx */ 11958 uint32 cnt_sync_bcn_tx; /* count of sync bcn tx within DW */ 11959 uint32 cnt_disc_bcn_tx; /* count of disc bcn tx */ 11960 uint32 cnt_sdftx_bcmc; /* count of bcast/mcast sdf tx */ 11961 uint32 cnt_sdftx_uc; /* count of unicast sdf tx */ 11962 uint32 cnt_sdftx_fail; /* count of unicast sdf tx fails */ 11963 uint32 cnt_sdf_rx; /* count of sdf rx */ 11964 /* NAN roles */ 11965 uint32 cnt_am; /* anchor master */ 11966 uint32 cnt_master; /* master */ 11967 uint32 cnt_nms; /* non master sync */ 11968 uint32 cnt_nmns; /* non master non sync */ 11969 /* TX */ 11970 uint32 cnt_err_txtime; /* txtime in sync bcn frame not a multiple of dw intv */ 11971 uint32 cnt_err_unsch_tx; /* tx while not in DW/ disc bcn slot */ 11972 uint32 cnt_err_bcn_tx; /* beacon tx error */ 11973 uint32 cnt_sync_bcn_tx_miss; /* no. of times time delta between 2 cosequetive 11974 * sync beacons is more than expected 11975 */ 11976 /* MSCH */ 11977 uint32 cnt_err_msch_reg; /* error is Dw/disc reg with msch */ 11978 uint32 cnt_err_wrong_ch_cb; /* count of msch calbacks in wrong channel */ 11979 uint32 cnt_dw_skip; /* count of DW rejected */ 11980 uint32 cnt_disc_skip; /* count of disc bcn rejected */ 11981 uint32 cnt_dw_start_early; /* msch cb not at registered time */ 11982 uint32 cnt_dw_start_late; /* no. of delays in slot start */ 11983 /* SCANS */ 11984 uint32 cnt_mrg_scan; /* count of merge scans completed */ 11985 uint32 cnt_err_ms_rej; /* number of merge scan failed */ 11986 uint32 cnt_scan_results; /* no. of nan beacons scanned */ 11987 uint32 cnt_join_scan_rej; /* no. of join scans rejected */ 11988 uint32 cnt_nan_scan_abort; /* no. of join scans rejected */ 11989 /* enable/disable */ 11990 uint32 cnt_nan_enab; /* no. of times nan feature got enabled */ 11991 uint32 cnt_nan_disab; /* no. of times nan feature got disabled */ 11992 uint32 cnt_sync_bcn_rx; /* count of sync bcn rx within DW */ 11993 uint32 cnt_sync_bcn_rx_tu[3]; /* Delta bw the tsf in bcn & remote */ 11994 uint32 cnt_bcn_tx_out_dw; /* TX sync beacon outside dw */ 11995 uint32 cnt_role_am_dw; /* anchor master role due to dw */ 11996 uint32 cnt_am_hop_err; /* wrong hopcount set for AM */ 11997 } wl_nan_stats_t; 11998 11999 #define WL_NAN_MAC_MAX_NAN_PEERS 6 12000 #define WL_NAN_MAC_MAX_RSSI_DATA_PER_PEER 10 12001 12002 typedef struct wl_nan_nbr_rssi { 12003 uint8 rx_chan; /* channel number on which bcn rcvd */ 12004 uint8 PAD[3]; 12005 int32 rssi_raw; /* received rssi value */ 12006 int32 rssi_avg; /* normalized rssi value */ 12007 } wl_nan_peer_rssi_t; 12008 12009 typedef struct wl_nan_peer_rssi_entry { 12010 struct ether_addr mac; /* peer mac address */ 12011 uint8 flags; /* TODO:rssi data order: latest first, oldest first etc */ 12012 uint8 rssi_cnt; /* rssi data sample present */ 12013 wl_nan_peer_rssi_t rssi[WL_NAN_MAC_MAX_RSSI_DATA_PER_PEER]; /* RSSI data frm peer */ 12014 } wl_nan_peer_rssi_entry_t; 12015 12016 #define WL_NAN_PEER_RSSI 0x1 12017 #define WL_NAN_PEER_RSSI_LIST 0x2 12018 12019 typedef struct wl_nan_nbr_rssi_data { 12020 uint8 flags; /* this is a list or single rssi data */ 12021 uint8 peer_cnt; /* number of peers */ 12022 uint16 pad; /* padding */ 12023 wl_nan_peer_rssi_entry_t peers[1]; /* peers data list */ 12024 } wl_nan_peer_rssi_data_t; 12025 12026 /* WL_NAN_CMD_DBG_DUMP, GET Resp */ 12027 typedef struct wl_nan_dbg_dump_rsp { 12028 wl_nan_dbg_dump_type_t dump_type; /* dump data type */ 12029 uint8 pad[3]; 12030 union { 12031 wl_nan_peer_rssi_data_t peer_rssi; 12032 wl_nan_stats_t nan_stats; 12033 } u; 12034 } wl_nan_dbg_dump_rsp_t; 12035 12036 enum nan_termination_status { 12037 NAN_TERM_REASON_INVALID = 1, 12038 NAN_TERM_REASON_TIMEOUT = 2, 12039 NAN_TERM_REASON_USER_REQ = 3, 12040 NAN_TERM_REASON_FAILURE = 4, 12041 NAN_TERM_REASON_COUNT_REACHED = 5, 12042 NAN_TERM_REASON_DE_SHUTDOWN = 6, 12043 NAN_TERM_REASON_DISABLE_IN_PROGRESS = 7 12044 }; 12045 12046 /* nan2 data iovar */ 12047 /* nan2 qos */ 12048 typedef struct wl_nan_dp_qos 12049 { 12050 uint8 tid; 12051 uint8 pad; 12052 uint16 pkt_size; 12053 uint16 mean_rate; 12054 uint16 svc_interval; 12055 } wl_nan_dp_qos_t; 12056 12057 #define WL_NAN_NDL_QOS_MAX_LAT_NO_PREF 0xFFFF 12058 12059 /* nan2 qos */ 12060 typedef struct wl_nan_ndl_qos 12061 { 12062 uint8 min_slots; /* min slots per dw interval */ 12063 uint8 pad; 12064 uint16 max_latency; /* max latency */ 12065 } wl_nan_ndl_qos_t; 12066 12067 /* ndp config */ 12068 typedef struct wl_nan_ndp_config 12069 { 12070 uint8 ndp_id; 12071 uint8 pub_id; 12072 struct ether_addr pub_addr; 12073 struct ether_addr data_addr; /* configure local data addr */ 12074 struct ether_addr init_data_addr; /* initiator data addr */ 12075 uint8 svc_spec_info[WL_NAN_DATA_SVC_SPEC_INFO_LEN]; 12076 wl_nan_dp_qos_t qos; 12077 uint16 avail_len; 12078 uint8 pad[3]; 12079 uint8 data[1]; 12080 } wl_nan_ndp_config_t; 12081 12082 /* nan2 device capabilities */ 12083 typedef struct wl_nan_ndp_oper_cfg { 12084 uint8 awake_dw_2g; 12085 uint8 awake_dw_5g; 12086 uint8 bands_supported; 12087 uint8 op_mode; 12088 } wl_nan_ndp_oper_cfg_t; 12089 12090 typedef uint8 wl_nan_ndp_ndpid_t; 12091 typedef uint8 wl_nan_ndp_conn_t; 12092 12093 #define WL_NAN_INVALID_NDPID 0 /* reserved ndp id */ 12094 12095 typedef struct wl_nan_dp_req { 12096 uint8 type; /* 0- unicast 1 - multicast */ 12097 uint8 pub_id; /* Publisher ID */ 12098 uint16 flags; 12099 struct ether_addr peer_mac; /* Peer's NMI addr */ 12100 struct ether_addr mcast_mac; /* Multicast addr */ 12101 struct ether_addr ndi; 12102 wl_nan_dp_qos_t qos; 12103 wl_nan_ndl_qos_t ndl_qos; /* ndl qos */ 12104 uint8 tlv_params[]; /* xtlv parameters for command */ 12105 } wl_nan_dp_req_t; 12106 12107 /* TODO Need to replace ndp_id with lndp_id */ 12108 /* Return structure to data req IOVAR */ 12109 typedef struct wl_nan_dp_req_ret { 12110 struct ether_addr indi; /* Initiators data mac addr */ 12111 uint8 ndp_id; /* Initiators ndpid */ 12112 uint8 pad; 12113 } wl_nan_dp_req_ret_t; 12114 12115 typedef struct wl_nan_dp_resp { 12116 uint8 type; /* 0- unicast 1 - multicast */ 12117 uint8 status; /* Accepted or Rejected */ 12118 uint8 reason_code; 12119 /* Local NDP ID for unicast, mc_id for multicast, 0 for implicit NMSG */ 12120 uint8 ndp_id; /* can be host indp id also */ 12121 wl_nan_dp_qos_t qos; 12122 /* Initiator data address for unicast or multicast address for multicast */ 12123 struct ether_addr mac_addr; 12124 struct ether_addr ndi; 12125 uint16 flags; 12126 wl_nan_ndl_qos_t ndl_qos; /* ndl qos */ 12127 uint8 tlv_params[]; /* xtlv parameters for command */ 12128 } wl_nan_dp_resp_t; 12129 12130 /* Return structure to data resp IOVAR */ 12131 typedef struct wl_nan_dp_resp_ret { 12132 uint8 nmsgid; /* NMSG ID or for multicast else 0 */ 12133 uint8 pad[3]; 12134 } wl_nan_dp_resp_ret_t; 12135 12136 typedef struct wl_nan_dp_conf { 12137 uint8 lndp_id; /* can be host ndp id */ 12138 uint8 status; /* Accepted or Rejected */ 12139 uint8 pad[2]; 12140 } wl_nan_dp_conf_t; 12141 12142 typedef struct wl_nan_dp_end 12143 { 12144 uint8 lndp_id; /* can be host ndp id */ 12145 uint8 status; 12146 struct ether_addr mac_addr; /* initiator's ndi */ 12147 } wl_nan_dp_end_t; 12148 12149 typedef struct wl_nan_dp_schedupd { 12150 uint8 type; /* 0: unicast, 1: multicast */ 12151 uint8 flags; 12152 struct ether_addr addr; /* peer NMI or multicast addr */ 12153 wl_nan_dp_qos_t qos; 12154 wl_nan_ndl_qos_t ndl_qos; /* ndl qos */ 12155 uint8 map_id; 12156 uint8 pad; 12157 uint16 hostseq; 12158 } wl_nan_dp_schedupd_t; 12159 12160 /* set: update with notification, unset: NDL setup handshake */ 12161 #define WL_NAN_DP_SCHEDUPD_NOTIF (1 << 0) 12162 12163 /* list ndp ids */ 12164 typedef struct wl_nan_ndp_id_list { 12165 uint16 ndp_count; 12166 uint8 lndp_id[]; 12167 } wl_nan_ndp_id_list_t; 12168 12169 /* nan2 status */ 12170 typedef struct ndp_session { 12171 uint8 lndp_id; 12172 uint8 state; 12173 uint8 pub_id; 12174 uint8 pad; 12175 } ndp_session_t; 12176 12177 typedef struct wl_nan_ndp_status { 12178 struct ether_addr peer_nmi; 12179 struct ether_addr peer_ndi; 12180 ndp_session_t session; 12181 struct ether_addr lndi; 12182 uint8 pad[2]; 12183 } wl_nan_ndp_status_t; 12184 12185 #define NAN_DP_OPAQUE_INFO_DP_RESP 0x01 12186 #define NAN_DP_OPAQUE_INFO_DP_CONF 0x02 12187 12188 typedef struct wl_nan_dp_opaque_info { 12189 uint8 frm_mask; /* dp_resp / dp_conf as defined above. */ 12190 struct ether_addr initiator_ndi; /* NDI to match in the dp_req. */ 12191 uint8 pub_id; /* publish id where the opaque data is included. */ 12192 uint8 len; /* len of opaque_info[]. */ 12193 uint8 pad[3]; 12194 uint8 opaque_info[0]; 12195 } wl_nan_dp_opaque_info_t; 12196 12197 /* events */ 12198 #define NAN_DP_SESSION_UNICAST 0 12199 #define NAN_DP_SESSION_MULTICAST 1 12200 #define NAN_DP_SECURITY_NONE 0 12201 #define NAN_DP_SECURITY_CSID 1 12202 #define NAN_DP_SECURITY_MK 2 12203 #define WL_NAN_DATA_NMSGID_LEN 8 /* 8 bytes as per nan spec */ 12204 12205 /* Common event structure for Nan Datapath 12206 * Used for sending NDP Indication, Response, Confirmation, Securty Install and Establish events 12207 */ 12208 typedef struct wl_nan_ev_datapath_cmn { 12209 uint8 type; 12210 /* ndp_id is valid only if type is unicast */ 12211 uint8 ndp_id; 12212 uint8 pub_id; 12213 uint8 security; 12214 /* Following two fields are valid only if type is unicast */ 12215 struct ether_addr initiator_ndi; 12216 struct ether_addr responder_ndi; 12217 struct ether_addr peer_nmi; 12218 uint8 status; 12219 uint8 role; 12220 /* Following two fields are valid only if type is multicast */ 12221 uint8 nmsg_id[WL_NAN_DATA_NMSGID_LEN]; 12222 uint8 mc_id; 12223 uint8 pad; 12224 uint16 opt_tlv_len; 12225 uint8 opt_tlvs[]; 12226 } wl_nan_ev_datapath_cmn_t; 12227 12228 /* this is obsolete - DON'T USE */ 12229 typedef struct wl_nan_ev_datapath_end { 12230 uint8 ndp_id; 12231 uint8 status; 12232 uint8 pad[2]; 12233 struct ether_addr peer_nmi; 12234 struct ether_addr peer_ndi; 12235 } wl_nan_ev_datapath_end_t; 12236 12237 typedef struct wl_tsf { 12238 uint32 tsf_l; 12239 uint32 tsf_h; 12240 } wl_tsf_t; 12241 12242 typedef struct wl_nan_ev_rx_bcn { 12243 wl_tsf_t tsf; 12244 uint16 bcn_len; 12245 uint8 pad[2]; 12246 uint8 bcn[0]; 12247 } wl_nan_ev_rx_bcn_t; 12248 12249 /* reason of host assist request */ 12250 enum wl_nan_host_assist_reason { 12251 WL_NAN_HAST_REASON_NONE = 0, 12252 12253 /* reason for host assist request */ 12254 WL_NAN_HAST_REASON_NO_CRB = 1, /* NDL: no common NA */ 12255 WL_NAN_HAST_REASON_NDC = 2, /* NDL: NDC not compliant */ 12256 WL_NAN_HAST_REASON_IMMUT = 3, /* NDL: peer immutable schedule */ 12257 WL_NAN_HAST_REASON_RNG = 4, /* NDL: ranging schedule */ 12258 WL_NAN_HAST_REASON_QOS = 5, /* NDL: QoS not satisfied */ 12259 WL_NAN_HAST_REASON_SVC_NDI_MISSING = 6, /* SD: NDI associated with svc is missing */ 12260 WL_NAN_HAST_REASON_PEER_SCB_NORESOURCE = 7 /* NDP: no more peer scb available */ 12261 }; 12262 typedef uint8 wl_nan_host_assist_reason_t; 12263 12264 /* WL_NAN_XTLV_HOST_ASSIST_REQ */ 12265 typedef struct wl_nan_host_assist_req { 12266 struct ether_addr peer_nmi; /* peer nmi */ 12267 struct ether_addr initiator_ndi; /* initiator ndi */ 12268 uint8 indp_id; /* initiator NDP ID */ 12269 wl_nan_frame_type_t frm_type; /* received NAF type */ 12270 wl_nan_host_assist_reason_t reason; /* reason of host assist request */ 12271 uint8 pub_id; /* Publish ID (valid for WL_NAN_FRM_TYPE_DP_REQ) */ 12272 uint8 pad[2]; 12273 } wl_nan_host_assist_req_t; 12274 12275 /* nan sub-features */ 12276 enum wl_nan_fw_cap_flag1 { 12277 WL_NAN_FW_CAP_FLAG_NONE = 0x00000000, /* dummy */ 12278 WL_NAN_FW_CAP_FLAG1_AVAIL = 0x00000001, 12279 WL_NAN_FW_CAP_FLAG1_DISC = 0x00000002, 12280 WL_NAN_FW_CAP_FLAG1_DATA = 0x00000004, 12281 WL_NAN_FW_CAP_FLAG1_SEC = 0x00000008, 12282 WL_NAN_FW_CAP_FLAG1_RANGE = 0x00000010, 12283 WL_NAN_FW_CAP_FLAG1_WFA_TB = 0x00000020, 12284 WL_NAN_FW_CAP_FLAG1_DAM = 0x00000040, 12285 WL_NAN_FW_CAP_FLAG1_DAM_STRICT = 0x00000080, 12286 WL_NAN_FW_CAP_FLAG1_DAM_AUTO = 0x00000100, 12287 WL_NAN_FW_CAP_FLAG1_DBG = 0x00000200, 12288 WL_NAN_FW_CAP_FLAG1_BCMC_IN_NDC = 0x00000400, 12289 WL_NAN_FW_CAP_FLAG1_CHSTATS = 0x00000800, 12290 WL_NAN_FW_CAP_FLAG1_ASSOC_COEX = 0x00001000, 12291 WL_NAN_FW_CAP_FLAG1_FASTDISC = 0x00002000, 12292 WL_NAN_FW_CAP_FLAG1_NO_ID_GEN = 0x00004000, 12293 WL_NAN_FW_CAP_FLAG1_DP_OPAQUE_DATA = 0x00008000, 12294 WL_NAN_FW_CAP_FLAG1_NSR2 = 0x00010000, 12295 WL_NAN_FW_CAP_FLAG1_NSR2_SAVE = 0x00020000, 12296 WL_NAN_FW_CAP_FLAG1_NANHO = 0x00040000 12297 }; 12298 12299 /* WL_NAN_XTLV_GEN_FW_CAP */ 12300 typedef struct wl_nan_fw_cap { 12301 uint32 flags1; /* nan sub-features compiled in firmware */ 12302 uint32 flags2; /* for more sub-features in future */ 12303 uint8 max_svc_publishes; /* max num of service publish */ 12304 uint8 max_svc_subscribes; /* max num of service subscribe */ 12305 uint8 max_lcl_sched_maps; /* max num of local schedule map */ 12306 uint8 max_lcl_ndc_entries; /* max num of local NDC entry */ 12307 uint8 max_lcl_ndi_interfaces; /* max num of local NDI interface */ 12308 uint8 max_peer_entries; /* max num of peer entry */ 12309 uint8 max_ndp_sessions; /* max num of NDP session */ 12310 uint8 max_concurrent_nan_clusters; /* max num of concurrent clusters */ 12311 uint16 max_service_name_len; /* max service name length */ 12312 uint16 max_match_filter_len; /* max match filter length */ 12313 uint16 max_total_match_filter_len; /* max total match filter length */ 12314 uint16 max_service_specific_info_len; /* max service specific info length */ 12315 uint16 max_vsa_data_len; /* max vendor specific attrib data length */ 12316 uint16 max_mesh_data_len; /* max mesh data length */ 12317 uint16 max_app_info_len; /* max app info length */ 12318 uint16 max_sdea_svc_specific_info_len; /* max sdea ser specific info length */ 12319 uint8 max_queued_tx_followup_msgs; /* max no. of queued tx followup msgs */ 12320 uint8 max_subscribe_address; /* max subscribe addresses supported */ 12321 uint8 ndp_supported_bands; /* number of ndp supported bands */ 12322 uint8 is_ndp_security_supported; /* if secure ndp is supported */ 12323 uint8 cipher_suites_supported_mask; /* bitmask for suites supported */ 12324 uint8 pad[3]; 12325 } wl_nan_fw_cap_t; 12326 12327 /* WL_NAN_XTLV_GEN_FW_CAP_V2 */ 12328 typedef struct wl_nan_fw_cap_v2 { 12329 uint32 flags1; /* nan sub-features compiled in firmware */ 12330 uint32 flags2; /* for more sub-features in future */ 12331 uint8 max_svc_publishes; /* max num of service publish */ 12332 uint8 max_svc_subscribes; /* max num of service subscribe */ 12333 uint8 max_lcl_sched_maps; /* max num of local schedule map */ 12334 uint8 max_lcl_ndc_entries; /* max num of local NDC entry */ 12335 uint8 max_lcl_ndi_interfaces; /* max num of local NDI interface */ 12336 uint8 max_peer_entries; /* max num of peer entry */ 12337 uint8 max_peer_sched_maps; /* max num of peer schedule maps */ 12338 uint8 max_ndp_sessions; /* max num of NDP session */ 12339 uint32 cipher_suites_supported_mask; /* bitmask for supported cipher suites */ 12340 uint32 reserved_uint32_1; /* reserved for future sub-features */ 12341 uint32 reserved_uint32_2; /* reserved for future sub-features */ 12342 uint32 reserved_uint32_3; /* reserved for future sub-features */ 12343 uint32 reserved_uint32_4; /* reserved for future sub-features */ 12344 } wl_nan_fw_cap_v2_t; 12345 12346 /* nan cipher suite support mask bits */ 12347 #define WL_NAN_CIPHER_SUITE_SHARED_KEY_128_MASK 0x01 12348 #define WL_NAN_CIPHER_SUITE_SHARED_KEY_256_MASK 0x02 12349 12350 /* NAN Save Restore */ 12351 #define WL_NAN_NSR2_INFO_MAX_SIZE 2048 /* arbitrary */ 12352 12353 /* WL_NAN_XTLV_NSR2_PEER */ 12354 typedef struct wl_nan_nsr_peer_info { 12355 struct ether_addr nmi; 12356 uint8 l_min_slots; /* local QoS min slots */ 12357 uint8 p_min_slots; /* peer QoS min slots */ 12358 uint16 l_max_latency; /* local QoS max latency */ 12359 uint16 p_max_latency; /* peer QoS max latency */ 12360 uint8 num_map; /* num of NA map */ 12361 uint8 pad; 12362 uint16 attrs_len; /* total len of following attrs */ 12363 uint8 attrs[]; /* peer attributes (NA/NDC/ULW/DevCap/Element container) */ 12364 } wl_nan_nsr_peer_info_t; 12365 12366 enum wl_nan_nsr_ndp_flag { 12367 WL_NAN_NSR_NDP_FLAG_LCL_INITATOR = 0x0001, 12368 WL_NAN_NSR_NDP_FLAG_MCAST = 0x0002 12369 }; 12370 typedef uint16 wl_nan_nsr_ndp_flag_t; 12371 12372 /* WL_NAN_XTLV_NSR2_NDP */ 12373 typedef struct wl_nan_nsr_ndp_info { 12374 struct ether_addr peer_nmi; 12375 struct ether_addr peer_ndi; 12376 struct ether_addr lcl_ndi; 12377 uint16 flags; /* wl_nan_nsr_ndp_flag_t */ 12378 uint8 pub_id; /* publish id */ 12379 uint8 indp_id; /* initiator's ndp id */ 12380 uint8 last_token; /* last NDP dialog token */ 12381 uint8 pad; 12382 } wl_nan_nsr_ndp_info_t; 12383 12384 /* NAN2.0 Ranging definitions */ 12385 12386 /* result indication bit map */ 12387 #define NAN_RANGE_INDICATION_NONE 0 12388 #define NAN_RANGE_INDICATION_CONT (1<<0) 12389 #define NAN_RANGE_INDICATION_INGRESS (1<<1) 12390 #define NAN_RANGE_INDICATION_EGRESS (1<<2) 12391 12392 /* responder flags */ 12393 #define NAN_RANGE_FLAG_AUTO_ACCEPT (1 << 0) 12394 #define NAN_RANGE_FLAG_RESULT_REQUIRED (1 << 1) 12395 12396 typedef struct wl_nan_range_req { 12397 struct ether_addr peer; 12398 uint8 publisher_id; 12399 uint8 indication; /* bit map for result event */ 12400 uint32 resolution; /* default millimeters */ 12401 uint32 ingress; /* ingress limit in mm */ 12402 uint32 egress; /* egress limit in mm */ 12403 uint32 interval; /* max interval(in TU) b/w two ranging measurements */ 12404 } wl_nan_range_req_t; 12405 12406 #define NAN_RNG_REQ_IOV_LEN 24 12407 12408 typedef uint8 wl_nan_range_id; 12409 12410 typedef struct wl_nan_range_resp { 12411 wl_nan_range_id range_id; 12412 uint8 flags; /* auto response, range result required */ 12413 uint8 status; /* accept, reject */ 12414 uint8 indication; /* bit map for result event */ 12415 uint32 resolution; /* default millimeters */ 12416 uint32 ingress; /* ingress limit in mm */ 12417 uint32 egress; /* egress limit in mm */ 12418 uint32 interval; /* max interval(in TU) b/w two ranging measurements */ 12419 } wl_nan_range_resp_t; 12420 12421 #define NAN_RNG_RESP_IOV_LEN 20 12422 12423 #define NAN_RNG_TERM_FLAG_IMMEDIATE (1u << 0u) /* Do not wait for TXS */ 12424 #define NAN_RNG_TERM_FLAG_SILIENT_TEARDOWN (1u << 1u) /* Do not TX rng_term */ 12425 #define NAN_RNG_TERM_FLAG_EVENT_HOST (1u << 2u) /* Notify event to host */ 12426 #define NAN_RNG_TERM_FLAG_OPT_TLVS (1u << 3u) /* opt tlvs present */ 12427 12428 typedef struct wl_nan_range_cancel_ext { 12429 wl_nan_range_id range_id; 12430 uint8 flags; 12431 uint8 pad[2]; 12432 } wl_nan_range_cancel_ext_t; 12433 12434 #define NAN_RNG_CANCEL_IOV_FIXED_LEN 4u 12435 12436 #define NAN_RNG_MAX_IOV_LEN 255 12437 12438 typedef struct wl_nan_ev_rng_req_ind { 12439 struct ether_addr peer_m_addr; 12440 uint8 rng_id; 12441 /* ftm parameters */ 12442 uint8 max_burst_dur; 12443 uint8 min_ftm_delta; 12444 uint8 max_num_ftm; 12445 uint8 ftm_format_bw; 12446 /* location info availability bit map */ 12447 uint8 lc_info_avail; 12448 /* Last movement indication */ 12449 uint16 last_movement; 12450 uint8 pad[2]; 12451 } wl_nan_ev_rng_req_ind_t; 12452 12453 #define NAN_RNG_REQ_IND_SIZE 14 12454 12455 typedef struct wl_nan_ev_rng_rpt_ind { 12456 uint32 dist_mm; /* in millimeter */ 12457 struct ether_addr peer_m_addr; 12458 uint8 indication; /* indication definitions mentioned above */ 12459 uint8 rng_id; 12460 } wl_nan_ev_rng_rpt_ind_t; 12461 12462 #define NAN_RNG_RPT_IND_SIZE 12 12463 12464 /* number of continuous ranging crbs which can be idle, 12465 * after which ranging session will be terminated. 12466 * Default value is 5. Set to zero for disabling the 12467 * idle timeout functionality 12468 */ 12469 typedef uint8 wl_nan_range_idle_count_t; 12470 12471 /* nan ranging termination reason codes */ 12472 #define NAN_RNG_TERM_UNSPECIFIED 0 12473 #define NAN_RNG_TERM_IDLE_TIMEOUT 1u /* no ftms from peer */ 12474 #define NAN_RNG_TERM_PEER_REQ 2u 12475 #define NAN_RNG_TERM_USER_REQ 3u 12476 #define NAN_RNG_TERM_RNG_RESP_TIMEOUT 4u /* On FSM Timeout, waiting for Resp from peer */ 12477 #define NAN_RNG_TERM_RNG_RESP_REJ 5u /* On range resp, reject from peer */ 12478 #define NAN_RNG_TERM_RNG_TXS_FAIL 6u /* On range req/resp txs fail */ 12479 12480 typedef struct wl_nan_ev_rng_term_ind { 12481 struct ether_addr peer_m_addr; 12482 uint8 reason_code; 12483 uint8 rng_id; 12484 } wl_nan_ev_rng_term_ind_t; 12485 12486 #define NAN_RNG_TERM_IND_SIZE 8 12487 12488 typedef struct wl_nan_ev_rng_resp { 12489 struct ether_addr peer_m_addr; 12490 uint8 status; 12491 uint8 rng_id; 12492 } wl_nan_ev_rng_resp_t; 12493 12494 /* Used by NDL schedule events - 12495 * WL_NAN_EVENT_PEER_SCHED_UPD_NOTIF, WL_NAN_EVENT_PEER_SCHED_REQ 12496 * WL_NAN_EVENT_PEER_SCHED_RESP, WL_NAN_EVENT_PEER_SCHED_CONF 12497 */ 12498 typedef struct wl_nan_ev_sched_info { 12499 struct ether_addr peer_nmi; 12500 uint8 ndl_status; /* applies only to sched resp/conf */ 12501 uint8 pad; 12502 uint16 opt_tlv_len; 12503 uint8 opt_tlvs[]; 12504 } wl_nan_ev_sched_info_t; 12505 12506 /* WL_NAN_EVENT_CHAN_BOUNDARY */ 12507 typedef struct wl_nan_chbound_info { 12508 uint32 cluster_tsf_h; /* Current Cluster TSF High */ 12509 uint32 cluster_tsf_l; /* Current Cluster TSF Low */ 12510 uint16 cur_chspec; 12511 uint16 opt_tlvs_len; 12512 uint8 opt_tlvs[]; 12513 } wl_nan_chbound_info_t; 12514 12515 /* channel stats (includes nan & non-nan) */ 12516 12517 /* WL_NAN_XTLV_CCA_STATS */ 12518 typedef struct wl_nan_cca_stats { 12519 uint16 chanspec; 12520 uint8 pad[2]; 12521 uint32 sample_dur; 12522 12523 uint32 congest_ibss; 12524 uint32 congest_obss; 12525 uint32 interference; 12526 } wl_nan_cca_stats_t; 12527 12528 /* WL_NAN_XTLV_PER_STATS */ 12529 typedef struct wl_nan_per_stats_s { 12530 uint16 chanspec; 12531 uint8 pad[2]; 12532 uint32 sample_dur; 12533 12534 uint32 txframe; /* tx data frames */ 12535 uint32 txretrans; /* tx mac retransmits */ 12536 uint32 txerror; /* tx data errors */ 12537 uint32 txctl; /* tx management frames */ 12538 uint32 txserr; /* tx status errors */ 12539 12540 uint32 rxframe; /* rx data frames */ 12541 uint32 rxerror; /* rx data errors */ 12542 uint32 rxctl; /* rx management frames */ 12543 12544 uint32 txbar; /* tx bar */ 12545 uint32 rxbar; /* rx bar */ 12546 uint32 txaction; /* tx action frame */ 12547 uint32 rxaction; /* rx action frame */ 12548 uint32 txlost; /* lost packets reported in txs */ 12549 uint32 rxback; /* rx block ack */ 12550 uint32 txback; /* tx bloak ack */ 12551 } wl_nan_per_stats_t; 12552 12553 /* fast discovery beacon config 12554 * WL_NAN_XTLV_CFG_FDISC_TBMP 12555 */ 12556 typedef struct wl_nan_fastdisc_s { 12557 uint8 id; 12558 uint8 bitmap_len; 12559 uint8 pad[2]; 12560 uint8 bitmap[]; 12561 } wl_nan_fastdisc_t; 12562 12563 #define WL_NAN_FASTDISC_CFG_SIZE 1024 /* arbitrary */ 12564 12565 /* ********************* end of NAN section ******************************** */ 12566 /* endif WL_NAN */ 12567 12568 #define P2P_NAN_IOC_BUFSZ 512 /* some sufficient ioc buff size */ 12569 #define WL_P2P_NAN_IOCTL_VERSION 0x1 12570 12571 /* container for p2p nan iovtls & events */ 12572 typedef struct wl_p2p_nan_ioc { 12573 uint16 version; /* interface command or event version */ 12574 uint16 id; /* p2p nan ioctl cmd ID */ 12575 uint16 len; /* total length of data[] */ 12576 uint16 pad; /* padding */ 12577 uint8 data []; /* var len payload of bcm_xtlv_t type */ 12578 } wl_p2p_nan_ioc_t; 12579 12580 /* p2p nan cmd IDs */ 12581 enum wl_p2p_nan_cmds { 12582 /* p2p nan cfg ioctls */ 12583 WL_P2P_NAN_CMD_ENABLE = 1, 12584 WL_P2P_NAN_CMD_CONFIG = 2, 12585 WL_P2P_NAN_CMD_DEL_CONFIG = 3, 12586 WL_P2P_NAN_CMD_GET_INSTS = 4 12587 }; 12588 12589 #define WL_P2P_NAN_CONFIG_VERSION 1 12590 12591 #define WL_P2P_NAN_DEVICE_P2P 0x0 12592 #define WL_P2P_NAN_DEVICE_GO 0x1 12593 #define WL_P2P_NAN_DEVICE_GC 0x2 12594 #define WL_P2P_NAN_DEVICE_INVAL 0xFF 12595 12596 /* NAN P2P operation */ 12597 typedef struct p2p_nan_config { 12598 uint16 version; /* wl_p2p_nan_config_t structure version */ 12599 uint16 len; /* total length including version and variable IE */ 12600 uint32 flags; /* 0x1 to NEW, 0x2 to ADD, 0x4 to DEL */ 12601 uint8 inst_id; /* publisher/subscriber id */ 12602 uint8 inst_type; /* publisher/subscriber */ 12603 uint8 dev_role; /* P2P device role: 'P2P','GO' or 'GC' */ 12604 uint8 pad1; /* padding */ 12605 uint8 resolution; /* Availability bitmap resolution */ 12606 uint8 repeat; /* Whether Availabilty repeat across DW */ 12607 uint16 ie_len; /* variable ie len */ 12608 struct ether_addr dev_mac; /* P2P device addres */ 12609 uint16 pad2; /* Padding */ 12610 uint32 avail_bmap; /* availability interval bitmap */ 12611 uint32 chanspec; /* Chanspec */ 12612 uint8 ie[]; /* hex ie data */ 12613 } wl_p2p_nan_config_t; 12614 12615 #define WL_P2P_NAN_SERVICE_LIST_VERSION 1 12616 typedef enum wl_nan_service_type { 12617 WL_NAN_SVC_INST_PUBLISHER = 1, 12618 WL_NAN_SVC_INST_SUBSCRIBER = 2 12619 } wl_nan_service_type_t; 12620 12621 #define WL_P2P_NAN_CONFIG_NEW 0x1 12622 #define WL_P2P_NAN_CONFIG_ADD 0x2 12623 #define WL_P2P_NAN_CONFIG_DEL 0x4 12624 12625 typedef struct wl_nan_svc_inst { 12626 uint8 inst_id; /* publisher/subscriber id */ 12627 uint8 inst_type; /* publisher/subscriber */ 12628 } wl_nan_svc_inst_t; 12629 12630 typedef struct wl_nan_svc_inst_list { 12631 uint16 version; /* this structure version */ 12632 uint16 len; /* total length including version and variable svc list */ 12633 uint16 count; /* service instance count */ 12634 uint16 pad; /* padding */ 12635 wl_nan_svc_inst_t svc[1]; /* service instance list */ 12636 } wl_nan_svc_inst_list_t; 12637 12638 #define NAN_POST_DISC_P2P_DATA_VER 1 12639 /* This structure will be used send peer p2p data with 12640 * NAN discovery result 12641 */ 12642 typedef struct nan_post_disc_p2p_data { 12643 uint8 ver; /* this structure version */ 12644 uint8 dev_role; /* P2P Device role */ 12645 uint8 resolution; /* Availability bitmap resolution */ 12646 uint8 repeat; /* Whether Availabilty repeat across DW */ 12647 struct ether_addr dev_mac; /* P2P device addres */ 12648 uint16 pad1; /* Padding */ 12649 uint32 chanspec; /* Chanspec */ 12650 uint32 avl_bmp; /* availability interval bitmap */ 12651 } nan_post_disc_p2p_data_t; 12652 12653 enum { 12654 WL_AVAIL_NONE = 0x0000, 12655 WL_AVAIL_LOCAL = 0x0001, 12656 WL_AVAIL_PEER = 0x0002, 12657 WL_AVAIL_NDC = 0x0003, 12658 WL_AVAIL_IMMUTABLE = 0x0004, 12659 WL_AVAIL_RESPONSE = 0x0005, 12660 WL_AVAIL_COUNTER = 0x0006, 12661 WL_AVAIL_RANGING = 0x0007, 12662 WL_AVAIL_UPD_POT = 0x0008, /* modify potential, keep committed/conditional */ 12663 WL_AVAIL_UPD_COM_COND = 0x0009, /* modify committed/conditional, keep potential */ 12664 WL_AVAIL_REMOVE_MAP = 0x000A, /* remove map */ 12665 WL_AVAIL_FRM_TYPE = 0x000B, /* specify frame types containing NA */ 12666 WL_AVAIL_TYPE_MAX = WL_AVAIL_FRM_TYPE /* New ones before and update */ 12667 }; 12668 #define WL_AVAIL_TYPE_MASK 0x000F 12669 #define WL_AVAIL_FLAG_REMOVE 0x2000 /* remove schedule attr of given type & map id */ 12670 #define WL_AVAIL_FLAG_SELECTED_NDC 0x4000 12671 #define WL_AVAIL_FLAG_RAW_MODE 0x8000 12672 #define WL_AVAIL_FLAGS_MASK 0xFF00 12673 #define WL_AVAIL_FLAGS_SHIFT 8 12674 12675 typedef int16 wl_avail_flags_t; 12676 12677 /* availability entry flags */ 12678 enum { 12679 WL_AVAIL_ENTRY_NONE = 0x0000, 12680 WL_AVAIL_ENTRY_COM = 0x0001, /* committed */ 12681 WL_AVAIL_ENTRY_POT = 0x0002, /* potential */ 12682 WL_AVAIL_ENTRY_COND = 0x0004, /* conditional */ 12683 WL_AVAIL_ENTRY_PAGED = 0x0008, /* P-NDL */ 12684 WL_AVAIL_ENTRY_USAGE = 0x0030, /* usage preference */ 12685 WL_AVAIL_ENTRY_BIT_DUR = 0x00C0, /* bit duration */ 12686 WL_AVAIL_ENTRY_BAND_PRESENT = 0x0100, /* band present */ 12687 WL_AVAIL_ENTRY_CHAN_PRESENT = 0x0200, /* channel information present */ 12688 WL_AVAIL_ENTRY_CHAN_ENTRY_PRESENT = 0x0400, /* channel entry (opclass+bitmap) */ 12689 /* free to use 0x0800 */ 12690 WL_AVAIL_ENTRY_RXNSS = 0xF000 /* max num of spatial stream RX */ 12691 }; 12692 12693 /* bit duration */ 12694 enum { 12695 WL_AVAIL_BIT_DUR_16 = 0, /* 16TU */ 12696 WL_AVAIL_BIT_DUR_32 = 1, /* 32TU */ 12697 WL_AVAIL_BIT_DUR_64 = 2, /* 64TU */ 12698 WL_AVAIL_BIT_DUR_128 = 3, /* 128TU */ 12699 }; 12700 12701 /* period */ 12702 enum { 12703 WL_AVAIL_PERIOD_0 = 0, /* 0TU */ 12704 WL_AVAIL_PERIOD_128 = 1, /* 128TU */ 12705 WL_AVAIL_PERIOD_256 = 2, /* 256TU */ 12706 WL_AVAIL_PERIOD_512 = 3, /* 512TU */ 12707 WL_AVAIL_PERIOD_1024 = 4, /* 1024TU */ 12708 WL_AVAIL_PERIOD_2048 = 5, /* 2048TU */ 12709 WL_AVAIL_PERIOD_4096 = 6, /* 4096TU */ 12710 WL_AVAIL_PERIOD_8192 = 7, /* 8192TU */ 12711 }; 12712 12713 /* band */ 12714 enum { 12715 WL_AVAIL_BAND_NONE = 0, /* reserved */ 12716 WL_AVAIL_BAND_SUB1G = 1, /* sub-1 GHz */ 12717 WL_AVAIL_BAND_2G = 2, /* 2.4 GHz */ 12718 WL_AVAIL_BAND_3G = 3, /* reserved (for 3.6 GHz) */ 12719 WL_AVAIL_BAND_5G = 4, /* 4.9 and 5 GHz */ 12720 WL_AVAIL_BAND_60G = 5, /* reserved (for 60 GHz) */ 12721 }; 12722 12723 #define WL_AVAIL_ENTRY_TYPE_MASK 0x000F 12724 #define WL_AVAIL_ENTRY_USAGE_MASK 0x0030 /* up to 4 usage preferences */ 12725 #define WL_AVAIL_ENTRY_USAGE_SHIFT 4 12726 #define WL_AVAIL_ENTRY_USAGE_VAL(_flags) (((_flags) & WL_AVAIL_ENTRY_USAGE_MASK) \ 12727 >> WL_AVAIL_ENTRY_USAGE_SHIFT) 12728 12729 #define WL_AVAIL_ENTRY_BIT_DUR_MASK 0x00C0 /* 0:16TU, 1:32TU, 2:64TU, 3:128TU */ 12730 #define WL_AVAIL_ENTRY_BIT_DUR_SHIFT 6 12731 #define WL_AVAIL_ENTRY_BIT_DUR_VAL(_flags) (((_flags) & WL_AVAIL_ENTRY_BIT_DUR_MASK) \ 12732 >> WL_AVAIL_ENTRY_BIT_DUR_SHIFT) 12733 12734 #define WL_AVAIL_ENTRY_BAND_MASK 0x0100 /* 0=band not present, 1=present */ 12735 #define WL_AVAIL_ENTRY_BAND_SHIFT 8 12736 12737 #define WL_AVAIL_ENTRY_CHAN_MASK 0x0200 /* 0=channel info not present, 1=present */ 12738 #define WL_AVAIL_ENTRY_CHAN_SHIFT 9 12739 12740 #define WL_AVAIL_ENTRY_CHAN_ENTRY_MASK 0x0400 /* 0=chanspec, 1=hex channel entry */ 12741 #define WL_AVAIL_ENTRY_CHAN_ENTRY_SHIFT 10 12742 12743 #define WL_AVAIL_ENTRY_RXNSS_MASK 0xF000 12744 #define WL_AVAIL_ENTRY_RXNSS_SHIFT 12 12745 #define WL_AVAIL_ENTRY_RXNSS_VAL(_flags) (((_flags) & WL_AVAIL_ENTRY_RXNSS_MASK) \ 12746 >> WL_AVAIL_ENTRY_RXNSS_SHIFT) 12747 #define WL_AVAIL_ENTRY_RXNSS_MAX 15 /* 0-15 */ 12748 12749 /* mask for channel_entry (to be obsoleted) */ 12750 #define WL_AVAIL_ENTRY_OPCLASS_MASK 0xFF 12751 #define WL_AVAIL_ENTRY_CHAN_BITMAP_MASK 0xFF00 12752 #define WL_AVAIL_ENTRY_CHAN_BITMAP_SHIFT 8 12753 #define WL_AVAIL_ENTRY_CHAN_BITMAP_VAL(_info) (((_info) & WL_AVAIL_ENTRY_CHAN_BITMAP_MASK) \ 12754 >> WL_AVAIL_ENTRY_CHAN_BITMAP_SHIFT) 12755 12756 /* Used for raw channel entry field input */ 12757 #define MAX_CHAN_ENTRY_LEN 6 12758 12759 typedef struct wl_avail_entry { 12760 uint16 length; /* total length */ 12761 uint16 start_offset; /* in TUs, multiply by 16 for total offset */ 12762 union { 12763 uint32 channel_info; /* either chanspec or hex channel entry (opclass + 12764 * bitmap per NAN spec), as indicated by setting 12765 * WL_AVAIL_ENTRY_HEX_CHAN_ENTRY flag 12766 */ 12767 uint32 band; /* defined by WL_BAND enum, 2=2.4GHz, 4=5GHz */ 12768 uint8 channel_entry[MAX_CHAN_ENTRY_LEN]; 12769 uint8 align[8]; /* aligned len of union in structure (not for use) 12770 * if member of union is changed, 12771 * update length of align[] accordingly. 12772 */ 12773 } u; /* band or channel value, 0=all band/channels */ 12774 uint8 sched_map_id; /* avail map id associated with sched entry */ 12775 uint8 pad; 12776 uint8 period; /* in TUs, defined by WL_AVAIL_PERIOD enum 12777 * 1:128, 2:256, 3:512, 4:1024, 5:2048, 6:4096, 12778 * 7:8192 12779 */ 12780 uint8 bitmap_len; 12781 uint16 flags; /* defined by avail entry flags enum: 12782 * type, usage pref, bit duration, rx nss, 12783 * and band, channel or channel entry 12784 */ 12785 uint8 bitmap[]; /* time bitmap */ 12786 } wl_avail_entry_t; 12787 12788 #define WL_AVAIL_VERSION 1 /* current wl_avail version */ 12789 12790 typedef struct wl_avail { 12791 uint16 length; /* total length */ 12792 uint16 flags; /* LSB - avail type (defined by WL_AVAIL enum) 12793 * MSB - avail flags 12794 */ 12795 uint8 id; /* id used for multiple maps/avail */ 12796 uint8 lndc_id; /* ndc id used in multi-ndc case */ 12797 uint8 version; 12798 uint8 pad; 12799 struct ether_addr addr; /* peer mac address or ndc id */ 12800 uint8 num_entries; 12801 uint8 unused_byte; 12802 /* add additional fields above this line */ 12803 uint8 entry[]; 12804 } wl_avail_t; 12805 12806 #define WL_AVAIL_MIN_LEN(n) ((n) ? OFFSETOF(wl_avail_t, entry) + \ 12807 ((n) * OFFSETOF(wl_avail_entry_t, bitmap)) : 0) 12808 12809 /* unaligned schedule (window) */ 12810 typedef struct wl_avail_ulw { 12811 uint8 id; /* schedule ID */ 12812 uint8 overwrite; /* bit 0: overwrite all 12813 * 1-4: map ID if overwrite all is 0 12814 */ 12815 uint16 flags; 12816 uint32 start; /* start time of first ULW, in us */ 12817 uint32 dur; /* duration of ULW, in us */ 12818 uint32 period; /* time between consecutive ULWs, in us */ 12819 union { 12820 uint32 chanspec; 12821 uint32 band; 12822 uint8 chan_entry[MAX_CHAN_ENTRY_LEN]; 12823 uint8 pad[8]; 12824 } u; 12825 uint8 cntdwn; /* remaining ULWs before schedule ends */ 12826 uint8 pad[3]; 12827 } wl_avail_ulw_t; 12828 12829 /* unset: NAN is not available during ULW, set: NAN is avail depending on ctrl flags */ 12830 #define WL_NAN_ULW_CTRL_PRESENT (1 << 0) 12831 /* unset: band, set: channel */ 12832 #define WL_NAN_ULW_CTRL_TYPE (1 << 1) 12833 /* set: NAN is availabile on specified band/channel */ 12834 #define WL_NAN_ULW_CTRL_AVAIL (1 << 2) 12835 /* channel is provided in raw attribute format */ 12836 #define WL_NAN_ULW_CTRL_RAW_CHAN (1 << 3) 12837 12838 /* nan wfa testmode operations */ 12839 enum { 12840 WL_NAN_WFA_TM_IGNORE_TERMINATE_NAF = 0x00000001, 12841 WL_NAN_WFA_TM_IGNORE_RX_DATA_OUTSIDE_CRB = 0x00000002, 12842 WL_NAN_WFA_TM_ALLOW_TX_DATA_OUTSIDE_CRB = 0x00000004, 12843 WL_NAN_WFA_TM_ENFORCE_NDL_COUNTER = 0x00000008, 12844 WL_NAN_WFA_TM_BYPASS_NDL_PROPOSAL_VALIDATION = 0x00000010, 12845 /* allow data(pings) tx while ndp sec negotiation */ 12846 WL_NAN_WFA_TM_SEC_SEND_PINGS_BYPASS_NDP_SM = 0x00000020, 12847 /* generate and insert incorrect mic */ 12848 WL_NAN_WFA_TM_SEC_INCORRECT_MIC = 0x00000040, 12849 /* send m4 reject deliberately */ 12850 WL_NAN_WFA_TM_SEC_REJECT_STATUS4M4 = 0x00000080, 12851 /* send mgmt frame (for eg. ndp terminate) in clear txt (bypass security) */ 12852 WL_NAN_WFA_TM_SEC_SEND_MGMT_CLEAR = 0x00000100, 12853 /* validate qos */ 12854 WL_NAN_WFA_TM_NDL_QOS_VALIDATE = 0x00000200, 12855 /* firmware generated schedule update */ 12856 WL_NAN_WFA_TM_GEN_SCHED_UPD = 0x00000400, 12857 /* add lower 4-bytes of TSF to configured start time */ 12858 WL_NAN_WFA_TM_ULW_START_TIME = 0x00000800, 12859 /* enable schedule validation for SDF */ 12860 WL_NAN_WFA_TM_SDF_SCHED_VALIDATE = 0x00001000, 12861 /* by pass faw na iovar */ 12862 WL_NAN_WFA_TM_SKIP_RAW_NA_BLOB = 0x00002000, 12863 /* overwrite local NA with peer NA in received frame */ 12864 WL_NAN_WFA_TM_LOCAL_NA_OVERWRITE = 0x00004000, 12865 /* randomize and self configure ndl qos(needed at responder in auto mode) */ 12866 WL_NAN_WFA_TM_SELF_CFG_NDL_QOS = 0x00008000, 12867 /* send NAF frames only in DW */ 12868 WL_NAN_WFA_TM_SEND_NAF_IN_DW = 0x00010000, 12869 /* restrict channels used for countered slots to Ch 6/149 only */ 12870 WL_NAN_WFA_TM_RESTRICT_COUNTER_SLOTS_CHAN = 0x00020000, 12871 /* NDPE negative test case (4.2.5 & 4.2.6) */ 12872 WL_NAN_WFA_TM_NDPE_NEGATIVE_TEST_TB = 0x00040000, 12873 /* Set NDPE(NAN3.0) capable bit in dev cap attr */ 12874 WL_NAN_WFA_TM_ENABLE_NDPE_CAP = 0x00080000, 12875 /* NDPE negative test case (4.2.5.2). Enable both NDP and NDPE attributes */ 12876 WL_NAN_WFA_TM_ENABLE_NDP_NDPE_ATTR = 0x00100000, 12877 12878 /* add above & update mask */ 12879 WL_NAN_WFA_TM_FLAG_MASK = 0x001FFFFF 12880 }; 12881 typedef uint32 wl_nan_wfa_testmode_t; 12882 12883 /* To be removed; replaced by wl_nan_vndr_payload */ 12884 typedef struct wl_nan_vndr_ie { 12885 uint32 flags; /* bitmask indicating which packet(s) contain this IE */ 12886 uint16 body_len; /* length of body (does not include oui field) */ 12887 uint8 pad[2]; 12888 uint8 oui[DOT11_OUI_LEN]; 12889 uint8 pad2; 12890 uint8 body[]; /* vendor IE payload */ 12891 } wl_nan_vndr_ie_t; 12892 12893 typedef struct wl_nan_vndr_payload { 12894 uint32 flags; /* bitmask indicating which packet(s) contain payload */ 12895 uint16 payload_len; /* length of payload */ 12896 uint8 pad[2]; 12897 uint8 payload[]; /* payload to be appended to NAN frame */ 12898 } wl_nan_vndr_payload_t; 12899 12900 typedef struct wl_nan_dev_cap { 12901 uint8 bands[NAN_MAX_BANDS]; 12902 uint8 awake_dw[NAN_MAX_BANDS]; 12903 uint8 overwrite_mapid[NAN_MAX_BANDS]; 12904 uint8 mapid; /* dev cap mapid */ 12905 uint8 all_maps; /* applies to device */ 12906 uint8 paging; 12907 uint8 pad[3]; 12908 } wl_nan_dev_cap_t; 12909 12910 /* arbitrary max len for frame template */ 12911 #define WL_NAN_FRM_TPLT_MAX_LEN 1024 12912 12913 typedef struct wl_nan_frm_tplt { 12914 wl_nan_frame_type_t type; 12915 uint8 pad; 12916 uint16 len; /* length of template */ 12917 uint8 data[]; /* template */ 12918 } wl_nan_frm_tplt_t; 12919 12920 #define RSSI_THRESHOLD_SIZE 16 12921 #define MAX_IMP_RESP_SIZE 256 12922 12923 typedef struct wl_proxd_rssi_bias { 12924 int32 version; /**< version */ 12925 int32 threshold[RSSI_THRESHOLD_SIZE]; /**< threshold */ 12926 int32 peak_offset; /**< peak offset */ 12927 int32 bias; /**< rssi bias */ 12928 int32 gd_delta; /**< GD - GD_ADJ */ 12929 int32 imp_resp[MAX_IMP_RESP_SIZE]; /**< (Hi*Hi)+(Hr*Hr) */ 12930 } wl_proxd_rssi_bias_t; 12931 12932 typedef struct wl_proxd_rssi_bias_avg { 12933 int32 avg_threshold[RSSI_THRESHOLD_SIZE]; /**< avg threshold */ 12934 int32 avg_peak_offset; /**< avg peak offset */ 12935 int32 avg_rssi; /**< avg rssi */ 12936 int32 avg_bias; /**< avg bias */ 12937 } wl_proxd_rssi_bias_avg_t; 12938 12939 #include <packed_section_start.h> 12940 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_info { 12941 uint16 type; /**< type: 0 channel table, 1 channel smoothing table, 2 and 3 seq */ 12942 uint16 index; /**< The current frame index, from 1 to total_frames. */ 12943 uint16 tof_cmd; /**< M_TOF_CMD */ 12944 uint16 tof_rsp; /**< M_TOF_RSP */ 12945 uint16 tof_avb_rxl; /**< M_TOF_AVB_RX_L */ 12946 uint16 tof_avb_rxh; /**< M_TOF_AVB_RX_H */ 12947 uint16 tof_avb_txl; /**< M_TOF_AVB_TX_L */ 12948 uint16 tof_avb_txh; /**< M_TOF_AVB_TX_H */ 12949 uint16 tof_id; /**< M_TOF_ID */ 12950 uint8 tof_frame_type; 12951 uint8 tof_frame_bw; 12952 int8 tof_rssi; 12953 int32 tof_cfo; 12954 int32 gd_adj_ns; /**< gound delay */ 12955 int32 gd_h_adj_ns; /**< group delay + threshold crossing */ 12956 int16 nfft; /**< number of samples stored in H */ 12957 uint8 num_max_cores; 12958 12959 } BWL_POST_PACKED_STRUCT wl_proxd_collect_info_t; 12960 #include <packed_section_end.h> 12961 12962 #define K_TOF_COLLECT_H_PAD 1 12963 #define K_TOF_COLLECT_SC_20MHZ (64) 12964 /* Maximum possible size of sample capture */ 12965 #define K_TOF_COLLECT_SC_80MHZ (2*K_TOF_COLLECT_SC_20MHZ) 12966 /* Maximum possible size of channel dump */ 12967 #define K_TOF_COLLECT_CHAN_SIZE (2*K_TOF_COLLECT_SC_80MHZ) 12968 12969 /* 12970 A few extra samples are required to estimate frequency offset 12971 Right now 16 samples are being used. Can be changed in future. 12972 */ 12973 #define K_TOF_COLLECT_SAMP_SIZE_20MHZ (2*(K_TOF_COLLECT_SC_20MHZ)+16+K_TOF_COLLECT_H_PAD) 12974 #define K_TOF_COLLECT_RAW_SAMP_SIZE_20MHZ (2*K_TOF_COLLECT_SAMP_SIZE_20MHZ) 12975 #define K_TOF_COLLECT_H_SIZE_20MHZ (K_TOF_COLLECT_SAMP_SIZE_20MHZ) 12976 #define K_TOF_COLLECT_HRAW_SIZE_20MHZ (K_TOF_COLLECT_RAW_SAMP_SIZE_20MHZ) 12977 12978 #define K_TOF_COLLECT_SAMP_SIZE_80MHZ (2*(K_TOF_COLLECT_SC_80MHZ)+16+K_TOF_COLLECT_H_PAD) 12979 #define K_TOF_COLLECT_RAW_SAMP_SIZE_80MHZ (2*K_TOF_COLLECT_SAMP_SIZE_80MHZ) 12980 #define K_TOF_COLLECT_H_SIZE_80MHZ (K_TOF_COLLECT_SAMP_SIZE_80MHZ) 12981 #define K_TOF_COLLECT_HRAW_SIZE_80MHZ (K_TOF_COLLECT_RAW_SAMP_SIZE_80MHZ) 12982 12983 #define WL_PROXD_COLLECT_DATA_VERSION_1 1 12984 #include <packed_section_start.h> 12985 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_data_v1 { 12986 wl_proxd_collect_info_t info; 12987 uint8 ri_rr[FTM_TPK_RI_RR_LEN]; 12988 /**< raw data read from phy used to adjust timestamps */ 12989 uint32 H[K_TOF_COLLECT_H_SIZE_20MHZ]; 12990 } BWL_POST_PACKED_STRUCT wl_proxd_collect_data_t_v1; 12991 #include <packed_section_end.h> 12992 12993 #define WL_PROXD_COLLECT_DATA_VERSION_2 2 12994 #include <packed_section_start.h> 12995 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_data_v2 { 12996 wl_proxd_collect_info_t info; 12997 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 12998 /**< raw data read from phy used to adjust timestamps */ 12999 uint32 H[K_TOF_COLLECT_H_SIZE_20MHZ]; 13000 } BWL_POST_PACKED_STRUCT wl_proxd_collect_data_t_v2; 13001 #include <packed_section_end.h> 13002 13003 #define WL_PROXD_COLLECT_DATA_VERSION_3 3 13004 typedef struct wl_proxd_collect_data_v3 { 13005 uint16 version; 13006 uint16 len; 13007 wl_proxd_collect_info_t info; 13008 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 13009 /**< raw data read from phy used to adjust timestamps */ 13010 uint32 H[K_TOF_COLLECT_H_SIZE_20MHZ]; 13011 uint32 chan[4 * K_TOF_COLLECT_CHAN_SIZE]; 13012 } wl_proxd_collect_data_t_v3; 13013 #define WL_PROXD_COLLECT_DATA_VERSION_MAX WL_PROXD_COLLECT_DATA_VERSION_3 13014 13015 typedef struct wl_proxd_debug_data { 13016 uint8 count; /**< number of packets */ 13017 uint8 stage; /**< state machone stage */ 13018 uint8 received; /**< received or txed */ 13019 uint8 paket_type; /**< packet type */ 13020 uint8 category; /**< category field */ 13021 uint8 action; /**< action field */ 13022 uint8 token; /**< token number */ 13023 uint8 follow_token; /**< following token number */ 13024 uint16 index; /**< index of the packet */ 13025 uint16 tof_cmd; /**< M_TOF_CMD */ 13026 uint16 tof_rsp; /**< M_TOF_RSP */ 13027 uint16 tof_avb_rxl; /**< M_TOF_AVB_RX_L */ 13028 uint16 tof_avb_rxh; /**< M_TOF_AVB_RX_H */ 13029 uint16 tof_avb_txl; /**< M_TOF_AVB_TX_L */ 13030 uint16 tof_avb_txh; /**< M_TOF_AVB_TX_H */ 13031 uint16 tof_id; /**< M_TOF_ID */ 13032 uint16 tof_status0; /**< M_TOF_STATUS_0 */ 13033 uint16 tof_status2; /**< M_TOF_STATUS_2 */ 13034 uint16 tof_chsm0; /**< M_TOF_CHNSM_0 */ 13035 uint16 tof_phyctl0; /**< M_TOF_PHYCTL0 */ 13036 uint16 tof_phyctl1; /**< M_TOF_PHYCTL1 */ 13037 uint16 tof_phyctl2; /**< M_TOF_PHYCTL2 */ 13038 uint16 tof_lsig; /**< M_TOF_LSIG */ 13039 uint16 tof_vhta0; /**< M_TOF_VHTA0 */ 13040 uint16 tof_vhta1; /**< M_TOF_VHTA1 */ 13041 uint16 tof_vhta2; /**< M_TOF_VHTA2 */ 13042 uint16 tof_vhtb0; /**< M_TOF_VHTB0 */ 13043 uint16 tof_vhtb1; /**< M_TOF_VHTB1 */ 13044 uint16 tof_apmductl; /**< M_TOF_AMPDU_CTL */ 13045 uint16 tof_apmdudlim; /**< M_TOF_AMPDU_DLIM */ 13046 uint16 tof_apmdulen; /**< M_TOF_AMPDU_LEN */ 13047 } wl_proxd_debug_data_t; 13048 13049 /** version of the wl_wsec_info structure */ 13050 #define WL_WSEC_INFO_VERSION 0x01 13051 13052 /** start enum value for BSS properties */ 13053 #define WL_WSEC_INFO_BSS_BASE 0x0100 13054 13055 /** size of len and type fields of wl_wsec_info_tlv_t struct */ 13056 #define WL_WSEC_INFO_TLV_HDR_LEN OFFSETOF(wl_wsec_info_tlv_t, data) 13057 13058 /** Allowed wl_wsec_info properties; not all of them may be supported. */ 13059 typedef enum { 13060 WL_WSEC_INFO_NONE = 0, 13061 WL_WSEC_INFO_MAX_KEYS = 1, 13062 WL_WSEC_INFO_NUM_KEYS = 2, 13063 WL_WSEC_INFO_NUM_HW_KEYS = 3, 13064 WL_WSEC_INFO_MAX_KEY_IDX = 4, 13065 WL_WSEC_INFO_NUM_REPLAY_CNTRS = 5, 13066 WL_WSEC_INFO_SUPPORTED_ALGOS = 6, 13067 WL_WSEC_INFO_MAX_KEY_LEN = 7, 13068 WL_WSEC_INFO_FLAGS = 8, 13069 /* add global/per-wlc properties above */ 13070 WL_WSEC_INFO_BSS_FLAGS = (WL_WSEC_INFO_BSS_BASE + 1), 13071 WL_WSEC_INFO_BSS_WSEC = (WL_WSEC_INFO_BSS_BASE + 2), 13072 WL_WSEC_INFO_BSS_TX_KEY_ID = (WL_WSEC_INFO_BSS_BASE + 3), 13073 WL_WSEC_INFO_BSS_ALGO = (WL_WSEC_INFO_BSS_BASE + 4), 13074 WL_WSEC_INFO_BSS_KEY_LEN = (WL_WSEC_INFO_BSS_BASE + 5), 13075 WL_WSEC_INFO_BSS_ALGOS = (WL_WSEC_INFO_BSS_BASE + 6), 13076 WL_WSEC_INFO_BSS_WPA_AP_RESTRICT = (WL_WSEC_INFO_BSS_BASE + 7), 13077 /* add per-BSS properties above */ 13078 WL_WSEC_INFO_MAX = 0xffff 13079 } wl_wsec_info_type_t; 13080 13081 typedef struct { 13082 uint32 algos; /* set algos to be enabled/disabled */ 13083 uint32 mask; /* algos outside mask unaltered */ 13084 } wl_wsec_info_algos_t; 13085 13086 /** tlv used to return wl_wsec_info properties */ 13087 typedef struct { 13088 uint16 type; 13089 uint16 len; /**< data length */ 13090 uint8 data[1]; /**< data follows */ 13091 } wl_wsec_info_tlv_t; 13092 13093 /** input/output data type for wsec_info iovar */ 13094 typedef struct wl_wsec_info { 13095 uint8 version; /**< structure version */ 13096 uint8 pad[2]; 13097 uint8 num_tlvs; 13098 wl_wsec_info_tlv_t tlvs[1]; /**< tlv data follows */ 13099 } wl_wsec_info_t; 13100 #define AP_BLOCK_NONE 0x0000 /* default: No restriction */ 13101 #define AP_ALLOW_WPA2 0x0001 /* allow WPA2PSK AP */ 13102 #define AP_ALLOW_TSN 0x0002 /* WPA3 transition AP */ 13103 #define AP_ALLOW_WPA3_ONLY 0x0004 /* WPA3 only AP */ 13104 #define AP_ALLOW_MAX (AP_ALLOW_WPA2 | AP_ALLOW_TSN | \ 13105 AP_ALLOW_WPA3_ONLY) 13106 typedef struct { 13107 uint32 wpa_ap_restrict; /* set WPA2 / WPA3 AP restriction policy */ 13108 } wl_wsec_info_wpa_ap_restrict_t; 13109 13110 /* 13111 * randmac definitions 13112 */ 13113 #define WL_RANDMAC_MODULE "randmac" 13114 #define WL_RANDMAC_API_VERSION 0x0100 /**< version 1.0 */ 13115 #define WL_RANDMAC_API_MIN_VERSION 0x0100 /**< version 1.0 */ 13116 13117 /** subcommands that can apply to randmac */ 13118 enum { 13119 WL_RANDMAC_SUBCMD_NONE = 0, 13120 WL_RANDMAC_SUBCMD_GET_VERSION = 1, 13121 WL_RANDMAC_SUBCMD_ENABLE = 2, 13122 WL_RANDMAC_SUBCMD_DISABLE = 3, 13123 WL_RANDMAC_SUBCMD_CONFIG = 4, 13124 WL_RANDMAC_SUBCMD_STATS = 5, 13125 WL_RANDMAC_SUBCMD_CLEAR_STATS = 6, 13126 13127 WL_RANDMAC_SUBCMD_MAX 13128 }; 13129 typedef int16 wl_randmac_subcmd_t; 13130 13131 /* Common IOVAR struct */ 13132 typedef struct wl_randmac { 13133 uint16 version; 13134 uint16 len; /* total length */ 13135 wl_randmac_subcmd_t subcmd_id; /* subcommand id */ 13136 uint8 data[0]; /* subcommand data */ 13137 } wl_randmac_t; 13138 13139 #define WL_RANDMAC_IOV_HDR_SIZE OFFSETOF(wl_randmac_t, data) 13140 13141 /* randmac version subcommand */ 13142 typedef struct wl_randmac_version { 13143 uint16 version; /* Randmac method version info */ 13144 uint8 pad[2]; /* Align on 4 byte boundary */ 13145 } wl_randmac_version_t; 13146 13147 /* 13148 * Bitmask for methods supporting MAC randomization feature 13149 */ 13150 #define WL_RANDMAC_USER_NONE 0x0000 13151 #define WL_RANDMAC_USER_FTM 0x0001 13152 #define WL_RANDMAC_USER_NAN 0x0002 13153 #define WL_RANDMAC_USER_SCAN 0x0004 13154 #define WL_RANDMAC_USER_ANQP 0x0008 13155 #define WL_RANDMAC_USER_ALL 0xFFFF 13156 typedef uint16 wl_randmac_method_t; 13157 13158 enum { 13159 WL_RANDMAC_FLAGS_NONE = 0x00, 13160 WL_RANDMAC_FLAGS_ADDR = 0x01, 13161 WL_RANDMAC_FLAGS_MASK = 0x02, 13162 WL_RANDMAC_FLAGS_METHOD = 0x04, 13163 WL_RANDMAC_FLAGS_ALL = 0xFF 13164 }; 13165 typedef uint8 wl_randmac_flags_t; 13166 13167 /* randmac statistics subcommand */ 13168 typedef struct wl_randmac_stats { 13169 uint32 set_ok; /* Set random addr success count */ 13170 uint32 set_fail; /* Set random addr failed count */ 13171 uint32 set_reqs; /* Set random addr count */ 13172 uint32 reset_reqs; /* Restore random addr count */ 13173 uint32 restore_ok; /* Restore random addr succes count */ 13174 uint32 restore_fail; /* Restore random addr failed count */ 13175 uint32 events_sent; /* randmac module events count */ 13176 uint32 events_rcvd; /* randmac events received count */ 13177 } wl_randmac_stats_t; 13178 13179 /* randmac config subcommand */ 13180 typedef struct wl_randmac_config { 13181 struct ether_addr addr; /* Randomized MAC address */ 13182 struct ether_addr addr_mask; /* bitmask for randomization */ 13183 wl_randmac_method_t method; /* Enabled methods */ 13184 wl_randmac_flags_t flags; /* What config info changed */ 13185 uint8 PAD; 13186 } wl_randmac_config_t; 13187 13188 enum { 13189 WL_RANDMAC_EVENT_NONE = 0, /**< not an event, reserved */ 13190 WL_RANDMAC_EVENT_BSSCFG_ADDR_SET = 1, /* bsscfg addr randomized */ 13191 WL_RANDMAC_EVENT_BSSCFG_ADDR_RESTORE = 2, /* bsscfg addr restored */ 13192 WL_RANDMAC_EVENT_ENABLED = 3, /* randmac module enabled */ 13193 WL_RANDMAC_EVENT_DISABLE = 4, /* randmac module disabled */ 13194 WL_RANDMAC_EVENT_BSSCFG_STATUS = 5, /* bsscfg enable/disable */ 13195 13196 WL_RANDMAC_EVENT_MAX 13197 }; 13198 typedef int16 wl_randmac_event_type_t; 13199 typedef int32 wl_randmac_status_t; 13200 typedef uint32 wl_randmac_event_mask_t; 13201 13202 #define WL_RANDMAC_EVENT_MASK_ALL 0xfffffffe 13203 #define WL_RANDMAC_EVENT_MASK_EVENT(_event_type) (1 << (_event_type)) 13204 #define WL_RANDMAC_EVENT_ENABLED(_mask, _event_type) (\ 13205 ((_mask) & WL_RANDMAC_EVENT_MASK_EVENT(_event_type)) != 0) 13206 13207 /** tlv IDs - data length 4 bytes unless overridden by type, alignment 32 bits */ 13208 enum { 13209 WL_RANDMAC_TLV_NONE = 0, 13210 WL_RANDMAC_TLV_METHOD = 1, 13211 WL_RANDMAC_TLV_ADDR = 2, 13212 WL_RANDMAC_TLV_MASK = 3 13213 }; 13214 typedef uint16 wl_randmac_tlv_id_t; 13215 13216 typedef struct wl_randmac_tlv { 13217 wl_randmac_tlv_id_t id; 13218 uint16 len; /* Length of variable */ 13219 uint8 data[1]; 13220 } wl_randmac_tlv_t; 13221 13222 /** randmac event */ 13223 typedef struct wl_randmac_event { 13224 uint16 version; 13225 uint16 len; /* Length of all variables */ 13226 wl_randmac_event_type_t type; 13227 wl_randmac_method_t method; 13228 uint8 pad[2]; 13229 wl_randmac_tlv_t tlvs[1]; /**< variable */ 13230 } wl_randmac_event_t; 13231 13232 /* 13233 * scan MAC definitions 13234 */ 13235 13236 /** common iovar struct */ 13237 typedef struct wl_scanmac { 13238 uint16 subcmd_id; /**< subcommand id */ 13239 uint16 len; /**< total length of data[] */ 13240 uint8 data[]; /**< subcommand data */ 13241 } wl_scanmac_t; 13242 13243 /* subcommand ids */ 13244 #define WL_SCANMAC_SUBCMD_ENABLE 0 13245 #define WL_SCANMAC_SUBCMD_BSSCFG 1 /**< only GET supported */ 13246 #define WL_SCANMAC_SUBCMD_CONFIG 2 13247 13248 /** scanmac enable data struct */ 13249 typedef struct wl_scanmac_enable { 13250 uint8 enable; /**< 1 - enable, 0 - disable */ 13251 uint8 pad[3]; /**< 4-byte struct alignment */ 13252 } wl_scanmac_enable_t; 13253 13254 /** scanmac bsscfg data struct */ 13255 typedef struct wl_scanmac_bsscfg { 13256 uint32 bsscfg; /**< bsscfg index */ 13257 } wl_scanmac_bsscfg_t; 13258 13259 /** scanmac config data struct */ 13260 typedef struct wl_scanmac_config { 13261 struct ether_addr mac; /**< 6 bytes of MAC address or MAC prefix (i.e. OUI) */ 13262 struct ether_addr random_mask; /**< randomized bits on each scan */ 13263 uint16 scan_bitmap; /**< scans to use this MAC address */ 13264 uint8 pad[2]; /**< 4-byte struct alignment */ 13265 } wl_scanmac_config_t; 13266 13267 /* scan bitmap */ 13268 #define WL_SCANMAC_SCAN_UNASSOC (0x01 << 0) /**< unassociated scans */ 13269 #define WL_SCANMAC_SCAN_ASSOC_ROAM (0x01 << 1) /**< associated roam scans */ 13270 #define WL_SCANMAC_SCAN_ASSOC_PNO (0x01 << 2) /**< associated PNO scans */ 13271 #define WL_SCANMAC_SCAN_ASSOC_HOST (0x01 << 3) /**< associated host scans */ 13272 13273 #define WL_SCAN_EVENT_VERSION 1 13274 13275 #define WL_SCAN_TYPE_ASSOC 0x1 /* Assoc scan */ 13276 #define WL_SCAN_TYPE_ROAM 0x2 /* Roam scan */ 13277 #define WL_SCAN_TYPE_FWSCAN 0x4 /* Other FW scan */ 13278 #define WL_SCAN_TYPE_HOSTSCAN 0x8 /* Host scan */ 13279 13280 typedef struct scan_event_data { 13281 uint32 version; 13282 uint32 flags; 13283 uint16 num_chan_slice0; 13284 uint16 num_chan_slice1; 13285 /* Will contain num_chan_slice0 followed by num_chan_slice1 chanspecs */ 13286 chanspec_t scan_chan_list[]; 13287 } scan_event_data_t; 13288 13289 /* 13290 * bonjour dongle offload definitions 13291 */ 13292 13293 /* common iovar struct */ 13294 typedef struct wl_bdo { 13295 uint16 subcmd_id; /* subcommand id */ 13296 uint16 len; /* total length of data[] */ 13297 uint8 data[]; /* subcommand data */ 13298 } wl_bdo_t; 13299 13300 /* subcommand ids */ 13301 #define WL_BDO_SUBCMD_DOWNLOAD 0 /* Download flattened database */ 13302 #define WL_BDO_SUBCMD_ENABLE 1 /* Start bonjour after download */ 13303 #define WL_BDO_SUBCMD_MAX_DOWNLOAD 2 /* Get the max download size */ 13304 13305 /* maximum fragment size */ 13306 #define BDO_MAX_FRAGMENT_SIZE 1024 13307 13308 /* download flattened database 13309 * 13310 * BDO must be disabled before database download else fail. 13311 * 13312 * If database size is within BDO_MAX_FRAGMENT_SIZE then only a single fragment 13313 * is required (i.e. frag_num = 0, total_size = frag_size). 13314 * If database size exceeds BDO_MAX_FRAGMENT_SIZE then multiple fragments are required. 13315 */ 13316 typedef struct wl_bdo_download { 13317 uint16 total_size; /* total database size */ 13318 uint16 frag_num; /* fragment number, 0 for first fragment, N-1 for last fragment */ 13319 uint16 frag_size; /* size of fragment (max BDO_MAX_FRAGMENT_SIZE) */ 13320 uint8 pad[2]; /* 4-byte struct alignment */ 13321 uint8 fragment[BDO_MAX_FRAGMENT_SIZE]; /* fragment data */ 13322 } wl_bdo_download_t; 13323 13324 /* enable 13325 * 13326 * Enable requires a downloaded database else fail. 13327 */ 13328 typedef struct wl_bdo_enable { 13329 uint8 enable; /* 1 - enable, 0 - disable */ 13330 uint8 pad[3]; /* 4-byte struct alignment */ 13331 } wl_bdo_enable_t; 13332 13333 /* 13334 * Get the max download size for Bonjour Offload. 13335 */ 13336 typedef struct wl_bdo_max_download { 13337 uint16 size; /* Max download size in bytes */ 13338 uint8 pad[2]; /* 4-byte struct alignment */ 13339 } wl_bdo_max_download_t; 13340 13341 /* 13342 * TCP keepalive offload definitions 13343 */ 13344 13345 /* common iovar struct */ 13346 typedef struct wl_tko { 13347 uint16 subcmd_id; /* subcommand id */ 13348 uint16 len; /* total length of data[] */ 13349 uint8 data[]; /* subcommand data */ 13350 } wl_tko_t; 13351 13352 /* subcommand ids */ 13353 #define WL_TKO_SUBCMD_MAX_TCP 0 /* max TCP connections supported */ 13354 #define WL_TKO_SUBCMD_PARAM 1 /* configure offload common parameters */ 13355 #define WL_TKO_SUBCMD_CONNECT 2 /* TCP connection info */ 13356 #define WL_TKO_SUBCMD_ENABLE 3 /* enable/disable */ 13357 #define WL_TKO_SUBCMD_STATUS 4 /* TCP connection status */ 13358 13359 /* WL_TKO_SUBCMD_MAX_CONNECT subcommand data */ 13360 typedef struct wl_tko_max_tcp { 13361 uint8 max; /* max TCP connections supported */ 13362 uint8 pad[3]; /* 4-byte struct alignment */ 13363 } wl_tko_max_tcp_t; 13364 13365 /* WL_TKO_SUBCMD_PARAM subcommand data */ 13366 typedef struct wl_tko_param { 13367 uint16 interval; /* keepalive tx interval (secs) */ 13368 uint16 retry_interval; /* keepalive retry interval (secs) */ 13369 uint16 retry_count; /* retry_count */ 13370 uint8 pad[2]; /* 4-byte struct alignment */ 13371 } wl_tko_param_t; 13372 13373 /* WL_TKO_SUBCMD_CONNECT subcommand data 13374 * invoke with unique 'index' for each TCP connection 13375 */ 13376 typedef struct wl_tko_connect { 13377 uint8 index; /* TCP connection index, 0 to max-1 */ 13378 uint8 ip_addr_type; /* 0 - IPv4, 1 - IPv6 */ 13379 uint16 local_port; /* local port */ 13380 uint16 remote_port; /* remote port */ 13381 uint16 PAD; 13382 uint32 local_seq; /* local sequence number */ 13383 uint32 remote_seq; /* remote sequence number */ 13384 uint16 request_len; /* TCP keepalive request packet length */ 13385 uint16 response_len; /* TCP keepalive response packet length */ 13386 uint8 data[]; /* variable length field containing local/remote IPv4/IPv6, 13387 * TCP keepalive request packet, TCP keepalive response packet 13388 * For IPv4, length is 4 * 2 + request_length + response_length 13389 * offset 0 - local IPv4 13390 * offset 4 - remote IPv4 13391 * offset 8 - TCP keepalive request packet 13392 * offset 8+request_length - TCP keepalive response packet 13393 * For IPv6, length is 16 * 2 + request_length + response_length 13394 * offset 0 - local IPv6 13395 * offset 16 - remote IPv6 13396 * offset 32 - TCP keepalive request packet 13397 * offset 32+request_length - TCP keepalive response packet 13398 */ 13399 } wl_tko_connect_t; 13400 13401 /* WL_TKO_SUBCMD_CONNECT subcommand data to GET configured info for specific index */ 13402 typedef struct wl_tko_get_connect { 13403 uint8 index; /* TCP connection index, 0 to max-1 */ 13404 uint8 pad[3]; /* 4-byte struct alignment */ 13405 } wl_tko_get_connect_t; 13406 13407 typedef struct wl_tko_enable { 13408 uint8 enable; /* 1 - enable, 0 - disable */ 13409 uint8 pad[3]; /* 4-byte struct alignment */ 13410 } wl_tko_enable_t; 13411 13412 /* WL_TKO_SUBCMD_STATUS subcommand data */ 13413 /* must be invoked before tko is disabled else status is unavailable */ 13414 typedef struct wl_tko_status { 13415 uint8 count; /* number of status entries (i.e. equals 13416 * max TCP connections supported) 13417 */ 13418 uint8 status[1]; /* variable length field contain status for 13419 * each TCP connection index 13420 */ 13421 } wl_tko_status_t; 13422 13423 typedef enum { 13424 TKO_STATUS_NORMAL = 0, /* TCP connection normal, no error */ 13425 TKO_STATUS_NO_RESPONSE = 1, /* no response to TCP keepalive */ 13426 TKO_STATUS_NO_TCP_ACK_FLAG = 2, /* TCP ACK flag not set */ 13427 TKO_STATUS_UNEXPECT_TCP_FLAG = 3, /* unexpect TCP flags set other than ACK */ 13428 TKO_STATUS_SEQ_NUM_INVALID = 4, /* ACK != sequence number */ 13429 TKO_STATUS_REMOTE_SEQ_NUM_INVALID = 5, /* SEQ > remote sequence number */ 13430 TKO_STATUS_TCP_DATA = 6, /* TCP data available */ 13431 TKO_STATUS_UNAVAILABLE = 255, /* not used/configured */ 13432 } tko_status_t; 13433 13434 enum rssi_reason { 13435 RSSI_REASON_UNKNOW = 0, 13436 RSSI_REASON_LOWRSSI = 1, 13437 RSSI_REASON_NSYC = 2, 13438 RSSI_REASON_TIMEOUT = 3 13439 }; 13440 13441 enum tof_reason { 13442 TOF_REASON_OK = 0, 13443 TOF_REASON_REQEND = 1, 13444 TOF_REASON_TIMEOUT = 2, 13445 TOF_REASON_NOACK = 3, 13446 TOF_REASON_INVALIDAVB = 4, 13447 TOF_REASON_INITIAL = 5, 13448 TOF_REASON_ABORT = 6 13449 }; 13450 13451 enum rssi_state { 13452 RSSI_STATE_POLL = 0, 13453 RSSI_STATE_TPAIRING = 1, 13454 RSSI_STATE_IPAIRING = 2, 13455 RSSI_STATE_THANDSHAKE = 3, 13456 RSSI_STATE_IHANDSHAKE = 4, 13457 RSSI_STATE_CONFIRMED = 5, 13458 RSSI_STATE_PIPELINE = 6, 13459 RSSI_STATE_NEGMODE = 7, 13460 RSSI_STATE_MONITOR = 8, 13461 RSSI_STATE_LAST = 9 13462 }; 13463 13464 enum tof_state { 13465 TOF_STATE_IDLE = 0, 13466 TOF_STATE_IWAITM = 1, 13467 TOF_STATE_TWAITM = 2, 13468 TOF_STATE_ILEGACY = 3, 13469 TOF_STATE_IWAITCL = 4, 13470 TOF_STATE_TWAITCL = 5, 13471 TOF_STATE_ICONFIRM = 6, 13472 TOF_STATE_IREPORT = 7 13473 }; 13474 13475 enum tof_mode_type { 13476 TOF_LEGACY_UNKNOWN = 0, 13477 TOF_LEGACY_AP = 1, 13478 TOF_NONLEGACY_AP = 2 13479 }; 13480 13481 enum tof_way_type { 13482 TOF_TYPE_ONE_WAY = 0, 13483 TOF_TYPE_TWO_WAY = 1, 13484 TOF_TYPE_REPORT = 2 13485 }; 13486 13487 enum tof_rate_type { 13488 TOF_FRAME_RATE_VHT = 0, 13489 TOF_FRAME_RATE_LEGACY = 1 13490 }; 13491 13492 #define TOF_ADJ_TYPE_NUM 4 /**< number of assisted timestamp adjustment */ 13493 enum tof_adj_mode { 13494 TOF_ADJ_SOFTWARE = 0, 13495 TOF_ADJ_HARDWARE = 1, 13496 TOF_ADJ_SEQ = 2, 13497 TOF_ADJ_NONE = 3 13498 }; 13499 13500 #define FRAME_TYPE_NUM 4 /**< number of frame type */ 13501 enum frame_type { 13502 FRAME_TYPE_CCK = 0, 13503 FRAME_TYPE_OFDM = 1, 13504 FRAME_TYPE_11N = 2, 13505 FRAME_TYPE_11AC = 3 13506 }; 13507 13508 typedef struct wl_proxd_status_iovar { 13509 uint16 method; /**< method */ 13510 uint8 mode; /**< mode */ 13511 uint8 peermode; /**< peer mode */ 13512 uint8 state; /**< state */ 13513 uint8 reason; /**< reason code */ 13514 uint8 PAD[2]; 13515 uint32 distance; /**< distance */ 13516 uint32 txcnt; /**< tx pkt counter */ 13517 uint32 rxcnt; /**< rx pkt counter */ 13518 struct ether_addr peer; /**< peer mac address */ 13519 int8 avg_rssi; /**< average rssi */ 13520 int8 hi_rssi; /**< highest rssi */ 13521 int8 low_rssi; /**< lowest rssi */ 13522 uint8 PAD[3]; 13523 uint32 dbgstatus; /**< debug status */ 13524 uint16 frame_type_cnt[FRAME_TYPE_NUM]; /**< frame types */ 13525 uint8 adj_type_cnt[TOF_ADJ_TYPE_NUM]; /**< adj types HW/SW */ 13526 } wl_proxd_status_iovar_t; 13527 13528 /* ifdef NET_DETECT */ 13529 typedef struct net_detect_adapter_features { 13530 uint8 wowl_enabled; 13531 uint8 net_detect_enabled; 13532 uint8 nlo_enabled; 13533 } net_detect_adapter_features_t; 13534 13535 typedef enum net_detect_bss_type { 13536 nd_bss_any = 0, 13537 nd_ibss, 13538 nd_ess 13539 } net_detect_bss_type_t; 13540 13541 typedef struct net_detect_profile { 13542 wlc_ssid_t ssid; 13543 net_detect_bss_type_t bss_type; /**< Ignore for now since Phase 1 is only for ESS */ 13544 uint32 cipher_type; /**< DOT11_CIPHER_ALGORITHM enumeration values */ 13545 uint32 auth_type; /**< DOT11_AUTH_ALGORITHM enumeration values */ 13546 } net_detect_profile_t; 13547 13548 typedef struct net_detect_profile_list { 13549 uint32 num_nd_profiles; 13550 net_detect_profile_t nd_profile[]; 13551 } net_detect_profile_list_t; 13552 13553 typedef struct net_detect_config { 13554 uint8 nd_enabled; 13555 uint8 PAD[3]; 13556 uint32 scan_interval; 13557 uint32 wait_period; 13558 uint8 wake_if_connected; 13559 uint8 wake_if_disconnected; 13560 uint8 PAD[2]; 13561 net_detect_profile_list_t nd_profile_list; 13562 } net_detect_config_t; 13563 13564 typedef enum net_detect_wake_reason { 13565 nd_reason_unknown, 13566 nd_net_detected, 13567 nd_wowl_event, 13568 nd_ucode_error 13569 } net_detect_wake_reason_t; 13570 13571 typedef struct net_detect_wake_data { 13572 net_detect_wake_reason_t nd_wake_reason; 13573 uint32 nd_wake_date_length; 13574 uint8 nd_wake_data[0]; /**< Wake data (currently unused) */ 13575 } net_detect_wake_data_t; 13576 13577 /* endif NET_DETECT */ 13578 13579 /* (unversioned, deprecated) */ 13580 typedef struct bcnreq { 13581 uint8 bcn_mode; 13582 uint8 PAD[3]; 13583 int32 dur; 13584 int32 channel; 13585 struct ether_addr da; 13586 uint16 random_int; 13587 wlc_ssid_t ssid; 13588 uint16 reps; 13589 uint8 PAD[2]; 13590 } bcnreq_t; 13591 13592 #define WL_RRM_BCN_REQ_VER 1 13593 typedef struct bcn_req { 13594 uint8 version; 13595 uint8 bcn_mode; 13596 uint8 pad_1[2]; 13597 int32 dur; 13598 int32 channel; 13599 struct ether_addr da; 13600 uint16 random_int; 13601 wlc_ssid_t ssid; 13602 uint16 reps; 13603 uint8 req_elements; 13604 uint8 pad_2; 13605 chanspec_list_t chspec_list; 13606 } bcn_req_t; 13607 13608 typedef struct rrmreq { 13609 struct ether_addr da; 13610 uint8 reg; 13611 uint8 chan; 13612 uint16 random_int; 13613 uint16 dur; 13614 uint16 reps; 13615 } rrmreq_t; 13616 13617 typedef struct framereq { 13618 struct ether_addr da; 13619 uint8 reg; 13620 uint8 chan; 13621 uint16 random_int; 13622 uint16 dur; 13623 struct ether_addr ta; 13624 uint16 reps; 13625 } framereq_t; 13626 13627 typedef struct statreq { 13628 struct ether_addr da; 13629 struct ether_addr peer; 13630 uint16 random_int; 13631 uint16 dur; 13632 uint8 group_id; 13633 uint8 PAD; 13634 uint16 reps; 13635 } statreq_t; 13636 13637 typedef struct txstrmreq { 13638 struct ether_addr da; /* Destination address */ 13639 uint16 random_int; /* Random interval for measurement start */ 13640 uint16 dur; /* Measurement duration */ 13641 uint16 reps; /* number of repetitions */ 13642 struct ether_addr peer; /* Peer MAC address */ 13643 uint8 tid; /* Traffic ID */ 13644 uint8 bin0_range; /* Delay range of the first bin */ 13645 } txstrmreq_t; 13646 13647 typedef struct lcireq { 13648 struct ether_addr da; /* Destination address */ 13649 uint16 reps; /* number of repetitions */ 13650 uint8 subj; /* Local/Remote/Thid party */ 13651 uint8 lat_res; /* Latitude requested Resolution */ 13652 uint8 lon_res; /* Longitude requested Resolution */ 13653 uint8 alt_res; /* Altitude requested Resolution */ 13654 } lcireq_t; 13655 13656 typedef struct civicreq { 13657 struct ether_addr da; /* Destination address */ 13658 uint16 reps; /* number of repetitions */ 13659 uint8 subj; /* Local/Remote/Thid party */ 13660 uint8 civloc_type; /* Format of location info */ 13661 uint8 siu; /* Unit of Location service interval */ 13662 uint8 pad; 13663 uint16 si; /* Location service interval */ 13664 } civicreq_t; 13665 13666 typedef struct locidreq { 13667 struct ether_addr da; /* Destination address */ 13668 uint16 reps; /* number of repetitions */ 13669 uint8 subj; /* Local/Remote/Thid party */ 13670 uint8 siu; /* Unit of Location service interval */ 13671 uint16 si; /* Location service interval */ 13672 } locidreq_t; 13673 13674 typedef struct wl_rrm_config_ioc { 13675 uint16 version; /* command version */ 13676 uint16 id; /* subiovar cmd ID */ 13677 uint16 len; /* total length of all bytes in data[] */ 13678 uint16 pad; /* 4-byte boundary padding */ 13679 uint8 data[1]; /* payload */ 13680 } wl_rrm_config_ioc_t; 13681 13682 enum { 13683 WL_RRM_CONFIG_NONE = 0, /* reserved */ 13684 WL_RRM_CONFIG_GET_LCI = 1, /* get LCI */ 13685 WL_RRM_CONFIG_SET_LCI = 2, /* set LCI */ 13686 WL_RRM_CONFIG_GET_CIVIC = 3, /* get civic location */ 13687 WL_RRM_CONFIG_SET_CIVIC = 4, /* set civic location */ 13688 WL_RRM_CONFIG_GET_LOCID = 5, /* get location identifier */ 13689 WL_RRM_CONFIG_SET_LOCID = 6, /* set location identifier */ 13690 WL_RRM_CONFIG_MAX = 7 13691 }; 13692 13693 #define WL_RRM_CONFIG_NAME "rrm_config" 13694 #define WL_RRM_CONFIG_MIN_LENGTH OFFSETOF(wl_rrm_config_ioc_t, data) 13695 13696 enum { 13697 WL_RRM_EVENT_NONE = 0, /* not an event, reserved */ 13698 WL_RRM_EVENT_FRNG_REQ = 1, /* Receipt of FRNG request frame */ 13699 WL_RRM_EVENT_FRNG_REP = 2, /* Receipt of FRNG report frame */ 13700 13701 WL_RRM_EVENT_MAX 13702 }; 13703 typedef int16 wl_rrm_event_type_t; 13704 13705 typedef struct frngreq_target { 13706 uint32 bssid_info; 13707 uint8 channel; 13708 uint8 phytype; 13709 uint8 reg; 13710 uint8 pad; 13711 struct ether_addr bssid; 13712 chanspec_t chanspec; 13713 uint32 sid; 13714 } frngreq_target_t; 13715 13716 typedef struct frngreq { 13717 wl_rrm_event_type_t event; /* RRM event type */ 13718 struct ether_addr da; 13719 uint16 max_init_delay; /* Upper bound of random delay, in TUs */ 13720 uint8 min_ap_count; /* Min FTM ranges requested (1-15) */ 13721 uint8 num_aps; /* Number of APs to range, at least min_ap_count */ 13722 uint16 max_age; /* Max elapsed time before FTM request, 0xFFFF = any */ 13723 uint16 reps; /* Number of repetitions of this measurement type */ 13724 frngreq_target_t targets[1]; /* Target BSSIDs to range */ 13725 } frngreq_t; 13726 13727 typedef struct frngrep_range { 13728 uint32 start_tsf; /* 4 lsb of tsf */ 13729 struct ether_addr bssid; 13730 uint8 pad[2]; 13731 uint32 range; 13732 uint32 max_err; 13733 uint8 rsvd; 13734 uint8 pad2[3]; 13735 } frngrep_range_t; 13736 13737 typedef struct frngrep_error { 13738 uint32 start_tsf; /* 4 lsb of tsf */ 13739 struct ether_addr bssid; 13740 uint8 code; 13741 uint8 pad[1]; 13742 } frngrep_error_t; 13743 13744 typedef struct frngrep { 13745 wl_rrm_event_type_t event; /* RRM event type */ 13746 struct ether_addr da; 13747 uint8 range_entry_count; 13748 uint8 error_entry_count; 13749 uint16 dialog_token; /* dialog token */ 13750 frngrep_range_t range_entries[DOT11_FTM_RANGE_ENTRY_MAX_COUNT]; 13751 frngrep_error_t error_entries[DOT11_FTM_RANGE_ERROR_ENTRY_MAX_COUNT]; 13752 } frngrep_t; 13753 13754 typedef struct wl_rrm_frng_ioc { 13755 uint16 version; /* command version */ 13756 uint16 id; /* subiovar cmd ID */ 13757 uint16 len; /* total length of all bytes in data[] */ 13758 uint16 pad; /* 4-byte boundary padding */ 13759 uint8 data[]; /* payload */ 13760 } wl_rrm_frng_ioc_t; 13761 13762 enum { 13763 WL_RRM_FRNG_NONE = 0, /* reserved */ 13764 WL_RRM_FRNG_SET_REQ = 1, /* send ftm ranging request */ 13765 WL_RRM_FRNG_MAX = 2 13766 }; 13767 13768 #define WL_RRM_FRNG_NAME "rrm_frng" 13769 #define WL_RRM_FRNG_MIN_LENGTH OFFSETOF(wl_rrm_frng_ioc_t, data) 13770 13771 #define WL_RRM_RPT_VER 0 13772 #define WL_RRM_RPT_MAX_PAYLOAD 256 13773 #define WL_RRM_RPT_MIN_PAYLOAD 7 13774 #define WL_RRM_RPT_FALG_ERR 0 13775 #define WL_RRM_RPT_FALG_GRP_ID_PROPR (1 << 0) 13776 #define WL_RRM_RPT_FALG_GRP_ID_0 (1 << 1) 13777 typedef struct { 13778 uint16 ver; /**< version */ 13779 struct ether_addr addr; /**< STA MAC addr */ 13780 uint32 timestamp; /**< timestamp of the report */ 13781 uint16 flag; /**< flag */ 13782 uint16 len; /**< length of payload data */ 13783 uint8 data[WL_RRM_RPT_MAX_PAYLOAD]; 13784 } statrpt_t; 13785 13786 typedef struct wlc_dwds_config { 13787 uint32 enable; 13788 uint32 mode; /**< STA/AP interface */ 13789 struct ether_addr ea; 13790 uint8 PAD[2]; 13791 } wlc_dwds_config_t; 13792 13793 typedef struct wl_el_set_params_s { 13794 uint8 set; /**< Set number */ 13795 uint8 PAD[3]; 13796 uint32 size; /**< Size to make/expand */ 13797 } wl_el_set_params_t; 13798 13799 typedef struct wl_el_tag_params_s { 13800 uint16 tag; 13801 uint8 set; 13802 uint8 flags; 13803 } wl_el_tag_params_t; 13804 13805 #define EVENT_LOG_SET_TYPE_CURRENT_VERSION 0 13806 typedef struct wl_el_set_type_s { 13807 uint16 version; 13808 uint16 len; 13809 uint8 set; /* Set number */ 13810 uint8 type; /* Type- EVENT_LOG_SET_TYPE_DEFAULT or EVENT_LOG_SET_TYPE_PRSRV */ 13811 uint16 PAD; 13812 } wl_el_set_type_t; 13813 13814 typedef struct wl_staprio_cfg { 13815 struct ether_addr ea; /**< mac addr */ 13816 uint8 prio; /**< scb priority */ 13817 } wl_staprio_cfg_t; 13818 13819 #define STAMON_STACONFIG_VER 1 13820 /* size of struct wlc_stamon_sta_config_t elements */ 13821 #define STAMON_STACONFIG_LENGTH 20 13822 13823 typedef enum wl_stamon_cfg_cmd_type { 13824 STAMON_CFG_CMD_DEL = 0, 13825 STAMON_CFG_CMD_ADD = 1, 13826 STAMON_CFG_CMD_ENB = 2, 13827 STAMON_CFG_CMD_DSB = 3, 13828 STAMON_CFG_CMD_CNT = 4, 13829 STAMON_CFG_CMD_RSTCNT = 5, 13830 STAMON_CFG_CMD_GET_STATS = 6, 13831 STAMON_CFG_CMD_SET_MONTIME = 7 13832 } wl_stamon_cfg_cmd_type_t; 13833 13834 typedef struct wlc_stamon_sta_config { 13835 wl_stamon_cfg_cmd_type_t cmd; /**< 0 - delete, 1 - add */ 13836 struct ether_addr ea; 13837 uint16 version; /* Command structure version */ 13838 uint16 length; /* Command structure length */ 13839 uint8 pad[2]; 13840 /* Time (ms) for which STA's are monitored. Value ZERO indicates no time limit */ 13841 uint32 monitor_time; 13842 } wlc_stamon_sta_config_t; 13843 13844 /* ifdef SR_DEBUG */ 13845 typedef struct /* pmu_reg */{ 13846 uint32 pmu_control; 13847 uint32 pmu_capabilities; 13848 uint32 pmu_status; 13849 uint32 res_state; 13850 uint32 res_pending; 13851 uint32 pmu_timer1; 13852 uint32 min_res_mask; 13853 uint32 max_res_mask; 13854 uint32 pmu_chipcontrol1[4]; 13855 uint32 pmu_regcontrol[5]; 13856 uint32 pmu_pllcontrol[5]; 13857 uint32 pmu_rsrc_up_down_timer[31]; 13858 uint32 rsrc_dep_mask[31]; 13859 } pmu_reg_t; 13860 /* endif SR_DEBUG */ 13861 13862 typedef struct wl_taf_define { 13863 struct ether_addr ea; /**< STA MAC or 0xFF... */ 13864 uint16 version; /**< version */ 13865 uint32 sch; /**< method index */ 13866 uint32 prio; /**< priority */ 13867 uint32 misc; /**< used for return value */ 13868 uint8 text[]; /**< used to pass and return ascii text */ 13869 } wl_taf_define_t; 13870 13871 /** Received Beacons lengths information */ 13872 #define WL_LAST_BCNS_INFO_FIXED_LEN OFFSETOF(wlc_bcn_len_hist_t, bcnlen_ring) 13873 typedef struct wlc_bcn_len_hist { 13874 uint16 ver; /**< version field */ 13875 uint16 cur_index; /**< current pointed index in ring buffer */ 13876 uint32 max_bcnlen; /**< Max beacon length received */ 13877 uint32 min_bcnlen; /**< Min beacon length received */ 13878 uint32 ringbuff_len; /**< Length of the ring buffer 'bcnlen_ring' */ 13879 uint32 bcnlen_ring[1]; /**< ring buffer storing received beacon lengths */ 13880 } wlc_bcn_len_hist_t; 13881 13882 /* WDS net interface types */ 13883 #define WL_WDSIFTYPE_NONE 0x0 /**< The interface type is neither WDS nor DWDS. */ 13884 #define WL_WDSIFTYPE_WDS 0x1 /**< The interface is WDS type. */ 13885 #define WL_WDSIFTYPE_DWDS 0x2 /**< The interface is DWDS type. */ 13886 13887 typedef struct wl_bssload_static { 13888 uint8 is_static; 13889 uint8 PAD; 13890 uint16 sta_count; 13891 uint8 chan_util; 13892 uint8 PAD; 13893 uint16 aac; 13894 } wl_bssload_static_t; 13895 13896 /* Buffer of size WLC_SAMPLECOLLECT_MAXLEN (=10240 for 4345a0 ACPHY) 13897 * gets copied to this, multiple times 13898 */ 13899 typedef enum wl_gpaio_option { 13900 GPAIO_PMU_AFELDO, 13901 GPAIO_PMU_TXLDO, 13902 GPAIO_PMU_VCOLDO, 13903 GPAIO_PMU_LNALDO, 13904 GPAIO_PMU_ADCLDO, 13905 GPAIO_ICTAT_CAL, 13906 GPAIO_PMU_CLEAR, 13907 GPAIO_OFF, 13908 GPAIO_PMU_LOGENLDO, 13909 GPAIO_PMU_RXLDO2G, 13910 GPAIO_PMU_RXLDO5G, 13911 GPAIO_PMU_LPFTXLDO, 13912 GPAIO_PMU_LDO1P6, 13913 GPAIO_RCAL, 13914 GPAIO_IQDAC_BUF_DC_MEAS, 13915 GPAIO_IQDAC_BUF_DC_CLEAR, 13916 GPAIO_DAC_IQ_DC_RDBK, 13917 GPAIO_DAC_IQ_DC_RDBK_CLEAR, 13918 GPAIO_AFE_LDO_FOR_DAC_DC, 13919 GPAIO_PA5G_VCAS_SOURCE, 13920 GPAIO_BIQ2_DC_MEAS, 13921 GPAIO_BIQ2_DC_CLEAR, 13922 GPAIO_VBATMONITOR, 13923 GPAIO_PA5G_VCAS_GMDRAIN 13924 } wl_gpaio_option_t; 13925 13926 /** IO Var Operations - the Value of iov_op In wlc_ap_doiovar */ 13927 typedef enum wlc_ap_iov_bss_operation { 13928 WLC_AP_IOV_OP_DELETE = -1, 13929 WLC_AP_IOV_OP_DISABLE = 0, 13930 WLC_AP_IOV_OP_ENABLE = 1, 13931 WLC_AP_IOV_OP_MANUAL_AP_BSSCFG_CREATE = 2, 13932 WLC_AP_IOV_OP_MANUAL_STA_BSSCFG_CREATE = 3, 13933 WLC_AP_IOV_OP_MOVE = 4 13934 } wlc_ap_iov_bss_oper_t; 13935 13936 /* LTE coex info */ 13937 /* Analogue of HCI Set MWS Signaling cmd */ 13938 typedef struct { 13939 int16 mws_rx_assert_offset; 13940 int16 mws_rx_assert_jitter; 13941 int16 mws_rx_deassert_offset; 13942 int16 mws_rx_deassert_jitter; 13943 int16 mws_tx_assert_offset; 13944 int16 mws_tx_assert_jitter; 13945 int16 mws_tx_deassert_offset; 13946 int16 mws_tx_deassert_jitter; 13947 int16 mws_pattern_assert_offset; 13948 int16 mws_pattern_assert_jitter; 13949 int16 mws_inact_dur_assert_offset; 13950 int16 mws_inact_dur_assert_jitter; 13951 int16 mws_scan_freq_assert_offset; 13952 int16 mws_scan_freq_assert_jitter; 13953 int16 mws_prio_assert_offset_req; 13954 } wci2_config_t; 13955 13956 /** Analogue of HCI MWS Channel Params */ 13957 typedef struct { 13958 uint16 mws_rx_center_freq; /**< MHz */ 13959 uint16 mws_tx_center_freq; 13960 uint16 mws_rx_channel_bw; /**< KHz */ 13961 uint16 mws_tx_channel_bw; 13962 uint8 mws_channel_en; 13963 uint8 mws_channel_type; /**< Don't care for WLAN? */ 13964 } mws_params_t; 13965 13966 #define LTECX_MAX_NUM_PERIOD_TYPES 7 13967 13968 /* LTE Frame params */ 13969 typedef struct { 13970 uint16 mws_frame_dur; 13971 int16 mws_framesync_assert_offset; 13972 uint16 mws_framesync_assert_jitter; 13973 uint16 mws_period_dur[LTECX_MAX_NUM_PERIOD_TYPES]; 13974 uint8 mws_period_type[LTECX_MAX_NUM_PERIOD_TYPES]; 13975 uint8 mws_num_periods; 13976 } mws_frame_config_t; 13977 13978 /** MWS wci2 message */ 13979 typedef struct { 13980 uint8 mws_wci2_data; /**< BT-SIG msg */ 13981 uint8 PAD; 13982 uint16 mws_wci2_interval; /**< Interval in us */ 13983 uint16 mws_wci2_repeat; /**< No of msgs to send */ 13984 } mws_wci2_msg_t; 13985 /* MWS ANT map */ 13986 typedef struct { 13987 uint16 combo1; /* mws ant selection 1 */ 13988 uint16 combo2; /* mws ant selection 2 */ 13989 uint16 combo3; /* mws ant selection 3 */ 13990 uint16 combo4; /* mws ant selection 4 */ 13991 } mws_ant_map_t; 13992 13993 /* MWS ANT map 2nd generation */ 13994 typedef struct { 13995 uint16 combo[16]; /* mws ant selection 2nd */ 13996 } mws_ant_map_t_2nd; 13997 13998 /* MWS SCAN_REQ Bitmap */ 13999 typedef struct mws_scanreq_params { 14000 uint16 idx; 14001 uint16 bm_2g; 14002 uint16 bm_5g_lo; 14003 uint16 bm_5g_mid; 14004 uint16 bm_5g_hi; 14005 } mws_scanreq_params_t; 14006 14007 typedef struct { 14008 uint32 config; /**< MODE: AUTO (-1), Disable (0), Enable (1) */ 14009 uint32 status; /**< Current state: Disabled (0), Enabled (1) */ 14010 } wl_config_t; 14011 14012 #define WLC_RSDB_MODE_AUTO_MASK 0x80 14013 #define WLC_RSDB_EXTRACT_MODE(val) ((int8)((val) & (~(WLC_RSDB_MODE_AUTO_MASK)))) 14014 14015 typedef struct { 14016 uint16 request; /* type of sensor hub request */ 14017 uint16 enable; /* enable/disable response for specified request */ 14018 uint16 interval; /* interval between responses to the request */ 14019 } shub_req_t; 14020 14021 #define WL_IF_STATS_T_VERSION 1 /**< current version of wl_if_stats structure */ 14022 14023 /** per interface counters */ 14024 typedef struct wl_if_stats { 14025 uint16 version; /**< version of the structure */ 14026 uint16 length; /**< length of the entire structure */ 14027 uint32 PAD; /**< padding */ 14028 14029 /* transmit stat counters */ 14030 uint64 txframe; /**< tx data frames */ 14031 uint64 txbyte; /**< tx data bytes */ 14032 uint64 txerror; /**< tx data errors (derived: sum of others) */ 14033 uint64 txnobuf; /**< tx out of buffer errors */ 14034 uint64 txrunt; /**< tx runt frames */ 14035 uint64 txfail; /**< tx failed frames */ 14036 uint64 txretry; /**< tx retry frames */ 14037 uint64 txretrie; /**< tx multiple retry frames */ 14038 uint64 txfrmsnt; /**< tx sent frames */ 14039 uint64 txmulti; /**< tx mulitcast sent frames */ 14040 uint64 txfrag; /**< tx fragments sent */ 14041 14042 /* receive stat counters */ 14043 uint64 rxframe; /**< rx data frames */ 14044 uint64 rxbyte; /**< rx data bytes */ 14045 uint64 rxerror; /**< rx data errors (derived: sum of others) */ 14046 uint64 rxnobuf; /**< rx out of buffer errors */ 14047 uint64 rxrunt; /**< rx runt frames */ 14048 uint64 rxfragerr; /**< rx fragment errors */ 14049 uint64 rxmulti; /**< rx multicast frames */ 14050 14051 uint64 txexptime; /* DATA Tx frames suppressed due to timer expiration */ 14052 uint64 txrts; /* RTS/CTS succeeeded count */ 14053 uint64 txnocts; /* RTS/CTS faled count */ 14054 14055 uint64 txretrans; /* Number of frame retransmissions */ 14056 } 14057 wl_if_stats_t; 14058 14059 typedef struct wl_band { 14060 uint16 bandtype; /**< WL_BAND_2G, WL_BAND_5G */ 14061 uint16 bandunit; /**< bandstate[] index */ 14062 uint16 phytype; /**< phytype */ 14063 uint16 phyrev; 14064 } 14065 wl_band_t; 14066 14067 #define WL_ROAM_STATS_VER_1 (1u) /**< current version of wl_if_stats structure */ 14068 14069 /** roam statistics counters */ 14070 typedef struct { 14071 uint16 version; /**< version of the structure */ 14072 uint16 length; /**< length of the entire structure */ 14073 uint32 initial_assoc_time; 14074 uint32 prev_roam_time; 14075 uint32 last_roam_event_type; 14076 uint32 last_roam_event_status; 14077 uint32 last_roam_event_reason; 14078 uint16 roam_success_cnt; 14079 uint16 roam_fail_cnt; 14080 uint16 roam_attempt_cnt; 14081 uint16 max_roam_target_cnt; 14082 uint16 min_roam_target_cnt; 14083 uint16 max_cached_ch_cnt; 14084 uint16 min_cached_ch_cnt; 14085 uint16 partial_roam_scan_cnt; 14086 uint16 full_roam_scan_cnt; 14087 uint16 most_roam_reason; 14088 uint16 most_roam_reason_cnt; 14089 } wl_roam_stats_v1_t; 14090 14091 #define WL_WLC_VERSION_T_VERSION 1 /**< current version of wlc_version structure */ 14092 14093 /** wlc interface version */ 14094 typedef struct wl_wlc_version { 14095 uint16 version; /**< version of the structure */ 14096 uint16 length; /**< length of the entire structure */ 14097 14098 /* epi version numbers */ 14099 uint16 epi_ver_major; /**< epi major version number */ 14100 uint16 epi_ver_minor; /**< epi minor version number */ 14101 uint16 epi_rc_num; /**< epi RC number */ 14102 uint16 epi_incr_num; /**< epi increment number */ 14103 14104 /* wlc interface version numbers */ 14105 uint16 wlc_ver_major; /**< wlc interface major version number */ 14106 uint16 wlc_ver_minor; /**< wlc interface minor version number */ 14107 } 14108 wl_wlc_version_t; 14109 14110 #define WL_SCAN_VERSION_T_VERSION 1 /**< current version of scan_version structure */ 14111 /** scan interface version */ 14112 typedef struct wl_scan_version { 14113 uint16 version; /**< version of the structure */ 14114 uint16 length; /**< length of the entire structure */ 14115 14116 /* scan interface version numbers */ 14117 uint16 scan_ver_major; /**< scan interface major version number */ 14118 } wl_scan_version_t; 14119 14120 /* Highest version of WLC_API_VERSION supported */ 14121 #define WLC_API_VERSION_MAJOR_MAX 8 14122 #define WLC_API_VERSION_MINOR_MAX 0 14123 14124 /* begin proxd definitions */ 14125 #include <packed_section_start.h> 14126 14127 #define WL_PROXD_API_VERSION 0x0300 /**< version 3.0 */ 14128 14129 /** Minimum supported API version */ 14130 #define WL_PROXD_API_MIN_VERSION 0x0300 14131 14132 /** proximity detection methods */ 14133 enum { 14134 WL_PROXD_METHOD_NONE = 0, 14135 WL_PROXD_METHOD_RSVD1 = 1, /**< backward compatibility - RSSI, not supported */ 14136 WL_PROXD_METHOD_TOF = 2, 14137 WL_PROXD_METHOD_RSVD2 = 3, /**< 11v only - if needed */ 14138 WL_PROXD_METHOD_FTM = 4, /**< IEEE rev mc/2014 */ 14139 WL_PROXD_METHOD_MAX 14140 }; 14141 typedef int16 wl_proxd_method_t; 14142 14143 /** global and method configuration flags */ 14144 enum { 14145 WL_PROXD_FLAG_NONE = 0x00000000, 14146 WL_PROXD_FLAG_RX_ENABLED = 0x00000001, /**< respond to requests, per bss */ 14147 WL_PROXD_FLAG_RX_RANGE_REQ = 0x00000002, /**< 11mc range requests enabled */ 14148 WL_PROXD_FLAG_TX_LCI = 0x00000004, /**< tx lci, if known */ 14149 WL_PROXD_FLAG_TX_CIVIC = 0x00000008, /**< tx civic, if known */ 14150 WL_PROXD_FLAG_RX_AUTO_BURST = 0x00000010, /**< auto respond w/o host action */ 14151 WL_PROXD_FLAG_TX_AUTO_BURST = 0x00000020, /**< continue tx w/o host action */ 14152 WL_PROXD_FLAG_AVAIL_PUBLISH = 0x00000040, /**< publish availability */ 14153 WL_PROXD_FLAG_AVAIL_SCHEDULE = 0x00000080, /**< schedule using availability */ 14154 WL_PROXD_FLAG_ASAP_CAPABLE = 0x00000100, /* ASAP capable */ 14155 WL_PROXD_FLAG_MBURST_FOLLOWUP = 0x00000200, /* new multi-burst algorithm */ 14156 WL_PROXD_FLAG_SECURE = 0x00000400, /* per bsscfg option */ 14157 WL_PROXD_FLAG_NO_TSF_SYNC = 0x00000800, /* disable tsf sync */ 14158 WL_PROXD_FLAG_ALL = 0xffffffff 14159 }; 14160 typedef uint32 wl_proxd_flags_t; 14161 14162 #define WL_PROXD_FLAGS_AVAIL (WL_PROXD_FLAG_AVAIL_PUBLISH | \ 14163 WL_PROXD_FLAG_AVAIL_SCHEDULE) 14164 14165 /** session flags */ 14166 enum { 14167 WL_PROXD_SESSION_FLAG_NONE = 0x00000000, /**< no flags */ 14168 WL_PROXD_SESSION_FLAG_INITIATOR = 0x00000001, /**< local device is initiator */ 14169 WL_PROXD_SESSION_FLAG_TARGET = 0x00000002, /**< local device is target */ 14170 WL_PROXD_SESSION_FLAG_ONE_WAY = 0x00000004, /**< (initiated) 1-way rtt */ 14171 WL_PROXD_SESSION_FLAG_AUTO_BURST = 0x00000008, /**< created w/ rx_auto_burst */ 14172 WL_PROXD_SESSION_FLAG_PERSIST = 0x00000010, /**< good until cancelled */ 14173 WL_PROXD_SESSION_FLAG_RTT_DETAIL = 0x00000020, /**< rtt detail in results */ 14174 WL_PROXD_SESSION_FLAG_SECURE = 0x00000040, /**< sessionis secure */ 14175 WL_PROXD_SESSION_FLAG_AOA = 0x00000080, /**< AOA along w/ RTT */ 14176 WL_PROXD_SESSION_FLAG_RX_AUTO_BURST = 0x00000100, /**< Same as proxd flags above */ 14177 WL_PROXD_SESSION_FLAG_TX_AUTO_BURST = 0x00000200, /**< Same as proxd flags above */ 14178 WL_PROXD_SESSION_FLAG_NAN_BSS = 0x00000400, /**< Use NAN BSS, if applicable */ 14179 WL_PROXD_SESSION_FLAG_TS1 = 0x00000800, /**< e.g. FTM1 - ASAP-capable */ 14180 WL_PROXD_SESSION_FLAG_RANDMAC = 0x00001000, /**< use random mac */ 14181 WL_PROXD_SESSION_FLAG_REPORT_FAILURE = 0x00002000, /**< report failure to target */ 14182 WL_PROXD_SESSION_FLAG_INITIATOR_RPT = 0x00004000, /**< report distance to target */ 14183 WL_PROXD_SESSION_FLAG_NOCHANSWT = 0x00008000, 14184 WL_PROXD_SESSION_FLAG_NETRUAL = 0x00010000, /**< netrual mode */ 14185 WL_PROXD_SESSION_FLAG_SEQ_EN = 0x00020000, /**< Toast */ 14186 WL_PROXD_SESSION_FLAG_NO_PARAM_OVRD = 0x00040000, /**< no param override from target */ 14187 WL_PROXD_SESSION_FLAG_ASAP = 0x00080000, /**< ASAP session */ 14188 WL_PROXD_SESSION_FLAG_REQ_LCI = 0x00100000, /**< transmit LCI req */ 14189 WL_PROXD_SESSION_FLAG_REQ_CIV = 0x00200000, /**< transmit civic loc req */ 14190 WL_PROXD_SESSION_FLAG_PRE_SCAN = 0x00400000, /* enable pre-scan for asap=1 */ 14191 WL_PROXD_SESSION_FLAG_AUTO_VHTACK = 0x00800000, /* use vhtack based on brcm ie */ 14192 WL_PROXD_SESSION_FLAG_VHTACK = 0x01000000, /* vht ack is in use - output only */ 14193 WL_PROXD_SESSION_FLAG_BDUR_NOPREF = 0x02000000, /* burst-duration: no preference */ 14194 WL_PROXD_SESSION_FLAG_NUM_FTM_NOPREF = 0x04000000, /* num of FTM frames: no preference */ 14195 WL_PROXD_SESSION_FLAG_FTM_SEP_NOPREF = 0x08000000, /* time btw FTM frams: no pref */ 14196 WL_PROXD_SESSION_FLAG_NUM_BURST_NOPREF = 0x10000000, /* num of bursts: no pref */ 14197 WL_PROXD_SESSION_FLAG_BURST_PERIOD_NOPREF = 0x20000000, /* burst period: no pref */ 14198 WL_PROXD_SESSION_FLAG_MBURST_FOLLOWUP = 0x40000000, /* new mburst algo - reserved */ 14199 WL_PROXD_SESSION_FLAG_MBURST_NODELAY = 0x80000000, /**< good until cancelled */ 14200 WL_PROXD_SESSION_FLAG_ALL = 0xffffffff 14201 14202 }; 14203 typedef uint32 wl_proxd_session_flags_t; 14204 14205 /** time units - mc supports up to 0.1ns resolution */ 14206 enum { 14207 WL_PROXD_TMU_TU = 0, /**< 1024us */ 14208 WL_PROXD_TMU_SEC = 1, 14209 WL_PROXD_TMU_MILLI_SEC = 2, 14210 WL_PROXD_TMU_MICRO_SEC = 3, 14211 WL_PROXD_TMU_NANO_SEC = 4, 14212 WL_PROXD_TMU_PICO_SEC = 5 14213 }; 14214 typedef int16 wl_proxd_tmu_t; 14215 14216 /** time interval e.g. 10ns */ 14217 typedef struct wl_proxd_intvl { 14218 uint32 intvl; 14219 wl_proxd_tmu_t tmu; 14220 uint8 pad[2]; 14221 } wl_proxd_intvl_t; 14222 14223 /** commands that can apply to proxd, method or a session */ 14224 enum { 14225 WL_PROXD_CMD_NONE = 0, 14226 WL_PROXD_CMD_GET_VERSION = 1, 14227 WL_PROXD_CMD_ENABLE = 2, 14228 WL_PROXD_CMD_DISABLE = 3, 14229 WL_PROXD_CMD_CONFIG = 4, 14230 WL_PROXD_CMD_START_SESSION = 5, 14231 WL_PROXD_CMD_BURST_REQUEST = 6, 14232 WL_PROXD_CMD_STOP_SESSION = 7, 14233 WL_PROXD_CMD_DELETE_SESSION = 8, 14234 WL_PROXD_CMD_GET_RESULT = 9, 14235 WL_PROXD_CMD_GET_INFO = 10, 14236 WL_PROXD_CMD_GET_STATUS = 11, 14237 WL_PROXD_CMD_GET_SESSIONS = 12, 14238 WL_PROXD_CMD_GET_COUNTERS = 13, 14239 WL_PROXD_CMD_CLEAR_COUNTERS = 14, 14240 WL_PROXD_CMD_COLLECT = 15, /* not supported, see 'wl proxd_collect' */ 14241 WL_PROXD_CMD_TUNE = 16, /* not supported, see 'wl proxd_tune' */ 14242 WL_PROXD_CMD_DUMP = 17, 14243 WL_PROXD_CMD_START_RANGING = 18, 14244 WL_PROXD_CMD_STOP_RANGING = 19, 14245 WL_PROXD_CMD_GET_RANGING_INFO = 20, 14246 WL_PROXD_CMD_IS_TLV_SUPPORTED = 21, 14247 14248 WL_PROXD_CMD_MAX 14249 }; 14250 typedef int16 wl_proxd_cmd_t; 14251 14252 /* session ids: 14253 * id 0 is reserved 14254 * ids 1..0x7fff - allocated by host/app 14255 * 0x8000-0xffff - allocated by firmware, used for auto/rx 14256 */ 14257 enum { 14258 WL_PROXD_SESSION_ID_GLOBAL = 0 14259 }; 14260 14261 /* Externally allocated sids */ 14262 #define WL_PROXD_SID_EXT_MAX 0x7fff 14263 #define WL_PROXD_SID_EXT_ALLOC(_sid) ((_sid) > 0 && (_sid) <= WL_PROXD_SID_EXT_MAX) 14264 14265 /* block size for reserved sid blocks */ 14266 #define WL_PROXD_SID_EXT_BLKSZ 256 14267 #define WL_PROXD_SID_EXT_BLK_START(_i) (WL_PROXD_SID_EXT_MAX - (_i) * WL_PROXD_SID_EXT_BLKSZ + 1) 14268 #define WL_PROXD_SID_EXT_BLK_END(_start) ((_start) + WL_PROXD_SID_EXT_BLKSZ - 1) 14269 14270 /* rrm block */ 14271 #define WL_PROXD_SID_RRM_START WL_PROXD_SID_EXT_BLK_START(1) 14272 #define WL_PROXD_SID_RRM_END WL_PROXD_SID_EXT_BLK_END(WL_PROXD_SID_RRM_START) 14273 14274 /* nan block */ 14275 #define WL_PROXD_SID_NAN_START WL_PROXD_SID_EXT_BLK_START(2) 14276 #define WL_PROXD_SID_NAN_END WL_PROXD_SID_EXT_BLK_END(WL_PROXD_SID_NAN_START) 14277 14278 /** maximum number sessions that can be allocated, may be less if tunable */ 14279 #define WL_PROXD_MAX_SESSIONS 16 14280 14281 typedef uint16 wl_proxd_session_id_t; 14282 14283 /* Use WL_PROXD_E_* errorcodes from this file if BCMUTILS_ERR_CODES not defined */ 14284 #ifndef BCMUTILS_ERR_CODES 14285 14286 /** status - TBD BCME_ vs proxd status - range reserved for BCME_ */ 14287 enum { 14288 WL_PROXD_E_LAST = -1056, 14289 WL_PROXD_E_NOAVAIL = -1056, 14290 WL_PROXD_E_EXT_SCHED = -1055, 14291 WL_PROXD_E_NOT_BCM = -1054, 14292 WL_PROXD_E_FRAME_TYPE = -1053, 14293 WL_PROXD_E_VERNOSUPPORT = -1052, 14294 WL_PROXD_E_SEC_NOKEY = -1051, 14295 WL_PROXD_E_SEC_POLICY = -1050, 14296 WL_PROXD_E_SCAN_INPROCESS = -1049, 14297 WL_PROXD_E_BAD_PARTIAL_TSF = -1048, 14298 WL_PROXD_E_SCANFAIL = -1047, 14299 WL_PROXD_E_NOTSF = -1046, 14300 WL_PROXD_E_POLICY = -1045, 14301 WL_PROXD_E_INCOMPLETE = -1044, 14302 WL_PROXD_E_OVERRIDDEN = -1043, 14303 WL_PROXD_E_ASAP_FAILED = -1042, 14304 WL_PROXD_E_NOTSTARTED = -1041, 14305 WL_PROXD_E_INVALIDMEAS = -1040, 14306 WL_PROXD_E_INCAPABLE = -1039, 14307 WL_PROXD_E_MISMATCH = -1038, 14308 WL_PROXD_E_DUP_SESSION = -1037, 14309 WL_PROXD_E_REMOTE_FAIL = -1036, 14310 WL_PROXD_E_REMOTE_INCAPABLE = -1035, 14311 WL_PROXD_E_SCHED_FAIL = -1034, 14312 WL_PROXD_E_PROTO = -1033, 14313 WL_PROXD_E_EXPIRED = -1032, 14314 WL_PROXD_E_TIMEOUT = -1031, 14315 WL_PROXD_E_NOACK = -1030, 14316 WL_PROXD_E_DEFERRED = -1029, 14317 WL_PROXD_E_INVALID_SID = -1028, 14318 WL_PROXD_E_REMOTE_CANCEL = -1027, 14319 WL_PROXD_E_CANCELED = -1026, /**< local */ 14320 WL_PROXD_E_INVALID_SESSION = -1025, 14321 WL_PROXD_E_BAD_STATE = -1024, 14322 WL_PROXD_E_START = -1024, 14323 WL_PROXD_E_ERROR = -1, 14324 WL_PROXD_E_OK = 0 14325 }; 14326 typedef int32 wl_proxd_status_t; 14327 14328 #endif /* BCMUTILS_ERR_CODES */ 14329 14330 /* proxd errors from phy */ 14331 #define PROXD_TOF_INIT_ERR_BITS 16 14332 14333 enum { 14334 WL_PROXD_PHY_ERR_LB_CORR_THRESH = (1 << 0), /* Loopback Correlation threshold */ 14335 WL_PROXD_PHY_ERR_RX_CORR_THRESH = (1 << 1), /* Received Correlation threshold */ 14336 WL_PROXD_PHY_ERR_LB_PEAK_POWER = (1 << 2), /* Loopback Peak power */ 14337 WL_PROXD_PHY_ERR_RX_PEAK_POWER = (1 << 3), /* Received Peak power */ 14338 WL_PROXD_PHY_ERR_BITFLIP = (1 << 4), /* Bitflips */ 14339 WL_PROXD_PHY_ERR_SNR = (1 << 5), /* SNR */ 14340 WL_PROXD_PHY_RX_STRT_WIN_OFF = (1 << 6), /* Receive start window is off */ 14341 WL_PROXD_PHY_RX_END_WIN_OFF = (1 << 7), /* Receive End window is off */ 14342 WL_PROXD_PHY_ERR_LOW_CONFIDENCE = (1 << 15), /* Low confidence on meas distance */ 14343 }; 14344 typedef uint32 wl_proxd_phy_error_t; 14345 14346 /** session states */ 14347 enum { 14348 WL_PROXD_SESSION_STATE_NONE = 0, 14349 WL_PROXD_SESSION_STATE_CREATED = 1, 14350 WL_PROXD_SESSION_STATE_CONFIGURED = 2, 14351 WL_PROXD_SESSION_STATE_STARTED = 3, 14352 WL_PROXD_SESSION_STATE_DELAY = 4, 14353 WL_PROXD_SESSION_STATE_USER_WAIT = 5, 14354 WL_PROXD_SESSION_STATE_SCHED_WAIT = 6, 14355 WL_PROXD_SESSION_STATE_BURST = 7, 14356 WL_PROXD_SESSION_STATE_STOPPING = 8, 14357 WL_PROXD_SESSION_STATE_ENDED = 9, 14358 WL_PROXD_SESSION_STATE_START_WAIT = 10, 14359 WL_PROXD_SESSION_STATE_DESTROYING = -1 14360 }; 14361 typedef int16 wl_proxd_session_state_t; 14362 14363 /** RTT sample flags */ 14364 enum { 14365 WL_PROXD_RTT_SAMPLE_NONE = 0x00, 14366 WL_PROXD_RTT_SAMPLE_DISCARD = 0x01 14367 }; 14368 typedef uint8 wl_proxd_rtt_sample_flags_t; 14369 typedef int16 wl_proxd_rssi_t; 14370 typedef uint16 wl_proxd_snr_t; 14371 typedef uint16 wl_proxd_bitflips_t; 14372 14373 /** result flags */ 14374 enum { 14375 WL_PRXOD_RESULT_FLAG_NONE = 0x0000, 14376 WL_PROXD_RESULT_FLAG_NLOS = 0x0001, /**< LOS - if available */ 14377 WL_PROXD_RESULT_FLAG_LOS = 0x0002, /**< NLOS - if available */ 14378 WL_PROXD_RESULT_FLAG_FATAL = 0x0004, /**< Fatal error during burst */ 14379 WL_PROXD_RESULT_FLAG_VHTACK = 0x0008, /* VHTACK or Legacy ACK used */ 14380 WL_PROXD_REQUEST_SENT = 0x0010, /* FTM request was sent */ 14381 WL_PROXD_REQUEST_ACKED = 0x0020, /* FTM request was acked */ 14382 WL_PROXD_LTFSEQ_STARTED = 0x0040, /* LTF sequence started */ 14383 WL_PROXD_RESULT_FLAG_ALL = 0xffff 14384 }; 14385 typedef int16 wl_proxd_result_flags_t; 14386 14387 #define WL_PROXD_RTT_SAMPLE_VERSION_1 1 14388 typedef struct wl_proxd_rtt_sample_v1 { 14389 uint8 id; /**< id for the sample - non-zero */ 14390 wl_proxd_rtt_sample_flags_t flags; 14391 wl_proxd_rssi_t rssi; 14392 wl_proxd_intvl_t rtt; /**< round trip time */ 14393 uint32 ratespec; 14394 wl_proxd_snr_t snr; 14395 wl_proxd_bitflips_t bitflips; 14396 wl_proxd_status_t status; 14397 int32 distance; 14398 wl_proxd_phy_error_t tof_phy_error; 14399 wl_proxd_phy_error_t tof_tgt_phy_error; /* target phy error bit map */ 14400 wl_proxd_snr_t tof_tgt_snr; 14401 wl_proxd_bitflips_t tof_tgt_bitflips; 14402 uint8 coreid; 14403 uint8 pad[3]; 14404 } wl_proxd_rtt_sample_v1_t; 14405 14406 #define WL_PROXD_RTT_RESULT_VERSION_1 1 14407 /** rtt measurement result */ 14408 typedef struct wl_proxd_rtt_result_v1 { 14409 wl_proxd_session_id_t sid; 14410 wl_proxd_result_flags_t flags; 14411 wl_proxd_status_t status; 14412 struct ether_addr peer; 14413 wl_proxd_session_state_t state; /**< current state */ 14414 union { 14415 wl_proxd_intvl_t retry_after; /* hint for errors */ 14416 wl_proxd_intvl_t burst_duration; /* burst duration */ 14417 } u; 14418 wl_proxd_rtt_sample_v1_t avg_rtt; 14419 uint32 avg_dist; /* 1/256m units */ 14420 uint16 sd_rtt; /* RTT standard deviation */ 14421 uint8 num_valid_rtt; /* valid rtt cnt */ 14422 uint8 num_ftm; /* actual num of ftm cnt (Configured) */ 14423 uint16 burst_num; /* in a session */ 14424 uint16 num_rtt; /* 0 if no detail */ 14425 uint16 num_meas; /* number of ftm frames seen OTA */ 14426 uint8 pad[2]; 14427 wl_proxd_rtt_sample_v1_t rtt[1]; /* variable */ 14428 } wl_proxd_rtt_result_v1_t; 14429 14430 #define WL_PROXD_RTT_SAMPLE_VERSION_2 2 14431 typedef struct wl_proxd_rtt_sample_v2 { 14432 uint16 version; 14433 uint16 length; 14434 uint8 id; /**< id for the sample - non-zero */ 14435 wl_proxd_rtt_sample_flags_t flags; 14436 wl_proxd_rssi_t rssi; 14437 wl_proxd_intvl_t rtt; /**< round trip time */ 14438 uint32 ratespec; 14439 wl_proxd_snr_t snr; 14440 wl_proxd_bitflips_t bitflips; 14441 wl_proxd_status_t status; 14442 int32 distance; 14443 wl_proxd_phy_error_t tof_phy_error; 14444 wl_proxd_phy_error_t tof_tgt_phy_error; /* target phy error bit map */ 14445 wl_proxd_snr_t tof_tgt_snr; 14446 wl_proxd_bitflips_t tof_tgt_bitflips; 14447 uint8 coreid; 14448 uint8 pad[3]; 14449 uint32 chanspec; 14450 } wl_proxd_rtt_sample_v2_t; 14451 14452 #define WL_PROXD_RTT_RESULT_VERSION_2 2 14453 /** rtt measurement result */ 14454 typedef struct wl_proxd_rtt_result_v2 { 14455 uint16 version; 14456 uint16 length; /* up to rtt[] */ 14457 wl_proxd_session_id_t sid; 14458 wl_proxd_result_flags_t flags; 14459 wl_proxd_status_t status; 14460 struct ether_addr peer; 14461 wl_proxd_session_state_t state; /**< current state */ 14462 union { 14463 wl_proxd_intvl_t retry_after; /* hint for errors */ 14464 wl_proxd_intvl_t burst_duration; /* burst duration */ 14465 } u; 14466 uint32 avg_dist; /* 1/256m units */ 14467 uint16 sd_rtt; /* RTT standard deviation */ 14468 uint8 num_valid_rtt; /* valid rtt cnt */ 14469 uint8 num_ftm; /* actual num of ftm cnt (Configured) */ 14470 uint16 burst_num; /* in a session */ 14471 uint16 num_rtt; /* 0 if no detail */ 14472 uint16 num_meas; /* number of ftm frames seen OTA */ 14473 uint8 pad[2]; 14474 wl_proxd_rtt_sample_v2_t rtt[1]; /* variable, first element is avg_rtt */ 14475 } wl_proxd_rtt_result_v2_t; 14476 14477 /** aoa measurement result */ 14478 typedef struct wl_proxd_aoa_result { 14479 wl_proxd_session_id_t sid; 14480 wl_proxd_result_flags_t flags; 14481 wl_proxd_status_t status; 14482 struct ether_addr peer; 14483 wl_proxd_session_state_t state; 14484 uint16 burst_num; 14485 uint8 pad[2]; 14486 /* wl_proxd_aoa_sample_t sample_avg; TBD */ 14487 } BWL_POST_PACKED_STRUCT wl_proxd_aoa_result_t; 14488 #include <packed_section_end.h> 14489 14490 /** global stats */ 14491 typedef struct wl_proxd_counters { 14492 uint32 tx; /* tx frame count */ 14493 uint32 rx; /* rx frame count */ 14494 uint32 burst; /* total number of burst */ 14495 uint32 sessions; /* total number of sessions */ 14496 uint32 max_sessions; /* max concurrency */ 14497 uint32 sched_fail; /* scheduling failures */ 14498 uint32 timeouts; /* timeouts */ 14499 uint32 protoerr; /* protocol errors */ 14500 uint32 noack; /* tx w/o ack */ 14501 uint32 txfail; /* any tx falure */ 14502 uint32 lci_req_tx; /* tx LCI requests */ 14503 uint32 lci_req_rx; /* rx LCI requests */ 14504 uint32 lci_rep_tx; /* tx LCI reports */ 14505 uint32 lci_rep_rx; /* rx LCI reports */ 14506 uint32 civic_req_tx; /* tx civic requests */ 14507 uint32 civic_req_rx; /* rx civic requests */ 14508 uint32 civic_rep_tx; /* tx civic reports */ 14509 uint32 civic_rep_rx; /* rx civic reports */ 14510 uint32 rctx; /* ranging contexts created */ 14511 uint32 rctx_done; /* count of ranging done */ 14512 uint32 publish_err; /* availability publishing errors */ 14513 uint32 on_chan; /* count of scheduler onchan */ 14514 uint32 off_chan; /* count of scheduler offchan */ 14515 uint32 tsf_lo; /* local tsf or session tsf */ 14516 uint32 tsf_hi; 14517 uint32 num_meas; 14518 } wl_proxd_counters_t; 14519 14520 typedef struct wl_proxd_counters wl_proxd_session_counters_t; 14521 14522 enum { 14523 WL_PROXD_CAP_NONE = 0x0000, 14524 WL_PROXD_CAP_ALL = 0xffff 14525 }; 14526 typedef int16 wl_proxd_caps_t; 14527 14528 /** method capabilities */ 14529 enum { 14530 WL_PROXD_FTM_CAP_NONE = 0x0000, 14531 WL_PROXD_FTM_CAP_FTM1 = 0x0001 14532 }; 14533 typedef uint16 wl_proxd_ftm_caps_t; 14534 14535 typedef struct wl_proxd_tlv_id_list { 14536 uint16 num_ids; 14537 uint16 ids[1]; 14538 } wl_proxd_tlv_id_list_t; 14539 14540 typedef struct wl_proxd_session_id_list { 14541 uint16 num_ids; 14542 wl_proxd_session_id_t ids[1]; 14543 } wl_proxd_session_id_list_t; 14544 14545 typedef struct wl_proxd_tpk { 14546 struct ether_addr peer; 14547 uint8 tpk[TPK_FTM_LEN]; 14548 } wl_proxd_tpk_t; 14549 14550 /* tlvs returned for get_info on ftm method 14551 * configuration: 14552 * proxd flags 14553 * event mask 14554 * debug mask 14555 * session defaults (session tlvs) 14556 * status tlv - not supported for ftm method 14557 * info tlv 14558 */ 14559 typedef struct wl_proxd_ftm_info { 14560 wl_proxd_ftm_caps_t caps; 14561 uint16 max_sessions; 14562 uint16 num_sessions; 14563 uint16 rx_max_burst; 14564 } wl_proxd_ftm_info_t; 14565 14566 enum { 14567 WL_PROXD_WAIT_NONE = 0x0000, 14568 WL_PROXD_WAIT_KEY = 0x0001, 14569 WL_PROXD_WAIT_SCHED = 0x0002, 14570 WL_PROXD_WAIT_TSF = 0x0004 14571 }; 14572 typedef int16 wl_proxd_wait_reason_t; 14573 14574 /* tlvs returned for get_info on session 14575 * session config (tlvs) 14576 * session info tlv 14577 */ 14578 typedef struct wl_proxd_ftm_session_info { 14579 uint16 sid; 14580 uint8 bss_index; 14581 uint8 pad; 14582 struct ether_addr bssid; 14583 wl_proxd_session_state_t state; 14584 wl_proxd_status_t status; 14585 uint16 burst_num; 14586 wl_proxd_wait_reason_t wait_reason; 14587 uint32 meas_start_lo; /* sn tsf of 1st meas for cur/prev burst */ 14588 uint32 meas_start_hi; 14589 } wl_proxd_ftm_session_info_t; 14590 14591 typedef struct wl_proxd_ftm_session_status { 14592 uint16 sid; 14593 wl_proxd_session_state_t state; 14594 wl_proxd_status_t status; 14595 uint16 burst_num; 14596 uint16 pad; 14597 } wl_proxd_ftm_session_status_t; 14598 14599 /** rrm range request */ 14600 typedef struct wl_proxd_range_req { 14601 uint16 num_repeat; 14602 uint16 init_delay_range; /**< in TUs */ 14603 uint8 pad; 14604 uint8 num_nbr; /**< number of (possible) neighbors */ 14605 nbr_element_t nbr[1]; 14606 } wl_proxd_range_req_t; 14607 14608 #define WL_PROXD_LCI_LAT_OFF 0 14609 #define WL_PROXD_LCI_LONG_OFF 5 14610 #define WL_PROXD_LCI_ALT_OFF 10 14611 14612 #define WL_PROXD_LCI_GET_LAT(_lci, _lat, _lat_err) { \ 14613 unsigned _off = WL_PROXD_LCI_LAT_OFF; \ 14614 _lat_err = (_lci)->data[(_off)] & 0x3f; \ 14615 _lat = (_lci)->data[(_off)+1]; \ 14616 _lat |= (_lci)->data[(_off)+2] << 8; \ 14617 _lat |= (_lci)->data[_(_off)+3] << 16; \ 14618 _lat |= (_lci)->data[(_off)+4] << 24; \ 14619 _lat <<= 2; \ 14620 _lat |= (_lci)->data[(_off)] >> 6; \ 14621 } 14622 14623 #define WL_PROXD_LCI_GET_LONG(_lci, _lcilong, _long_err) { \ 14624 unsigned _off = WL_PROXD_LCI_LONG_OFF; \ 14625 _long_err = (_lci)->data[(_off)] & 0x3f; \ 14626 _lcilong = (_lci)->data[(_off)+1]; \ 14627 _lcilong |= (_lci)->data[(_off)+2] << 8; \ 14628 _lcilong |= (_lci)->data[_(_off)+3] << 16; \ 14629 _lcilong |= (_lci)->data[(_off)+4] << 24; \ 14630 __lcilong <<= 2; \ 14631 _lcilong |= (_lci)->data[(_off)] >> 6; \ 14632 } 14633 14634 #define WL_PROXD_LCI_GET_ALT(_lci, _alt_type, _alt, _alt_err) { \ 14635 unsigned _off = WL_PROXD_LCI_ALT_OFF; \ 14636 _alt_type = (_lci)->data[_off] & 0x0f; \ 14637 _alt_err = (_lci)->data[(_off)] >> 4; \ 14638 _alt_err |= ((_lci)->data[(_off)+1] & 0x03) << 4; \ 14639 _alt = (_lci)->data[(_off)+2]; \ 14640 _alt |= (_lci)->data[(_off)+3] << 8; \ 14641 _alt |= (_lci)->data[_(_off)+4] << 16; \ 14642 _alt <<= 6; \ 14643 _alt |= (_lci)->data[(_off) + 1] >> 2; \ 14644 } 14645 14646 #define WL_PROXD_LCI_VERSION(_lci) ((_lci)->data[15] >> 6) 14647 14648 /* availability. advertising mechanism bss specific */ 14649 /** availablity flags */ 14650 enum { 14651 WL_PROXD_AVAIL_NONE = 0, 14652 WL_PROXD_AVAIL_NAN_PUBLISHED = 0x0001, 14653 WL_PROXD_AVAIL_SCHEDULED = 0x0002 /**< scheduled by proxd */ 14654 }; 14655 typedef int16 wl_proxd_avail_flags_t; 14656 14657 /** time reference */ 14658 enum { 14659 WL_PROXD_TREF_NONE = 0, 14660 WL_PROXD_TREF_DEV_TSF = 1, 14661 WL_PROXD_TREF_NAN_DW = 2, 14662 WL_PROXD_TREF_TBTT = 3, 14663 WL_PROXD_TREF_MAX /* last entry */ 14664 }; 14665 typedef int16 wl_proxd_time_ref_t; 14666 14667 /** proxd channel-time slot */ 14668 typedef struct { 14669 wl_proxd_intvl_t start; /**< from ref */ 14670 wl_proxd_intvl_t duration; /**< from start */ 14671 uint32 chanspec; 14672 } wl_proxd_time_slot_t; 14673 14674 typedef struct wl_proxd_avail24 { 14675 wl_proxd_avail_flags_t flags; /**< for query only */ 14676 wl_proxd_time_ref_t time_ref; 14677 uint16 max_slots; /**< for query only */ 14678 uint16 num_slots; 14679 wl_proxd_time_slot_t slots[1]; /**< ROM compat - not used */ 14680 wl_proxd_intvl_t repeat; 14681 wl_proxd_time_slot_t ts0[1]; 14682 } wl_proxd_avail24_t; 14683 #define WL_PROXD_AVAIL24_TIMESLOT(_avail24, _i) (&(_avail24)->ts0[(_i)]) 14684 #define WL_PROXD_AVAIL24_TIMESLOT_OFFSET(_avail24) OFFSETOF(wl_proxd_avail24_t, ts0) 14685 #define WL_PROXD_AVAIL24_TIMESLOTS(_avail24) WL_PROXD_AVAIL24_TIMESLOT(_avail24, 0) 14686 #define WL_PROXD_AVAIL24_SIZE(_avail24, _num_slots) (\ 14687 WL_PROXD_AVAIL24_TIMESLOT_OFFSET(_avail24) + \ 14688 (_num_slots) * sizeof(*WL_PROXD_AVAIL24_TIMESLOT(_avail24, 0))) 14689 14690 typedef struct wl_proxd_avail { 14691 wl_proxd_avail_flags_t flags; /**< for query only */ 14692 wl_proxd_time_ref_t time_ref; 14693 uint16 max_slots; /**< for query only */ 14694 uint16 num_slots; 14695 wl_proxd_intvl_t repeat; 14696 wl_proxd_time_slot_t slots[1]; 14697 } wl_proxd_avail_t; 14698 #define WL_PROXD_AVAIL_TIMESLOT(_avail, _i) (&(_avail)->slots[(_i)]) 14699 #define WL_PROXD_AVAIL_TIMESLOT_OFFSET(_avail) OFFSETOF(wl_proxd_avail_t, slots) 14700 14701 #define WL_PROXD_AVAIL_TIMESLOTS(_avail) WL_PROXD_AVAIL_TIMESLOT(_avail, 0) 14702 #define WL_PROXD_AVAIL_SIZE(_avail, _num_slots) (\ 14703 WL_PROXD_AVAIL_TIMESLOT_OFFSET(_avail) + \ 14704 (_num_slots) * sizeof(*WL_PROXD_AVAIL_TIMESLOT(_avail, 0))) 14705 14706 /* collect support TBD */ 14707 14708 /** debugging */ 14709 enum { 14710 WL_PROXD_DEBUG_NONE = 0x00000000, 14711 WL_PROXD_DEBUG_LOG = 0x00000001, 14712 WL_PROXD_DEBUG_IOV = 0x00000002, 14713 WL_PROXD_DEBUG_EVENT = 0x00000004, 14714 WL_PROXD_DEBUG_SESSION = 0x00000008, 14715 WL_PROXD_DEBUG_PROTO = 0x00000010, 14716 WL_PROXD_DEBUG_SCHED = 0x00000020, 14717 WL_PROXD_DEBUG_RANGING = 0x00000040, 14718 WL_PROXD_DEBUG_NAN = 0x00000080, 14719 WL_PROXD_DEBUG_PKT = 0x00000100, 14720 WL_PROXD_DEBUG_SEC = 0x00000200, 14721 WL_PROXD_DEBUG_EVENTLOG = 0x80000000, /* map/enable EVNET_LOG_TAG_PROXD_INFO */ 14722 WL_PROXD_DEBUG_ALL = 0xffffffff 14723 }; 14724 typedef uint32 wl_proxd_debug_mask_t; 14725 14726 /** tlv IDs - data length 4 bytes unless overridden by type, alignment 32 bits */ 14727 typedef enum { 14728 WL_PROXD_TLV_ID_NONE = 0, 14729 WL_PROXD_TLV_ID_METHOD = 1, 14730 WL_PROXD_TLV_ID_FLAGS = 2, 14731 WL_PROXD_TLV_ID_CHANSPEC = 3, /**< note: uint32 */ 14732 WL_PROXD_TLV_ID_TX_POWER = 4, 14733 WL_PROXD_TLV_ID_RATESPEC = 5, 14734 WL_PROXD_TLV_ID_BURST_DURATION = 6, /**< intvl - length of burst */ 14735 WL_PROXD_TLV_ID_BURST_PERIOD = 7, /**< intvl - between bursts */ 14736 WL_PROXD_TLV_ID_BURST_FTM_SEP = 8, /**< intvl - between FTMs */ 14737 WL_PROXD_TLV_ID_BURST_NUM_FTM = 9, /**< uint16 - per burst */ 14738 WL_PROXD_TLV_ID_NUM_BURST = 10, /**< uint16 */ 14739 WL_PROXD_TLV_ID_FTM_RETRIES = 11, /**< uint16 at FTM level */ 14740 WL_PROXD_TLV_ID_BSS_INDEX = 12, /**< uint8 */ 14741 WL_PROXD_TLV_ID_BSSID = 13, 14742 WL_PROXD_TLV_ID_INIT_DELAY = 14, /**< intvl - optional,non-standalone only */ 14743 WL_PROXD_TLV_ID_BURST_TIMEOUT = 15, /**< expect response within - intvl */ 14744 WL_PROXD_TLV_ID_EVENT_MASK = 16, /**< interested events - in/out */ 14745 WL_PROXD_TLV_ID_FLAGS_MASK = 17, /**< interested flags - in only */ 14746 WL_PROXD_TLV_ID_PEER_MAC = 18, /**< mac address of peer */ 14747 WL_PROXD_TLV_ID_FTM_REQ = 19, /**< dot11_ftm_req */ 14748 WL_PROXD_TLV_ID_LCI_REQ = 20, 14749 WL_PROXD_TLV_ID_LCI = 21, 14750 WL_PROXD_TLV_ID_CIVIC_REQ = 22, 14751 WL_PROXD_TLV_ID_CIVIC = 23, 14752 WL_PROXD_TLV_ID_AVAIL24 = 24, /**< ROM compatibility */ 14753 WL_PROXD_TLV_ID_SESSION_FLAGS = 25, 14754 WL_PROXD_TLV_ID_SESSION_FLAGS_MASK = 26, /**< in only */ 14755 WL_PROXD_TLV_ID_RX_MAX_BURST = 27, /**< uint16 - limit bursts per session */ 14756 WL_PROXD_TLV_ID_RANGING_INFO = 28, /**< ranging info */ 14757 WL_PROXD_TLV_ID_RANGING_FLAGS = 29, /**< uint16 */ 14758 WL_PROXD_TLV_ID_RANGING_FLAGS_MASK = 30, /**< uint16, in only */ 14759 WL_PROXD_TLV_ID_NAN_MAP_ID = 31, 14760 WL_PROXD_TLV_ID_DEV_ADDR = 32, 14761 WL_PROXD_TLV_ID_AVAIL = 33, /**< wl_proxd_avail_t */ 14762 WL_PROXD_TLV_ID_TLV_ID = 34, /* uint16 tlv-id */ 14763 WL_PROXD_TLV_ID_FTM_REQ_RETRIES = 35, /* uint16 FTM request retries */ 14764 WL_PROXD_TLV_ID_TPK = 36, /* 32byte TPK */ 14765 WL_PROXD_TLV_ID_RI_RR = 36, /* RI_RR */ 14766 WL_PROXD_TLV_ID_TUNE = 37, /* wl_proxd_pararms_tof_tune_t */ 14767 WL_PROXD_TLV_ID_CUR_ETHER_ADDR = 38, /* Source Address used for Tx */ 14768 14769 /* output - 512 + x */ 14770 WL_PROXD_TLV_ID_STATUS = 512, 14771 WL_PROXD_TLV_ID_COUNTERS = 513, 14772 WL_PROXD_TLV_ID_INFO = 514, 14773 WL_PROXD_TLV_ID_RTT_RESULT = 515, 14774 WL_PROXD_TLV_ID_AOA_RESULT = 516, 14775 WL_PROXD_TLV_ID_SESSION_INFO = 517, 14776 WL_PROXD_TLV_ID_SESSION_STATUS = 518, 14777 WL_PROXD_TLV_ID_SESSION_ID_LIST = 519, 14778 WL_PROXD_TLV_ID_RTT_RESULT_V2 = 520, 14779 14780 /* debug tlvs can be added starting 1024 */ 14781 WL_PROXD_TLV_ID_DEBUG_MASK = 1024, 14782 WL_PROXD_TLV_ID_COLLECT = 1025, /**< output only */ 14783 WL_PROXD_TLV_ID_STRBUF = 1026, 14784 14785 WL_PROXD_TLV_ID_COLLECT_HEADER = 1025, /* wl_proxd_collect_header_t */ 14786 WL_PROXD_TLV_ID_COLLECT_INFO = 1028, /* wl_proxd_collect_info_t */ 14787 WL_PROXD_TLV_ID_COLLECT_DATA = 1029, /* wl_proxd_collect_data_t */ 14788 WL_PROXD_TLV_ID_COLLECT_CHAN_DATA = 1030, /* wl_proxd_collect_data_t */ 14789 WL_PROXD_TLV_ID_MF_STATS_DATA = 1031, /* mf_stats_buffer */ 14790 14791 WL_PROXD_TLV_ID_COLLECT_INLINE_HEADER = 1032, 14792 WL_PROXD_TLV_ID_COLLECT_INLINE_FRAME_INFO = 1033, 14793 WL_PROXD_TLV_ID_COLLECT_INLINE_FRAME_DATA = 1034, 14794 WL_PROXD_TLV_ID_COLLECT_INLINE_RESULTS = 1035, 14795 14796 WL_PROXD_TLV_ID_MAX 14797 } wl_proxd_tlv_types_t; 14798 14799 #define TOF_COLLECT_INLINE_HEADER_INFO_VER_1 1 14800 14801 typedef struct wl_proxd_collect_inline_header_info_v1 14802 { 14803 uint16 version; 14804 uint16 pad1; 14805 uint32 ratespec; /* override */ 14806 chanspec_t chanspec; 14807 uint16 num_ftm; 14808 struct ether_addr peer_mac; 14809 struct ether_addr cur_ether_addr; /* source address for Tx */ 14810 } wl_proxd_collect_inline_header_info_v1_t; 14811 14812 #define TOF_COLLECT_INLINE_RESULTS_VER_1 1 14813 typedef struct wl_proxd_collect_inline_results_info_v1 14814 { 14815 uint16 version; 14816 uint16 pad1; 14817 uint32 meanrtt; 14818 uint32 distance; 14819 uint16 num_rtt; 14820 uint16 pad2; 14821 int32 status; 14822 uint32 ratespec; 14823 } wl_proxd_collect_inline_results_info_v1_t; 14824 14825 #define TOF_COLLECT_INLINE_FRAME_INFO_VER_1 1 14826 typedef struct wl_proxd_collect_inline_frame_info_v1 14827 { 14828 uint16 version; 14829 uint16 pad1; 14830 int32 gd; 14831 uint32 T[4]; 14832 uint32 prev_t1; 14833 uint32 prev_t4; 14834 int32 hadj; 14835 int8 rssi; 14836 uint8 pad[3]; 14837 } wl_proxd_collect_inline_frame_info_v1_t; 14838 14839 #define TOF_COLLECT_INLINE_FRAME_INFO_VER_2 2 14840 typedef struct wl_proxd_collect_inline_frame_info_v2 14841 { 14842 uint16 version; 14843 uint16 pad1; 14844 int32 gd; 14845 uint32 T[4]; 14846 int32 hadj; 14847 int8 rssi; 14848 uint8 pad[3]; 14849 } wl_proxd_collect_inline_frame_info_v2_t; 14850 14851 typedef struct wl_proxd_tlv { 14852 uint16 id; 14853 uint16 len; 14854 uint8 data[1]; 14855 } wl_proxd_tlv_t; 14856 14857 /** proxd iovar - applies to proxd, method or session */ 14858 typedef struct wl_proxd_iov { 14859 uint16 version; 14860 uint16 len; 14861 wl_proxd_cmd_t cmd; 14862 wl_proxd_method_t method; 14863 wl_proxd_session_id_t sid; 14864 uint8 PAD[2]; 14865 wl_proxd_tlv_t tlvs[1]; /**< variable */ 14866 } wl_proxd_iov_t; 14867 14868 #define WL_PROXD_IOV_HDR_SIZE OFFSETOF(wl_proxd_iov_t, tlvs) 14869 14870 /* The following event definitions may move to bcmevent.h, but sharing proxd types 14871 * across needs more invasive changes unrelated to proxd 14872 */ 14873 enum { 14874 WL_PROXD_EVENT_NONE = 0, /**< not an event, reserved */ 14875 WL_PROXD_EVENT_SESSION_CREATE = 1, 14876 WL_PROXD_EVENT_SESSION_START = 2, 14877 WL_PROXD_EVENT_FTM_REQ = 3, 14878 WL_PROXD_EVENT_BURST_START = 4, 14879 WL_PROXD_EVENT_BURST_END = 5, 14880 WL_PROXD_EVENT_SESSION_END = 6, 14881 WL_PROXD_EVENT_SESSION_RESTART = 7, 14882 WL_PROXD_EVENT_BURST_RESCHED = 8, /**< burst rescheduled-e.g. partial TSF */ 14883 WL_PROXD_EVENT_SESSION_DESTROY = 9, 14884 WL_PROXD_EVENT_RANGE_REQ = 10, 14885 WL_PROXD_EVENT_FTM_FRAME = 11, 14886 WL_PROXD_EVENT_DELAY = 12, 14887 WL_PROXD_EVENT_VS_INITIATOR_RPT = 13, /**< (target) rx initiator-report */ 14888 WL_PROXD_EVENT_RANGING = 14, 14889 WL_PROXD_EVENT_LCI_MEAS_REP = 15, /* LCI measurement report */ 14890 WL_PROXD_EVENT_CIVIC_MEAS_REP = 16, /* civic measurement report */ 14891 WL_PROXD_EVENT_COLLECT = 17, 14892 WL_PROXD_EVENT_START_WAIT = 18, /* waiting to start */ 14893 WL_PROXD_EVENT_MF_STATS = 19, /* mf stats event */ 14894 14895 WL_PROXD_EVENT_MAX 14896 }; 14897 typedef int16 wl_proxd_event_type_t; 14898 14899 /** proxd event mask - upto 32 events for now */ 14900 typedef uint32 wl_proxd_event_mask_t; 14901 14902 #define WL_PROXD_EVENT_MASK_ALL 0xfffffffe 14903 #define WL_PROXD_EVENT_MASK_EVENT(_event_type) (1 << (_event_type)) 14904 #define WL_PROXD_EVENT_ENABLED(_mask, _event_type) (\ 14905 ((_mask) & WL_PROXD_EVENT_MASK_EVENT(_event_type)) != 0) 14906 14907 /** proxd event - applies to proxd, method or session */ 14908 typedef struct wl_proxd_event { 14909 uint16 version; 14910 uint16 len; 14911 wl_proxd_event_type_t type; 14912 wl_proxd_method_t method; 14913 wl_proxd_session_id_t sid; 14914 uint8 pad[2]; /* This field is used fragmentation purpose */ 14915 wl_proxd_tlv_t tlvs[1]; /**< variable */ 14916 } wl_proxd_event_t; 14917 14918 enum { 14919 WL_PROXD_RANGING_STATE_NONE = 0, 14920 WL_PROXD_RANGING_STATE_NOTSTARTED = 1, 14921 WL_PROXD_RANGING_STATE_INPROGRESS = 2, 14922 WL_PROXD_RANGING_STATE_DONE = 3 14923 }; 14924 typedef int16 wl_proxd_ranging_state_t; 14925 14926 /** proxd ranging flags */ 14927 enum { 14928 WL_PROXD_RANGING_FLAG_NONE = 0x0000, /**< no flags */ 14929 WL_PROXD_RANGING_FLAG_DEL_SESSIONS_ON_STOP = 0x0001, 14930 WL_PROXD_RANGING_FLAG_ALL = 0xffff 14931 }; 14932 typedef uint16 wl_proxd_ranging_flags_t; 14933 14934 struct wl_proxd_ranging_info { 14935 wl_proxd_status_t status; 14936 wl_proxd_ranging_state_t state; 14937 wl_proxd_ranging_flags_t flags; 14938 uint16 num_sids; 14939 uint16 num_done; 14940 }; 14941 typedef struct wl_proxd_ranging_info wl_proxd_ranging_info_t; 14942 14943 #include <packed_section_start.h> 14944 /* Legacy platform i.e. 43342/43430 */ 14945 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_1 1 14946 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_event_data_v1 { 14947 uint32 H_LB[K_TOF_COLLECT_H_SIZE_20MHZ]; 14948 uint32 H_RX[K_TOF_COLLECT_H_SIZE_20MHZ]; 14949 uint8 ri_rr[FTM_TPK_LEN]; 14950 wl_proxd_phy_error_t phy_err_mask; 14951 } BWL_POST_PACKED_STRUCT wl_proxd_collect_event_data_v1_t; 14952 14953 /* Secured 2.0 supoorted devices i.e. 4364 */ 14954 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_2 2 14955 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_event_data_v2 { 14956 uint32 H_LB[K_TOF_COLLECT_H_SIZE_20MHZ]; 14957 uint32 H_RX[K_TOF_COLLECT_H_SIZE_20MHZ]; 14958 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 14959 wl_proxd_phy_error_t phy_err_mask; 14960 } BWL_POST_PACKED_STRUCT wl_proxd_collect_event_data_v2_t; 14961 #include <packed_section_end.h> 14962 14963 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_3 3 14964 typedef struct wl_proxd_collect_event_data_v3 { 14965 uint16 version; 14966 uint16 length; 14967 uint32 H_LB[K_TOF_COLLECT_H_SIZE_20MHZ]; 14968 uint32 H_RX[K_TOF_COLLECT_H_SIZE_20MHZ]; 14969 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 14970 wl_proxd_phy_error_t phy_err_mask; 14971 } wl_proxd_collect_event_data_v3_t; 14972 14973 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_MAX WL_PROXD_COLLECT_EVENT_DATA_VERSION_3 14974 14975 /** Data returned by the bssload_report iovar. This is also the WLC_E_BSS_LOAD event data */ 14976 #include <packed_section_start.h> 14977 typedef BWL_PRE_PACKED_STRUCT struct wl_bssload { 14978 uint16 sta_count; /**< station count */ 14979 uint16 aac; /**< available admission capacity */ 14980 uint8 chan_util; /**< channel utilization */ 14981 } BWL_POST_PACKED_STRUCT wl_bssload_t; 14982 #include <packed_section_end.h> 14983 14984 /** 14985 * Maximum number of configurable BSS Load levels. The number of BSS Load 14986 * ranges is always 1 more than the number of configured levels. eg. if 14987 * 3 levels of 10, 20, 30 are configured then this defines 4 load ranges: 14988 * 0-10, 11-20, 21-30, 31-255. A WLC_E_BSS_LOAD event is generated each time 14989 * the utilization level crosses into another range, subject to the rate limit. 14990 */ 14991 #define MAX_BSSLOAD_LEVELS 8 14992 #define MAX_BSSLOAD_RANGES (MAX_BSSLOAD_LEVELS + 1) 14993 14994 /** BSS Load event notification configuration. */ 14995 typedef struct wl_bssload_cfg { 14996 uint32 rate_limit_msec; /**< # of events posted to application will be limited to 14997 * one per specified period (0 to disable rate limit). 14998 */ 14999 uint8 num_util_levels; /**< Number of entries in util_levels[] below */ 15000 uint8 util_levels[MAX_BSSLOAD_LEVELS]; 15001 /**< Variable number of BSS Load utilization levels in 15002 * low to high order. An event will be posted each time 15003 * a received beacon's BSS Load IE channel utilization 15004 * value crosses a level. 15005 */ 15006 uint8 PAD[3]; 15007 } wl_bssload_cfg_t; 15008 15009 /** Multiple roaming profile suport */ 15010 #define WL_MAX_ROAM_PROF_BRACKETS 4 15011 15012 #define WL_ROAM_PROF_VER_0 0 15013 #define WL_ROAM_PROF_VER_1 1 15014 #define WL_ROAM_PROF_VER_2 2 15015 #define WL_MAX_ROAM_PROF_VER WL_ROAM_PROF_VER_1 15016 15017 #define WL_ROAM_PROF_NONE (0 << 0) 15018 #define WL_ROAM_PROF_LAZY (1 << 0) 15019 #define WL_ROAM_PROF_NO_CI (1 << 1) 15020 #define WL_ROAM_PROF_SUSPEND (1 << 2) 15021 #define WL_ROAM_PROF_SYNC_DTIM (1 << 6) 15022 #define WL_ROAM_PROF_DEFAULT (1 << 7) /**< backward compatible single default profile */ 15023 15024 #define WL_FACTOR_TABLE_MAX_LIMIT 5 15025 15026 #define WL_CU_2G_ROAM_TRIGGER (-60) 15027 #define WL_CU_5G_ROAM_TRIGGER (-70) 15028 15029 #define WL_CU_SCORE_DELTA_DEFAULT 20 15030 15031 #define WL_MAX_CHANNEL_USAGE 0x0FF 15032 #define WL_CU_PERCENTAGE_DISABLE 0 15033 #define WL_CU_PERCENTAGE_DEFAULT 70 15034 #define WL_CU_PERCENTAGE_MAX 100 15035 #define WL_CU_CALC_DURATION_DEFAULT 10 /* seconds */ 15036 #define WL_CU_CALC_DURATION_MAX 60 /* seconds */ 15037 15038 #define WL_ESTM_LOW_TRIGGER_DISABLE 0 15039 #define WL_ESTM_LOW_TRIGGER_DEFAULT 5 /* Mbps */ 15040 #define WL_ESTM_LOW_TRIGGER_MAX 250 /* Mbps */ 15041 #define WL_ESTM_ROAM_DELTA_DEFAULT 10 15042 15043 typedef struct wl_roam_prof_v3 { 15044 uint8 roam_flags; /**< bit flags */ 15045 int8 roam_trigger; /**< RSSI trigger level per profile/RSSI bracket */ 15046 int8 rssi_lower; 15047 int8 roam_delta; 15048 15049 /* if channel_usage if zero, roam_delta is rssi delta required for new AP */ 15050 /* if channel_usage if non-zero, roam_delta is score delta(%) required for new AP */ 15051 int8 rssi_boost_thresh; /**< Min RSSI to qualify for RSSI boost */ 15052 int8 rssi_boost_delta; /**< RSSI boost for AP in the other band */ 15053 uint16 nfscan; /**< number of full scan to start with */ 15054 uint16 fullscan_period; 15055 uint16 init_scan_period; 15056 uint16 backoff_multiplier; 15057 uint16 max_scan_period; 15058 uint8 channel_usage; 15059 uint8 cu_avg_calc_dur; 15060 uint16 estm_low_trigger; /**< ESTM low throughput roam trigger */ 15061 int8 estm_roam_delta; /**< ESTM low throughput roam delta */ 15062 uint8 pad; 15063 } wl_roam_prof_v3_t; 15064 15065 typedef struct wl_roam_prof_v2 { 15066 int8 roam_flags; /**< bit flags */ 15067 int8 roam_trigger; /**< RSSI trigger level per profile/RSSI bracket */ 15068 int8 rssi_lower; 15069 int8 roam_delta; 15070 15071 /* if channel_usage if zero, roam_delta is rssi delta required for new AP */ 15072 /* if channel_usage if non-zero, roam_delta is score delta(%) required for new AP */ 15073 int8 rssi_boost_thresh; /**< Min RSSI to qualify for RSSI boost */ 15074 int8 rssi_boost_delta; /**< RSSI boost for AP in the other band */ 15075 uint16 nfscan; /**< number of full scan to start with */ 15076 uint16 fullscan_period; 15077 uint16 init_scan_period; 15078 uint16 backoff_multiplier; 15079 uint16 max_scan_period; 15080 uint8 channel_usage; 15081 uint8 cu_avg_calc_dur; 15082 uint8 pad[2]; 15083 } wl_roam_prof_v2_t; 15084 15085 typedef struct wl_roam_prof_v1 { 15086 int8 roam_flags; /**< bit flags */ 15087 int8 roam_trigger; /**< RSSI trigger level per profile/RSSI bracket */ 15088 int8 rssi_lower; 15089 int8 roam_delta; 15090 15091 /* if channel_usage if zero, roam_delta is rssi delta required for new AP */ 15092 /* if channel_usage if non-zero, roam_delta is score delta(%) required for new AP */ 15093 int8 rssi_boost_thresh; /**< Min RSSI to qualify for RSSI boost */ 15094 int8 rssi_boost_delta; /**< RSSI boost for AP in the other band */ 15095 uint16 nfscan; /**< number of full scan to start with */ 15096 uint16 fullscan_period; 15097 uint16 init_scan_period; 15098 uint16 backoff_multiplier; 15099 uint16 max_scan_period; 15100 } wl_roam_prof_v1_t; 15101 15102 typedef struct wl_roam_prof_band_v3 { 15103 uint32 band; /**< Must be just one band */ 15104 uint16 ver; /**< version of this struct */ 15105 uint16 len; /**< length in bytes of this structure */ 15106 wl_roam_prof_v3_t roam_prof[WL_MAX_ROAM_PROF_BRACKETS]; 15107 } wl_roam_prof_band_v3_t; 15108 15109 typedef struct wl_roam_prof_band_v2 { 15110 uint32 band; /**< Must be just one band */ 15111 uint16 ver; /**< version of this struct */ 15112 uint16 len; /**< length in bytes of this structure */ 15113 wl_roam_prof_v2_t roam_prof[WL_MAX_ROAM_PROF_BRACKETS]; 15114 } wl_roam_prof_band_v2_t; 15115 15116 typedef struct wl_roam_prof_band_v1 { 15117 uint32 band; /**< Must be just one band */ 15118 uint16 ver; /**< version of this struct */ 15119 uint16 len; /**< length in bytes of this structure */ 15120 wl_roam_prof_v1_t roam_prof[WL_MAX_ROAM_PROF_BRACKETS]; 15121 } wl_roam_prof_band_v1_t; 15122 15123 #define BSS_MAXTABLE_SIZE 10 15124 #define WNM_BSS_SELECT_FACTOR_VERSION 1 15125 typedef struct wnm_bss_select_factor_params { 15126 uint8 low; 15127 uint8 high; 15128 uint8 factor; 15129 uint8 pad; 15130 } wnm_bss_select_factor_params_t; 15131 15132 #define WNM_BSS_SELECT_FIXED_SIZE OFFSETOF(wnm_bss_select_factor_cfg_t, params) 15133 typedef struct wnm_bss_select_factor_cfg { 15134 uint8 version; 15135 uint8 band; 15136 uint16 type; 15137 uint16 pad; 15138 uint16 count; 15139 wnm_bss_select_factor_params_t params[1]; 15140 } wnm_bss_select_factor_cfg_t; 15141 15142 #define WNM_BSS_SELECT_WEIGHT_VERSION 1 15143 typedef struct wnm_bss_select_weight_cfg { 15144 uint8 version; 15145 uint8 band; 15146 uint16 type; 15147 uint16 weight; /* weightage for each type between 0 to 100 */ 15148 } wnm_bss_select_weight_cfg_t; 15149 15150 /* For branches before koala .. wbtext is part 15151 * of wnm need to use below type only 15152 */ 15153 typedef struct wnm_btm_default_score_cfg { 15154 uint32 default_score; /* default score */ 15155 uint8 band; 15156 } wnm_btm_default_score_cfg_t; 15157 15158 /* For branches from koala and above .. wbtext is 15159 * seperate module..need to use below type only 15160 */ 15161 typedef struct wbtext_btm_default_score_cfg { 15162 uint32 default_score; /* default score */ 15163 uint8 band; 15164 } wbtext_btm_default_score_cfg_t; 15165 15166 #define WNM_BSS_SELECT_TYPE_RSSI 0 15167 #define WNM_BSS_SELECT_TYPE_CU 1 15168 #define WNM_BSS_SELECT_TYPE_ESTM_DL 2 15169 15170 #define WNM_BSSLOAD_MONITOR_VERSION 1 15171 typedef struct wnm_bssload_monitor_cfg { 15172 uint8 version; 15173 uint8 band; 15174 uint8 duration; /* duration between 1 to 20sec */ 15175 } wnm_bssload_monitor_cfg_t; 15176 15177 #define WNM_ROAM_TRIGGER_VERSION 1 15178 typedef struct wnm_roam_trigger_cfg { 15179 uint8 version; 15180 uint8 band; 15181 uint16 type; 15182 int16 trigger; /* trigger for each type in new roam algorithm */ 15183 } wnm_roam_trigger_cfg_t; 15184 15185 /* Data structures for Interface Create/Remove */ 15186 15187 #define WL_INTERFACE_CREATE_VER (0) 15188 #define WL_INTERFACE_CREATE_VER_1 1 15189 #define WL_INTERFACE_CREATE_VER_2 2 15190 #define WL_INTERFACE_CREATE_VER_3 3 15191 15192 /* 15193 * The flags filed of the wl_interface_create is designed to be 15194 * a Bit Mask. As of now only Bit 0 and Bit 1 are used as mentioned below. 15195 * The rest of the bits can be used, incase we have to provide 15196 * more information to the dongle 15197 */ 15198 15199 /* 15200 * Bit 0 of flags field is used to inform whether the interface requested to 15201 * be created is STA or AP. 15202 * 0 - Create a STA interface 15203 * 1 - Create an AP interface 15204 * NOTE: This Bit 0 is applicable for the WL_INTERFACE_CREATE_VER < 2 15205 */ 15206 #define WL_INTERFACE_CREATE_STA (0 << 0) 15207 #define WL_INTERFACE_CREATE_AP (1 << 0) 15208 15209 /* 15210 * From revision >= 2 Bit 0 of flags field will not used be for STA or AP interface creation. 15211 * "iftype" field shall be used for identifying the interface type. 15212 */ 15213 typedef enum wl_interface_type { 15214 WL_INTERFACE_TYPE_STA = 0, 15215 WL_INTERFACE_TYPE_AP = 1, 15216 WL_INTERFACE_TYPE_NAN = 3, 15217 WL_INTERFACE_TYPE_P2P_GO = 4, 15218 WL_INTERFACE_TYPE_P2P_GC = 5, 15219 WL_INTERFACE_TYPE_P2P_DISC = 6, 15220 WL_INTERFACE_TYPE_IBSS = 7, 15221 WL_INTERFACE_TYPE_MAX 15222 } wl_interface_type_t; 15223 15224 /* 15225 * Bit 1 of flags field is used to inform whether MAC is present in the 15226 * data structure or not. 15227 * 0 - Ignore mac_addr field 15228 * 1 - Use the mac_addr field 15229 */ 15230 #define WL_INTERFACE_MAC_DONT_USE (0 << 1) 15231 #define WL_INTERFACE_MAC_USE (1 << 1) 15232 15233 /* 15234 * Bit 2 of flags field is used to inform whether core or wlc index 15235 * is present in the data structure or not. 15236 * 0 - Ignore wlc_index field 15237 * 1 - Use the wlc_index field 15238 */ 15239 #define WL_INTERFACE_WLC_INDEX_DONT_USE (0 << 2) 15240 #define WL_INTERFACE_WLC_INDEX_USE (1 << 2) 15241 15242 /* 15243 * Bit 3 of flags field is used to create interface on the host requested interface index 15244 * 0 - Ignore if_index field 15245 * 1 - Use the if_index field 15246 */ 15247 #define WL_INTERFACE_IF_INDEX_USE (1 << 3) 15248 15249 /* 15250 * Bit 4 of flags field is used to assign BSSID 15251 * 0 - Ignore bssid field 15252 * 1 - Use the bssid field 15253 */ 15254 #define WL_INTERFACE_BSSID_INDEX_USE (1 << 4) 15255 15256 typedef struct wl_interface_create { 15257 uint16 ver; /* version of this struct */ 15258 uint32 flags; /* flags that defines the operation */ 15259 struct ether_addr mac_addr; /* Optional Mac address */ 15260 } wl_interface_create_t; 15261 15262 typedef struct wl_interface_create_v1 { 15263 uint16 ver; /**< version of this struct */ 15264 uint8 pad1[2]; /**< Padding bytes */ 15265 uint32 flags; /**< flags that defines the operation */ 15266 struct ether_addr mac_addr; /**< Optional Mac address */ 15267 uint8 pad2[2]; /**< Padding bytes */ 15268 uint32 wlc_index; /**< Optional wlc index */ 15269 } wl_interface_create_v1_t; 15270 15271 typedef struct wl_interface_create_v2 { 15272 uint16 ver; /**< version of this struct */ 15273 uint8 pad1[2]; /**< Padding bytes */ 15274 uint32 flags; /**< flags that defines the operation */ 15275 struct ether_addr mac_addr; /**< Optional Mac address */ 15276 uint8 iftype; /**< Type of interface created */ 15277 uint8 pad2; /**< Padding bytes */ 15278 uint32 wlc_index; /**< Optional wlc index */ 15279 } wl_interface_create_v2_t; 15280 15281 typedef struct wl_interface_create_v3 { 15282 uint16 ver; /**< version of this struct */ 15283 uint16 len; /**< length of whole structure including variable length */ 15284 uint16 fixed_len; /**< Fixed length of this structure excluding data[] */ 15285 uint8 iftype; /**< Type of interface created */ 15286 uint8 wlc_index; /**< Optional wlc index */ 15287 uint32 flags; /**< flags that defines the operation */ 15288 struct ether_addr mac_addr; /**< Optional Mac address */ 15289 struct ether_addr bssid; /**< Optional BSSID */ 15290 uint8 if_index; /**< interface index requested by Host */ 15291 uint8 pad[3]; /**< Padding bytes to ensure data[] is at 32 bit aligned */ 15292 uint8 data[]; /**< Optional application/Module specific data */ 15293 } wl_interface_create_v3_t; 15294 15295 #define WL_INTERFACE_INFO_VER_1 1 15296 #define WL_INTERFACE_INFO_VER_2 2 15297 15298 typedef struct wl_interface_info { 15299 uint16 ver; /* version of this struct */ 15300 struct ether_addr mac_addr; /* MAC address of the interface */ 15301 char ifname[BCM_MSG_IFNAME_MAX]; /* name of interface */ 15302 uint8 bsscfgidx; /* source bsscfg index */ 15303 } wl_interface_info_t; 15304 15305 typedef struct wl_interface_info_v1 { 15306 uint16 ver; /**< version of this struct */ 15307 struct ether_addr mac_addr; /**< MAC address of the interface */ 15308 char ifname[BCM_MSG_IFNAME_MAX]; /**< name of interface */ 15309 uint8 bsscfgidx; /**< source bsscfg index */ 15310 uint8 PAD; 15311 } wl_interface_info_v1_t; 15312 15313 typedef struct wl_interface_info_v2 { 15314 uint16 ver; /**< version of this struct */ 15315 uint16 length; /**< length of the whole structure */ 15316 struct ether_addr mac_addr; /**< MAC address of the interface */ 15317 uint8 bsscfgidx; /**< source bsscfg index */ 15318 uint8 if_index; /**< Interface index allocated by FW */ 15319 char ifname[BCM_MSG_IFNAME_MAX]; /**< name of interface */ 15320 } wl_interface_info_v2_t; 15321 15322 #define PHY_RXIQEST_AVERAGING_DELAY 10 15323 15324 typedef struct wl_iqest_params { 15325 uint32 rxiq; 15326 uint8 niter; 15327 uint8 delay; 15328 uint8 PAD[2]; 15329 } wl_iqest_params_t; 15330 15331 typedef struct wl_iqest_sweep_params { 15332 wl_iqest_params_t params; 15333 uint8 nchannels; 15334 uint8 channel[3]; /** variable */ 15335 } wl_iqest_sweep_params_t; 15336 15337 typedef struct wl_iqest_value { 15338 uint8 channel; 15339 uint8 PAD[3]; 15340 uint32 rxiq; 15341 } wl_iqest_value_t; 15342 15343 typedef struct wl_iqest_result { 15344 uint8 nvalues; 15345 uint8 PAD[3]; 15346 wl_iqest_value_t value[1]; 15347 } wl_iqest_result_t; 15348 15349 #define WL_PRIO_ROAM_PROF_V1 (1u) 15350 15351 typedef struct wl_prio_roam_prof_v1 { 15352 uint16 version; /* Version info */ 15353 uint16 length; /* byte length of this structure */ 15354 uint8 prio_roam_mode; /* Roam mode RCC/RCC+Full Scan */ 15355 uint8 PAD[3]; 15356 } wl_prio_roam_prof_v1_t; 15357 15358 typedef enum wl_prio_roam_mode { 15359 PRIO_ROAM_MODE_OFF = 0, /* Prio_Roam feature disable */ 15360 PRIO_ROAM_MODE_RCC_ONLY = 1, /* Scan RCC list only */ 15361 PRIO_ROAM_MODE_RCC_FULLSCAN = 2, /* Scan RCC list + Full scan */ 15362 PRIO_ROAM_MODE_FULLSCAN_ONLY = 3 /* Full Scan only */ 15363 } wl_prio_roam_mode_t; 15364 15365 /* BTCX AIBSS (Oxygen) Status */ 15366 typedef struct wlc_btc_aibss_info { 15367 uint32 prev_tsf_l; // Lower 32 bits of last read of TSF 15368 uint32 prev_tsf_h; // Higher 32 bits of last read of TSF 15369 uint32 last_btinfo; // Last read of BT info 15370 uint32 local_btinfo; // Local BT INFO BitMap 15371 uint8 bt_out_of_sync_cnt; // BT not in sync with strobe 15372 uint8 esco_off_cnt; // Count incremented when ESCO is off 15373 uint8 strobe_enabled; // Set only in AIBSS mode 15374 uint8 strobe_on; // strobe to BT is on for Oxygen 15375 uint8 local_bt_in_sync; // Sync status of local BT when strobe is on 15376 uint8 other_bt_in_sync; // Sync state of BT in other devices in AIBSS 15377 uint8 local_bt_is_master; // Local BT is master 15378 uint8 sco_prot_on; // eSCO Protection on in local device 15379 uint8 other_esco_present; // eSCO status in other devices in AIBSS 15380 uint8 rx_agg_change; // Indicates Rx Agg size needs to change 15381 uint8 rx_agg_modified; // Rx Agg size modified 15382 uint8 acl_grant_set; // ACL grants on for speeding up sync 15383 uint8 write_ie_err_cnt; // BTCX Ie write error cnt 15384 uint8 parse_ie_err_cnt; // BTCX IE parse error cnt 15385 uint8 wci2_fail_cnt; // WCI2 init failure cnt 15386 uint8 strobe_enable_err_cnt; // Strobe enable err cnt 15387 uint8 strobe_init_err_cnt; // Strobe init err cnt 15388 uint8 tsf_jump_cnt; // TSF jump cnt 15389 uint8 acl_grant_cnt; // ALC grant cnt 15390 uint8 pad1; 15391 uint16 ibss_tsf_shm; // SHM address of strobe TSF 15392 uint16 pad2; 15393 } wlc_btc_aibss_info_t; 15394 15395 #define WLC_BTC_AIBSS_STATUS_VER 1 15396 #define WLC_BTC_AIBSS_STATUS_LEN (sizeof(wlc_btc_aibss_status_t) - 2 * (sizeof(uint16))) 15397 15398 typedef struct wlc_btc_aibss_status { 15399 uint16 version; // Version # 15400 uint16 len; // Length of the structure(excluding len & version) 15401 int32 mode; // Current value of btc_mode 15402 uint16 bth_period; // bt coex period. read from shm. 15403 uint16 agg_off_bm; // AGG OFF BM read from SHM 15404 uint8 bth_active; // bt active session 15405 uint8 pad[3]; 15406 wlc_btc_aibss_info_t aibss_info; // Structure definition above 15407 } wlc_btc_aibss_status_t; 15408 15409 typedef enum { 15410 STATE_NONE = 0, 15411 15412 /* WLAN -> BT */ 15413 W2B_DATA_SET = 21, 15414 B2W_ACK_SET = 22, 15415 W2B_DATA_CLEAR = 23, 15416 B2W_ACK_CLEAR = 24, 15417 15418 /* BT -> WLAN */ 15419 B2W_DATA_SET = 31, 15420 W2B_ACK_SET = 32, 15421 B2W_DATA_CLEAR = 33, 15422 W2B_ACK_CLEAR = 34 15423 } bwte_gci_intstate_t; 15424 15425 #define WL_BWTE_STATS_VERSION 1 /* version of bwte_stats_t */ 15426 typedef struct { 15427 uint32 version; 15428 15429 bwte_gci_intstate_t inttobt; 15430 bwte_gci_intstate_t intfrombt; 15431 15432 uint32 bt2wl_intrcnt; /* bt->wlan interrrupt count */ 15433 uint32 wl2bt_intrcnt; /* wlan->bt interrupt count */ 15434 15435 uint32 wl2bt_dset_cnt; 15436 uint32 wl2bt_dclear_cnt; 15437 uint32 wl2bt_aset_cnt; 15438 uint32 wl2bt_aclear_cnt; 15439 15440 uint32 bt2wl_dset_cnt; 15441 uint32 bt2wl_dclear_cnt; 15442 uint32 bt2wl_aset_cnt; 15443 uint32 bt2wl_aclear_cnt; 15444 15445 uint32 state_error_1; 15446 uint32 state_error_2; 15447 uint32 state_error_3; 15448 uint32 state_error_4; 15449 } bwte_stats_t; 15450 15451 #define TBOW_MAX_SSID_LEN 32 15452 #define TBOW_MAX_PASSPHRASE_LEN 63 15453 15454 #define WL_TBOW_SETUPINFO_T_VERSION 1 /* version of tbow_setup_netinfo_t */ 15455 typedef struct tbow_setup_netinfo { 15456 uint32 version; 15457 uint8 opmode; 15458 uint8 pad; 15459 uint8 macaddr[ETHER_ADDR_LEN]; 15460 uint32 ssid_len; 15461 uint8 ssid[TBOW_MAX_SSID_LEN]; 15462 uint8 passphrase_len; 15463 uint8 passphrase[TBOW_MAX_PASSPHRASE_LEN]; 15464 chanspec_t chanspec; 15465 uint8 PAD[2]; 15466 uint32 channel; 15467 } tbow_setup_netinfo_t; 15468 15469 typedef enum tbow_ho_opmode { 15470 TBOW_HO_MODE_START_GO = 0, 15471 TBOW_HO_MODE_START_STA, 15472 TBOW_HO_MODE_START_GC, 15473 TBOW_HO_MODE_TEST_GO, 15474 TBOW_HO_MODE_STOP_GO = 0x10, 15475 TBOW_HO_MODE_STOP_STA, 15476 TBOW_HO_MODE_STOP_GC, 15477 TBOW_HO_MODE_TEARDOWN 15478 } tbow_ho_opmode_t; 15479 15480 /* Beacon trim feature statistics */ 15481 /* configuration */ 15482 #define BCNTRIMST_PER 0 /* Number of beacons to trim (0: disable) */ 15483 #define BCNTRIMST_TIMEND 1 /* Number of bytes till TIM IE */ 15484 #define BCNTRIMST_TSFLMT 2 /* TSF tolerance value (usecs) */ 15485 /* internal use */ 15486 #define BCNTRIMST_CUR 3 /* PSM's local beacon trim counter */ 15487 #define BCNTRIMST_PREVLEN 4 /* Beacon length excluding the TIM IE */ 15488 #define BCNTRIMST_TIMLEN 5 /* TIM IE Length */ 15489 #define BCNTRIMST_RSSI 6 /* Partial beacon RSSI */ 15490 #define BCNTRIMST_CHAN 7 /* Partial beacon channel */ 15491 /* debug stat (off by default) */ 15492 #define BCNTRIMST_DUR 8 /* RX duration until beacon trimmed */ 15493 #define BCNTRIMST_RXMBSS 9 /* MYBSSID beacon received */ 15494 #define BCNTRIMST_CANTRIM 10 /* # beacons which were trimmed */ 15495 #define BCNTRIMST_LENCHG 11 /* # beacons not trimmed due to length change */ 15496 #define BCNTRIMST_TSFDRF 12 /* # beacons not trimmed due to large TSF delta */ 15497 #define BCNTRIMST_NOTIM 13 /* # beacons not trimmed due to TIM missing */ 15498 15499 #define BCNTRIMST_NUM 14 15500 15501 #define WL_BCNTRIM_STATUS_VERSION_1 1 15502 typedef struct wl_bcntrim_status_query_v1 { 15503 uint16 version; 15504 uint16 len; /* Total length includes fixed fields */ 15505 uint8 reset; /* reset after reading the stats */ 15506 uint8 pad[3]; /* 4-byte alignment */ 15507 } wl_bcntrim_status_query_v1_t; 15508 15509 typedef struct wl_bcntrim_status_v1 { 15510 uint16 version; 15511 uint16 len; /* Total length includes fixed fields and variable data[] */ 15512 uint8 curr_slice_id; /* slice index of the interface */ 15513 uint8 applied_cfg; /* applied bcntrim N threshold */ 15514 uint8 pad[2]; /* 4-byte alignment */ 15515 uint32 fw_status; /* Bits representing bcntrim disable reason in FW */ 15516 uint32 total_disable_dur; /* total duration (msec) bcntrim remains 15517 disabled due to FW disable reasons 15518 */ 15519 uint32 data[]; /* variable length data containing stats */ 15520 } wl_bcntrim_status_v1_t; 15521 15522 #define BCNTRIM_STATS_MAX 10 /* Total stats part of the status data[] */ 15523 15524 /* Bits for FW status */ 15525 #define WL_BCNTRIM_DISABLE_HOST 0x1 /* Host disabled bcntrim through bcntrim IOVar */ 15526 #define WL_BCNTRIM_DISABLE_PHY_RATE 0x2 /* bcntrim disabled because beacon rx rate is 15527 * higher than phy_rate_thresh 15528 */ 15529 #define WL_BCNTRIM_DISABLE_QUIET_IE 0x4 /* bcntrim disable when Quiet IE present */ 15530 #define WL_BCNTRIM_DISABLE_QBSSLOAD_IE 0x8 /* bcntrim disable when QBSS Load IE present */ 15531 #define WL_BCNTRIM_DISABLE_OPERMODE_IE 0x10 /* bcntrim dsiable when opermode IE is present */ 15532 #define WL_BCNTRIM_DISABLE_CSA_IE 0x20 /* bcntrim dsiable when CSA IE is present */ 15533 15534 #define BCNTRIM_DISABLE_THRESHOLD_TIME 1000 * 10 /* enable bcntrim after a threshold (10sec) 15535 * when disabled due to above mentioned IE's 15536 */ 15537 #define WL_BCNTRIM_CFG_VERSION_1 1 15538 /* Common IOVAR struct */ 15539 typedef struct wl_bcntrim_cfg_v1 { 15540 uint16 version; 15541 uint16 len; /* Total length includes fixed fields and variable data[] */ 15542 uint16 subcmd_id; /* subcommand id */ 15543 uint16 pad; /* pad/reserved */ 15544 uint8 data[]; /* subcommand data; could be empty */ 15545 } wl_bcntrim_cfg_v1_t; 15546 15547 /* subcommands ids */ 15548 enum { 15549 WL_BCNTRIM_CFG_SUBCMD_PHY_RATE_THRESH = 0, /* PHY rate threshold above 15550 which bcntrim is not applied 15551 */ 15552 WL_BCNTRIM_CFG_SUBCMD_OVERRIDE_DISABLE_MASK = 1, /* Override bcntrim disable reasons */ 15553 WL_BCNTRIM_CFG_SUBCMD_TSF_DRIFT_LIMIT = 2 /* TSF drift limit to consider bcntrim */ 15554 }; 15555 15556 #define BCNTRIM_MAX_PHY_RATE 48 /* in 500Kbps */ 15557 #define BCNTRIM_MAX_TSF_DRIFT 65535 /* in usec */ 15558 #define WL_BCNTRIM_OVERRIDE_DISABLE_MASK \ 15559 (WL_BCNTRIM_DISABLE_QUIET_IE | WL_BCNTRIM_DISABLE_QBSSLOAD_IE) 15560 15561 /* WL_BCNTRIM_CFG_SUBCMD_PHY_RATE_TRESH */ 15562 typedef struct wl_bcntrim_cfg_phy_rate_thresh { 15563 uint32 rate; /* beacon rate (in 500kbps units) */ 15564 } wl_bcntrim_cfg_phy_rate_thresh_t; 15565 15566 /* WL_BCNTRIM_CFG_SUBCMD_OVERRIDE_DISABLE_MASK */ 15567 typedef struct wl_bcntrim_cfg_override_disable_mask { 15568 uint32 mask; /* bits representing individual disable reason to override */ 15569 } wl_bcntrim_cfg_override_disable_mask_t; 15570 15571 /* WL_BCNTRIM_CFG_SUBCMD_TSF_DRIFT_LIMIT */ 15572 typedef struct wl_bcntrim_cfg_tsf_drift_limit { 15573 uint16 drift; /* tsf drift limit specified in usec */ 15574 uint8 pad[2]; /* 4-byte alignment */ 15575 } wl_bcntrim_cfg_tsf_drift_limit_t; 15576 15577 /* -------------- TX Power Cap --------------- */ 15578 #define TXPWRCAP_MAX_NUM_CORES 8 15579 #define TXPWRCAP_MAX_NUM_ANTENNAS (TXPWRCAP_MAX_NUM_CORES * 2) 15580 15581 #define TXPWRCAP_MAX_NUM_CORES_V3 4 15582 #define TXPWRCAP_MAX_NUM_ANTENNAS_V3 (TXPWRCAP_MAX_NUM_CORES_V3 * 2) 15583 15584 #define TXPWRCAP_NUM_SUBBANDS 5 15585 #define TXPWRCAP_MAX_NUM_SUBGRPS 10 15586 15587 /* IOVAR txcapconfig enum's */ 15588 #define TXPWRCAPCONFIG_WCI2 0u 15589 #define TXPWRCAPCONFIG_HOST 1u 15590 #define TXPWRCAPCONFIG_WCI2_AND_HOST 2u 15591 #define TXPWRCAPCONFIG_NONE 0xFFu 15592 15593 /* IOVAR txcapstate enum's */ 15594 #define TXPWRCAPSTATE_LOW_CAP 0 15595 #define TXPWRCAPSTATE_HIGH_CAP 1 15596 #define TXPWRCAPSTATE_HOST_LOW_WCI2_LOW_CAP 0 15597 #define TXPWRCAPSTATE_HOST_LOW_WCI2_HIGH_CAP 1 15598 #define TXPWRCAPSTATE_HOST_HIGH_WCI2_LOW_CAP 2 15599 #define TXPWRCAPSTATE_HOST_HIGH_WCI2_HIGH_CAP 3 15600 15601 /* IOVAR txcapconfig and txcapstate structure is shared: SET and GET */ 15602 #define TXPWRCAPCTL_VERSION 2 15603 #define TXPWRCAPCTL_VERSION_3 3 15604 15605 typedef struct wl_txpwrcap_ctl { 15606 uint8 version; 15607 uint8 ctl[TXPWRCAP_NUM_SUBBANDS]; 15608 } wl_txpwrcap_ctl_t; 15609 15610 typedef struct wl_txpwrcap_ctl_v3 { 15611 uint8 version; 15612 uint8 ctl[TXPWRCAP_MAX_NUM_SUBGRPS]; 15613 } wl_txpwrcap_ctl_v3_t; 15614 15615 /* IOVAR txcapdump structure: GET only */ 15616 #define TXPWRCAP_DUMP_VERSION 2 15617 typedef struct wl_txpwrcap_dump { 15618 uint8 version; 15619 uint8 pad0; 15620 uint8 current_country[2]; 15621 uint32 current_channel; 15622 uint8 config[TXPWRCAP_NUM_SUBBANDS]; 15623 uint8 state[TXPWRCAP_NUM_SUBBANDS]; 15624 uint8 high_cap_state_enabled; 15625 uint8 wci2_cell_status_last; 15626 uint8 download_present; 15627 uint8 num_subbands; 15628 uint8 num_antennas; 15629 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES]; 15630 uint8 num_cc_groups; 15631 uint8 current_country_cc_group_info_index; 15632 int8 low_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 15633 int8 high_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 15634 uint8 PAD[3]; 15635 } wl_txpwrcap_dump_t; 15636 15637 typedef struct wl_txpwrcap_dump_v3 { 15638 uint8 version; 15639 uint8 pad0; 15640 uint8 current_country[2]; 15641 uint32 current_channel; 15642 uint8 config[TXPWRCAP_NUM_SUBBANDS]; 15643 uint8 state[TXPWRCAP_NUM_SUBBANDS]; 15644 uint8 high_cap_state_enabled; 15645 uint8 wci2_cell_status_last; 15646 uint8 download_present; 15647 uint8 num_subbands; 15648 uint8 num_antennas; 15649 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES]; 15650 uint8 num_cc_groups; 15651 uint8 current_country_cc_group_info_index; 15652 uint8 cap_states_per_cc_group; 15653 int8 host_low_wci2_low_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 15654 int8 host_low_wci2_high_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 15655 int8 host_high_wci2_low_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 15656 int8 host_high_wci2_high_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 15657 uint8 PAD[2]; 15658 } wl_txpwrcap_dump_v3_t; 15659 15660 /* 15661 * Capability flag for wl_txpwrcap_tbl_v2_t and wl_txpwrcap_t 15662 * The index into pwrs will be: 0: onbody-cck, 1: onbody-ofdm, 2:offbody-cck, 3:offbody-ofdm 15663 * 15664 * For 5G power in SDB case as well as for non-SDB case, the value of flag will be: CAP_ONOFF_BODY 15665 * The index into pwrs will be: 0: onbody, 1: offbody-ofdm 15666 */ 15667 15668 #define CAP_ONOFF_BODY (0x1) /* on/off body only */ 15669 #define CAP_CCK_OFDM (0x2) /* cck/ofdm capability only */ 15670 #define CAP_LTE_CELL (0x4) /* cell on/off capability; required for iOS builds */ 15671 #define CAP_HEAD_BODY (0x8) /* head/body capability */ 15672 #define CAP_2G_DEPON_5G (0x10) /* 2G pwr caps depend on other slice 5G subband */ 15673 #define CAP_SISO_MIMO (0x20) /* Siso/Mimo Separate Power Caps */ 15674 #define CAP_ANT_TX (0x40) /* Separate Power Caps based on cell ant tx value */ 15675 #define CAP_LTE_PQBIT (0x100u) /* QPBit is enabled */ 15676 #define CAP_ONOFF_BODY_CCK_OFDM (CAP_ONOFF_BODY | CAP_CCK_OFDM) 15677 #define CAP_TXPWR_ALL (CAP_ONOFF_BODY|CAP_CCK_OFDM|CAP_LTE_CELL|\ 15678 CAP_SISO_MIMO|CAP_HEAD_BODY|CAP_ANT_TX) 15679 15680 #define TXHDR_SEC_MAX 5u /* Deprecated. Kept till removed in all branches */ 15681 #define TXPWRCAP_MAX_STATES 4u 15682 #define TXPWRCAP_MAX_STATES_V3 10u 15683 #define TXPWRCAP_CCKOFDM_ONOFFBODY_MAX_STATES 4u 15684 #define TXPWRCAP_ONOFFBODY_MAX_STATES 2u 15685 #define TXPWRCAP_ONOFFCELL_MAX_STATES 2u 15686 15687 #define TXHDR_SEC_NONSDB_MAIN_2G 0 15688 #define TXHDR_SEC_NONSDB_MAIN_5G 1 15689 #define TXHDR_SEC_NONSDB_AUX_2G 2 15690 #define TXHDR_SEC_NONSDB_AUX_5G 3 15691 #define TXHDR_SEC_SDB_MAIN_2G 4 15692 #define TXHDR_SEC_SDB_MAIN_5G 5 15693 #define TXHDR_SEC_SDB_AUX_2G 6 15694 #define TXHDR_SEC_SDB_AUX_5G 7 15695 #define TXHDR_MAX_SECTION 8 15696 15697 #define WL_TXPWRCAP_MAX_SLICES 2 15698 #define WL_TXPWRCAPDUMP_VER 4 15699 15700 #define WL_TXPWRCAP_VERSION_2 2 15701 #define WL_TXPWRCAP_VERSION_3 3 15702 15703 typedef struct wl_txpwrcap { 15704 uint8 capability; 15705 uint8 num_cap_states; 15706 uint8 section; /* Index from above,eg. TXHDR_SEC_NONSDB */ 15707 int8 pwrs[][TXPWRCAP_NUM_SUBBANDS][TXPWRCAP_MAX_NUM_CORES]; 15708 } wl_txpwrcap_t; 15709 15710 typedef struct { 15711 uint8 capability; 15712 uint8 num_cap_states; 15713 uint8 num_subgrps; 15714 uint8 section; /* Index from above,eg. TXHDR_SEC_NONSDB */ 15715 int8 pwrs[][TXPWRCAP_MAX_NUM_SUBGRPS][TXPWRCAP_MAX_NUM_ANTENNAS_V3]; 15716 } wl_txpwrcap_v2_t; 15717 15718 #define TXPWRCAP_DUMP_VERSION_4 4u 15719 #define TXPWRCAP_DUMP_VERSION_5 5u 15720 #define TXPWRCAP_DUMP_VERSION_6 6u 15721 15722 typedef struct wl_txpwrcap_dump_v4 { 15723 uint8 version; 15724 uint8 num_pwrcap; 15725 uint8 current_country[2]; 15726 uint32 current_channel; 15727 uint8 download_present; 15728 uint8 num_cores; /* number cores on slice */ 15729 uint8 num_cc_groups; /* number cc groups */ 15730 uint8 current_country_cc_group_info_index; 15731 /* first power cap always exist 15732 * On main,-non-sdb follows by sdb2g and then sdb5g 15733 * On aux slice - aux2g then aux5g. 15734 */ 15735 wl_txpwrcap_t pwrcap; /* first power cap */ 15736 } wl_txpwrcap_dump_v4_t; 15737 15738 typedef struct wl_txpwrcap_dump_v5 { 15739 uint8 version; 15740 uint8 num_pwrcap; 15741 uint8 current_country[2]; 15742 uint8 current_channel; 15743 uint8 high_cap_state_enabled; 15744 uint8 reserved[2]; 15745 uint8 download_present; 15746 uint8 num_ants; /* number antenna slice */ 15747 uint8 num_cc_groups; /* number cc groups */ 15748 uint8 current_country_cc_group_info_index; 15749 uint8 ant_tx; /* current value of ant_tx */ 15750 uint8 cell_status; /* current value of cell status */ 15751 int8 pwrcap[]; /* variable size power caps (wl_txpwrcap_v2_t) */ 15752 } wl_txpwrcap_dump_v5_t; 15753 15754 typedef struct wl_txpwrcap_dump_v6 { 15755 uint8 version; 15756 uint8 num_pwrcap; 15757 uint8 current_country[2]; 15758 uint8 current_channel; 15759 uint8 high_cap_state_enabled; 15760 uint8 reserved[2]; 15761 uint8 download_present; 15762 uint8 num_ants; /* number antenna slice */ 15763 uint8 num_cc_groups; /* number cc groups */ 15764 uint8 current_country_cc_group_info_index; 15765 uint8 ant_tx; /* current value of ant_tx */ 15766 uint8 cell_status; /* current value of cell status */ 15767 uint16 capability[TXHDR_MAX_SECTION]; /* capabilities */ 15768 int8 pwrcap[]; /* variable size power caps (wl_txpwrcap_v2_t) */ 15769 } wl_txpwrcap_dump_v6_t; 15770 15771 #define TXCAPINFO_VERSION_1 1 15772 typedef struct wl_txpwrcap_ccgrp_info { 15773 uint8 num_cc; 15774 char cc_list[1][2]; /* 2 letters for each country. At least one country */ 15775 } wl_txpwrcap_ccgrp_info_t; 15776 15777 typedef struct { 15778 uint16 version; 15779 uint16 length; /* length in bytes */ 15780 uint8 num_ccgrp; 15781 /* followed by one or more wl_txpwrcap_ccgrp_info_t */ 15782 wl_txpwrcap_ccgrp_info_t ccgrp_data[1]; 15783 } wl_txpwrcap_info_t; 15784 15785 typedef struct wl_txpwrcap_tbl { 15786 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES]; 15787 /* Stores values for valid antennas */ 15788 int8 pwrcap_cell_on[TXPWRCAP_MAX_NUM_ANTENNAS]; /* qdBm units */ 15789 int8 pwrcap_cell_off[TXPWRCAP_MAX_NUM_ANTENNAS]; /* qdBm units */ 15790 } wl_txpwrcap_tbl_t; 15791 15792 typedef struct wl_txpwrcap_tbl_v2 { 15793 uint8 version; 15794 uint8 length; /* size of entire structure, including the pwrs */ 15795 uint8 capability; /* capability bitmap */ 15796 uint8 num_cores; /* number of cores i.e. entries in each cap state row */ 15797 /* 15798 * pwrs array has TXPWRCAP_MAX_STATES rows - one for each cap state. 15799 * Each row has up to TXPWRCAP_MAX_NUM_CORES entries - one for each core. 15800 */ 15801 uint8 pwrs[][TXPWRCAP_MAX_NUM_CORES]; /* qdBm units */ 15802 } wl_txpwrcap_tbl_v2_t; 15803 15804 typedef struct wl_txpwrcap_tbl_v3 { 15805 uint8 version; 15806 uint8 length; /* size of entire structure, including the pwrs */ 15807 uint8 capability; /* capability bitmap */ 15808 uint8 num_cores; /* number of cores */ 15809 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES_V3]; 15810 /* 15811 * pwrs array has TXPWRCAP_MAX_STATES rows - one for each cap state. 15812 * Each row has up to TXPWRCAP_MAX_NUM_ANTENNAS entries - for each antenna. 15813 * Included in the rows of powers are rows for fail safe. 15814 */ 15815 int8 pwrs[][TXPWRCAP_MAX_NUM_ANTENNAS_V3]; /* qdBm units */ 15816 } wl_txpwrcap_tbl_v3_t; 15817 15818 /* ##### Ecounters section ##### */ 15819 #define ECOUNTERS_VERSION_1 1 15820 15821 /* Input structure for ecounters IOVAR */ 15822 typedef struct ecounters_config_request { 15823 uint16 version; /* config version */ 15824 uint16 set; /* Set where data will go. */ 15825 uint16 size; /* Size of the set. */ 15826 uint16 timeout; /* timeout in seconds. */ 15827 uint16 num_events; /* Number of events to report. */ 15828 uint16 ntypes; /* Number of entries in type array. */ 15829 uint16 type[1]; /* Statistics Types (tags) to retrieve. */ 15830 } ecounters_config_request_t; 15831 15832 #define ECOUNTERS_EVENTMSGS_VERSION_1 1 15833 #define ECOUNTERS_TRIGGER_CONFIG_VERSION_1 1 15834 15835 #define ECOUNTERS_EVENTMSGS_EXT_MASK_OFFSET \ 15836 OFFSETOF(ecounters_eventmsgs_ext_t, mask[0]) 15837 15838 #define ECOUNTERS_TRIG_CONFIG_TYPE_OFFSET \ 15839 OFFSETOF(ecounters_trigger_config_t, type[0]) 15840 15841 typedef struct ecounters_eventmsgs_ext { 15842 uint8 version; 15843 uint8 len; 15844 uint8 mask[1]; 15845 } ecounters_eventmsgs_ext_t; 15846 15847 typedef struct ecounters_trigger_config { 15848 uint16 version; /* version */ 15849 uint16 set; /* set where data should go */ 15850 uint16 rsvd; /* reserved */ 15851 uint16 pad; /* pad/reserved */ 15852 uint16 ntypes; /* number of types/tags */ 15853 uint16 type[1]; /* list of types */ 15854 } ecounters_trigger_config_t; 15855 15856 #define ECOUNTERS_TRIGGER_REASON_VERSION_1 1 15857 typedef enum { 15858 /* Triggered due to timer based ecounters */ 15859 ECOUNTERS_TRIGGER_REASON_TIMER = 0, 15860 /* Triggered due to event based configuration */ 15861 ECOUNTERS_TRIGGER_REASON_EVENTS = 1, 15862 ECOUNTERS_TRIGGER_REASON_D2H_EVENTS = 2, 15863 ECOUNTERS_TRIGGER_REASON_H2D_EVENTS = 3, 15864 ECOUNTERS_TRIGGER_REASON_USER_EVENTS = 4, 15865 ECOUNTERS_TRIGGER_REASON_MAX = 5 15866 } ecounters_trigger_reasons_list_t; 15867 15868 typedef struct ecounters_trigger_reason { 15869 uint16 version; /* version */ 15870 uint16 trigger_reason; /* trigger reason */ 15871 uint32 sub_reason_code; /* sub reason code */ 15872 uint32 trigger_time_now; /* time in ms at trigger */ 15873 uint32 host_ref_time; /* host ref time */ 15874 } ecounters_trigger_reason_t; 15875 15876 #define WL_LQM_VERSION_1 1 15877 15878 /* For wl_lqm_t flags field */ 15879 #define WL_LQM_CURRENT_BSS_VALID 0x1 15880 #define WL_LQM_TARGET_BSS_VALID 0x2 15881 15882 #define WL_PERIODIC_COMPACT_CNTRS_VER_1 (1) 15883 #define WL_PERIODIC_TXBF_CNTRS_VER_1 (1) 15884 typedef struct { 15885 uint16 version; 15886 uint16 pad; 15887 /* taken from wl_wlc_cnt_t */ 15888 uint32 txfail; 15889 /* taken from wl_cnt_ge40mcst_v1_t */ 15890 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 15891 * Control Management (includes retransmissions) 15892 */ 15893 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 15894 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 15895 uint32 txback; /**< blockack txcnt */ 15896 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 15897 uint32 txnoack; /**< dot11ACKFailureCount */ 15898 uint32 txframe; /**< tx data frames */ 15899 uint32 txretrans; /**< tx mac retransmits */ 15900 uint32 txpspoll; /**< Number of TX PS-poll */ 15901 15902 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 15903 * expecting a response 15904 */ 15905 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 15906 uint32 rxstrt; /**< number of received frames with a good PLCP */ 15907 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 15908 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 15909 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 15910 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 15911 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 15912 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 15913 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 15914 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */ 15915 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 15916 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 15917 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 15918 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 15919 uint32 rxback; /**< blockack rxcnt */ 15920 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 15921 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 15922 uint32 rxbeaconobss; /**< beacons received from other BSS */ 15923 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 15924 * other BSS (WDS FRAME) 15925 */ 15926 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 15927 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 15928 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 15929 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 15930 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 15931 uint32 rxtoolate; /**< receive too late */ 15932 uint32 rxframe; /**< rx data frames */ 15933 uint32 lqcm_report; /**< lqcm metric tx/rx idx */ 15934 uint32 tx_toss_cnt; /* number of tx packets tossed */ 15935 uint32 rx_toss_cnt; /* number of rx packets tossed */ 15936 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 15937 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 15938 uint32 txbcnfrm; /**< beacons transmitted */ 15939 } wl_periodic_compact_cntrs_v1_t; 15940 15941 #define WL_PERIODIC_COMPACT_CNTRS_VER_2 (2) 15942 typedef struct { 15943 uint16 version; 15944 uint16 pad; 15945 /* taken from wl_wlc_cnt_t */ 15946 uint32 txfail; 15947 /* taken from wl_cnt_ge40mcst_v1_t */ 15948 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 15949 * Control Management (includes retransmissions) 15950 */ 15951 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 15952 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 15953 uint32 txback; /**< blockack txcnt */ 15954 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 15955 uint32 txnoack; /**< dot11ACKFailureCount */ 15956 uint32 txframe; /**< tx data frames */ 15957 uint32 txretrans; /**< tx mac retransmits */ 15958 uint32 txpspoll; /**< Number of TX PS-poll */ 15959 15960 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 15961 * expecting a response 15962 */ 15963 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 15964 uint32 rxstrt; /**< number of received frames with a good PLCP */ 15965 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 15966 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 15967 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 15968 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 15969 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 15970 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 15971 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 15972 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */ 15973 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 15974 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 15975 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 15976 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 15977 uint32 rxback; /**< blockack rxcnt */ 15978 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 15979 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 15980 uint32 rxbeaconobss; /**< beacons received from other BSS */ 15981 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 15982 * other BSS (WDS FRAME) 15983 */ 15984 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 15985 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 15986 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 15987 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 15988 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 15989 uint32 rxtoolate; /**< receive too late */ 15990 uint32 rxframe; /**< rx data frames */ 15991 uint32 lqcm_report; /**< lqcm metric tx/rx idx */ 15992 uint32 tx_toss_cnt; /* number of tx packets tossed */ 15993 uint32 rx_toss_cnt; /* number of rx packets tossed */ 15994 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 15995 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 15996 uint32 txbcnfrm; /**< beacons transmitted */ 15997 uint32 rxretry; /* Number of rx packets received after retry */ 15998 uint32 rxdup; /* Number of dump packet. Indicates whether peer is receiving ack */ 15999 uint32 chswitch_cnt; /* Number of channel switches */ 16000 uint32 pm_dur; /* Total sleep time in PM, msecs */ 16001 } wl_periodic_compact_cntrs_v2_t; 16002 16003 #define WL_PERIODIC_COMPACT_CNTRS_VER_3 (3) 16004 typedef struct { 16005 uint16 version; 16006 uint16 pad; 16007 /* taken from wl_wlc_cnt_t */ 16008 uint32 txfail; 16009 /* taken from wl_cnt_ge40mcst_v1_t */ 16010 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 16011 * Control Management (includes retransmissions) 16012 */ 16013 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 16014 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 16015 uint32 txback; /**< blockack txcnt */ 16016 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 16017 uint32 txnoack; /**< dot11ACKFailureCount */ 16018 uint32 txframe; /**< tx data frames */ 16019 uint32 txretrans; /**< tx mac retransmits */ 16020 uint32 txpspoll; /**< Number of TX PS-poll */ 16021 16022 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 16023 * expecting a response 16024 */ 16025 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 16026 uint32 rxstrt; /**< number of received frames with a good PLCP */ 16027 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 16028 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 16029 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 16030 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 16031 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 16032 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 16033 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 16034 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */ 16035 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 16036 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 16037 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 16038 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 16039 uint32 rxback; /**< blockack rxcnt */ 16040 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 16041 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 16042 uint32 rxbeaconobss; /**< beacons received from other BSS */ 16043 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 16044 * other BSS (WDS FRAME) 16045 */ 16046 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 16047 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 16048 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 16049 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 16050 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 16051 uint32 rxtoolate; /**< receive too late */ 16052 uint32 rxframe; /**< rx data frames */ 16053 uint32 lqcm_report; /**< lqcm metric tx/rx idx */ 16054 uint32 tx_toss_cnt; /* number of tx packets tossed */ 16055 uint32 rx_toss_cnt; /* number of rx packets tossed */ 16056 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 16057 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 16058 uint32 txbcnfrm; /**< beacons transmitted */ 16059 uint32 rxretry; /* Number of rx packets received after retry */ 16060 uint32 rxdup; /* Number of dump packet. Indicates whether peer is receiving ack */ 16061 uint32 chswitch_cnt; /* Number of channel switches */ 16062 uint32 pm_dur; /* Total sleep time in PM, msecs */ 16063 uint32 rxholes; /* Count of missed packets from peer */ 16064 } wl_periodic_compact_cntrs_v3_t; 16065 16066 #define WL_PERIODIC_COMPACT_HE_CNTRS_VER_1 (1) 16067 typedef struct { 16068 uint16 version; 16069 uint16 len; 16070 uint32 he_rxtrig_rand; 16071 uint32 he_colormiss_cnt; 16072 uint32 he_txmtid_back; 16073 uint32 he_rxmtid_back; 16074 uint32 he_rxmsta_back; 16075 uint32 he_rxtrig_basic; 16076 uint32 he_rxtrig_murts; 16077 uint32 he_rxtrig_bsrp; 16078 uint32 he_rxdlmu; 16079 uint32 he_physu_rx; 16080 uint32 he_txtbppdu; 16081 } wl_compact_he_cnt_wlc_v1_t; 16082 16083 #define WL_PERIODIC_COMPACT_HE_CNTRS_VER_2 (2) 16084 typedef struct { 16085 uint16 version; 16086 uint16 len; 16087 uint32 he_rxtrig_myaid; 16088 uint32 he_rxtrig_rand; 16089 uint32 he_colormiss_cnt; 16090 uint32 he_txmampdu; 16091 uint32 he_txmtid_back; 16092 uint32 he_rxmtid_back; 16093 uint32 he_rxmsta_back; 16094 uint32 he_txfrag; 16095 uint32 he_rxdefrag; 16096 uint32 he_txtrig; 16097 uint32 he_rxtrig_basic; 16098 uint32 he_rxtrig_murts; 16099 uint32 he_rxtrig_bsrp; 16100 uint32 he_rxhemuppdu_cnt; 16101 uint32 he_physu_rx; 16102 uint32 he_phyru_rx; 16103 uint32 he_txtbppdu; 16104 uint32 he_null_tbppdu; 16105 uint32 he_rxhesuppdu_cnt; 16106 uint32 he_rxhesureppdu_cnt; 16107 uint32 he_null_zero_agg; 16108 uint32 he_null_bsrp_rsp; 16109 uint32 he_null_fifo_empty; 16110 } wl_compact_he_cnt_wlc_v2_t; 16111 16112 /* for future versions of this data structure, can consider wl_txbf_ecounters_t 16113 * which contains the full list of txbf dump counters 16114 */ 16115 typedef struct { 16116 uint16 version; 16117 uint16 coreup; 16118 uint32 txndpa; 16119 uint32 txndp; 16120 uint32 rxsf; 16121 uint32 txbfm; 16122 uint32 rxndpa_u; 16123 uint32 rxndpa_m; 16124 uint32 bferpt; 16125 uint32 rxbfpoll; 16126 uint32 txsf; 16127 } wl_periodic_txbf_cntrs_v1_t; 16128 16129 typedef struct { 16130 struct ether_addr BSSID; 16131 chanspec_t chanspec; 16132 int32 rssi; 16133 int32 snr; 16134 } wl_rx_signal_metric_t; 16135 16136 typedef struct { 16137 uint8 version; 16138 uint8 flags; 16139 uint16 pad; 16140 int32 noise_level; /* current noise level */ 16141 wl_rx_signal_metric_t current_bss; 16142 wl_rx_signal_metric_t target_bss; 16143 } wl_lqm_t; 16144 16145 #define WL_PERIODIC_IF_STATE_VER_1 (1) 16146 typedef struct wl_if_state_compact { 16147 uint8 version; 16148 uint8 assoc_state; 16149 uint8 antenna_count; /**< number of valid antenna rssi */ 16150 int8 noise_level; /**< noise right after tx (in dBm) */ 16151 int8 snr; /* current noise level */ 16152 int8 rssi_sum; /**< summed rssi across all antennas */ 16153 uint16 pad16; 16154 int8 rssi_ant[WL_RSSI_ANT_MAX]; /**< rssi per antenna */ 16155 struct ether_addr BSSID; 16156 chanspec_t chanspec; 16157 } wl_if_state_compact_t; 16158 16159 #define WL_EVENT_STATISTICS_VER_1 (1) 16160 /* Event based statistics ecounters */ 16161 typedef struct { 16162 uint16 version; 16163 uint16 pad; 16164 struct ether_addr BSSID; /* BSSID of the BSS */ 16165 uint32 txdeauthivalclass; 16166 } wl_event_based_statistics_v1_t; 16167 16168 #define WL_EVENT_STATISTICS_VER_2 (2) 16169 /* Event based statistics ecounters */ 16170 typedef struct { 16171 uint16 version; 16172 uint16 pad; 16173 struct ether_addr BSSID; /* BSSID of the BSS */ 16174 uint32 txdeauthivalclass; 16175 /* addition for v2 */ 16176 int32 timestamp; /* last deauth time */ 16177 struct ether_addr last_deauth; /* wrong deauth MAC */ 16178 uint16 misdeauth; /* wrong deauth count every 1sec */ 16179 int16 cur_rssi; /* current bss rssi */ 16180 int16 deauth_rssi; /* deauth pkt rssi */ 16181 } wl_event_based_statistics_v2_t; 16182 16183 #define WL_EVENT_STATISTICS_VER_3 (3) 16184 /* Event based statistics ecounters */ 16185 typedef struct { 16186 uint16 version; 16187 uint16 pad; 16188 struct ether_addr BSSID; /* BSSID of the BSS */ 16189 uint16 PAD; 16190 uint32 txdeauthivalclass; 16191 /* addition for v2 */ 16192 int32 timestamp; /* last deauth time */ 16193 struct ether_addr last_deauth; /* wrong deauth MAC */ 16194 uint16 misdeauth; /* wrong deauth count every 1sec */ 16195 int16 cur_rssi; /* current bss rssi */ 16196 int16 deauth_rssi; /* deauth pkt rssi */ 16197 /* addition for v3 (roam statistics) */ 16198 uint32 initial_assoc_time; 16199 uint32 prev_roam_time; 16200 uint32 last_roam_event_type; 16201 uint32 last_roam_event_status; 16202 uint32 last_roam_event_reason; 16203 uint16 roam_success_cnt; 16204 uint16 roam_fail_cnt; 16205 uint16 roam_attempt_cnt; 16206 uint16 max_roam_target_cnt; 16207 uint16 min_roam_target_cnt; 16208 uint16 max_cached_ch_cnt; 16209 uint16 min_cached_ch_cnt; 16210 uint16 partial_roam_scan_cnt; 16211 uint16 full_roam_scan_cnt; 16212 uint16 most_roam_reason; 16213 uint16 most_roam_reason_cnt; 16214 } wl_event_based_statistics_v3_t; 16215 16216 #define WL_EVENT_STATISTICS_VER_4 (4u) 16217 /* Event based statistics ecounters */ 16218 typedef struct { 16219 uint16 version; 16220 uint16 pad; 16221 struct ether_addr BSSID; /* BSSID of the BSS */ 16222 uint16 PAD; 16223 uint32 txdeauthivalclass; 16224 /* addition for v2 */ 16225 int32 timestamp; /* last deauth time */ 16226 struct ether_addr last_deauth; /* wrong deauth MAC */ 16227 uint16 misdeauth; /* wrong deauth count every 1sec */ 16228 int16 cur_rssi; /* current bss rssi */ 16229 int16 deauth_rssi; /* deauth pkt rssi */ 16230 } wl_event_based_statistics_v4_t; 16231 16232 /* ##### Ecounters v2 section ##### */ 16233 16234 #define ECOUNTERS_VERSION_2 2 16235 16236 /* Enumeration of various ecounters request types. This namespace is different from 16237 * global reportable stats namespace. 16238 */ 16239 enum { 16240 WL_ECOUNTERS_XTLV_REPORT_REQ = 1 16241 }; 16242 16243 /* Input structure for ecounters IOVAR */ 16244 typedef struct ecounters_config_request_v2 { 16245 uint16 version; /* config version */ 16246 uint16 len; /* Length of this struct including variable len */ 16247 uint16 logset; /* Set where data will go. */ 16248 uint16 reporting_period; /* reporting_period */ 16249 uint16 num_reports; /* Number of timer expirations to report on */ 16250 uint8 pad[2]; /* Reserved for future use */ 16251 uint8 ecounters_xtlvs[]; /* Statistics Types (tags) to retrieve. */ 16252 } ecounters_config_request_v2_t; 16253 16254 #define ECOUNTERS_STATS_TYPES_FLAG_SLICE 0x1 16255 #define ECOUNTERS_STATS_TYPES_FLAG_IFACE 0x2 16256 #define ECOUNTERS_STATS_TYPES_FLAG_GLOBAL 0x4 16257 #define ECOUNTERS_STATS_TYPES_DEFAULT 0x8 16258 16259 /* Slice mask bits */ 16260 #define ECOUNTERS_STATS_TYPES_SLICE_MASK_SLICE0 0x1 16261 #define ECOUNTERS_STATS_TYPES_SLICE_MASK_SLICE1 0x2 16262 16263 typedef struct ecounters_stats_types_report_req { 16264 /* flags: bit0 = slice, bit1 = iface, bit2 = global, 16265 * rest reserved 16266 */ 16267 uint16 flags; 16268 uint16 if_index; /* host interface index */ 16269 uint16 slice_mask; /* bit0 = slice0, bit1=slice1, rest reserved */ 16270 uint8 pad[2]; /* padding */ 16271 uint8 stats_types_req[]; /* XTLVs of requested types */ 16272 } ecounters_stats_types_report_req_t; 16273 16274 /* ##### Ecounters_Eventmsgs v2 section ##### */ 16275 16276 #define ECOUNTERS_EVENTMSGS_VERSION_2 2 16277 16278 typedef struct event_ecounters_config_request_v2 { 16279 uint16 version; /* config version */ 16280 uint16 len; /* Length of this struct including variable len */ 16281 uint16 logset; /* Set where data will go. */ 16282 uint16 event_id; /* Event id for which this config is meant for */ 16283 uint8 flags; /* Config flags */ 16284 uint8 pad[3]; /* Reserved for future use */ 16285 uint8 ecounters_xtlvs[]; /* Statistics Types (tags) to retrieve. */ 16286 } event_ecounters_config_request_v2_t; 16287 16288 #define EVENT_ECOUNTERS_FLAGS_ADD (1 << 0) /* Add configuration for the event_id if set */ 16289 #define EVENT_ECOUNTERS_FLAGS_DEL (1 << 1) /* Delete configuration for event_id if set */ 16290 #define EVENT_ECOUNTERS_FLAGS_ANYIF (1 << 2) /* Interface filtering disable / off bit */ 16291 #define EVENT_ECOUNTERS_FLAGS_BE (1 << 3) /* If cleared report stats of 16292 * one event log buffer 16293 */ 16294 #define EVENT_ECOUNTERS_FLAGS_DEL_ALL (1 << 4) /* Delete all the configurations of 16295 * event ecounters if set 16296 */ 16297 16298 #define EVENT_ECOUNTERS_FLAGS_BUS (1 << 5) /* Add configuration for the bus events */ 16299 #define EVENT_ECOUNTERS_FLAGS_BUS_H2D (1 << 6) /* Add configuration for the bus direction 16300 * 0 - D2H and 1 - H2D 16301 */ 16302 16303 #define EVENT_ECOUNTERS_FLAGS_DELAYED_FLUSH (1 << 7) /* Flush only when half of the total size 16304 * of blocks gets filled. This is to avoid 16305 * many interrupts to host. 16306 */ 16307 #define EVENT_ECOUNTERS_FLAGS_USER (1 << 6) /* Add configuration for user defined events 16308 * Reuse the same flag as H2D 16309 */ 16310 16311 /* Ecounters suspend resume */ 16312 #define ECOUNTERS_SUSPEND_VERSION_V1 1 16313 /* To be used in populating suspend_mask and suspend_bitmap */ 16314 #define ECOUNTERS_SUSPEND_TIMER (1 << ECOUNTERS_TRIGGER_REASON_TIMER) 16315 #define ECOUNTERS_SUSPEND_EVENTS (1 << ECOUNTERS_TRIGGER_REASON_EVENTS) 16316 16317 typedef struct ecounters_suspend { 16318 uint16 version; 16319 uint16 len; 16320 uint32 suspend_bitmap; /* type of ecounter reporting to be suspended */ 16321 uint32 suspend_mask; /* type of ecounter reporting to be suspended */ 16322 } ecounters_suspend_t; 16323 16324 /* -------------- dynamic BTCOEX --------------- */ 16325 #define DCTL_TROWS 2 /**< currently practical number of rows */ 16326 #define DCTL_TROWS_MAX 4 /**< 2 extra rows RFU */ 16327 /* DYNCTL profile flags */ 16328 #define DCTL_FLAGS_DISABLED 0 /**< default value: all features disabled */ 16329 #define DCTL_FLAGS_DYNCTL (1 << 0) /**< 1 - enabled, 0 - legacy only */ 16330 #define DCTL_FLAGS_DESENSE (1 << 1) /**< auto desense is enabled */ 16331 #define DCTL_FLAGS_MSWITCH (1 << 2) /**< mode switching is enabled */ 16332 #define DCTL_FLAGS_PWRCTRL (1 << 3) /**< Tx power control is enabled */ 16333 /* for now AGG on/off is handled separately */ 16334 #define DCTL_FLAGS_TX_AGG_OFF (1 << 4) /**< TBD: allow TX agg Off */ 16335 #define DCTL_FLAGS_RX_AGG_OFF (1 << 5) /**< TBD: allow RX agg Off */ 16336 /* used for dry run testing only */ 16337 #define DCTL_FLAGS_DRYRUN (1 << 7) /**< Enables dynctl dry run mode */ 16338 #define IS_DYNCTL_ON(prof) ((prof->flags & DCTL_FLAGS_DYNCTL) != 0) 16339 #define IS_DESENSE_ON(prof) ((prof->flags & DCTL_FLAGS_DESENSE) != 0) 16340 #define IS_MSWITCH_ON(prof) ((prof->flags & DCTL_FLAGS_MSWITCH) != 0) 16341 #define IS_PWRCTRL_ON(prof) ((prof->flags & DCTL_FLAGS_PWRCTRL) != 0) 16342 /* desense level currently in use */ 16343 #define DESENSE_OFF 0 16344 #define DFLT_DESENSE_MID 12 16345 #define DFLT_DESENSE_HIGH 2 16346 16347 /** 16348 * dynctl data points(a set of btpwr & wlrssi thresholds) 16349 * for mode & desense switching 16350 */ 16351 typedef struct btc_thr_data { 16352 int8 mode; /**< used by desense sw */ 16353 int8 bt_pwr; /**< BT tx power threshold */ 16354 int8 bt_rssi; /**< BT rssi threshold */ 16355 /* wl rssi range when mode or desense change may be needed */ 16356 int8 wl_rssi_high; 16357 int8 wl_rssi_low; 16358 } btc_thr_data_t; 16359 16360 /* dynctl. profile data structure */ 16361 #define DCTL_PROFILE_VER 0x01 16362 #include <packed_section_start.h> 16363 typedef BWL_PRE_PACKED_STRUCT struct dctl_prof { 16364 uint8 version; /**< dynctl profile version */ 16365 /* dynctl profile flags bit:0 - dynctl On, bit:1 dsns On, bit:2 mode sw On, */ 16366 uint8 flags; /**< bit[6:3] reserved, bit7 - Dryrun (sim) - On */ 16367 /** wl desense levels to apply */ 16368 uint8 dflt_dsns_level; 16369 uint8 low_dsns_level; 16370 uint8 mid_dsns_level; 16371 uint8 high_dsns_level; 16372 /** mode switching hysteresis in dBm */ 16373 int8 msw_btrssi_hyster; 16374 /** default btcoex mode */ 16375 uint8 default_btc_mode; 16376 /** num of active rows in mode switching table */ 16377 uint8 msw_rows; 16378 /** num of rows in desense table */ 16379 uint8 dsns_rows; 16380 /** dynctl mode switching data table */ 16381 btc_thr_data_t msw_data[DCTL_TROWS_MAX]; 16382 /** dynctl desense switching data table */ 16383 btc_thr_data_t dsns_data[DCTL_TROWS_MAX]; 16384 } BWL_POST_PACKED_STRUCT dctl_prof_t; 16385 #include <packed_section_end.h> 16386 16387 /** dynctl status info */ 16388 #include <packed_section_start.h> 16389 typedef BWL_PRE_PACKED_STRUCT struct dynctl_status { 16390 uint8 sim_on; /**< true if simulation is On */ 16391 uint16 bt_pwr_shm; /**< BT per/task power as read from ucode */ 16392 int8 bt_pwr; /**< BT pwr extracted & converted to dBm */ 16393 int8 bt_rssi; /**< BT rssi in dBm */ 16394 int8 wl_rssi; /**< last wl rssi reading used by btcoex */ 16395 uint8 dsns_level; /**< current desense level */ 16396 uint8 btc_mode; /**< current btcoex mode */ 16397 /* add more status items if needed, pad to 4 BB if needed */ 16398 } BWL_POST_PACKED_STRUCT dynctl_status_t; 16399 #include <packed_section_end.h> 16400 16401 /** dynctl simulation (dryrun data) */ 16402 #include <packed_section_start.h> 16403 typedef BWL_PRE_PACKED_STRUCT struct dynctl_sim { 16404 uint8 sim_on; /**< simulation mode on/off */ 16405 int8 btpwr; /**< simulated BT power in dBm */ 16406 int8 btrssi; /**< simulated BT rssi in dBm */ 16407 int8 wlrssi; /**< simulated WL rssi in dBm */ 16408 } BWL_POST_PACKED_STRUCT dynctl_sim_t; 16409 /* no default structure packing */ 16410 #include <packed_section_end.h> 16411 16412 /** PTK key maintained per SCB */ 16413 #define RSN_TEMP_ENCR_KEY_LEN 16 16414 typedef struct wpa_ptk { 16415 uint8 kck[RSN_KCK_LENGTH]; /**< EAPOL-Key Key Confirmation Key (KCK) */ 16416 uint8 kek[RSN_KEK_LENGTH]; /**< EAPOL-Key Key Encryption Key (KEK) */ 16417 uint8 tk1[RSN_TEMP_ENCR_KEY_LEN]; /**< Temporal Key 1 (TK1) */ 16418 uint8 tk2[RSN_TEMP_ENCR_KEY_LEN]; /**< Temporal Key 2 (TK2) */ 16419 } wpa_ptk_t; 16420 16421 /** GTK key maintained per SCB */ 16422 typedef struct wpa_gtk { 16423 uint32 idx; 16424 uint32 key_len; 16425 uint8 key[DOT11_MAX_KEY_SIZE]; 16426 } wpa_gtk_t; 16427 16428 /** FBT Auth Response Data structure */ 16429 typedef struct wlc_fbt_auth_resp { 16430 uint8 macaddr[ETHER_ADDR_LEN]; /**< station mac address */ 16431 uint8 pad[2]; 16432 uint8 pmk_r1_name[WPA2_PMKID_LEN]; 16433 wpa_ptk_t ptk; /**< pairwise key */ 16434 wpa_gtk_t gtk; /**< group key */ 16435 uint32 ie_len; 16436 uint8 status; /**< Status of parsing FBT authentication 16437 Request in application 16438 */ 16439 uint8 ies[1]; /**< IEs contains MDIE, RSNIE, 16440 FBTIE (ANonce, SNonce,R0KH-ID, R1KH-ID) 16441 */ 16442 } wlc_fbt_auth_resp_t; 16443 16444 /** FBT Action Response frame */ 16445 typedef struct wlc_fbt_action_resp { 16446 uint16 version; /**< structure version */ 16447 uint16 length; /**< length of structure */ 16448 uint8 macaddr[ETHER_ADDR_LEN]; /**< station mac address */ 16449 uint8 data_len; /**< len of ie from Category */ 16450 uint8 data[1]; /**< data contains category, action, sta address, target ap, 16451 status code,fbt response frame body 16452 */ 16453 } wlc_fbt_action_resp_t; 16454 16455 #define MACDBG_PMAC_ADDR_INPUT_MAXNUM 16 16456 #define MACDBG_PMAC_OBJ_TYPE_LEN 8 16457 16458 typedef struct _wl_macdbg_pmac_param_t { 16459 char type[MACDBG_PMAC_OBJ_TYPE_LEN]; 16460 uint8 step; 16461 uint8 w_en; 16462 uint16 num; 16463 uint32 bitmap; 16464 uint8 addr_raw; 16465 uint8 addr_num; 16466 uint16 addr[MACDBG_PMAC_ADDR_INPUT_MAXNUM]; 16467 uint8 pad0[2]; 16468 uint32 w_val; 16469 } wl_macdbg_pmac_param_t; 16470 16471 /** IOVAR 'svmp_sampcol' parameter. Used to set and read SVMP_SAMPLE_COLLECT's setting */ 16472 typedef struct wl_svmp_sampcol_param { 16473 uint32 version; /* version */ 16474 uint8 enable; 16475 uint8 trigger_mode; /* SVMP_SAMPCOL_TRIGGER */ 16476 uint8 trigger_mode_s[2]; /* SVMP_SAMPCOL_PKTPROC */ 16477 uint8 data_samplerate; /* SVMP_SAMPCOL_SAMPLERATE */ 16478 uint8 data_sel_phy1; /* SVMP_SAMPCOL_PHY1MUX */ 16479 uint8 data_sel_rx1; /* SVMP_SAMPCOL_RX1MUX without iqCompOut */ 16480 uint8 data_sel_dualcap; /* SVMP_SAMPCOL_RX1MUX */ 16481 uint8 pack_mode; /* SVMP_SAMPCOL_PACK */ 16482 uint8 pack_order; 16483 uint8 pack_cfix_fmt; 16484 uint8 pack_1core_sel; 16485 uint16 waitcnt; 16486 uint16 caplen; 16487 uint32 buff_addr_start; /* in word-size (2-bytes) */ 16488 uint32 buff_addr_end; /* note: Tcl in byte-size, HW in vector-size (8-bytes) */ 16489 uint8 int2vasip; 16490 uint8 PAD; 16491 uint16 status; 16492 } wl_svmp_sampcol_t; 16493 16494 #define WL_SVMP_SAMPCOL_PARAMS_VERSION 1 16495 16496 enum { 16497 SVMP_SAMPCOL_TRIGGER_PKTPROC_TRANSITION = 0, 16498 SVMP_SAMPCOL_TRIGGER_FORCE_IMMEDIATE, 16499 SVMP_SAMPCOL_TRIGGER_RADAR_DET 16500 }; 16501 16502 enum { 16503 SVMP_SAMPCOL_PHY1MUX_GPIOOUT = 0, 16504 SVMP_SAMPCOL_PHY1MUX_FFT, 16505 SVMP_SAMPCOL_PHY1MUX_DBGHX, 16506 SVMP_SAMPCOL_PHY1MUX_RX1MUX 16507 }; 16508 16509 enum { 16510 SVMP_SAMPCOL_RX1MUX_FARROWOUT = 4, 16511 SVMP_SAMPCOL_RX1MUX_IQCOMPOUT, 16512 SVMP_SAMPCOL_RX1MUX_DCFILTEROUT, 16513 SVMP_SAMPCOL_RX1MUX_RXFILTEROUT, 16514 SVMP_SAMPCOL_RX1MUX_ACIFILTEROUT 16515 }; 16516 16517 enum { 16518 SVMP_SAMPCOL_SAMPLERATE_1XBW = 0, 16519 SVMP_SAMPCOL_SAMPLERATE_2XBW 16520 }; 16521 16522 enum { 16523 SVMP_SAMPCOL_PACK_DUALCAP = 0, 16524 SVMP_SAMPCOL_PACK_4CORE, 16525 SVMP_SAMPCOL_PACK_2CORE, 16526 SVMP_SAMPCOL_PACK_1CORE 16527 }; 16528 16529 enum { 16530 SVMP_SAMPCOL_PKTPROC_RESET = 0, 16531 SVMP_SAMPCOL_PKTPROC_CARRIER_SEARCH, 16532 SVMP_SAMPCOL_PKTPROC_WAIT_FOR_NB_PWR, 16533 SVMP_SAMPCOL_PKTPROC_WAIT_FOR_W1_PWR, 16534 SVMP_SAMPCOL_PKTPROC_WAIT_FOR_W2_PWR, 16535 SVMP_SAMPCOL_PKTPROC_OFDM_PHY, 16536 SVMP_SAMPCOL_PKTPROC_TIMING_SEARCH, 16537 SVMP_SAMPCOL_PKTPROC_CHAN_EST_1, 16538 SVMP_SAMPCOL_PKTPROC_LEG_SIG_DEC, 16539 SVMP_SAMPCOL_PKTPROC_SIG_DECODE_1, 16540 SVMP_SAMPCOL_PKTPROC_SIG_DECODE_2, 16541 SVMP_SAMPCOL_PKTPROC_HT_AGC, 16542 SVMP_SAMPCOL_PKTPROC_CHAN_EST_2, 16543 SVMP_SAMPCOL_PKTPROC_PAY_DECODE, 16544 SVMP_SAMPCOL_PKTPROC_DSSS_CCK_PHY, 16545 SVMP_SAMPCOL_PKTPROC_WAIT_ENERGY_DROP, 16546 SVMP_SAMPCOL_PKTPROC_WAIT_NCLKS, 16547 SVMP_SAMPCOL_PKTPROC_PAY_DEC_EXT, 16548 SVMP_SAMPCOL_PKTPROC_SIG_FAIL_DELAY, 16549 SVMP_SAMPCOL_PKTPROC_RIFS_SEARCH, 16550 SVMP_SAMPCOL_PKTPROC_BOARD_SWITCH_DIV_SEARCH, 16551 SVMP_SAMPCOL_PKTPROC_DSSS_CCK_BOARD_SWITCH_DIV_SEARCH, 16552 SVMP_SAMPCOL_PKTPROC_CHAN_EST_3, 16553 SVMP_SAMPCOL_PKTPROC_CHAN_EST_4, 16554 SVMP_SAMPCOL_PKTPROC_FINE_TIMING_SEARCH, 16555 SVMP_SAMPCOL_PKTPROC_SET_CLIP_GAIN, 16556 SVMP_SAMPCOL_PKTPROC_NAP, 16557 SVMP_SAMPCOL_PKTPROC_VHT_SIGA_DEC, 16558 SVMP_SAMPCOL_PKTPROC_VHT_SIGB_DEC, 16559 SVMP_SAMPCOL_PKTPROC_PKT_ABORT, 16560 SVMP_SAMPCOL_PKTPROC_DCCAL 16561 }; 16562 16563 /** IOVAR 'svmp_mem' parameter. Used to read/clear svmp memory */ 16564 typedef struct svmp_mem { 16565 uint32 addr; /**< offset to read svmp memory from vasip base address */ 16566 uint16 len; /**< length in count of uint16's */ 16567 uint16 val; /**< set the range of addr/len with a value */ 16568 } svmp_mem_t; 16569 16570 /** IOVAR 'mu_rate' parameter. read/set mu rate for upto four users */ 16571 #define MU_RATE_CFG_VERSION 1 16572 typedef struct mu_rate { 16573 uint16 version; /**< version of the structure as defined by MU_RATE_CFG_VERSION */ 16574 uint16 length; /**< length of entire structure */ 16575 uint8 auto_rate; /**< enable/disable auto rate */ 16576 uint8 PAD; 16577 uint16 rate_user[4]; /**< rate per each of four users, set to -1 for no change */ 16578 } mu_rate_t; 16579 16580 /** IOVAR 'mu_group' parameter. Used to set and read MU group recommendation setting */ 16581 #define WL_MU_GROUP_AUTO_COMMAND -1 16582 #define WL_MU_GROUP_PARAMS_VERSION 3 16583 #define WL_MU_GROUP_METHOD_NAMELEN 64 16584 #define WL_MU_GROUP_NGROUP_MAX 15 16585 #define WL_MU_GROUP_NUSER_MAX 4 16586 #define WL_MU_GROUP_METHOD_MIN 0 16587 #define WL_MU_GROUP_NUMBER_AUTO_MIN 1 16588 #define WL_MU_GROUP_NUMBER_AUTO_MAX 15 16589 #define WL_MU_GROUP_NUMBER_FORCED_MAX 8 16590 #define WL_MU_GROUP_METHOD_OLD 0 16591 #define WL_MU_GROUP_MODE_AUTO 0 16592 #define WL_MU_GROUP_MODE_FORCED 1 16593 #define WL_MU_GROUP_FORCED_1GROUP 1 16594 #define WL_MU_GROUP_ENTRY_EMPTY -1 16595 typedef struct mu_group { 16596 uint32 version; /* version */ 16597 int16 forced; /* forced group recommendation */ 16598 int16 forced_group_mcs; /* forced group with mcs */ 16599 int16 forced_group_num; /* forced group number */ 16600 int16 group_option[WL_MU_GROUP_NGROUP_MAX][WL_MU_GROUP_NUSER_MAX]; 16601 /* set mode for forced grouping and read mode for auto grouping */ 16602 int16 group_GID[WL_MU_GROUP_NGROUP_MAX]; 16603 int16 group_method; /* methof for VASIP group recommendation */ 16604 int16 group_number; /* requested number for VASIP group recommendation */ 16605 int16 auto_group_num; /* exact number from VASIP group recommendation */ 16606 int8 group_method_name[WL_MU_GROUP_METHOD_NAMELEN]; 16607 uint8 PAD[2]; 16608 } mu_group_t; 16609 16610 typedef struct mupkteng_sta { 16611 struct ether_addr ea; 16612 uint8 PAD[2]; 16613 int32 nrxchain; 16614 int32 idx; 16615 } mupkteng_sta_t; 16616 16617 typedef struct mupkteng_client { 16618 int32 rspec; 16619 int32 idx; 16620 int32 flen; 16621 int32 nframes; 16622 } mupkteng_client_t; 16623 16624 typedef struct mupkteng_tx { 16625 mupkteng_client_t client[8]; 16626 int32 nclients; 16627 int32 ntx; 16628 } mupkteng_tx_t; 16629 16630 /* 16631 * MU Packet engine interface. 16632 * The following two definitions will go into 16633 * wlioctl_defs.h 16634 * when wl utility changes are merged to EAGLE TOB & Trunk 16635 */ 16636 16637 #define WL_MUPKTENG_PER_TX_START 0x10 16638 #define WL_MUPKTENG_PER_TX_STOP 0x20 16639 16640 /** IOVAR 'mu_policy' parameter. Used to configure MU admission control policies */ 16641 #define WL_MU_POLICY_PARAMS_VERSION 1 16642 #define WL_MU_POLICY_SCHED_DEFAULT 60 16643 #define WL_MU_POLICY_DISABLED 0 16644 #define WL_MU_POLICY_ENABLED 1 16645 #define WL_MU_POLICY_NRX_MIN 1 16646 #define WL_MU_POLICY_NRX_MAX 2 16647 typedef struct mu_policy { 16648 uint16 version; 16649 uint16 length; 16650 uint32 sched_timer; 16651 uint32 pfmon; 16652 uint32 pfmon_gpos; 16653 uint32 samebw; 16654 uint32 nrx; 16655 uint32 max_muclients; 16656 } mu_policy_t; 16657 16658 #define WL_NAN_BAND_STR_SIZE 5 /* sizeof ("auto") */ 16659 16660 /** Definitions of different NAN Bands */ 16661 /* do not change the order */ 16662 enum { 16663 NAN_BAND_B = 0, 16664 NAN_BAND_A, 16665 NAN_BAND_AUTO, 16666 NAN_BAND_INVALID = 0xFF 16667 }; 16668 16669 /* ifdef WL11ULB */ 16670 /* ULB Mode configured via "ulb_mode" IOVAR */ 16671 enum { 16672 ULB_MODE_DISABLED = 0, 16673 ULB_MODE_STD_ALONE_MODE = 1, /* Standalone ULB Mode */ 16674 ULB_MODE_DYN_MODE = 2, /* Dynamic ULB Mode */ 16675 /* Add all other enums before this */ 16676 MAX_SUPP_ULB_MODES 16677 }; 16678 16679 /* ULB BWs configured via "ulb_bw" IOVAR during Standalone Mode Only. 16680 * Values of this enumeration are also used to specify 'Current Operational Bandwidth' 16681 * and 'Primary Operational Bandwidth' sub-fields in 'ULB Operations' field (used in 16682 * 'ULB Operations' Attribute or 'ULB Mode Switch' Attribute) 16683 */ 16684 typedef enum { 16685 ULB_BW_DISABLED = 0, 16686 ULB_BW_10MHZ = 1, /* Standalone ULB BW in 10 MHz BW */ 16687 ULB_BW_5MHZ = 2, /* Standalone ULB BW in 5 MHz BW */ 16688 ULB_BW_2P5MHZ = 3, /* Standalone ULB BW in 2.5 MHz BW */ 16689 /* Add all other enums before this */ 16690 MAX_SUPP_ULB_BW 16691 } ulb_bw_type_t; 16692 /* endif WL11ULB */ 16693 16694 #define WL_MESH_IOCTL_VERSION 1 16695 #define MESH_IOC_BUFSZ 512 /* sufficient ioc buff size for mesh */ 16696 16697 /* container for mesh iovtls & events */ 16698 typedef struct wl_mesh_ioc { 16699 uint16 version; /* interface command or event version */ 16700 uint16 id; /* mesh ioctl cmd ID */ 16701 uint16 len; /* total length of all tlv records in data[] */ 16702 uint16 pad; /* pad to be 32 bit aligment */ 16703 uint8 data[]; /* var len payload of bcm_xtlv_t type */ 16704 } wl_mesh_ioc_t; 16705 16706 enum wl_mesh_cmds { 16707 WL_MESH_CMD_ENABLE = 1, 16708 WL_MESH_CMD_JOIN = 2, 16709 WL_MESH_CMD_PEER_STATUS = 3, 16710 WL_MESH_CMD_ADD_ROUTE = 4, 16711 WL_MESH_CMD_DEL_ROUTE = 5, 16712 WL_MESH_CMD_ADD_FILTER = 6, 16713 WL_MESH_CMD_ENAB_AL_METRIC = 7 16714 }; 16715 16716 enum wl_mesh_cmd_xtlv_id { 16717 WL_MESH_XTLV_ENABLE = 1, 16718 WL_MESH_XTLV_JOIN = 2, 16719 WL_MESH_XTLV_STATUS = 3, 16720 WL_MESH_XTLV_ADD_ROUTE = 4, 16721 WL_MESH_XTLV_DEL_ROUTE = 5, 16722 WL_MESH_XTLV_ADD_FILTER = 6, 16723 WL_MESH_XTLV_ENAB_AIRLINK = 7 16724 }; 16725 /* endif WLMESH */ 16726 16727 /* Fast BSS Transition parameter configuration */ 16728 #define FBT_PARAM_CURRENT_VERSION 0 16729 16730 typedef struct _wl_fbt_params { 16731 uint16 version; /* version of the structure 16732 * as defined by FBT_PARAM_CURRENT_VERSION 16733 */ 16734 uint16 length; /* length of the entire structure */ 16735 16736 uint16 param_type; /* type of parameter defined below */ 16737 uint16 param_len; /* length of the param_value */ 16738 uint8 param_value[1]; /* variable length */ 16739 } wl_fbt_params_t; 16740 16741 #define WL_FBT_PARAM_TYPE_RSNIE 0 16742 #define WL_FBT_PARAM_TYPE_FTIE 0x1 16743 #define WL_FBT_PARAM_TYPE_SNONCE 0x2 16744 #define WL_FBT_PARAM_TYPE_MDE 0x3 16745 #define WL_FBT_PARAM_TYPE_PMK_R0_NAME 0x4 16746 #define WL_FBT_PARAM_TYPE_R0_KHID 0x5 16747 #define WL_FBT_PARAM_TYPE_R1_KHID 0x6 16748 #define WL_FBT_PARAM_TYPE_FIRST_INVALID 0x7 16749 16750 /* Assoc Mgr commands for fine control of assoc */ 16751 #define WL_ASSOC_MGR_CURRENT_VERSION 0x0 16752 16753 typedef struct { 16754 uint16 version; /* version of the structure as 16755 * defined by WL_ASSOC_MGR_CURRENT_VERSION 16756 */ 16757 uint16 length; /* length of the entire structure */ 16758 16759 uint16 cmd; 16760 uint16 params; 16761 } wl_assoc_mgr_cmd_t; 16762 16763 #define WL_ASSOC_MGR_CMD_PAUSE_ON_EVT 0 /* have assoc pause on certain events */ 16764 #define WL_ASSOC_MGR_CMD_ABORT_ASSOC 1 16765 16766 #define WL_ASSOC_MGR_PARAMS_EVENT_NONE 0 /* use this to resume as well as clear */ 16767 #define WL_ASSOC_MGR_PARAMS_PAUSE_EVENT_AUTH_RESP 1 16768 16769 #define WL_WINVER_STRUCT_VER_1 (1) 16770 16771 typedef struct wl_winver { 16772 16773 /* Version and length of this structure. Length includes all fields in wl_winver_t */ 16774 uint16 struct_version; 16775 uint16 struct_length; 16776 16777 /* Windows operating system version info (Microsoft provided) */ 16778 struct { 16779 uint32 major_ver; 16780 uint32 minor_ver; 16781 uint32 build; 16782 } os_runtime; 16783 16784 /* NDIS runtime version (Microsoft provided) */ 16785 struct { 16786 uint16 major_ver; 16787 uint16 minor_ver; 16788 } ndis_runtime; 16789 16790 /* NDIS Driver version (Broadcom provided) */ 16791 struct { 16792 uint16 major_ver; 16793 uint16 minor_ver; 16794 } ndis_driver; 16795 16796 /* WDI Upper Edge (UE) Driver version (Microsoft provided) */ 16797 struct { 16798 uint8 major_ver; 16799 uint8 minor_ver; 16800 uint8 suffix; 16801 } wdi_ue; 16802 16803 /* WDI Lower Edge (LE) Driver version (Broadcom provided) */ 16804 struct { 16805 uint8 major_ver; 16806 uint8 minor_ver; 16807 uint8 suffix; 16808 } wdi_le; 16809 uint8 PAD[2]; 16810 } wl_winver_t; 16811 16812 /* defined(WLRCC) || defined(ROAM_CHANNEL_CACHE) */ 16813 #define MAX_ROAM_CHANNEL 20 16814 typedef struct { 16815 int32 n; 16816 chanspec_t channels[MAX_ROAM_CHANNEL]; 16817 } wl_roam_channel_list_t; 16818 /* endif RCC || ROAM_CHANNEL_CACHE */ 16819 16820 /* values for IOV_MFP arg */ 16821 enum { 16822 WL_MFP_NONE = 0, 16823 WL_MFP_CAPABLE, 16824 WL_MFP_REQUIRED 16825 }; 16826 16827 typedef enum { 16828 CHANSW_UNKNOWN = 0, /* channel switch due to unknown reason */ 16829 CHANSW_SCAN = 1, /* channel switch due to scan */ 16830 CHANSW_PHYCAL = 2, /* channel switch due to phy calibration */ 16831 CHANSW_INIT = 3, /* channel set at WLC up time */ 16832 CHANSW_ASSOC = 4, /* channel switch due to association */ 16833 CHANSW_ROAM = 5, /* channel switch due to roam */ 16834 CHANSW_MCHAN = 6, /* channel switch triggered by mchan module */ 16835 CHANSW_IOVAR = 7, /* channel switch due to IOVAR */ 16836 CHANSW_CSA_DFS = 8, /* channel switch due to chan switch announcement from AP */ 16837 CHANSW_APCS = 9, /* Channel switch from AP channel select module */ 16838 CHANSW_FBT = 11, /* Channel switch from FBT module for action frame response */ 16839 CHANSW_UPDBW = 12, /* channel switch at update bandwidth */ 16840 CHANSW_ULB = 13, /* channel switch at ULB */ 16841 CHANSW_LAST = 14 /* last channel switch reason */ 16842 } chansw_reason_t; 16843 16844 /* 16845 * WOWL unassociated mode power svae pattern. 16846 */ 16847 typedef struct wowl_radio_duty_cycle { 16848 uint16 wake_interval; 16849 uint16 sleep_interval; 16850 } wowl_radio_duty_cycle_t; 16851 16852 typedef struct nd_ra_ol_limits { 16853 uint16 version; /* version of the iovar buffer */ 16854 uint16 type; /* type of data provided */ 16855 uint16 length; /* length of the entire structure */ 16856 uint16 pad1; /* pad union to 4 byte boundary */ 16857 union { 16858 struct { 16859 uint16 min_time; /* seconds, min time for RA offload hold */ 16860 uint16 lifetime_percent; 16861 /* percent, lifetime percentage for offload hold time */ 16862 } lifetime_relative; 16863 struct { 16864 uint16 hold_time; /* seconds, RA offload hold time */ 16865 uint16 pad2; /* unused */ 16866 } fixed; 16867 } limits; 16868 } nd_ra_ol_limits_t; 16869 16870 #define ND_RA_OL_LIMITS_VER 1 16871 16872 /* nd_ra_ol_limits sub-types */ 16873 #define ND_RA_OL_LIMITS_REL_TYPE 0 /* relative, percent of RA lifetime */ 16874 #define ND_RA_OL_LIMITS_FIXED_TYPE 1 /* fixed time */ 16875 16876 /* buffer lengths for the different nd_ra_ol_limits types */ 16877 #define ND_RA_OL_LIMITS_REL_TYPE_LEN 12 16878 #define ND_RA_OL_LIMITS_FIXED_TYPE_LEN 10 16879 16880 /* 16881 * Temperature Throttling control mode 16882 */ 16883 typedef struct wl_temp_control { 16884 uint8 enable; 16885 uint8 PAD; 16886 uint16 control_bit; 16887 } wl_temp_control_t; 16888 16889 /* SensorHub Interworking mode */ 16890 16891 #define SHUB_CONTROL_VERSION 1 16892 #define SHUB_CONTROL_LEN 12 16893 16894 typedef struct { 16895 uint16 verison; 16896 uint16 length; 16897 uint16 cmd; 16898 uint16 op_mode; 16899 uint16 interval; 16900 uint16 enable; 16901 } shub_control_t; 16902 16903 /* WLC_MAJOR_VER <= 5 */ 16904 /* Data structures for non-TLV format */ 16905 16906 /* Data structures for rsdb caps */ 16907 /* 16908 * The flags field of the rsdb_caps_response is designed to be 16909 * a Bit Mask. As of now only Bit 0 is used as mentioned below. 16910 */ 16911 16912 /* Bit-0 in flags is used to indicate if the cores can operate synchronously 16913 * i.e either as 2x2 MIMO or 2(1x1 SISO). This is true only for 4349 variants 16914 * 0 - device can operate only in rsdb mode (eg: 4364) 16915 * 1 - device can operate in both rsdb and mimo (eg : 4359 variants) 16916 */ 16917 16918 #define WL_RSDB_CAPS_VER 2 16919 #define SYNCHRONOUS_OPERATION_TRUE (1 << 0) 16920 #define WL_RSDB_CAPS_FIXED_LEN OFFSETOF(rsdb_caps_response_t, num_chains) 16921 16922 typedef struct rsdb_caps_response { 16923 uint8 ver; /* Version */ 16924 uint8 len; /* length of this structure excluding ver and len */ 16925 uint8 rsdb; /* TRUE for rsdb chip */ 16926 uint8 num_of_cores; /* no of d11 cores */ 16927 uint16 flags; /* Flags to indicate various capabilities */ 16928 uint8 num_chains[1]; /* Tx/Rx chains for each core */ 16929 } rsdb_caps_response_t; 16930 16931 /* Data structures for rsdb bands */ 16932 16933 #define WL_RSDB_BANDS_VER 2 16934 #define WL_RSDB_BANDS_FIXED_LEN OFFSETOF(rsdb_bands_t, band) 16935 16936 typedef struct rsdb_bands 16937 { 16938 uint8 ver; 16939 uint8 len; 16940 uint16 num_cores; /* num of D11 cores */ 16941 int16 band[1]; /* The band operating on each of the d11 cores */ 16942 } rsdb_bands_t; 16943 16944 /* rsdb config */ 16945 16946 #define WL_RSDB_CONFIG_VER 3 16947 #define ALLOW_SIB_PARALLEL_SCAN (1 << 0) 16948 #define MAX_BANDS 2 16949 16950 #define WL_RSDB_CONFIG_LEN sizeof(rsdb_config_t) 16951 16952 typedef uint8 rsdb_opmode_t; 16953 typedef uint32 rsdb_flags_t; 16954 16955 typedef enum rsdb_modes { 16956 WLC_SDB_MODE_NOSDB_MAIN = 1, /* 2X2 or MIMO mode (applicable only for 4355) */ 16957 WLC_SDB_MODE_NOSDB_AUX = 2, 16958 WLC_SDB_MODE_SDB_MAIN = 3, /* This is RSDB mode(default) applicable only for 4364 */ 16959 WLC_SDB_MODE_SDB_AUX = 4, 16960 WLC_SDB_MODE_SDB_AUTO = 5, /* Same as WLC_RSDB_MODE_RSDB(1+1) mode above */ 16961 } rsdb_modes_t; 16962 16963 typedef struct rsdb_config { 16964 uint8 ver; 16965 uint8 len; 16966 uint16 reserved; 16967 rsdb_opmode_t non_infra_mode; 16968 rsdb_opmode_t infra_mode[MAX_BANDS]; 16969 rsdb_flags_t flags[MAX_BANDS]; 16970 rsdb_opmode_t current_mode; /* Valid only in GET, returns the current mode */ 16971 uint8 pad[3]; 16972 } rsdb_config_t; 16973 16974 /* WLC_MAJOR_VER > =5 */ 16975 /* TLV definitions and data structures for rsdb subcmds */ 16976 16977 enum wl_rsdb_cmd_ids { 16978 /* RSDB ioctls */ 16979 WL_RSDB_CMD_VER = 0, 16980 WL_RSDB_CMD_CAPS = 1, 16981 WL_RSDB_CMD_BANDS = 2, 16982 WL_RSDB_CMD_CONFIG = 3, 16983 /* Add before this !! */ 16984 WL_RSDB_CMD_LAST 16985 }; 16986 #define WL_RSDB_IOV_VERSION 0x1 16987 16988 typedef struct rsdb_caps_response_v1 { 16989 uint8 rsdb; /* TRUE for rsdb chip */ 16990 uint8 num_of_cores; /* no of d11 cores */ 16991 uint16 flags; /* Flags to indicate various capabilities */ 16992 uint8 num_chains[MAX_NUM_D11CORES]; /* Tx/Rx chains for each core */ 16993 uint8 band_cap[MAX_NUM_D11CORES]; /* band cap bitmask per slice */ 16994 } rsdb_caps_response_v1_t; 16995 16996 typedef struct rsdb_bands_v1 16997 { 16998 uint8 num_cores; /* num of D11 cores */ 16999 uint8 pad; /* padding bytes for 4 byte alignment */ 17000 int8 band[MAX_NUM_D11CORES]; /* The band operating on each of the d11 cores */ 17001 } rsdb_bands_v1_t; 17002 17003 typedef struct rsdb_config_xtlv { 17004 rsdb_opmode_t reserved1; /* Non_infra mode is no more applicable */ 17005 rsdb_opmode_t infra_mode[MAX_BANDS]; /* Target mode for Infra association */ 17006 uint8 pad; /* pad bytes for 4 byte alignment */ 17007 rsdb_flags_t flags[MAX_BANDS]; 17008 rsdb_opmode_t current_mode; /* GET only; has current mode of operation */ 17009 uint8 pad1[3]; 17010 } rsdb_config_xtlv_t; 17011 17012 /* Definitions for slot_bss chanseq iovar */ 17013 #define WL_SLOT_BSS_VERSION 1 17014 17015 /* critical slots max size */ 17016 #define WL_SLOTTED_BSS_CS_BMP_CFG_MAX_SZ 128 /* arbitrary */ 17017 17018 enum wl_slotted_bss_cmd_id { 17019 WL_SLOTTED_BSS_CMD_VER = 0, 17020 WL_SLOTTED_BSS_CMD_CHANSEQ = 1, 17021 WL_SLOTTED_BSS_CMD_CS_BMP = 2 /* critical slots bitmap */ 17022 }; 17023 17024 typedef uint16 chan_seq_type_t; 17025 enum chan_seq_type { 17026 CHAN_SEQ_TYPE_AWDL = 1, 17027 CHAN_SEQ_TYPE_SLICE = 2, 17028 CHAN_SEQ_TYPE_NAN = 3, /* NAN avail XTLV */ 17029 CHAN_SEQ_TYPE_NANHO = 4 /* NANHO channel schedule XTLV */ 17030 }; 17031 17032 typedef uint8 sched_flag_t; 17033 enum sched_flag { 17034 NO_SDB_SCHED = 0x1, 17035 SDB_TDM_SCHED = 0x2, 17036 SDB_SPLIT_BAND_SCHED = 0x4, /* default mode for 4357 */ 17037 MAIN_ONLY = 0x8, 17038 AUX_ONLY = 0x10, 17039 SDB_DUAL_TIME = (MAIN_ONLY | AUX_ONLY), 17040 NO_SDB_MAIN_ONLY = (NO_SDB_SCHED | MAIN_ONLY), /* default mode for 4364 */ 17041 SDB_TDM_SCHED_MAIN = (SDB_TDM_SCHED | MAIN_ONLY), 17042 SDB_TDM_SCHED_AUX = (SDB_TDM_SCHED | AUX_ONLY), 17043 SDB_TDM_SCHED_DUAL_TIME = (SDB_TDM_SCHED | SDB_DUAL_TIME), 17044 SDB_SPLIT_BAND_SCHED_DUAL_TIME = (SDB_SPLIT_BAND_SCHED | SDB_DUAL_TIME) 17045 }; 17046 17047 typedef struct chan_seq_tlv_data { 17048 uint32 flags; 17049 uint8 data[1]; 17050 } chan_seq_tlv_data_t; 17051 17052 typedef struct chan_seq_tlv { 17053 chan_seq_type_t type; 17054 uint16 len; 17055 chan_seq_tlv_data_t chanseq_data[1]; 17056 } chan_seq_tlv_t; 17057 17058 typedef struct sb_channel_sequence { 17059 sched_flag_t sched_flags; /* (sdb-tdm or sdb-sb or Dual-Time) */ 17060 uint8 num_seq; /* number of chan_seq_tlv following */ 17061 uint16 pad; 17062 chan_seq_tlv_t seq[1]; 17063 } sb_channel_sequence_t; 17064 17065 typedef struct slice_chan_seq { 17066 uint8 slice_index; /* 0(Main) or 1 (Aux) */ 17067 uint8 num_chanspecs; 17068 uint8 dur; 17069 uint8 pad; 17070 chanspec_t chanspecs[1]; 17071 } slice_chan_seq_t; 17072 17073 #define SLOT_BSS_SLICE_TYPE_DUR_MAX_RANGE 2u 17074 #define SLOTTED_BSS_AGGR_EN (1 << 0) /* Bitmap of mode */ 17075 #define SLOTTED_BSS_AGGR_LIMIT_DUR (1 << 1) /* Jira 49554 */ 17076 #define SLOTTED_BSS_HE_1024_QAM_SUPPORT (1 << 2) /* MCS10-11 Support */ 17077 17078 #define WL_SLICE_CHAN_SEQ_FIXED_LEN OFFSETOF(slice_chan_seq_t, chanspecs) 17079 /* Definitions for slotted_bss stats */ 17080 #define SBSS_STATS_VERSION 1 17081 #define SBSS_STATS_CURRENT_VERSION SBSS_STATS_VERSION 17082 17083 #define SBSS_MAX_CHAN_STATS 4 17084 17085 typedef struct sbss_core_stats { 17086 uint32 sb_slot_start; 17087 uint32 sb_slot_end; 17088 uint32 sb_slot_skip; 17089 uint32 mismatch_count; 17090 } sbss_core_stats_t; 17091 17092 typedef struct sbss_chan_stats { 17093 chanspec_t chanspec; 17094 uint32 slot_start; 17095 uint32 slot_end; 17096 uint32 slot_skip; 17097 } sbss_chan_stats_t; 17098 17099 typedef struct sbss_stats_v1 { 17100 uint16 version; 17101 uint16 length; 17102 sbss_core_stats_t corestats[MAX_NUM_D11CORES]; 17103 sbss_chan_stats_t sbss_chanstats[MAX_NUM_D11CORES][SBSS_MAX_CHAN_STATS]; 17104 } sbss_stats_t; 17105 17106 /* slotted bss critical slots */ 17107 typedef struct wl_sbss_cs_bmp_s { 17108 uint8 bitmap_len; 17109 uint8 pad[3]; 17110 uint8 bitmap[]; 17111 } wl_sbss_cs_bmp_t; 17112 17113 typedef struct sim_pm_params { 17114 uint32 enabled; 17115 uint16 cycle; 17116 uint16 up; 17117 } sim_pm_params_t; 17118 17119 /* Digital napping status */ 17120 #define WL_NAP_STATUS_VERSION_1 1 17121 typedef struct wl_nap_status_v1 { 17122 uint16 version; /* structure version */ 17123 uint16 len; /* length of returned data */ 17124 uint16 fw_status; /* bitmask of FW disable reasons */ 17125 uint8 hw_status; /* bitmask for actual HW state info */ 17126 uint8 slice_index; /* which slice this represents */ 17127 uint32 total_disable_dur; /* total time (ms) disabled for fw_status */ 17128 } wl_nap_status_v1_t; 17129 17130 /* Bits for fw_status */ 17131 #define NAP_DISABLED_HOST 0x0001 /* Host has disabled through nap_enable */ 17132 #define NAP_DISABLED_RSSI 0x0002 /* Disabled because of nap_rssi_threshold */ 17133 #define NAP_DISABLED_SCAN 0x0004 /* Disabled because of scan */ 17134 #define NAP_DISABLED_ASSOC 0x0008 /* Disabled because of association */ 17135 #define NAP_DISABLED_LTE 0x0010 /* Disabled because of LTE */ 17136 #define NAP_DISABLED_ACI 0x0020 /* Disabled because of ACI mitigation */ 17137 17138 /* Bits for hw_status */ 17139 #define NAP_HWCFG 0x01 /* State of NAP config bit in phy HW */ 17140 #define NAP_NOCLK 0x80 /* No clock to read HW (e.g. core down) */ 17141 17142 /* ifdef WL_NATOE */ 17143 #define WL_NATOE_IOCTL_VERSION 1 17144 #define WL_NATOE_IOC_BUFSZ 512 /* sufficient ioc buff size for natoe */ 17145 #define WL_NATOE_DBG_STATS_BUFSZ 2048 17146 #define NATOE_FLAGS_ENAB_MASK 0x1 17147 #define NATOE_FLAGS_ACTIVE_MASK 0x2 17148 #define NATOE_FLAGS_PUBNW_MASK 0x4 17149 #define NATOE_FLAGS_PVTNW_MASK 0x8 17150 #define NATOE_FLAGS_ENAB_SHFT_MASK 0 17151 #define NATOE_FLAGS_ACTIVE_SHFT_MASK 1 17152 #define NATOE_FLAGS_PUBNW_SHFT_MASK 2 17153 #define NATOE_FLAGS_PVTNW_SHFT_MASK 3 17154 #define NATOE_FLAGS_PUB_NW_UP (1 << NATOE_FLAGS_PUBNW_SHFT_MASK) 17155 #define NATOE_FLAGS_PVT_NW_UP (1 << NATOE_FLAGS_PVTNW_SHFT_MASK) 17156 17157 #define PCIE_FRWDPKT_STATS_VERSION 1 17158 17159 /* Module version is 1 for IGUANA */ 17160 #define WL_NATOE_MODULE_VER_1 1 17161 /* Module version is 2 for Lemur */ 17162 #define WL_NATOE_MODULE_VER_2 2 17163 17164 /* WL_NATOE_CMD_MOD_VER */ 17165 typedef uint16 wl_natoe_ver_t; 17166 /* config natoe STA and AP IP's structure */ 17167 typedef struct { 17168 uint32 sta_ip; 17169 uint32 sta_netmask; 17170 uint32 sta_router_ip; 17171 uint32 sta_dnsip; 17172 uint32 ap_ip; 17173 uint32 ap_netmask; 17174 } wl_natoe_config_ips_t; 17175 17176 /* natoe ports config structure */ 17177 typedef struct { 17178 uint16 start_port_num; 17179 uint16 no_of_ports; 17180 } wl_natoe_ports_config_t; 17181 17182 /* natoe ports exception info */ 17183 typedef struct { 17184 uint16 sta_port_num; 17185 uint16 dst_port_num; /* for SIP type protocol, dst_port_num info can be ignored by FW */ 17186 uint32 ip; /* for SIP ip is APcli_ip and for port clash it is dst_ip */ 17187 uint8 entry_type; /* Create/Destroy */ 17188 uint8 pad[3]; 17189 } wl_natoe_exception_port_t; 17190 17191 /* container for natoe ioctls & events */ 17192 typedef struct wl_natoe_ioc { 17193 uint16 version; /* interface command or event version */ 17194 uint16 id; /* natoe ioctl cmd ID */ 17195 uint16 len; /* total length of all tlv records in data[] */ 17196 uint16 pad; /* pad to be 32 bit aligment */ 17197 uint8 data[]; /* var len payload of bcm_xtlv_t type */ 17198 } wl_natoe_ioc_t; 17199 17200 typedef struct wl_natoe_pool_stats_v1 { 17201 /* For debug purposes */ 17202 uint16 poolreorg_cnt; 17203 uint16 poolrevert_cnt; 17204 uint16 txfrag_state; 17205 uint16 rxfrag_state; 17206 uint16 txfrag_plen; 17207 uint16 rxfrag_plen; 17208 uint16 tx_pavail; 17209 uint16 rx_pavail; 17210 uint16 txmin_bkup_bufs; 17211 uint16 rxmin_bkup_bufs; 17212 uint16 pktpool_sbuf_alloc; 17213 uint16 pktpool_plen; 17214 uint16 pktpool_pavail; 17215 /* Peak shared buffer count in all iterations */ 17216 uint16 sbuf_peak; 17217 /* Peak shared buffer count in current D3 iteration */ 17218 uint16 sbuf_peak_cur; 17219 } wl_natoe_pool_stats_v1_t; 17220 17221 typedef struct wl_natoe_arp_entry_v1 { 17222 struct ipv4_addr ip; 17223 struct ether_addr mac_addr; 17224 uint8 lifetime; 17225 uint8 flags; 17226 } wl_natoe_arp_entry_v1_t; 17227 17228 typedef struct wl_natoe_dbg_arp_tbl_info_v1 { 17229 uint8 valid_arp_entries; 17230 uint8 PAD[3]; 17231 wl_natoe_arp_entry_v1_t arp_ent[]; 17232 } wl_natoe_dbg_arp_tbl_info_v1_t; 17233 17234 typedef struct wl_natoe_skip_port_entry_v1 { 17235 struct ipv4_addr srcip; 17236 uint16 src_port; 17237 uint16 lifetime; 17238 } wl_natoe_skip_port_entry_v1_t; 17239 17240 typedef struct wl_natoe_skip_port_info_v1 { 17241 uint8 valid_entries; 17242 uint8 PAD[3]; 17243 wl_natoe_skip_port_entry_v1_t skip_port_ent[]; 17244 } wl_natoe_skip_port_info_v1_t; 17245 17246 typedef struct wl_natoe_dbg_stats_v1 { 17247 uint16 active_nat_entries; 17248 uint16 active_dns_entries; 17249 uint16 active_icmp_entries; 17250 uint16 valid_arp_entries; 17251 uint16 prev_nat_entries; 17252 uint16 prev_dns_entries; 17253 uint16 tcp_fast_reclaim_cnt; 17254 uint16 mcast_packets; 17255 uint16 bcast_packets; 17256 uint16 port_commands_rcvd; 17257 uint16 unsupported_prot; 17258 uint16 arp_req_sent; 17259 uint16 arp_rsp_rcvd; 17260 uint16 non_ether_frames; 17261 uint16 port_alloc_fail; 17262 uint16 srcip_tbl_full; 17263 uint16 dstip_tbl_full; 17264 uint16 nat_tbl_full; 17265 uint16 icmp_error_cnt; 17266 uint16 pkt_drops_resource; 17267 uint32 frwd_nat_pkt_cnt; 17268 uint32 reverse_nat_pkt_cnt; 17269 uint16 pub_nw_chspec; 17270 uint16 pvt_nw_chspec; 17271 uint8 pubnw_cfg_idx; 17272 uint8 pvtnw_cfg_idx; 17273 uint8 pubnw_cfg_ID; 17274 uint8 pvtnw_cfg_ID; 17275 uint16 natoe_flags; 17276 } wl_natoe_dbg_stats_v1_t; 17277 17278 typedef struct wl_natoe_exception_port_inf_v1 { 17279 uint16 except_bmap_size; 17280 uint8 port_except_bmap[]; 17281 } wl_natoe_exception_port_inf_v1_t; 17282 17283 typedef struct wl_natoe_dstnat_entry_v1 { 17284 struct ipv4_addr clientip; 17285 struct ether_addr client_mac_addr; 17286 uint16 client_listenport; 17287 uint8 opcode; 17288 } wl_natoe_dstnat_entry_v1_t; 17289 17290 typedef struct wl_pcie_frwd_stats_v1 { 17291 uint16 version; 17292 uint16 len; 17293 uint16 frwd_txfrag_q_cnt; /* no. of txfrags in frwd_txfrag_list */ 17294 /* no. of outstanding lbufs in txpath on if0/ifx */ 17295 uint16 tx_frwd_n_lb_if0; 17296 uint16 tx_frwd_n_lb_ifx; 17297 /* no. of outstanding lfrags in txpath on if0/ifx */ 17298 uint16 tx_frwd_n_lf_if0; 17299 uint16 tx_frwd_n_lf_ifx; 17300 /* no. of pending frwd pkts dropped upon d3 entry */ 17301 uint16 tx_frwd_d3_drop_cnt; 17302 /* Total no. of lbufs frwded in txpath on if0/ifx */ 17303 uint32 tx_frwd_n_lb_if0_cnt; 17304 uint32 tx_frwd_n_lb_ifx_cnt; 17305 /* Total no. of lfrags frwded in txpath on if0/ifx */ 17306 uint32 tx_frwd_n_lf_if0_cnt; 17307 uint32 tx_frwd_n_lf_ifx_cnt; 17308 uint32 frwd_tx_drop_thr_cnt; /* no. of pkts dropped due to txfrag threshold */ 17309 uint32 frwd_tx_drop_err_cnt; /* no. of pkts dropped due to txfrags not avail / errors */ 17310 } wl_pcie_frwd_stats_v1_t; 17311 17312 enum wl_natoe_cmds { 17313 WL_NATOE_CMD_MOD_VER = 0, 17314 WL_NATOE_CMD_ENABLE = 1, 17315 WL_NATOE_CMD_CONFIG_IPS = 2, 17316 WL_NATOE_CMD_CONFIG_PORTS = 3, 17317 WL_NATOE_CMD_DBG_STATS = 4, 17318 WL_NATOE_CMD_EXCEPTION_PORT = 5, 17319 WL_NATOE_CMD_SKIP_PORT = 6, 17320 WL_NATOE_CMD_TBL_CNT = 7, 17321 WL_NATOE_CMD_CONFIG_DSTNAT = 8, 17322 WL_NATOE_CMD_CTRL = 9 17323 }; 17324 17325 enum wl_natoe_cmd_xtlv_id { 17326 WL_NATOE_XTLV_MOD_VER = 0, 17327 WL_NATOE_XTLV_ENABLE = 1, 17328 WL_NATOE_XTLV_CONFIG_IPS = 2, 17329 WL_NATOE_XTLV_CONFIG_PORTS = 3, 17330 WL_NATOE_XTLV_DBG_STATS = 4, 17331 WL_NATOE_XTLV_EXCEPTION_PORT = 5, 17332 WL_NATOE_XTLV_SKIP_PORT = 6, 17333 WL_NATOE_XTLV_TBL_CNT = 7, 17334 WL_NATOE_XTLV_ARP_TBL = 8, 17335 WL_NATOE_XTLV_POOLREORG = 9, 17336 WL_NATOE_XTLV_CONFIG_DSTNAT = 10, 17337 WL_NATOE_XTLV_CTRL = 11 17338 }; 17339 17340 /* endif WL_NATOE */ 17341 17342 enum wl_idauth_cmd_ids { 17343 WL_IDAUTH_CMD_CONFIG = 1, 17344 WL_IDAUTH_CMD_PEER_INFO = 2, 17345 WL_IDAUTH_CMD_COUNTERS = 3, 17346 WL_IDAUTH_CMD_LAST 17347 }; 17348 enum wl_idauth_xtlv_id { 17349 WL_IDAUTH_XTLV_AUTH_ENAB = 0x1, 17350 WL_IDAUTH_XTLV_GTK_ROTATION = 0x2, 17351 WL_IDAUTH_XTLV_EAPOL_COUNT = 0x3, 17352 WL_IDAUTH_XTLV_EAPOL_INTRVL = 0x4, 17353 WL_IDAUTH_XTLV_BLKLIST_COUNT = 0x5, 17354 WL_IDAUTH_XTLV_BLKLIST_AGE = 0x6, 17355 WL_IDAUTH_XTLV_PEERS_INFO = 0x7, 17356 WL_IDAUTH_XTLV_COUNTERS = 0x8 17357 }; 17358 enum wl_idauth_stats { 17359 WL_AUTH_PEER_STATE_AUTHORISED = 0x01, 17360 WL_AUTH_PEER_STATE_BLACKLISTED = 0x02, 17361 WL_AUTH_PEER_STATE_4WAY_HS_ONGOING = 0x03, 17362 WL_AUTH_PEER_STATE_LAST 17363 }; 17364 typedef struct { 17365 uint16 state; /* Peer State: Authorised or Blacklisted */ 17366 struct ether_addr peer_addr; /* peer Address */ 17367 uint32 blklist_end_time; /* Time of blacklist end */ 17368 } auth_peer_t; 17369 typedef struct wl_idauth_counters { 17370 uint32 auth_reqs; /* No of auth req recvd */ 17371 uint32 mic_fail; /* No of mic fails */ 17372 uint32 four_way_hs_fail; /* No of 4-way handshake fails */ 17373 } wl_idauth_counters_t; 17374 17375 #define WLC_UTRACE_LEN (1024u * 4u) // default length 17376 #define WLC_UTRACE_LEN_AUX (1024u * 3u) // reduced length to fit smaller AUX BM 17377 #define WLC_UTRACE_LEN_SC (1024u * 3u) // reduced length to fit smaller Scan core BM 17378 17379 #define WLC_UTRACE_READ_END 0 17380 #define WLC_UTRACE_MORE_DATA 1 17381 17382 typedef struct wl_utrace_capture_args_v1 { 17383 uint32 length; 17384 uint32 flag; 17385 } wl_utrace_capture_args_v1_t; 17386 17387 #define UTRACE_CAPTURE_VER_2 2 17388 typedef struct wl_utrace_capture_args_v2 { 17389 /* structure control */ 17390 uint16 version; /**< structure version */ 17391 uint16 length; /**< length of the response */ 17392 uint32 flag; /* Indicates if there is more data or not */ 17393 } wl_utrace_capture_args_v2_t; 17394 17395 /* Signal read end. */ 17396 #define WLC_REGVAL_READ_END 0 17397 /* Signal more data pending. */ 17398 #define WLC_REGVAL_MORE_DATA 1 17399 /* Internal read state. */ 17400 #define WLC_REGVAL_READ_CONTINUE 2 17401 17402 #define WLC_REGVAL_DUMP_PHYREG 0 17403 #define WLC_REGVAL_DUMP_RADREG 1 17404 17405 #define PHYREGVAL_CAPTURE_BUFFER_LEN 2048 17406 17407 typedef struct wl_regval_capture_args { 17408 uint32 control_flag; /* Carries status information. */ 17409 } wl_regval_capture_args_t; 17410 17411 /* XTLV IDs for the Health Check "hc" iovar top level container */ 17412 enum { 17413 WL_HC_XTLV_ID_CAT_HC = 1, /* category for HC as a whole */ 17414 WL_HC_XTLV_ID_CAT_DATAPATH_TX = 2, /* Datapath Tx */ 17415 WL_HC_XTLV_ID_CAT_DATAPATH_RX = 3, /* Datapath Rx */ 17416 WL_HC_XTLV_ID_CAT_SCAN = 4, /* Scan */ 17417 WL_HC_XTLV_ID_CAT_EVENTMASK = 5, /* Health Check event mask. */ 17418 }; 17419 17420 /* Health Check: Common XTLV IDs for sub-elements in the top level container 17421 * Number starts at 0x8000 to be out of the way for category specific IDs. 17422 */ 17423 enum { 17424 WL_HC_XTLV_ID_ERR = 0x8000, /* for sub-command err return */ 17425 WL_HC_XTLV_ID_IDLIST = 0x8001, /* container for uint16 IDs */ 17426 }; 17427 17428 /* Health Check: Datapath TX IDs */ 17429 enum { 17430 WL_HC_TX_XTLV_ID_VAL_STALL_THRESHOLD = 1, /* stall_threshold */ 17431 WL_HC_TX_XTLV_ID_VAL_STALL_SAMPLE_SIZE = 2, /* stall_sample_size */ 17432 WL_HC_TX_XTLV_ID_VAL_STALL_TIMEOUT = 3, /* stall_timeout */ 17433 WL_HC_TX_XTLV_ID_VAL_STALL_FORCE = 4, /* stall_force */ 17434 WL_HC_TX_XTLV_ID_VAL_STALL_EXCLUDE = 5, /* stall_exclude */ 17435 WL_HC_TX_XTLV_ID_VAL_FC_TIMEOUT = 6, /* flow ctl timeout */ 17436 WL_HC_TX_XTLV_ID_VAL_FC_FORCE = 7, /* flow ctl force failure */ 17437 WL_HC_TX_XTLV_ID_VAL_DELAY_TO_TRAP = 8, /* delay threshold for forced trap */ 17438 WL_HC_TX_XTLV_ID_VAL_DELAY_TO_RPT = 9, /* delay threshold for event log report */ 17439 WL_HC_TX_XTLV_ID_VAL_FAILURE_TO_RPT = 10, /* threshold for consecutive TX failures */ 17440 }; 17441 17442 /* Health Check: Datapath RX IDs */ 17443 enum { 17444 WL_HC_RX_XTLV_ID_VAL_DMA_STALL_TIMEOUT = 1, /* dma_stall_timeout */ 17445 WL_HC_RX_XTLV_ID_VAL_DMA_STALL_FORCE = 2, /* dma_stall test trigger */ 17446 WL_HC_RX_XTLV_ID_VAL_STALL_THRESHOLD = 3, /* stall_threshold */ 17447 WL_HC_RX_XTLV_ID_VAL_STALL_SAMPLE_SIZE = 4, /* stall_sample_size */ 17448 WL_HC_RX_XTLV_ID_VAL_STALL_FORCE = 5, /* stall test trigger */ 17449 WL_HC_RX_XTLV_ID_VAL_STALL_UC_DECRYPT_FAIL = 6, /* trigger uc decrypt failures */ 17450 WL_HC_RX_XTLV_ID_VAL_STALL_BCMC_DECRYPT_FAIL = 7, /* trigger bcmc decrypt failures */ 17451 }; 17452 17453 /* Health Check: Datapath SCAN IDs */ 17454 enum { 17455 WL_HC_XTLV_ID_VAL_SCAN_STALL_THRESHOLD = 1, /* scan stall threshold */ 17456 }; 17457 17458 /* Health check: PHY IDs */ 17459 /* Needed for iguana 13.35 branch */ 17460 typedef enum { 17461 PHY_HC_DD_ALL = 0, 17462 PHY_HC_DD_TEMPSENSE = 1, 17463 PHY_HC_DD_VCOCAL = 2, 17464 PHY_HC_DD_RX = 3, 17465 PHY_HC_DD_TX = 4, 17466 PHY_HC_DD_LAST /* This must be the last entry */ 17467 } phy_hc_dd_type_t; 17468 17469 typedef enum { 17470 PHY_HC_DD_TEMP_FAIL = 0, 17471 PHY_HC_DD_VCO_FAIL = 1, 17472 PHY_HC_DD_RXDSN_FAIL = 2, 17473 PHY_HC_DD_TXPOW_FAIL = 3, 17474 PHY_HC_DD_END /* This must be the last entry */ 17475 } phy_hc_dd_type_v2_t; 17476 17477 /* IDs of Health Check report structures for sub types of health checks within WL */ 17478 typedef enum wl_hc_dd_type { 17479 WL_HC_DD_PCIE = 0, /* PCIe */ 17480 WL_HC_DD_RX_DMA_STALL = 1, /* RX DMA stall check */ 17481 WL_HC_DD_RX_STALL = 2, /* RX stall check */ 17482 WL_HC_DD_TX_STALL = 3, /* TX stall check */ 17483 WL_HC_DD_SCAN_STALL = 4, /* SCAN stall check */ 17484 WL_HC_DD_PHY = 5, /* PHY health check */ 17485 WL_HC_DD_REINIT = 6, /* Reinit due to other reasons */ 17486 WL_HC_DD_TXQ_STALL = 7, /* TXQ stall */ 17487 WL_HC_DD_RX_STALL_V2 = 8, /* RX stall check v2 */ 17488 WL_HC_DD_MAX 17489 } wl_hc_dd_type_t; 17490 17491 /* RX stall reason codes sent with wl_rx_hc_info_v2_t */ 17492 typedef enum bcm_rx_hc_stall_reason { 17493 BCM_RX_HC_RESERVED = 0, 17494 BCM_RX_HC_UNSPECIFIED = 1, /* All other. Catch all */ 17495 BCM_RX_HC_UNICAST_DECRYPT_FAIL = 2, /* Unicast decrypt fail */ 17496 BCM_RX_HC_BCMC_DECRYPT_FAIL = 3, /* BCMC decrypt fail */ 17497 BCM_RX_HC_UNICAST_REPLAY = 4, /* Unicast replay */ 17498 BCM_RX_HC_BCMC_REPLAY = 5, /* BCMC replay */ 17499 BCM_RX_HC_AMPDU_DUP = 6, /* AMPDU DUP */ 17500 BCM_RX_HC_MAX 17501 } bcm_rx_hc_stall_reason_t; 17502 17503 /* 17504 * Health Check report structures for sub types of health checks within WL 17505 */ 17506 17507 /* Health Check report structure for Rx DMA Stall check */ 17508 typedef struct { 17509 uint16 type; 17510 uint16 length; 17511 uint16 timeout; 17512 uint16 stalled_dma_bitmap; 17513 } wl_rx_dma_hc_info_t; 17514 17515 /* Health Check report structure for Tx packet failure check */ 17516 typedef struct { 17517 uint16 type; 17518 uint16 length; 17519 uint32 stall_bitmap; 17520 uint32 stall_bitmap1; 17521 uint32 failure_ac; 17522 uint32 threshold; 17523 uint32 tx_all; 17524 uint32 tx_failure_all; 17525 } wl_tx_hc_info_t; 17526 17527 /* Health Check report structure for Rx dropped packet failure check */ 17528 typedef struct { 17529 uint16 type; /* WL_HC_RX_DD_STALL */ 17530 uint16 length; 17531 uint32 bsscfg_idx; 17532 uint32 rx_hc_pkts; 17533 uint32 rx_hc_dropped_all; 17534 uint32 rx_hc_alert_th; 17535 } wl_rx_hc_info_t; 17536 17537 /* Health Check report structure for Rx dropped packet failure check */ 17538 typedef struct { 17539 uint16 type; /* WL_HC_RX_DD_STALL_V2 */ 17540 uint16 length; 17541 uint8 if_idx; /* interface index on which issue is reported */ 17542 uint8 ac; /* access category on which this problem is seen */ 17543 uint8 pad[2]; /* Reserved */ 17544 uint32 rx_hc_pkts; 17545 uint32 rx_hc_dropped_all; 17546 uint32 rx_hc_alert_th; 17547 uint32 reason; /* refer to bcm_rx_hc_stall_reason_t above */ 17548 struct ether_addr peer_ea; 17549 } wl_rx_hc_info_v2_t; 17550 17551 /* HE top level command IDs */ 17552 enum { 17553 WL_HE_CMD_ENAB = 0u, 17554 WL_HE_CMD_FEATURES = 1u, 17555 WL_HE_CMD_TWT_SETUP = 2u, 17556 WL_HE_CMD_TWT_TEARDOWN = 3u, 17557 WL_HE_CMD_TWT_INFO = 4u, 17558 WL_HE_CMD_BSSCOLOR = 5u, 17559 WL_HE_CMD_PARTIAL_BSSCOLOR = 6u, 17560 WL_HE_CMD_CAP = 7u, 17561 WL_HE_CMD_STAID = 8u, 17562 WL_HE_CMD_MUEDCA = 9u, 17563 WL_HE_CMD_RTSDURTHRESH = 10u, 17564 WL_HE_CMD_PEDURATION = 11u, 17565 WL_HE_CMD_TESTBED_MODE = 12u, 17566 WL_HE_CMD_OMI_CONFIG = 13u, 17567 WL_HE_CMD_OMI_STATUS = 14u, 17568 WL_HE_CMD_OMI_ULMU_THROTTLE = 15u, 17569 WL_HE_CMD_ULMU_DISABLE_POLICY = 16u, 17570 WL_HE_CMD_ULMU_DISABLE_STATS = 17u, 17571 WL_HE_CMD_OMI_DLMU_RSD_RCM_MPF_MAP = 18u, 17572 WL_HE_CMD_SR_PROHIBIT = 19u, 17573 WL_HE_CMD_LAST 17574 }; 17575 17576 enum { 17577 WL_HE_MUEDCA_IE = 0, 17578 WL_HE_MUEDCA_SHM = 1, 17579 WL_HE_MUEDCA_LAST 17580 }; 17581 17582 #ifdef WL11AX 17583 17584 /* struct for dump MU EDCA IE/SHM paramters */ 17585 typedef struct wl_he_muedca_ie_v1 { 17586 uint16 version; /* structure version */ 17587 uint16 length; /* data length (starting after this field) */ 17588 uint8 mu_qos_info; 17589 he_mu_ac_param_record_t param_ac[AC_COUNT]; 17590 } wl_he_muedca_ie_v1_t; 17591 17592 typedef wl_he_muedca_ie_v1_t wl_he_muedca_ie_t; 17593 17594 #define WL_HE_MUEDCA_VER_1 1 17595 17596 #endif /* WL11AX */ 17597 17598 /* TWT top level command IDs */ 17599 enum { 17600 WL_TWT_CMD_ENAB = 0, 17601 WL_TWT_CMD_SETUP = 1, 17602 WL_TWT_CMD_TEARDOWN = 2, 17603 WL_TWT_CMD_INFO = 3, 17604 WL_TWT_CMD_AUTOSCHED = 4, 17605 WL_TWT_CMD_STATS = 5, 17606 WL_TWT_CMD_EARLY_TERM_TIME = 6, 17607 WL_TWT_CMD_RESP_CONFIG = 7, 17608 WL_TWT_CMD_SPPS_ENAB = 8, 17609 WL_TWT_CMD_LAST 17610 }; 17611 17612 /* TODO: Remove the follwoing after mering TWT changes to trunk */ 17613 #define WL_TWT_CMD_DEF_IN_WLIOCTL 1 17614 17615 #define WL_HEB_VER_1 1 17616 17617 /* HEB top level command IDs */ 17618 enum { 17619 WL_HEB_CMD_ENAB = 0, 17620 WL_HEB_CMD_NUM_HEB = 1, 17621 WL_HEB_CMD_COUNTERS = 2, 17622 WL_HEB_CMD_CLEAR_COUNTERS = 3, 17623 WL_HEB_CMD_CONFIG = 4, 17624 WL_HEB_CMD_STATUS = 5, 17625 WL_HEB_CMD_LAST 17626 }; 17627 17628 /* HEB counters structures */ 17629 typedef struct wl_heb_int_cnt_v1 { 17630 uint16 pre_event; 17631 uint16 start_event; 17632 uint16 end_event; 17633 uint16 missed; 17634 } wl_heb_int_cnt_v1_t; 17635 17636 typedef struct wl_heb_cnt_v1 { 17637 /* structure control */ 17638 uint16 version; /* structure version */ 17639 uint16 length; /* data length (starting after this field) */ 17640 wl_heb_int_cnt_v1_t heb_int_cnt[1]; 17641 } wl_heb_cnt_v1_t; 17642 17643 // struct for configuring HEB 17644 typedef struct wl_config_heb_fill_v1 { 17645 uint16 version; /* structure version */ 17646 uint16 length; /* data length (starting after this field) */ 17647 uint32 duration; 17648 uint32 periodicity; 17649 uint16 heb_idx; 17650 uint16 preeventtime; 17651 uint8 count; 17652 uint8 PAD[3]; 17653 } wl_config_heb_fill_v1_t; 17654 17655 typedef struct wl_heb_blk_params_v1 { 17656 /* Don't change the order of following elements. This is as per the HEB HW spec */ 17657 uint32 event_int_val_l; 17658 uint32 event_int_val_h; 17659 uint32 param2; 17660 uint32 param3; 17661 uint32 pre_event_intmsk_bmp; 17662 uint32 start_event_intmsk_bmp; 17663 uint32 end_event_intmsk_bmp; 17664 uint32 event_driver_info; 17665 uint16 param1; 17666 uint8 event_count; 17667 uint8 noa_invert; 17668 } wl_heb_blk_params_v1_t; 17669 17670 typedef struct wl_heb_int_status_v1 { 17671 uint32 heb_idx; 17672 wl_heb_blk_params_v1_t blk_params; 17673 } wl_heb_reg_status_v1_t; 17674 17675 typedef struct wl_heb_status_v1 { 17676 uint16 version; /* structure version */ 17677 uint16 length; /* data length (starting after this field) */ 17678 wl_heb_reg_status_v1_t heb_status[1]; 17679 } wl_heb_status_v1_t; 17680 17681 /* HWA */ 17682 #define WL_HWA_VER_1 1 17683 17684 /* HWA top level command IDs */ 17685 typedef enum wl_hwa_cmd_type { 17686 WL_HWA_CMD_ENAB = 0, 17687 WL_HWA_CMD_CAPS = 1, 17688 WL_HWA_CMD_COUNTERS = 2, 17689 WL_HWA_CMD_CLRCNTS = 3, 17690 WL_HWA_CMD_REGDUMP = 4, 17691 WL_HWA_CMD_INDUCE_ERR = 5, 17692 WL_HWA_CMD_LAST 17693 } wl_hwa_cmd_type_t; 17694 17695 typedef struct wl_hwa_cnts_info_v1 { 17696 uint16 cnt_rxs_filter; /* #filters added */ 17697 uint16 cnt_rxs_chainable; /* #rxchainable matched */ 17698 } wl_hwa_cnts_info_v1_t; 17699 17700 /* HWA dump info structures */ 17701 typedef struct wl_hwa_hwcaps_info_v1 { 17702 uint16 up; /* is hwa init'd/deint'd */ 17703 uint16 corerev; /* hwa core revision */ 17704 uint32 submodules_mask; /* mask for hwa submodules that are enabled */ 17705 } wl_hwa_hwcaps_info_v1_t; 17706 17707 typedef struct wl_hwa_cnts_v1 { 17708 /* structure control */ 17709 uint16 version; /* structure version */ 17710 uint16 length; /* data length (starting after this field) */ 17711 wl_hwa_cnts_info_v1_t hwa_cnts_info[]; /* variable length array with hwa counters */ 17712 } wl_hwa_cnts_v1_t; 17713 17714 /* All submodules, order is important and define order of initialization. */ 17715 /* Not use enumeration here because these defines are also used in macro */ 17716 #define HWA_SUBMODULES_COMMON 0 /**< Common */ 17717 #define HWA_SUBMODULES_TXPOST 1u /**< TxPost 3a */ 17718 #define HWA_SUBMODULES_RXPOSTFILL 2u /**< RxPost and Fill 1a/1b */ 17719 #define HWA_SUBMODULES_TXDMA 3u /**< TxDMA 3b */ 17720 #define HWA_SUBMODULES_TXS 4u /**< TxStatus 4a */ 17721 #define HWA_SUBMODULES_BUFMGR 5u /**< Buffer Manager, RX and TX. Do this last */ 17722 #define HWA_SUBMODULES_CPL 6u /**< Completion 2b/4b */ 17723 #define HWA_SUBMODULES_RXS 7u /**< RxStatus 2a */ 17724 #define HWA_SUBMODULES_NUM 8u /**< number of submodules */ 17725 17726 #define HWA_SUBMODULES_ALL 0xFF /* Bitmaps for all submodules */ 17727 #ifdef HWA 17728 #define HWA_SUBMODULE_MASK(submodule) (1u << (submodule)) 17729 #else 17730 #define HWA_SUBMODULE_MASK(submodule) (0) 17731 #endif /* HWA */ 17732 /* 17733 * NOTES: 17734 * wl_twt_sdesc_t is used to support both broadcast TWT and individual TWT. 17735 * Value in bit[0:2] in 'flow_id' field is interpreted differently: 17736 * - flow id for individual TWT (when WL_TWT_FLOW_FLAG_BROADCAST bit is NOT set 17737 * in 'flow_flags' field) 17738 * - flow id as defined in Table 8-248l1 for broadcast TWT (when 17739 * WL_TWT_FLOW_FLAG_BROADCAST bit is set) 17740 * In latter case other bits could be used to differentiate different flows 17741 * in order to support multiple broadcast TWTs with the same flow id. 17742 */ 17743 17744 /* TWT Setup descriptor */ 17745 typedef struct wl_twt_sdesc { 17746 /* Setup Command. */ 17747 uint8 setup_cmd; /* See TWT_SETUP_CMD_XXXX in 802.11ah.h */ 17748 uint8 flow_flags; /* Flow attributes. See WL_TWT_FLOW_FLAG_XXXX below */ 17749 uint8 flow_id; /* must be between 0 and 7. Set 0xFF for auto assignment */ 17750 uint8 bid; /* must be between 0 and 31. Set 0xFF for auto assignment */ 17751 uint8 channel; /* Twt channel - Not used for now */ 17752 uint8 negotiation_type; /* Negotiation Type: See macros TWT_NEGO_TYPE_X */ 17753 uint8 frame_recomm; /* frame recommendation for broadcast TWTs - Not used for now */ 17754 uint8 wake_type; /* See WL_TWT_TIME_TYPE_XXXX below */ 17755 uint32 wake_time_h; /* target wake time - BSS TSF (us) */ 17756 uint32 wake_time_l; 17757 uint32 wake_dur; /* target wake duration in unit of microseconds */ 17758 uint32 wake_int; /* target wake interval */ 17759 uint32 btwt_persistence; /* Broadcast TWT Persistence */ 17760 uint32 wake_int_max; /* max wake interval(uS) for TWT */ 17761 uint8 duty_cycle_min; /* min duty cycle for TWT(Percentage) */ 17762 uint8 pad; 17763 /* deprecated - to be removed */ 17764 uint16 li; 17765 17766 } wl_twt_sdesc_t; 17767 17768 /* Flow flags */ 17769 #define WL_TWT_FLOW_FLAG_UNANNOUNCED (1u << 0u) 17770 #define WL_TWT_FLOW_FLAG_TRIGGER (1u << 1u) 17771 #define WL_TWT_FLOW_FLAG_REQUEST (1u << 2u) 17772 #define WL_TWT_FLOW_FLAG_PROTECT (1u << 3u) 17773 #define WL_TWT_FLOW_FLAG_RESPONDER_PM (1u << 4u) 17774 #define WL_TWT_FLOW_FLAG_UNSOLICITED (1u << 5u) 17775 17776 /* Deprecated - To be removed */ 17777 #define WL_TWT_FLOW_FLAG_BROADCAST (1u << 5u) 17778 #define WL_TWT_FLOW_FLAG_WAKE_TBTT_NEGO (1u << 6u) 17779 #define WL_TWT_FLOW_FLAG_IMPLICIT (1u << 7u) 17780 17781 /* Flow id */ 17782 #define WL_TWT_FLOW_ID_FID 0x07u /* flow id */ 17783 #define WL_TWT_FLOW_ID_GID_MASK 0x70u /* group id - broadcast TWT only */ 17784 #define WL_TWT_FLOW_ID_GID_SHIFT 4u 17785 17786 #define WL_TWT_INV_BCAST_ID 0xFFu 17787 #define WL_TWT_INV_FLOW_ID 0xFFu 17788 17789 /* auto flow_id */ 17790 #define WL_TWT_SETUP_FLOW_ID_AUTO 0xFFu 17791 /* auto broadcast ID */ 17792 #define WL_TWT_SETUP_BCAST_ID_AUTO 0xFFu 17793 /* Infinite persistence for broadcast schedule */ 17794 #define WL_TWT_INFINITE_BTWT_PERSIST 0xFFFFFFFFu 17795 17796 /* should be larger than what chip supports */ 17797 #define WL_TWT_STATS_MAX_BTWT 4u 17798 #define WL_TWT_STATS_MAX_ITWT 4u 17799 17800 /* Wake type */ 17801 /* TODO: not yet finalized */ 17802 #define WL_TWT_TIME_TYPE_BSS 0u /* The time specified in wake_time_h/l is 17803 * the BSS TSF time. 17804 */ 17805 #define WL_TWT_TIME_TYPE_OFFSET 1u /* The time specified in wake_time_h/l is an offset 17806 * of the TSF time when the iovar is processed. 17807 */ 17808 #define WL_TWT_TIME_TYPE_AUTO 2u /* The target wake time is chosen internally by the FW */ 17809 17810 #define WL_TWT_SETUP_VER 0u 17811 17812 /* HE TWT Setup command */ 17813 typedef struct wl_twt_setup { 17814 /* structure control */ 17815 uint16 version; /* structure version */ 17816 uint16 length; /* data length (starting after this field) */ 17817 /* peer address */ 17818 struct ether_addr peer; /* leave it all 0s' for AP */ 17819 uint8 pad[2]; 17820 /* setup descriptor */ 17821 wl_twt_sdesc_t desc; 17822 17823 /* deprecated - to be removed */ 17824 uint16 dialog; 17825 uint8 pad1[2]; 17826 } wl_twt_setup_t; 17827 17828 /* deprecated -to be removed */ 17829 #define WL_TWT_DIALOG_TOKEN_AUTO 0xFFFF 17830 17831 #define WL_TWT_TEARDOWN_VER 0u 17832 17833 /* twt teardown descriptor */ 17834 typedef struct wl_twt_teardesc { 17835 uint8 negotiation_type; 17836 uint8 flow_id; /* must be between 0 and 7 */ 17837 uint8 bid; /* must be between 0 and 31 */ 17838 bool alltwt; /* all twt teardown - 0 or 1 */ 17839 } wl_twt_teardesc_t; 17840 17841 /* HE TWT Teardown command */ 17842 typedef struct wl_twt_teardown { 17843 /* structure control */ 17844 uint16 version; /* structure version */ 17845 uint16 length; /* data length (starting after this field) */ 17846 /* peer address */ 17847 struct ether_addr peer; /* leave it all 0s' for AP */ 17848 wl_twt_teardesc_t teardesc; /* Teardown descriptor */ 17849 17850 /* deprecated - to be removed */ 17851 uint8 flow_flags; 17852 uint8 flow_id; 17853 uint8 bid; 17854 uint8 pad; 17855 } wl_twt_teardown_t; 17856 17857 /* twt information descriptor */ 17858 typedef struct wl_twt_infodesc { 17859 uint8 flow_flags; /* See WL_TWT_INFO_FLAG_XXX below */ 17860 uint8 flow_id; 17861 uint8 pad[2]; 17862 uint32 next_twt_h; 17863 uint32 next_twt_l; 17864 /* deprecated - to be removed */ 17865 uint8 wake_type; 17866 uint8 pad1[3]; 17867 } wl_twt_infodesc_t; 17868 17869 /* Flow flags */ 17870 #define WL_TWT_INFO_FLAG_ALL_TWT (1u << 0u) /* All TWT */ 17871 #define WL_TWT_INFO_FLAG_RESUME (1u << 1u) /* 1 is TWT Resume, 0 is TWT Suspend */ 17872 17873 /* deprecated - to be removed */ 17874 #define WL_TWT_INFO_FLAG_RESP_REQ (1 << 0) /* Response Requested */ 17875 #define WL_TWT_INFO_FLAG_NEXT_TWT_REQ (1 << 1) /* Next TWT Request */ 17876 #define WL_TWT_INFO_FLAG_BTWT_RESCHED (1 << 2) /* Broadcast Reschedule */ 17877 typedef wl_twt_infodesc_t wl_twt_idesc_t; 17878 17879 #define WL_TWT_INFO_VER 0u 17880 17881 /* HE TWT Information command */ 17882 typedef struct wl_twt_info { 17883 /* structure control */ 17884 uint16 version; /* structure version */ 17885 uint16 length; /* data length (starting after this field) */ 17886 /* peer address */ 17887 struct ether_addr peer; /* leave it all 0s' for AP */ 17888 uint8 pad[2]; 17889 wl_twt_infodesc_t infodesc; /* information descriptor */ 17890 /* deprecated - to be removed */ 17891 wl_twt_idesc_t desc; 17892 } wl_twt_info_t; 17893 17894 #define WL_TWT_PEER_STATS_VERSION_1 1u 17895 typedef struct wl_twt_peer_stats_v1 { 17896 uint16 version; 17897 uint16 length; 17898 struct ether_addr peer; 17899 uint8 PAD[2]; 17900 uint8 id; 17901 uint8 flow_flags; 17902 uint8 PAD[2]; 17903 uint32 sp_seq; /* sequence number of the service period */ 17904 uint32 tx_ucast_pkts; 17905 uint32 tx_pkts_min; 17906 uint32 tx_pkts_max; 17907 uint32 tx_pkts_avg; 17908 uint32 tx_failures; 17909 uint32 rx_ucast_pkts; 17910 uint32 rx_pkts_min; 17911 uint32 rx_pkts_max; 17912 uint32 rx_pkts_avg; 17913 uint32 rx_pkts_retried; 17914 } wl_twt_peer_stats_v1_t; 17915 17916 #define WL_TWT_STATS_VERSION_1 1 17917 typedef struct wl_twt_stats_v1 { 17918 uint16 version; 17919 uint16 length; 17920 uint32 num_stats; /* number of peer stats in the peer_stats_list */ 17921 wl_twt_peer_stats_v1_t peer_stats_list[]; 17922 } wl_twt_stats_v1_t; 17923 17924 #define WL_TWT_STATS_CMD_VERSION_1 1 17925 #define WL_TWT_STATS_CMD_FLAGS_RESET (1u << 0u) 17926 /* HE TWT stats command */ 17927 typedef struct wl_twt_stats_cmd_v1 { 17928 uint16 version; 17929 uint16 length; 17930 struct ether_addr peer; 17931 uint8 PAD[2]; 17932 uint16 flags; /* see WL_TWT_STATS_CMD_FLAGS */ 17933 uint8 num_fid; 17934 uint8 num_bid; 17935 uint8 fid_list[WL_TWT_STATS_MAX_ITWT]; 17936 uint8 bid_list[WL_TWT_STATS_MAX_BTWT]; 17937 } wl_twt_stats_cmd_v1_t; 17938 17939 #define WL_TWT_RESP_CFG_VER 0u 17940 17941 #define WL_TWT_CMD_RESP_CFG_TYPE_ALTERNATE 0u 17942 #define WL_TWT_CMD_RESP_CFG_TYPE_DICTATE 1u 17943 /* HE TWT resp command */ 17944 typedef struct wl_twt_resp_cfg { 17945 /* structure control */ 17946 uint16 version; /* Structure version */ 17947 uint16 length; /* Data length (starting after this field) */ 17948 uint8 dc_max; /* Max supported duty cycle for single TWT */ 17949 uint8 resp_type; /* Resp. type(Alt/dict) if duty cycle>max duty cycle */ 17950 } wl_twt_resp_cfg_t; 17951 17952 /* Current version for wlc_clm_power_limits_req_t structure and flags */ 17953 #define WLC_CLM_POWER_LIMITS_REQ_VERSION 1 17954 /* "clm_power_limits" iovar request structure */ 17955 typedef struct wlc_clm_power_limits_req { 17956 /* Input. Structure and flags version */ 17957 uint32 version; 17958 /* Full length of buffer (includes this structure and space for TLV-encoded PPR) */ 17959 uint32 buflen; 17960 /* Input. Flags (see WLC_CLM_POWER_LIMITS_INPUT_FLAG_... below) */ 17961 uint32 input_flags; 17962 /* Input. CC of region whose data is being requested */ 17963 char cc[WLC_CNTRY_BUF_SZ]; 17964 /* Input. Channel/subchannel in chanspec_t format */ 17965 uint32 chanspec; 17966 /* Subchannel encoded as clm_limits_type_t */ 17967 uint32 clm_subchannel; 17968 /* Input. 0-based antenna index */ 17969 uint32 antenna_idx; 17970 /* Output. General flags (see WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_... below) */ 17971 uint32 output_flags; 17972 /* Output. 2.4G country flags, encoded as clm_flags_t enum */ 17973 uint32 clm_country_flags_2g; 17974 /* Output. 5G country flags, encoded as clm_flags_t enum */ 17975 uint32 clm_country_flags_5g; 17976 /* Output. Length of TLV-encoded PPR data that follows this structure */ 17977 uint32 ppr_tlv_size; 17978 /* Output. Beginning of buffer for TLV-encoded PPR data */ 17979 uint8 ppr_tlv[1]; 17980 } wlc_clm_power_limits_req_t; 17981 17982 /* Input. Do not apply SAR limits */ 17983 #define WLC_CLM_POWER_LIMITS_INPUT_FLAG_NO_SAR 0x00000001 17984 /* Input. Do not apply board limits */ 17985 #define WLC_CLM_POWER_LIMITS_INPUT_FLAG_NO_BOARD 0x00000002 17986 /* Output. Limits taken from product-specific country data */ 17987 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_PRODUCT_LIMITS 0x00000001 17988 /* Output. Limits taken from product-specific worldwide data */ 17989 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_WORLDWIDE_LIMITS 0x00000002 17990 /* Output. Limits taken from country-default (all-product) data */ 17991 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_DEFAULT_COUNTRY_LIMITS 0x00000004 17992 17993 #define WL_MBO_IOV_MAJOR_VER 1 17994 #define WL_MBO_IOV_MINOR_VER 1 17995 #define WL_MBO_IOV_MAJOR_VER_SHIFT 8 17996 #define WL_MBO_IOV_VERSION \ 17997 ((WL_MBO_IOV_MAJOR_VER << WL_MBO_IOV_MAJOR_VER_SHIFT)| WL_MBO_IOV_MINOR_VER) 17998 17999 #define MBO_MAX_CHAN_PREF_ENTRIES 16 18000 18001 enum wl_mbo_cmd_ids { 18002 WL_MBO_CMD_ADD_CHAN_PREF = 1, 18003 WL_MBO_CMD_DEL_CHAN_PREF = 2, 18004 WL_MBO_CMD_LIST_CHAN_PREF = 3, 18005 WL_MBO_CMD_CELLULAR_DATA_CAP = 4, 18006 WL_MBO_CMD_DUMP_COUNTERS = 5, 18007 WL_MBO_CMD_CLEAR_COUNTERS = 6, 18008 WL_MBO_CMD_FORCE_ASSOC = 7, 18009 WL_MBO_CMD_BSSTRANS_REJECT = 8, 18010 WL_MBO_CMD_SEND_NOTIF = 9, 18011 /* Unused command, This enum no can be use 18012 * for next new command 18013 */ 18014 WL_MBO_CMD_CLEAR_CHAN_PREF = 10, 18015 WL_MBO_CMD_NBR_INFO_CACHE = 11, 18016 WL_MBO_CMD_ANQPO_SUPPORT = 12, 18017 WL_MBO_CMD_DBG_EVENT_CHECK = 13, 18018 WL_MBO_CMD_EVENT_MASK = 14, 18019 /* Add before this !! */ 18020 WL_MBO_CMD_LAST 18021 }; 18022 18023 enum wl_mbo_xtlv_id { 18024 WL_MBO_XTLV_OPCLASS = 0x1, 18025 WL_MBO_XTLV_CHAN = 0x2, 18026 WL_MBO_XTLV_PREFERENCE = 0x3, 18027 WL_MBO_XTLV_REASON_CODE = 0x4, 18028 WL_MBO_XTLV_CELL_DATA_CAP = 0x5, 18029 WL_MBO_XTLV_COUNTERS = 0x6, 18030 WL_MBO_XTLV_ENABLE = 0x7, 18031 WL_MBO_XTLV_SUB_ELEM_TYPE = 0x8, 18032 WL_MBO_XTLV_BTQ_TRIG_START_OFFSET = 0x9, 18033 WL_MBO_XTLV_BTQ_TRIG_RSSI_DELTA = 0xa, 18034 WL_MBO_XTLV_ANQP_CELL_SUPP = 0xb, 18035 WL_MBO_XTLV_BIT_MASK = 0xc 18036 }; 18037 18038 /* event bit mask flags for MBO */ 18039 #define MBO_EVT_BIT_MASK_CELLULAR_SWITCH 0x0001 /* Evt bit mask to enab cellular switch */ 18040 #define MBO_EVT_BIT_MASK_BTM_REQ_RCVD 0x0002 /* Evt bit mask to enab BTM req rcvd */ 18041 18042 typedef struct wl_mbo_counters { 18043 /* No of transition req recvd */ 18044 uint16 trans_req_rcvd; 18045 /* No of transition req with disassoc imminent */ 18046 uint16 trans_req_disassoc; 18047 /* No of transition req with BSS Termination */ 18048 uint16 trans_req_bss_term; 18049 /* No of trans req w/ unspecified reason */ 18050 uint16 trans_resn_unspec; 18051 /* No of trans req w/ reason frame loss */ 18052 uint16 trans_resn_frm_loss; 18053 /* No of trans req w/ reason traffic delay */ 18054 uint16 trans_resn_traffic_delay; 18055 /* No of trans req w/ reason insufficient buffer */ 18056 uint16 trans_resn_insuff_bw; 18057 /* No of trans req w/ reason load balance */ 18058 uint16 trans_resn_load_bal; 18059 /* No of trans req w/ reason low rssi */ 18060 uint16 trans_resn_low_rssi; 18061 /* No of trans req w/ reason excessive retransmission */ 18062 uint16 trans_resn_xcess_retransmn; 18063 /* No of trans req w/ reason gray zone */ 18064 uint16 trans_resn_gray_zone; 18065 /* No of trans req w/ reason switch to premium AP */ 18066 uint16 trans_resn_prem_ap_sw; 18067 /* No of transition rejection sent */ 18068 uint16 trans_rejn_sent; 18069 /* No of trans rejn reason excessive frame loss */ 18070 uint16 trans_rejn_xcess_frm_loss; 18071 /* No of trans rejn reason excessive traffic delay */ 18072 uint16 trans_rejn_xcess_traffic_delay; 18073 /* No of trans rejn reason insufficient QoS capability */ 18074 uint16 trans_rejn_insuffic_qos_cap; 18075 /* No of trans rejn reason low RSSI */ 18076 uint16 trans_rejn_low_rssi; 18077 /* No of trans rejn reason high interference */ 18078 uint16 trans_rejn_high_interference; 18079 /* No of trans rejn reason service unavilable */ 18080 uint16 trans_rejn_service_unavail; 18081 /* No of beacon request rcvd */ 18082 uint16 bcn_req_rcvd; 18083 /* No of beacon report sent */ 18084 uint16 bcn_rep_sent; 18085 /* No of null beacon report sent */ 18086 uint16 null_bcn_rep_sent; 18087 /* No of wifi to cell switch */ 18088 uint16 wifi_to_cell; 18089 } wl_mbo_counters_t; 18090 18091 #define WL_FILS_IOV_MAJOR_VER 1 18092 #define WL_FILS_IOV_MINOR_VER 1 18093 #define WL_FILS_IOV_MAJOR_VER_SHIFT 8 18094 #define WL_FILS_IOV_VERSION \ 18095 ((WL_FILS_IOV_MAJOR_VER << WL_FILS_IOV_MAJOR_VER_SHIFT)| WL_FILS_IOV_MINOR_VER) 18096 18097 enum wl_fils_cmd_ids { 18098 WL_FILS_CMD_ADD_IND_IE = 1, 18099 WL_FILS_CMD_ADD_AUTH_DATA = 2, /* Deprecated, kept to prevent ROM invalidation */ 18100 WL_FILS_CMD_ADD_HLP_IE = 3, 18101 WL_FILS_CMD_ADD_CONNECT_PARAMS = 4, 18102 WL_FILS_CMD_GET_CONNECT_PARAMS = 5, 18103 /* Add before this !! */ 18104 WL_FILS_CMD_LAST 18105 }; 18106 18107 enum wl_fils_xtlv_id { 18108 WL_FILS_XTLV_IND_IE = 0x1, 18109 WL_FILS_XTLV_AUTH_DATA = 0x2, /* Deprecated, kept to prevent ROM invalidation */ 18110 WL_FILS_XTLV_HLP_IE = 0x3, 18111 WL_FILS_XTLV_ERP_USERNAME = 0x4, 18112 WL_FILS_XTLV_ERP_REALM = 0x5, 18113 WL_FILS_XTLV_ERP_RRK = 0x6, 18114 WL_FILS_XTLV_ERP_NEXT_SEQ_NUM = 0x7, 18115 WL_FILS_XTLV_KEK = 0x8, 18116 WL_FILS_XTLV_PMK = 0x9, 18117 WL_FILS_XTLV_TK = 0xa, 18118 WL_FILS_XTLV_PMKID = 0xb 18119 }; 18120 18121 #define WL_OCE_IOV_MAJOR_VER 1 18122 #define WL_OCE_IOV_MINOR_VER 1 18123 #define WL_OCE_IOV_MAJOR_VER_SHIFT 8 18124 #define WL_OCE_IOV_VERSION \ 18125 ((WL_OCE_IOV_MAJOR_VER << WL_OCE_IOV_MAJOR_VER_SHIFT)| WL_OCE_IOV_MINOR_VER) 18126 18127 enum wl_oce_cmd_ids { 18128 WL_OCE_CMD_ENABLE = 1, 18129 WL_OCE_CMD_PROBE_DEF_TIME = 2, 18130 WL_OCE_CMD_FD_TX_PERIOD = 3, 18131 WL_OCE_CMD_FD_TX_DURATION = 4, 18132 WL_OCE_CMD_RSSI_TH = 5, 18133 WL_OCE_CMD_RWAN_LINKS = 6, 18134 WL_OCE_CMD_CU_TRIGGER = 7, 18135 /* Add before this !! */ 18136 WL_OCE_CMD_LAST 18137 }; 18138 18139 enum wl_oce_xtlv_id { 18140 WL_OCE_XTLV_ENABLE = 0x1, 18141 WL_OCE_XTLV_PROBE_DEF_TIME = 0x2, 18142 WL_OCE_XTLV_FD_TX_PERIOD = 0x3, 18143 WL_OCE_XTLV_FD_TX_DURATION = 0x4, 18144 WL_OCE_XTLV_RSSI_TH = 0x5, 18145 WL_OCE_XTLV_RWAN_LINKS = 0x6, 18146 WL_OCE_XTLV_CU_TRIGGER = 0x7 18147 }; 18148 18149 #define WL_ESP_IOV_MAJOR_VER 1 18150 #define WL_ESP_IOV_MINOR_VER 1 18151 #define WL_ESP_IOV_MAJOR_VER_SHIFT 8 18152 #define WL_ESP_IOV_VERSION \ 18153 ((WL_ESP_IOV_MAJOR_VER << WL_ESP_IOV_MAJOR_VER_SHIFT)| WL_ESP_IOV_MINOR_VER) 18154 18155 enum wl_esp_cmd_ids { 18156 WL_ESP_CMD_ENABLE = 1, 18157 WL_ESP_CMD_STATIC = 2, 18158 /* Add before this !! */ 18159 WL_ESP_CMD_LAST 18160 }; 18161 18162 enum wl_esp_xtlv_id { 18163 WL_ESP_XTLV_ENABLE = 0x1, 18164 WL_ESP_XTLV_STATIC_AC = 0x2, /* access category */ 18165 WL_ESP_XTLV_STATIC_TYPE = 0x3, /* data type */ 18166 WL_ESP_XTLV_STATIC_VAL = 0x4 18167 }; 18168 18169 /* otpread command */ 18170 #define WL_OTPREAD_VER 1 18171 18172 typedef struct { 18173 uint16 version; /* cmd structure version */ 18174 uint16 cmd_len; /* cmd struct len */ 18175 uint32 rdmode; /* otp read mode */ 18176 uint32 rdoffset; /* byte offset into otp to start read */ 18177 uint32 rdsize; /* number of bytes to read */ 18178 } wl_otpread_cmd_t; 18179 18180 /* "otpecc_rows" command */ 18181 typedef struct { 18182 uint16 version; /* version of this structure */ 18183 uint16 len; /* len in bytes of this structure */ 18184 uint32 cmdtype; /* command type : 0 : read row data, 1 : ECC lock */ 18185 uint32 rowoffset; /* start row offset */ 18186 uint32 numrows; /* number of rows */ 18187 uint8 rowdata[]; /* read rows data */ 18188 } wl_otpecc_rows_t; 18189 18190 #define WL_OTPECC_ROWS_VER 1 18191 18192 #define WL_OTPECC_ROWS_CMD_READ 0 18193 #define WL_OTPECC_ROWS_CMD_LOCK 1 18194 18195 #define WL_OTPECC_ARGIDX_CMDTYPE 0 /* command type */ 18196 #define WL_OTPECC_ARGIDX_ROWOFFSET 1 /* start row offset */ 18197 #define WL_OTPECC_ARGIDX_NUMROWS 2 /* number of rows */ 18198 18199 /* "otpeccrows" raw data size per row */ 18200 #define WL_ECCDUMP_ROW_SIZE_BYTE 6 /* 4 bytes row data + 2 bytes ECC status */ 18201 #define WL_ECCDUMP_ROW_SIZE_WORD 3 18202 18203 /* otpECCstatus */ 18204 #define OTP_ECC_ENAB_SHIFT 13 18205 #define OTP_ECC_ENAB_MASK 0x7 18206 #define OTP_ECC_CORR_ST_SHIFT 12 18207 #define OTP_ECC_CORR_ST_MASK 0x1 18208 #define OTP_ECC_DBL_ERR_SHIFT 11 18209 #define OTP_ECC_DBL_ERR_MASK 0x1 18210 #define OTP_ECC_DED_ST_SHIFT 10 18211 #define OTP_ECC_DED_ST_MASK 0x1 18212 #define OTP_ECC_SEC_ST_SHIFT 9 18213 #define OTP_ECC_SEC_ST_MASK 0x1 18214 #define OTP_ECC_DATA_SHIFT 0 18215 #define OTP_ECC_DATA_MASK 0x7f 18216 18217 /* OTP_ECC_CORR_ST field */ 18218 #define OTP_ECC_MODE 1 18219 #define OTP_NO_ECC_MODE 0 18220 18221 /* OTP_ECC_ENAB field (bit15:13) : 18222 * When 2 or 3 bits are set, 18223 * it indicates that OTP ECC is enabled on the last row read. 18224 * Otherwise, ECC is disabled 18225 */ 18226 #define OTP_ECC_ENAB(val) \ 18227 (bcm_bitcount((uint8 *)&(val), sizeof(uint8)) > 1) 18228 18229 #define WL_LEAKY_AP_STATS_GT_TYPE 0 18230 #define WL_LEAKY_AP_STATS_PKT_TYPE 1 18231 typedef struct wlc_leaked_infra_guard_marker { 18232 /* type field for this TLV: WL_LEAKY_AP_STATS_GT_TYPE */ 18233 uint16 type; 18234 /* length field for this TLV */ 18235 uint16 len; 18236 /* guard sample sequence number; Updated by 1 on every guard sample */ 18237 uint32 seq_number; 18238 /* Guard time start time (tsf; PS indicated and acked) */ 18239 uint32 start_time; 18240 /* tsf timestamp for the GT end event */ 18241 uint32 gt_tsf_l; 18242 /* Guard time period in ms */ 18243 uint16 guard_duration; 18244 /* Number PPDUs in the notification */ 18245 uint16 num_pkts; 18246 /* Flags to indicate some states see below */ 18247 uint8 flag; 18248 /* pad for 32-bit alignment */ 18249 uint8 reserved[3]; 18250 } wlc_leaked_infra_guard_marker_t; 18251 18252 /* Flag information */ 18253 #define WL_LEAKED_GUARD_TIME_NONE 0 /* Not in any guard time */ 18254 #define WL_LEAKED_GUARD_TIME_FRTS (0x01 << 0) /* Normal FRTS power save */ 18255 #define WL_LEAKED_GUARD_TIME_SCAN (0x01 << 1) /* Channel switch due to scanning */ 18256 #define WL_LEAKED_GUARD_TIME_INFRA_STA (0x01 << 4) /* generic type infra sta channel switch */ 18257 #define WL_LEAKED_GUARD_TIME_TERMINATED (0x01 << 7) /* indicate a GT is terminated early */ 18258 18259 typedef struct wlc_leaked_infra_packet_stat { 18260 uint16 type; /* type field for this TLV: WL_LEAKY_AP_STATS_PKT_TYPE */ 18261 uint16 len; /* length field for this TLV */ 18262 uint16 ppdu_len_bytes; /* PPDU packet length in bytes */ 18263 uint16 num_mpdus; /* number of the MPDUs in the PPDU */ 18264 uint32 ppdu_time; /* PPDU arrival time at the begining of the guard time */ 18265 uint32 rate; /* PPDU packet rate; Received packet's data rate */ 18266 uint16 seq_number; /* sequence number */ 18267 int8 rssi; /* RSSI */ 18268 uint8 tid; /* tid */ 18269 } wlc_leaked_infra_packet_stat_t; 18270 18271 /* Wake timer structure definition */ 18272 #define WAKE_TIMER_VERSION 1 18273 #define WAKE_TIMER_NOLIMIT 0xFFFF 18274 18275 typedef struct wake_timer { 18276 uint16 ver; 18277 uint16 len; 18278 uint16 limit; /* number of events to deliver 18279 * 0-disable, 0xffff-indefinite, num_events otherwise 18280 */ 18281 uint16 count; /* number of events delivered since enable (get only) */ 18282 uint16 period; /* timeout/period in milliseconds */ 18283 } wake_timer_t; 18284 18285 typedef struct wl_desense_restage_gain { 18286 uint16 version; 18287 uint16 length; 18288 uint32 band; 18289 uint8 num_cores; 18290 uint8 desense_array[WL_TX_CHAINS_MAX]; 18291 uint8 PAD[3]; 18292 } wl_desense_restage_gain_t; 18293 18294 #define MAX_UCM_CHAINS 5 18295 #define MAX_UCM_PROFILES 10 18296 #define UCM_PROFILE_VERSION_1 1 18297 18298 /* UCM per chain attribute struct */ 18299 typedef struct wlc_btcx_chain_attr { 18300 uint16 length; /* chain attr length, version is same as profile version */ 18301 int8 desense_level; /* per chain desense level */ 18302 int8 ack_pwr_strong_rssi; /* per chain ack power at strong rssi */ 18303 int8 ack_pwr_weak_rssi; /* per chain ack power at weak rssi */ 18304 int8 tx_pwr_strong_rssi; /* per chain tx power at strong rssi */ 18305 int8 tx_pwr_weak_rssi; /* per chain tx power at weak rssi */ 18306 uint8 PAD[1]; /* additional bytes for alignment */ 18307 } wlc_btcx_chain_attr_t; 18308 18309 typedef struct wlc_btcx_profile_v1 { 18310 uint16 version; /* UCM profile version */ 18311 uint16 length; /* profile size */ 18312 uint16 fixed_length; /* size of the fixed portion of the profile */ 18313 uint8 init; /* profile initialized or not */ 18314 uint8 chain_attr_count; /* Number of elements in chain_attr array */ 18315 uint8 profile_index; /* profile index */ 18316 uint8 mode_strong_wl_bt; /* Mode under strong WLAN and BT RSSI */ 18317 uint8 mode_weak_wl; /* Mode under weak WLAN RSSI */ 18318 uint8 mode_weak_bt; /* Mode under weak BT RSSI */ 18319 uint8 mode_weak_wl_bt; /* Mode under weak BT and WLAN RSSI */ 18320 int8 mode_wl_hi_lo_rssi_thresh; /* Strong to weak WLAN RSSI threshold for mode selection */ 18321 int8 mode_wl_lo_hi_rssi_thresh; /* Weak to strong WLAN RSSI threshold for mode selection */ 18322 int8 mode_bt_hi_lo_rssi_thresh; /* Strong to weak BT RSSI threshold for mode selection */ 18323 int8 mode_bt_lo_hi_rssi_thresh; /* Weak to strong BT RSSI threshold for mode selection */ 18324 int8 desense_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for desense */ 18325 int8 desense_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for desense */ 18326 int8 ack_pwr_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for ACK power */ 18327 int8 ack_pwr_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for ACK power */ 18328 int8 tx_pwr_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for Tx power */ 18329 int8 tx_pwr_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for Tx power */ 18330 uint8 PAD[1]; /* additional bytes for 4 byte alignment */ 18331 wlc_btcx_chain_attr_t chain_attr[]; /* variable length array with chain attributes */ 18332 } wlc_btcx_profile_v1_t; 18333 18334 #define SSSR_D11_RESET_SEQ_STEPS 5 18335 18336 #define SSSR_REG_INFO_VER_0 0u 18337 #define SSSR_REG_INFO_VER_1 1u 18338 #define SSSR_REG_INFO_VER_2 2u 18339 18340 typedef struct sssr_reg_info_v0 { 18341 uint16 version; 18342 uint16 length; /* length of the structure validated at host */ 18343 struct { 18344 struct { 18345 uint32 pmuintmask0; 18346 uint32 pmuintmask1; 18347 uint32 resreqtimer; 18348 uint32 macresreqtimer; 18349 uint32 macresreqtimer1; 18350 } base_regs; 18351 } pmu_regs; 18352 struct { 18353 struct { 18354 uint32 intmask; 18355 uint32 powerctrl; 18356 uint32 clockcontrolstatus; 18357 uint32 powerctrl_mask; 18358 } base_regs; 18359 } chipcommon_regs; 18360 struct { 18361 struct { 18362 uint32 clockcontrolstatus; 18363 uint32 clockcontrolstatus_val; 18364 } base_regs; 18365 struct { 18366 uint32 resetctrl; 18367 uint32 itopoobb; 18368 } wrapper_regs; 18369 } arm_regs; 18370 struct { 18371 struct { 18372 uint32 ltrstate; 18373 uint32 clockcontrolstatus; 18374 uint32 clockcontrolstatus_val; 18375 } base_regs; 18376 struct { 18377 uint32 itopoobb; 18378 } wrapper_regs; 18379 } pcie_regs; 18380 struct { 18381 struct { 18382 uint32 ioctrl; 18383 } wrapper_regs; 18384 uint32 vasip_sr_addr; 18385 uint32 vasip_sr_size; 18386 } vasip_regs; 18387 struct { 18388 struct { 18389 uint32 xmtaddress; 18390 uint32 xmtdata; 18391 uint32 clockcontrolstatus; 18392 uint32 clockcontrolstatus_val; 18393 } base_regs; 18394 struct { 18395 uint32 resetctrl; 18396 uint32 itopoobb; 18397 uint32 ioctrl; 18398 uint32 ioctrl_resetseq_val[SSSR_D11_RESET_SEQ_STEPS]; 18399 } wrapper_regs; 18400 uint32 sr_size; 18401 } mac_regs[MAX_NUM_D11CORES]; 18402 } sssr_reg_info_v0_t; 18403 18404 typedef struct sssr_reg_info_v1 { 18405 uint16 version; 18406 uint16 length; /* length of the structure validated at host */ 18407 struct { 18408 struct { 18409 uint32 pmuintmask0; 18410 uint32 pmuintmask1; 18411 uint32 resreqtimer; 18412 uint32 macresreqtimer; 18413 uint32 macresreqtimer1; 18414 } base_regs; 18415 } pmu_regs; 18416 struct { 18417 struct { 18418 uint32 intmask; 18419 uint32 powerctrl; 18420 uint32 clockcontrolstatus; 18421 uint32 powerctrl_mask; 18422 } base_regs; 18423 } chipcommon_regs; 18424 struct { 18425 struct { 18426 uint32 clockcontrolstatus; 18427 uint32 clockcontrolstatus_val; 18428 } base_regs; 18429 struct { 18430 uint32 resetctrl; 18431 uint32 itopoobb; 18432 } wrapper_regs; 18433 } arm_regs; 18434 struct { 18435 struct { 18436 uint32 ltrstate; 18437 uint32 clockcontrolstatus; 18438 uint32 clockcontrolstatus_val; 18439 } base_regs; 18440 struct { 18441 uint32 itopoobb; 18442 } wrapper_regs; 18443 } pcie_regs; 18444 struct { 18445 struct { 18446 uint32 ioctrl; 18447 } wrapper_regs; 18448 uint32 vasip_sr_addr; 18449 uint32 vasip_sr_size; 18450 } vasip_regs; 18451 struct { 18452 struct { 18453 uint32 xmtaddress; 18454 uint32 xmtdata; 18455 uint32 clockcontrolstatus; 18456 uint32 clockcontrolstatus_val; 18457 } base_regs; 18458 struct { 18459 uint32 resetctrl; 18460 uint32 itopoobb; 18461 uint32 ioctrl; 18462 uint32 ioctrl_resetseq_val[SSSR_D11_RESET_SEQ_STEPS]; 18463 } wrapper_regs; 18464 uint32 sr_size; 18465 } mac_regs[MAX_NUM_D11CORES]; 18466 struct { 18467 uint32 dig_sr_addr; 18468 uint32 dig_sr_size; 18469 } dig_mem_info; 18470 } sssr_reg_info_v1_t; 18471 18472 #define MAX_NUM_D11_CORES_WITH_SCAN 3u 18473 18474 typedef struct sssr_reg_info_v2 { 18475 uint16 version; 18476 uint16 length; /* length of the structure validated at host */ 18477 struct { 18478 struct { 18479 uint32 pmuintmask0; 18480 uint32 pmuintmask1; 18481 uint32 resreqtimer; 18482 uint32 macresreqtimer; 18483 uint32 macresreqtimer1; 18484 uint32 macresreqtimer2; 18485 } base_regs; 18486 } pmu_regs; 18487 struct { 18488 struct { 18489 uint32 intmask; 18490 uint32 powerctrl; 18491 uint32 clockcontrolstatus; 18492 uint32 powerctrl_mask; 18493 } base_regs; 18494 } chipcommon_regs; 18495 struct { 18496 struct { 18497 uint32 clockcontrolstatus; 18498 uint32 clockcontrolstatus_val; 18499 } base_regs; 18500 struct { 18501 uint32 resetctrl; 18502 uint32 extrsrcreq; 18503 } wrapper_regs; 18504 } arm_regs; 18505 struct { 18506 struct { 18507 uint32 ltrstate; 18508 uint32 clockcontrolstatus; 18509 uint32 clockcontrolstatus_val; 18510 } base_regs; 18511 struct { 18512 uint32 extrsrcreq; 18513 } wrapper_regs; 18514 } pcie_regs; 18515 struct { 18516 struct { 18517 uint32 xmtaddress; 18518 uint32 xmtdata; 18519 uint32 clockcontrolstatus; 18520 uint32 clockcontrolstatus_val; 18521 } base_regs; 18522 struct { 18523 uint32 resetctrl; 18524 uint32 extrsrcreq; 18525 uint32 ioctrl; 18526 uint32 ioctrl_resetseq_val[SSSR_D11_RESET_SEQ_STEPS]; 18527 } wrapper_regs; 18528 uint32 sr_size; 18529 } mac_regs[MAX_NUM_D11_CORES_WITH_SCAN]; 18530 struct { 18531 uint32 dig_sr_addr; 18532 uint32 dig_sr_size; 18533 } dig_mem_info; 18534 } sssr_reg_info_v2_t; 18535 18536 #ifndef SSSR_REG_INFO_HAS_ALIAS 18537 typedef sssr_reg_info_v0_t sssr_reg_info_t; 18538 #define SSSR_REG_INFO_VER SSSR_REG_INFO_VER_0 18539 #endif // endif 18540 18541 /* A wrapper structure for all versions of SSSR register information structures */ 18542 typedef union sssr_reg_info { 18543 sssr_reg_info_v0_t rev0; 18544 sssr_reg_info_v1_t rev1; 18545 sssr_reg_info_v2_t rev2; 18546 } sssr_reg_info_cmn_t; 18547 18548 /* ADaptive Power Save(ADPS) structure definition */ 18549 #define WL_ADPS_IOV_MAJOR_VER 1 18550 #define WL_ADPS_IOV_MINOR_VER 0 18551 #define WL_ADPS_IOV_MAJOR_VER_SHIFT 8 18552 #define WL_ADPS_IOV_VER \ 18553 ((WL_ADPS_IOV_MAJOR_VER << WL_ADPS_IOV_MAJOR_VER_SHIFT) | WL_ADPS_IOV_MINOR_VER) 18554 18555 #define ADPS_NUM_DIR 2 18556 #define ADPS_RX 0 18557 #define ADPS_TX 1 18558 18559 #define WL_ADPS_IOV_MODE 0x0001 18560 #define WL_ADPS_IOV_RSSI 0x0002 18561 #define WL_ADPS_IOV_DUMP 0x0003 18562 #define WL_ADPS_IOV_DUMP_CLEAR 0x0004 18563 #define WL_ADPS_IOV_SUSPEND 0x0005 18564 18565 #define ADPS_SUMMARY_STEP_NUM 2 18566 #define ADPS_SUMMARY_STEP_LOW 0 18567 #define ADPS_SUMMARY_STEP_HIGH 1 18568 18569 #define ADPS_SUB_IOV_VERSION_1 1 18570 #define ADPS_SUB_IOV_VERSION_2 2 18571 18572 /* suspend/resume ADPS by wl/private command from host */ 18573 #define ADPS_RESUME 0u 18574 #define ADPS_SUSPEND 1u 18575 18576 typedef struct wl_adps_params_v1 { 18577 uint16 version; 18578 uint16 length; 18579 uint8 band; /* band - 2G or 5G */ 18580 uint8 mode; /* operation mode, default = 0 (ADPS disable) */ 18581 uint16 padding; 18582 } wl_adps_params_v1_t; 18583 18584 typedef struct wl_adps_rssi { 18585 int32 thresh_hi; /* rssi threshold to resume ADPS operation */ 18586 int32 thresh_lo; /* rssi threshold to suspend ADPS operation */ 18587 } wl_adps_rssi_t; 18588 18589 typedef struct wl_adps_rssi_params_v1 { 18590 uint16 version; 18591 uint16 length; 18592 uint8 band; 18593 uint8 padding[3]; 18594 wl_adps_rssi_t rssi; 18595 } wl_adps_rssi_params_v1_t; 18596 18597 typedef struct adps_stat_elem { 18598 uint32 duration; /* each step duration time (mSec) */ 18599 uint32 counts; /* each step hit count number */ 18600 } adps_stat_elem_t; 18601 18602 typedef struct wl_adps_dump_summary_v1 { 18603 uint16 version; 18604 uint16 length; 18605 uint8 mode; /* operation mode: On/Off */ 18606 uint8 flags; /* restrict flags */ 18607 uint8 current_step; /* current step */ 18608 uint8 padding; 18609 adps_stat_elem_t stat[ADPS_SUMMARY_STEP_NUM]; /* statistics */ 18610 } wl_adps_dump_summary_v1_t; 18611 18612 typedef struct wl_adps_dump_summary_v2 { 18613 uint16 version; 18614 uint16 length; 18615 uint8 mode; /* operation mode: On/Off */ 18616 uint8 current_step; /* current step */ 18617 uint8 padding[2]; 18618 uint32 flags; /* restrict flags */ 18619 adps_stat_elem_t stat[ADPS_SUMMARY_STEP_NUM]; /* statistics */ 18620 } wl_adps_dump_summary_v2_t; 18621 18622 typedef struct wl_adps_suspend_v1 { 18623 uint16 version; 18624 uint16 length; 18625 uint8 suspend; /* 1: suspend 0: resume */ 18626 uint8 padding[3]; 18627 } wl_adps_suspend_v1_t; 18628 18629 typedef struct wlc_btc_2gchain_dis { 18630 uint16 ver; 18631 uint16 len; 18632 uint8 chain_dis; 18633 uint8 flag; 18634 } wlc_btc_2gchain_dis_t; 18635 18636 /* TDLS structure definition */ 18637 #define WL_TDLS_T_VERSION_V1 1 18638 typedef struct wl_tdls_dump_summary_v1 { 18639 uint16 version; 18640 uint16 length; /* length of the entire structure */ 18641 uint32 txsetupreq; /* tdls setup req sent */ 18642 uint32 txsetupresp; /* tdls setup resp sent */ 18643 uint32 txsetupcfm; /* tdls setup confirm sent */ 18644 uint32 txteardown; /* tdls teardwon frames sent */ 18645 uint32 txptireq; /* tdls pti req frames sent */ 18646 uint32 txptiresp; /* tdls pti resp frames sent */ 18647 uint32 txchswreq; /* tdls chsw req frames sent */ 18648 uint32 txchswresp; /* tdls chsw resp frame sent */ 18649 uint32 rxsetupreq; /* tdls setup req rcvd */ 18650 uint32 rxdsetupresp; /* tdls setup resp rcvd */ 18651 uint32 rxsetupcfm; /* tdls setup confirm rcvd */ 18652 uint32 rxteardown; /* tdls teardown frames rcvd */ 18653 uint32 rxptireq; /* tdls pti req frames rcvd */ 18654 uint32 rxptiresp; /* tdls pti resp frames rcvd */ 18655 uint32 rxchswreq; /* tdls chsw req frames rcvd */ 18656 uint32 rxchswresp; /* tdls chsw resp frames rcvd */ 18657 uint32 discard; /* frames discarded due to full buffer */ 18658 uint32 ubuffered; /* frames buffered by TDLS txmod */ 18659 uint32 buf_reinserted; /* frames reinserted */ 18660 uint32 idletime; /* time since no traffic on tdls link */ 18661 uint32 uptime; /* time since tdls link connected */ 18662 uint32 tx_cnt; /* frames txed over tdls link */ 18663 uint32 rx_cnt; /* frames rcvd over tdls link */ 18664 uint32 blist_cnt; /* number of tdls black list */ 18665 uint32 scb_flags; /* connected tdls scb flags */ 18666 struct ether_addr peer_addr; /* connected peer addr */ 18667 uint8 padding[2]; 18668 } wl_tdls_dump_summary_v1_t; 18669 18670 #define WLC_BTC_2GCHAIN_DIS_REASSOC 0x1 18671 #define WLC_BTC_2GCHAIN_DIS_VER1 0x1 18672 #define WLC_BTC_2GCHAIN_DIS_VER1_LEN 6 18673 18674 /* --- BTCX WiFi Protection (btc_wifi_prot iovar) --- */ 18675 18676 /* Current iovar structure version: 1 */ 18677 #define WL_BTC_WIFI_PROT_VER_1 1 18678 18679 typedef struct wl_btc_wifi_prot_v1 { 18680 uint16 ver; /* version */ 18681 uint16 len; /* total length */ 18682 uint8 data[]; /* bcm_xtlv_t payload */ 18683 } wl_btc_wifi_prot_v1_t; 18684 18685 /* Xtlv tags (protection type) and data */ 18686 #define WL_BTC_WIFI_PROT_M1_M4 1 18687 typedef struct wl_btc_wifi_prot_m1_m4 { 18688 uint32 enable; /* enable/disable m1-m4 protection */ 18689 uint32 timeout; /* maximum timeout in ms (0: default) */ 18690 } wl_btc_wifi_prot_m1_m4_t; 18691 18692 #define WL_BTC_WIFI_PROT_ENABLE 1 18693 #define WL_BTC_WIFI_PROT__DISABLE 0 18694 18695 /* --- End BTCX WiFi Protection --- */ 18696 18697 /* --- BTCX ULMU disable (btc_ulmu_config iovar) --- */ 18698 18699 /* Version number */ 18700 #define WL_BTC_ULMU_CONFIG_VER_1 1 18701 typedef struct wl_btc_ulmu_config_v1 { 18702 uint16 version; /* btc_ulmu_config version */ 18703 uint16 len; /* Total length */ 18704 uint32 ulmu_bt_task_bm; /* BT Task bimtap for ULMU disable */ 18705 uint32 ulmu_bt_period_th; /* BT period thresh for ULMU disable */ 18706 } wl_btc_ulmu_config_v1_t; 18707 18708 /* --- End BTCX ULMU config --- */ 18709 18710 #define RPSNOA_IOV_MAJOR_VER 1 18711 #define RPSNOA_IOV_MINOR_VER 1 18712 #define RPSNOA_IOV_MAJOR_VER_SHIFT 8 18713 #define RPSNOA_IOV_VERSION \ 18714 ((RPSNOA_IOV_MAJOR_VER << RPSNOA_IOV_MAJOR_VER_SHIFT)| RPSNOA_IOV_MINOR_VER) 18715 18716 enum wl_rpsnoa_cmd_ids { 18717 WL_RPSNOA_CMD_ENABLE = 1, 18718 WL_RPSNOA_CMD_STATUS, 18719 WL_RPSNOA_CMD_PARAMS, 18720 WL_RPSNOA_CMD_LAST 18721 }; 18722 18723 typedef struct rpsnoa_cmnhdr { 18724 uint16 ver; /* cmd structure version */ 18725 uint16 len; /* cmd structure len */ 18726 uint32 subcmd; 18727 uint32 cnt; 18728 } rpsnoa_cmnhdr_t; 18729 18730 typedef struct rpsnoa_data { 18731 int16 band; 18732 int16 value; 18733 } rpsnoa_data_t; 18734 18735 typedef struct rpsnoa_stats { 18736 int16 band; 18737 int16 state; 18738 uint32 sleep_dur; 18739 uint32 sleep_avail_dur; 18740 uint32 last_pps; 18741 } rpsnoa_stats_t; 18742 18743 typedef struct rpsnoa_param { 18744 uint16 band; 18745 uint8 level; 18746 uint8 stas_assoc_check; 18747 uint32 pps; 18748 uint32 quiet_time; 18749 } rpsnoa_param_t; 18750 18751 typedef struct rpsnoa_iovar { 18752 rpsnoa_cmnhdr_t hdr; 18753 rpsnoa_data_t data[1]; 18754 } rpsnoa_iovar_t; 18755 18756 typedef struct rpsnoa_iovar_status { 18757 rpsnoa_cmnhdr_t hdr; 18758 rpsnoa_stats_t stats[1]; 18759 } rpsnoa_iovar_status_t; 18760 18761 typedef struct rpsnoa_iovar_params { 18762 rpsnoa_cmnhdr_t hdr; 18763 rpsnoa_param_t param[1]; 18764 } rpsnoa_iovar_params_t; 18765 18766 /* Per-interface reportable stats types */ 18767 enum wl_ifstats_xtlv_id { 18768 /* global */ 18769 WL_IFSTATS_XTLV_SLICE_INDEX = 1, 18770 WL_IFSTATS_XTLV_IF_INDEX = 2, 18771 WL_IFSTATS_XTLV_MAC_ADDR = 3, 18772 WL_IFSTATS_XTLV_REPORT_CMD = 4, /* Comes in an iovar */ 18773 WL_IFSTATS_XTLV_BUS_PCIE = 5, 18774 WL_STATS_XTLV_BUS_PCIE_TX_HISTOGRAMS = 6, 18775 WL_STATS_XTLV_BUS_PCIE_TX_QUEUE_DEPTH = 7, 18776 /* history of blocks freed most recently */ 18777 WL_STATS_XTLV_FBINFO_STATS = 8, 18778 18779 /* Report data across all SCBs using ecounters */ 18780 /* STA_info ecounters */ 18781 WL_IFSTATS_XTLV_WL_STA_INFO_ECOUNTERS = 0x100, 18782 /* For AMPDU stat sub-types requested in a different format */ 18783 /* these could be sum and report stats across slices. OR 18784 * report sub-types in pairs so host can sum and add. 18785 * Information sent here is across slices, therefore global 18786 */ 18787 WL_IFSTATS_XTLV_TX_AMPDU_STATS = 0x101, 18788 WL_IFSTATS_XTLV_RX_AMPDU_STATS = 0x102, 18789 /* scb ecounter statistics */ 18790 WL_IFSTATS_XTLV_SCB_ECOUNTERS = 0x103, 18791 /* Global NAN stats */ 18792 WL_IFSTATS_XTLV_NAN_STATS = 0x104, 18793 WL_IFSTATS_XTLV_CHAN_STATS = 0x105, 18794 /* TDLS state */ 18795 WL_IFSTATS_XTLV_IF_TDLS_STATE = 0x106, 18796 WL_IFSTATS_XTLV_KEY_PLUMB_INFO = 0x107, 18797 /* HE TX related stats */ 18798 WL_IFSTATS_XTLV_HE_TXMU_STATS = 0x108, 18799 18800 /* Per-slice information 18801 * Per-interface reporting could also include slice specific data 18802 */ 18803 /* xtlv container for reporting */ 18804 WL_IFSTATS_XTLV_WL_SLICE = 0x301, 18805 /* Per-slice AMPDU stats */ 18806 WL_IFSTATS_XTLV_WL_SLICE_TX_AMPDU_DUMP = 0x302, 18807 WL_IFSTATS_XTLV_WL_SLICE_RX_AMPDU_DUMP = 0x303, 18808 /* Per-slice BTCOEX stats */ 18809 WL_IFSTATS_XTLV_WL_SLICE_BTCOEX = 0x304, 18810 /* V11_WLCNTRS used in ecounters */ 18811 WL_IFSTATS_XTLV_WL_SLICE_V11_WLCNTRS = 0x305, 18812 /* V30_WLCNTRS Used in ecounters */ 18813 WL_IFSTATS_XTLV_WL_SLICE_V30_WLCNTRS = 0x306, 18814 /* phy,ucode,scan pwrstats */ 18815 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_PHY = 0x307, 18816 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_SCAN = 0x308, 18817 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_WAKE_V2 = 0x309, 18818 /* Per-slice LTECOEX stats */ 18819 WL_IFSTATS_XTLV_WL_SLICE_LTECOEX = 0x30A, 18820 /* TVPM ecounters */ 18821 WL_IFSTATS_XTLV_WL_SLICE_TVPM = 0x30B, 18822 /* TDMTX ecounters */ 18823 WL_IFSTATS_XTLV_WL_SLICE_TDMTX = 0x30C, 18824 /* Slice specific state capture in periodic fasion */ 18825 WL_SLICESTATS_XTLV_PERIODIC_STATE = 0x30D, 18826 WL_SLICESTATS_XTLV_HIST_TX_STATS = 0x30E, 18827 WL_SLICESTATS_XTLV_HIST_RX_STATS = 0x30F, 18828 /* TX histograms */ 18829 WL_STATS_XTLV_WL_SLICE_TX_HISTOGRAMS = 0x310, 18830 /* TX queue depth */ 18831 WL_STATS_XTLV_WL_SLICE_TX_QUEUE_DEPTH = 0x311, 18832 /* Latency instrumentation debug */ 18833 WL_STATS_XTLV_WL_QUEUE_STOP = 0x312, 18834 /* Beamforming counters */ 18835 WL_IFSTATS_XTLV_WL_SLICE_TXBF = 0x313, 18836 /* Per-slice BTCOEX task duration stats */ 18837 WL_IFSTATS_XTLV_WL_SLICE_BTCOEX_TSKDUR_STATS = 0x314, 18838 /* Per-interface */ 18839 /* XTLV container for reporting */ 18840 WL_IFSTATS_XTLV_IF = 0x501, 18841 /* Generic stats applicable to all IFs */ 18842 WL_IFSTATS_XTLV_GENERIC = 0x502, 18843 /* Infra specific */ 18844 WL_IFSTATS_XTLV_INFRA_SPECIFIC = 0x503, 18845 /* MGT counters infra and softAP */ 18846 WL_IFSTATS_XTLV_MGT_CNT = 0x504, 18847 /* AMPDU stats on per-IF */ 18848 WL_IFSTATS_XTLV_AMPDU_DUMP = 0x505, 18849 WL_IFSTATS_XTLV_IF_SPECIFIC = 0x506, 18850 WL_IFSTATS_XTLV_IF_LQM = 0x508, 18851 /* Interface specific state capture in periodic fashion */ 18852 WL_IFSTATS_XTLV_IF_PERIODIC_STATE = 0x509, 18853 /* Event statistics on per-IF */ 18854 WL_IFSTATS_XTLV_IF_EVENT_STATS = 0x50A, 18855 /* Infra HE specific */ 18856 WL_IFSTATS_XTLV_INFRA_SPECIFIC_HE = 0x50B, 18857 /* Roam statistics */ 18858 WL_IFSTATS_XTLV_ROAM_STATS_PERIODIC = 0x50C, 18859 WL_IFSTATS_XTLV_ROAM_STATS_EVENT = 0x50D, 18860 /* ecounters for nan */ 18861 /* nan slot stats */ 18862 WL_IFSTATS_XTLV_NAN_SLOT_STATS = 0x601, 18863 /* Ecounters for NDP session status */ 18864 WL_STATS_XTLV_NDP_SESSION_STATUS = 0x602, 18865 /* NAN disc frame status ecounters */ 18866 WL_STATS_XTLV_NAN_DISC_FRM_STATUS = 0x603 18867 }; 18868 18869 /* current version of wl_stats_report_t structure for request */ 18870 #define WL_STATS_REPORT_REQUEST_VERSION_V2 2 18871 18872 /* current version of wl_stats_report_t structure for response */ 18873 #define WL_STATS_REPORT_RESPONSE_VERSION_V2 2 18874 18875 /** Top structure of if_counters IOVar buffer */ 18876 typedef struct wl_stats_report { 18877 uint16 version; /**< see version definitions above */ 18878 uint16 length; /**< length of data including all paddings. */ 18879 uint8 data []; /**< variable length payload: 18880 * 1 or more bcm_xtlv_t type of tuples. 18881 * each tuple is padded to multiple of 4 bytes. 18882 * 'length' field of this structure includes all paddings. 18883 */ 18884 } wl_stats_report_t; 18885 18886 /* interface specific mgt count */ 18887 #define WL_MGT_STATS_VERSION_V1 1 18888 /* Associated stats type: WL_IFSTATS_MGT_CNT */ 18889 typedef struct { 18890 uint16 version; 18891 uint16 length; 18892 18893 /* detailed control/management frames */ 18894 uint32 txnull; 18895 uint32 rxnull; 18896 uint32 txqosnull; 18897 uint32 rxqosnull; 18898 uint32 txassocreq; 18899 uint32 rxassocreq; 18900 uint32 txreassocreq; 18901 uint32 rxreassocreq; 18902 uint32 txdisassoc; 18903 uint32 rxdisassoc; 18904 uint32 txassocrsp; 18905 uint32 rxassocrsp; 18906 uint32 txreassocrsp; 18907 uint32 rxreassocrsp; 18908 uint32 txauth; 18909 uint32 rxauth; 18910 uint32 txdeauth; 18911 uint32 rxdeauth; 18912 uint32 txprobereq; 18913 uint32 rxprobereq; 18914 uint32 txprobersp; 18915 uint32 rxprobersp; 18916 uint32 txaction; 18917 uint32 rxaction; 18918 uint32 txpspoll; 18919 uint32 rxpspoll; 18920 } wl_if_mgt_stats_t; 18921 18922 #define WL_INFRA_STATS_VERSION_V1 1 18923 /* Associated stats type: WL_IFSTATS_INFRA_SPECIFIC */ 18924 typedef struct wl_infra_stats { 18925 uint16 version; /**< version of the structure */ 18926 uint16 length; 18927 uint32 rxbeaconmbss; 18928 uint32 tbtt; 18929 } wl_if_infra_stats_t; 18930 18931 #define WL_INFRA_STATS_HE_VERSION_V1 (1u) 18932 /* Associated stats type: WL_IFSTATS_INFRA_SPECIFIC_HE */ 18933 typedef struct wl_infra_stats_he { 18934 uint16 version; /**< version of the structure */ 18935 uint16 length; 18936 uint32 PAD; /**< Explicit padding */ 18937 18938 /* DL SU MPDUs and total number of bytes */ 18939 uint64 dlsu_mpdudata; 18940 uint64 dlsu_mpdu_bytes; 18941 18942 /* DL MUMIMO MPDUs and total number of bytes */ 18943 uint64 dlmumimo_mpdudata; 18944 uint64 dlmumimo_mpdu_bytes; 18945 18946 /* DL OFDMA MPDUs and total number of bytes */ 18947 uint64 dlofdma_mpdudata; 18948 uint64 dlofdma_mpdu_bytes; 18949 18950 /* UL SU MPDUs and total number of bytes */ 18951 uint64 ulsu_mpdudata; 18952 uint64 ulsu_mpdu_bytes; 18953 18954 /* ULOFDMA MPSUs and total number of bytes */ 18955 uint64 ulofdma_mpdudata; 18956 uint64 ulofdma_mpdu_bytes; 18957 } wl_if_infra_stats_he_t; 18958 18959 #define LTECOEX_STATS_VER 1 18960 18961 typedef struct wlc_ltecoex_stats { 18962 uint16 version; /**< WL_IFSTATS_XTLV_WL_SLICE_LTECOEX */ 18963 uint16 len; /* Length of wl_ltecx_stats structure */ 18964 uint8 slice_index; /* Slice unit of wl_ltecx_stats structure */ 18965 uint8 pad[3]; /* Padding */ 18966 /* LTE noise based eCounters Bins 18967 cumulative the wl_cnt_wlc_t and wl_ctl_mgt_cnt_t 18968 counter information based on LTE Coex interference level 18969 */ 18970 uint32 txframe_no_LTE; /* txframe counter in no LTE Coex case */ 18971 uint32 rxframe_no_LTE; /* rxframe counter in no LTE Coex case */ 18972 uint32 rxrtry_no_LTE; /* rxrtry counter in no LTE Coex case */ 18973 uint32 txretrans_no_LTE; /* txretrans counter in no LTE Coex case */ 18974 uint32 txnocts_no_LTE; /* txnocts counter in no LTE Coex case */ 18975 uint32 txrts_no_LTE; /* txrts counter in no LTE Coex case */ 18976 uint32 txdeauth_no_LTE; /* txdeauth counter in no LTE Coex case */ 18977 uint32 txassocreq_no_LTE; /* txassocreq counter in no LTE Coex case */ 18978 uint32 txassocrsp_no_LTE; /* txassocrsp counter in no LTE Coex case */ 18979 uint32 txreassocreq_no_LTE; /* txreassocreq counter in no LTE Coex case */ 18980 uint32 txreassocrsp_no_LTE; /* txreassocrsp counter in no LTE Coex case */ 18981 uint32 txframe_light_LTE; /* txframe counter in light LTE Coex case */ 18982 uint32 txretrans_light_LTE; /* txretrans counter in light LTE Coex case */ 18983 uint32 rxframe_light_LTE; /* rxframe counter in light LTE Coex case */ 18984 uint32 rxrtry_light_LTE; /* rxrtry counter in light LTE Coex case */ 18985 uint32 txnocts_light_LTE; /* txnocts counter in light LTE Coex case */ 18986 uint32 txrts_light_LTE; /* txrts counter in light LTE Coex case */ 18987 uint32 txdeauth_light_LTE; /* txdeauth counter in light LTE Coex case */ 18988 uint32 txassocreq_light_LTE; /* txassocreq counter in light LTE Coex case */ 18989 uint32 txassocrsp_light_LTE; /* txassocrsp counter in light LTE Coex case */ 18990 uint32 txreassocreq_light_LTE; /* txreassocreq counter in light LTE Coex case */ 18991 uint32 txreassocrsp_light_LTE; /* txreassocrsp counter in light LTE Coex case */ 18992 uint32 txframe_heavy_LTE; /* txframe counter in heavy LTE Coex case */ 18993 uint32 txretrans_heavy_LTE; /* txretrans counter in heavy LTE Coex case */ 18994 uint32 rxframe_heavy_LTE; /* rxframe counter in heavy LTE Coex case */ 18995 uint32 rxrtry_heavy_LTE; /* rxrtry counter in heavy LTE Coex case */ 18996 uint32 txnocts_heavy_LTE; /* txnocts counter in heavy LTE Coex case */ 18997 uint32 txrts_heavy_LTE; /* txrts counter in heavy LTE Coex case */ 18998 uint32 txdeauth_heavy_LTE; /* txdeauth counter in heavy LTE Coex case */ 18999 uint32 txassocreq_heavy_LTE; /* txassocreq counter in heavy LTE Coex case */ 19000 uint32 txassocrsp_heavy_LTE; /* txassocrsp counter in heavy LTE Coex case */ 19001 uint32 txreassocreq_heavy_LTE; /* txreassocreq counter in heavy LTE Coex case */ 19002 uint32 txreassocrsp_heavy_LTE; /* txreassocrsp counter in heavy LTE Coex case */ 19003 19004 /* LTE specific ecounters */ 19005 uint16 type4_txinhi_dur; /* Duration of tx inhibit(in ms) due to Type4 */ 19006 uint16 type4_nonzero_cnt; /* Counts of none zero Type4 msg */ 19007 uint16 type4_timeout_cnt; /* Counts of Type4 timeout */ 19008 uint16 rx_pri_dur; /* Duration of wlan_rx_pri assertions */ 19009 uint16 rx_pri_cnt; /* Count of wlan_rx_pri assertions */ 19010 uint16 type6_dur; /* duration of LTE Tx power limiting assertions */ 19011 uint16 type6_cnt; /* Count of LTE Tx power limiting assertions */ 19012 uint16 ts_prot_frm_cnt; /* count of WLAN protection frames triggered by LTE coex */ 19013 uint16 ts_gr_cnt; /* count of intervals granted to WLAN in timesharing */ 19014 uint16 ts_gr_dur; /* duration granted to WLAN in timesharing */ 19015 } wlc_ltecoex_stats_t; 19016 19017 #define CSA_EVT_CSA_RXED (1 << 0) 19018 #define CSA_EVT_CSA_TIMEOUT (1 << 1) 19019 #define CSA_EVT_FROM_INFRA (1 << 2) 19020 typedef struct csa_event_data { 19021 chanspec_t chan_old; 19022 dot11_ext_csa_ie_t ecsa; 19023 dot11_mesh_csp_ie_t mcsp; 19024 dot11_wide_bw_chan_switch_ie_t wbcs; 19025 uint8 flags; 19026 uint8 pad[3]; 19027 } csa_event_data_t; 19028 19029 /* ifdef (WL_ASSOC_BCN_RPT) */ 19030 enum wl_bcn_report_cmd_id { 19031 WL_BCN_RPT_CMD_VER = 0, 19032 WL_BCN_RPT_CMD_CONFIG = 1, 19033 WL_BCN_RPT_CMD_VENDOR_IE = 2, 19034 WL_BCN_RPT_CMD_LAST 19035 }; 19036 19037 /* beacon report specific macros */ 19038 #define WL_BCN_RPT_CCX_IE_OVERRIDE (1u << 0) 19039 19040 /* beacon report specific macros */ 19041 #define WL_BCN_RPT_ASSOC_SCAN_UNSOLICITED_MODE (1u << 1) 19042 #define WL_BCN_RPT_ASSOC_SCAN_SOLICITED_MODE (1u << 2) 19043 #define WL_BCN_RPT_ASSOC_SCAN_MODE_SHIFT (1) 19044 #define WL_BCN_RPT_ASSOC_SCAN_MODE_MASK (WL_BCN_RPT_ASSOC_SCAN_UNSOLICITED_MODE |\ 19045 WL_BCN_RPT_ASSOC_SCAN_SOLICITED_MODE) 19046 #define WL_BCN_RPT_ASSOC_SCAN_MODE_MAX (WL_BCN_RPT_ASSOC_SCAN_MODE_MASK >> \ 19047 WL_BCN_RPT_ASSOC_SCAN_MODE_SHIFT) 19048 /* beacon report mode specific macro */ 19049 #define WL_BCN_RPT_ASSOC_SCAN_MODE_DEFAULT WL_BCN_RPT_ASSOC_SCAN_UNSOLICITED_MODE 19050 19051 /* beacon report timeout config specific macros */ 19052 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_TIMEOUT_DEFAULT (120000) 19053 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_TIMEOUT_MIN (60000) 19054 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_TIMEOUT_MAX (0xFFFFFFFF) 19055 19056 /* beacon report cache count specific macros */ 19057 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_MIN (0) 19058 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_MAX (8) 19059 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_DEFAULT (WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_MAX) 19060 19061 #define WL_BCN_REPORT_CMD_VERSION 1 19062 struct wl_bcn_report_cfg { 19063 uint32 flags; /**< Flags that defines the operation/setting information */ 19064 uint32 scan_cache_timeout; /**< scan cache timeout value in millisec */ 19065 uint32 scan_cache_timer_pend; /**< Read only pending time for timer expiry in millisec */ 19066 uint8 scan_cache_cnt; /**< scan cache count */ 19067 }; 19068 19069 /* endif (WL_ASSOC_BCN_RPT) */ 19070 19071 /* Thermal, Voltage, and Power Mitigation */ 19072 #define TVPM_REQ_VERSION_1 1 19073 #define TVPM_REQ_CURRENT_VERSION TVPM_REQ_VERSION_1 19074 19075 /* tvpm iovar data */ 19076 typedef struct { 19077 uint16 version; /* TVPM request version */ 19078 uint16 length; /* Length of the entire structure */ 19079 19080 uint16 req_type; /* Request type: wl_tvpm_req_type_t */ 19081 uint16 req_len; /* Length of the following value */ 19082 uint8 value[]; /* Variable length data depending on req_type */ 19083 } wl_tvpm_req_t; 19084 19085 /* tvpm iovar request types */ 19086 typedef enum { 19087 WL_TVPM_REQ_CLTM_INDEX, /* req_value: uint32, range 1...100 */ 19088 WL_TVPM_REQ_PPM_INDEX, /* req_value: uint32, range 1...100 */ 19089 WL_TVPM_REQ_ENABLE, /* req_value: uint32, range 0...1 */ 19090 WL_TVPM_REQ_STATUS, /* req_value: none */ 19091 WL_TVPM_REQ_PERIOD, /* req_value: int32, range {-1,1-10} */ 19092 WL_TVPM_REQ_MAX 19093 } wl_tvpm_req_type_t; 19094 19095 /* structure for data returned by request type WL_TVPM_REQ_STATUS */ 19096 typedef struct wl_tvpm_status { 19097 uint16 enable; /* whether TVPM is enabled */ 19098 uint16 tx_dutycycle; /* a percentage: 1-100 */ 19099 int16 tx_power_backoff; /* 0...-6 */ 19100 uint16 num_active_chains; /* 1...3 */ 19101 int16 temp; /* local temperature in degrees C */ 19102 uint8 vbat; /* local voltage in units of 0.1V */ 19103 uint8 pad; 19104 } wl_tvpm_status_t; 19105 19106 /* TVPM ecounters */ 19107 typedef struct wl_tvpm_ecounters_t { 19108 uint16 version; /* version field */ 19109 uint16 length; /* byte length in wl_tvpm_ecounters_t starting at version */ 19110 uint16 tx_dutycycle; /* a percentage: 1-100 */ 19111 int16 tx_power_backoff; /* 0...-6 */ 19112 uint16 num_active_chains; /* 1...3 */ 19113 int16 temp; /* local temperature */ 19114 uint8 vbat; /* local voltage */ 19115 uint8 cltm; /* CLTM index */ 19116 uint8 ppm; /* PPM index */ 19117 uint8 pad; /* pad to align to uint16 */ 19118 } wl_tvpm_ecounters_t; 19119 19120 #define TDMTX_ECOUNTERS_VERSION_V1 1 19121 #define TDMTX_ECOUNTERS_VERSION_V2 2 19122 19123 /* TDMTX ecounters */ 19124 typedef struct wl_tdmtx_ecounters_v1 { 19125 uint16 version; /* version field */ 19126 uint16 length; /* byte length in wl_tdmtx_ecounters_t starting at version */ 19127 uint32 txa_on; /* TXA on requests */ 19128 uint32 txa_tmcnt; /* Total number of TXA timeout */ 19129 uint32 por_on; /* TXA POR requests */ 19130 uint32 txpuen; /* Path enable requests */ 19131 uint32 txpudis; /* Total number of times Tx path is muted on the slice */ 19132 uint32 txpri_on; /* Total number of times Tx priority was obtained by the slice */ 19133 uint32 txdefer; /* Total number of times Tx was deferred by the slice */ 19134 uint32 txmute; /* Total number of times active Tx muted on the slice */ 19135 uint32 actpwrboff; /* Total number of times TX power is backed off by the slice */ 19136 uint32 txa_dur; /* Total time txa on */ 19137 uint32 txpri_dur; /* Total time TXPri */ 19138 uint32 txdefer_dur; /* Total time txdefer */ 19139 } wl_tdmtx_ecounters_v1_t; 19140 19141 /* TDMTX ecounters for version 2 */ 19142 typedef struct wl_tdmtx_ecounters_v2 { 19143 uint16 version; /* version field */ 19144 uint16 length; /* byte length in wl_tdmtx_ecounters_t starting at version */ 19145 uint32 txa_on; /* TXA on requests */ 19146 uint32 txa_tmcnt; /* Total number of TXA timeout */ 19147 uint32 porhi_on; /* TXA PORHI requests */ 19148 uint32 porlo_on; /* TXA PORLO requests */ 19149 uint32 txpuen; /* Path enable requests */ 19150 uint32 txpudis; /* Total number of times Tx path is muted on the slice */ 19151 uint32 txpri_on; /* Total number of times Tx priority was obtained by the slice */ 19152 uint32 txdefer; /* Total number of times Tx was deferred by the slice */ 19153 uint32 txmute; /* Total number of times active Tx muted on the slice */ 19154 uint32 actpwrboff; /* Total number of times TX power is backed off by the slice */ 19155 uint32 txa_dur; /* Total time txa on */ 19156 uint32 txpri_dur; /* Total time TXPri */ 19157 uint32 txdefer_dur; /* Total time txdefer */ 19158 } wl_tdmtx_ecounters_v2_t; 19159 19160 /* Note: if this struct is changing update wl_scb_ecounters_vX_t version, 19161 * as this struct is sent as payload in wl_scb_ecounters_vX_t 19162 */ 19163 typedef struct wlc_scb_stats_v1 { 19164 uint32 tx_pkts; /* num of packets transmitted (ucast) */ 19165 uint32 tx_failures; /* num of packets failed */ 19166 uint32 rx_ucast_pkts; /* num of unicast packets received */ 19167 uint32 rx_mcast_pkts; /* num of multicast packets received */ 19168 uint32 tx_rate; /* Rate of last successful tx frame */ 19169 uint32 rx_rate; /* Rate of last successful rx frame */ 19170 uint32 rx_decrypt_succeeds; /* num of packets decrypted successfully */ 19171 uint32 rx_decrypt_failures; /* num of packets decrypted unsuccessfully */ 19172 uint32 tx_mcast_pkts; /* num of mcast pkts txed */ 19173 uint64 tx_ucast_bytes; /* data bytes txed (ucast) */ 19174 uint64 tx_mcast_bytes; /* data bytes txed (mcast) */ 19175 uint64 rx_ucast_bytes; /* data bytes recvd ucast */ 19176 uint64 rx_mcast_bytes; /* data bytes recvd mcast */ 19177 uint32 tx_pkts_retried; /* num of packets where a retry was necessary */ 19178 uint32 tx_pkts_retry_exhausted; /* num of packets where a retry was exhausted */ 19179 uint32 tx_rate_mgmt; /* Rate of last transmitted management frame */ 19180 uint32 tx_rate_fallback; /* last used lowest fallback TX rate */ 19181 uint32 rx_pkts_retried; /* # rx with retry bit set */ 19182 uint32 tx_pkts_total; /* total num of tx pkts */ 19183 uint32 tx_pkts_retries; /* total num of tx retries */ 19184 uint32 tx_pkts_fw_total; /* total num of tx pkts generated from fw */ 19185 uint32 tx_pkts_fw_retries; /* num of fw generated tx pkts retried */ 19186 uint32 tx_pkts_fw_retry_exhausted; /* num of fw generated tx pkts where retry exhausted */ 19187 } wlc_scb_stats_v1_t; 19188 19189 /* ecounters for scb stats 19190 * XTLV ID: WL_IFSTATS_XTLV_SCB_ECOUNTERS 19191 */ 19192 19193 #define WL_SCB_ECOUNTERS_VERSION_1 1 19194 #define WL_SCB_ECOUNTERS_VERSION_2 2 19195 19196 typedef struct wl_scb_ecounters_v1 { 19197 uint16 version; /* version field */ 19198 uint16 length; /* struct length starting from version */ 19199 uint32 chanspec; /* current chanspec where scb is operating */ 19200 struct ether_addr ea; /* peer ndi or sta ea */ 19201 uint8 peer_type; /* peer type */ 19202 uint8 pad; 19203 19204 /* scb tx and rx stats */ 19205 wlc_scb_stats_v1_t stats; 19206 } wl_scb_ecounters_v1_t; 19207 19208 typedef struct wl_scb_ecounters_v2 { 19209 uint16 version; /* version field */ 19210 uint16 length; /* struct length starting from version */ 19211 uint32 chanspec; /* current chanspec where scb is operating */ 19212 struct ether_addr ea; /* peer ndi or sta ea */ 19213 uint8 peer_type; /* peer type */ 19214 uint8 pad; 19215 19216 /* scb tx and rx stats */ 19217 uint16 tx_rate; /* Rate(in Mbps) of last successful tx frame */ 19218 uint16 rx_rate; /* Rate(in Mbps) of last successful rx frame */ 19219 uint16 tx_rate_fallback; /* last used lowest fallback TX rate(in Mbps) */ 19220 uint16 pad1; 19221 uint32 rx_decrypt_succeeds; /* num of packets decrypted successfully */ 19222 uint32 rx_decrypt_failures; /* num of packets decrypted unsuccessfully */ 19223 uint32 rx_pkts_retried; /* # rx with retry bit set */ 19224 uint32 tx_pkts_retries; /* total num of tx retries */ 19225 uint32 tx_failures; /* num of packets failed */ 19226 uint32 tx_pkts_total; /* total num of tx pkts */ 19227 int8 rssi[WL_STA_ANT_MAX]; /* average rssi per antenna of data frames */ 19228 } wl_scb_ecounters_v2_t; 19229 19230 /* ecounters for nan slot stats 19231 * XTLV ID: WL_IFSTATS_XTLV_NAN_SLOT_STATS 19232 */ 19233 19234 #define WL_NAN_SLOT_ECOUNTERS_VERSION_1 1 19235 #define WL_NAN_SLOT_ECOUNTERS_VERSION_2 2 19236 19237 typedef struct wl_nan_slot_ecounters_v1 { 19238 uint16 version; /* version field */ 19239 uint16 length; /* struct length starting from version */ 19240 uint32 chan[NAN_MAX_BANDS]; /* cur nan slot chanspec of both bands */ 19241 uint16 cur_slot_idx; /* cur nan slot index */ 19242 uint16 pad; 19243 nan_sched_stats_t sched; /* sched stats */ 19244 wl_nan_mac_stats_t mac; /* mac stats */ 19245 } wl_nan_slot_ecounters_v1_t; 19246 19247 typedef struct wl_nan_slot_ecounters_v2 { 19248 uint16 version; /* version field */ 19249 uint16 length; /* struct length starting from version */ 19250 uint32 chan[NAN_MAX_BANDS]; /* cur nan slot chanspec of both bands */ 19251 uint16 cur_slot_idx; /* cur nan slot index */ 19252 uint16 pad; 19253 nan_sched_stats_t sched; /* sched stats */ 19254 wl_nan_mac_stats_t mac; /* mac stats */ 19255 /* for v2 */ 19256 uint16 bcn_rx_drop_rssi; /* Beacon received but ignored due to weak rssi */ 19257 uint16 bcn_rx_drop_rssi_5g; /* 5G Beacon received but ignored due to weak rssi */ 19258 uint16 cnt_rssi_close; /* cnt of beacon rssi > rssi_close received */ 19259 uint16 cnt_rssi_close_5g; /* cnt of 5G beacon rssi > rssi_close received */ 19260 uint16 cnt_rssi_mid; /* cnt of beacon rssi > rssi_middle received */ 19261 uint16 cnt_rssi_mid_5g; /* cnt of 5G beacon rssi > rssi_middle received */ 19262 uint16 bcn_txfail; /* Beacon sending failure count */ 19263 uint16 bcn_txfail_5g; /* sending 5G beacon failure count */ 19264 } wl_nan_slot_ecounters_v2_t; 19265 19266 /* WL_STATS_XTLV_NDP_SESSION_STATUS for ecounters */ 19267 #define WL_NAN_SESSION_STATUS_EC_VERSION_1 1 19268 typedef struct wl_nan_ndp_session_status_v1_s { 19269 uint16 version; /* version field */ 19270 uint16 length; /* struct length starting from version */ 19271 uint8 role; /* Role of NAN device */ 19272 uint8 ndp_id; /* local NDP ID */ 19273 uint8 state; /* NDP state */ 19274 uint8 nan_sec_csid; /* security csid */ 19275 struct ether_addr lndi_addr; /* Local NDI addr */ 19276 struct ether_addr pnmi_addr; /* Peer NMI addr */ 19277 struct ether_addr pndi_addr; /* Peer NDI addr */ 19278 uint8 dpe_state; /* DPE state to know where timeout/dpend has come */ 19279 uint8 pad; 19280 } wl_nan_ndp_session_status_v1_t; 19281 19282 /* WL_STATS_XTLV_NAN_DISC_FRM_STATUS for ecounters */ 19283 #define WL_NAN_DISC_FRM_STATUS_EC_VERSION_1 1 19284 typedef struct wl_nan_disc_frame_status_v1_s { 19285 uint16 version; /* version field */ 19286 uint16 length; /* struct length starting from version */ 19287 uint8 type; /* wl_nan_frame_type_t */ 19288 uint8 status; /* For TX status, success or failure */ 19289 uint8 reason_code; /* to identify reason when status is failure */ 19290 uint8 inst_id; /* Publish or subscribe instance id */ 19291 uint8 req_id; /* Requestor instance id */ 19292 uint8 pad; 19293 uint16 token; /* seq num to keep track of pkts sent by host */ 19294 } wl_nan_disc_frame_status_v1_t; 19295 /* 19296 * BT log definitions 19297 */ 19298 19299 /* common iovar struct */ 19300 typedef struct wl_btl { 19301 uint16 subcmd_id; /* subcommand id */ 19302 uint16 len; /* total length of data[] */ 19303 uint8 data[2]; /* subcommand data, variable length */ 19304 } wl_btl_t; 19305 19306 /* subcommand ids */ 19307 #define WL_BTL_SUBCMD_ENABLE 0 /* enable/disable logging */ 19308 #define WL_BTL_SUBCMD_STATS 1 /* statistics */ 19309 19310 /* WL_BTL_SUBCMD_ENABLE data */ 19311 typedef struct wl_blt_enable { 19312 uint8 enable; /* 1 - enable, 0 - disable */ 19313 uint8 pad[3]; /* 4-byte struct alignment */ 19314 } wl_btl_enable_t; 19315 19316 /* WL_BTL_SUBCMD_STATS data */ 19317 typedef struct wl_blt_stats { 19318 uint32 bt_interrupt; /* num BT interrupts */ 19319 uint32 config_req; /* num CONFIG_REQ */ 19320 uint32 config_res_success; /* num CONFIG_RES successful */ 19321 uint32 config_res_fail; /* num CONFIG_RES failed */ 19322 uint32 log_req; /* num LOG_REQ */ 19323 uint32 log_res_success; /* num LOG_RES successful */ 19324 uint32 log_res_fail; /* num LOG_RES failed */ 19325 uint32 indirect_read_fail; /* num indirect read fail */ 19326 uint32 indirect_write_fail; /* num indirect write fail */ 19327 uint32 dma_fail; /* num DMA failed */ 19328 uint32 min_log_req_duration; /* min log request duration in usec */ 19329 uint32 max_log_req_duration; /* max log request duration in usec */ 19330 uint16 mem_dump_req; /* num mem dump requests */ 19331 uint16 mem_dump_success; /* num mem dumps successful */ 19332 uint16 mem_dump_fail; /* num mem dumps failed */ 19333 uint16 bt_wake_success; /* num BT wakes successful */ 19334 uint16 bt_wake_fail; /* num BT wakes failed */ 19335 uint16 mem_dump_req_interrupt; /* num MEM_DUMP_REQ interrupt */ 19336 uint16 mem_dump_res_interrupt; /* num MEM_DUMP_RES interrupt */ 19337 uint16 mem_dump_res_timeout; /* num MEM_DUMP_RES timeout */ 19338 uint16 mem_dump_proc_no_bt_ready; /* num proceed if no BT ready */ 19339 uint16 mem_dump_proc_no_bt_response; /* num proceed if no BT response */ 19340 uint16 mem_dump_proc_no_bt_clock; /* num proceed if no BT clock */ 19341 uint16 pad; /* alignment */ 19342 uint32 last_failed_region; /* start addr of last failed region */ 19343 uint32 min_mem_dump_duration; /* min mem dump duration in usec */ 19344 uint32 max_mem_dump_duration; /* max mem dump duration in usec */ 19345 } wl_btl_stats_t; 19346 19347 /* IOV AWD DATA */ 19348 19349 /* AWD DATA structures */ 19350 typedef struct { 19351 uint8 version; /* Extended trap version info */ 19352 uint8 reserved; /* currently unused */ 19353 uint16 length; /* Length of data excluding this header */ 19354 uint8 data[]; /* this data is TLV of tags */ 19355 } awd_data_v1_t; 19356 19357 /* AWD TAG structure */ 19358 typedef struct { 19359 uint8 tagid; /* one of AWD DATA TAGs numbers */ 19360 uint8 length; /* the data size represented by this field must be aligned to 32 bits */ 19361 uint8 data[]; /* variable size, defined by length field */ 19362 } awd_tag_data_v1_t; 19363 19364 /* IOV ETD DATA */ 19365 19366 /* ETD DATA structures */ 19367 typedef struct { 19368 uint8 version; /* Extended trap version info */ 19369 uint8 reserved; /* currently unused */ 19370 uint16 length; /* Length of data excluding this header */ 19371 uint8 data[]; /* this data is TLV of tags */ 19372 } etd_data_v1_t; 19373 19374 /* ETD TAG structure */ 19375 typedef struct { 19376 uint8 tagid; /* one of ETD DATA TAGs numbers */ 19377 uint8 length; /* the data size represented by this field must be aligned to 32 bits */ 19378 uint8 data[]; /* variable size, defined by length field */ 19379 } etd_tag_data_v1_t; 19380 19381 /* ETD information structures associated with ETD_DATA_Tags */ 19382 /* ETD_JOIN_CLASSIFICATION_INFO 10 */ 19383 typedef struct { 19384 uint8 assoc_type; /* assoc type */ 19385 uint8 assoc_state; /* current state of assoc state machine */ 19386 uint8 wpa_state; /* wpa->state */ 19387 uint8 wsec_portopen; /* shows if security port is open */ 19388 uint8 total_attempts_num; /* total number of join attempts (bss_retries) */ 19389 uint8 num_of_targets; /* up to 3, in current design */ 19390 uint8 reserved [2]; /* padding to get 32 bits alignment */ 19391 uint32 wsec; /* bsscfg->wsec */ 19392 uint32 wpa_auth; /* bsscfg->WPA_auth */ 19393 uint32 time_to_join; /* time duration to process WLC_SET_SSID request (ms) */ 19394 } join_classification_info_v1_t; 19395 19396 /* ETD_JOIN_TARGET_CLASSIFICATION_INFO 11 */ 19397 typedef struct { 19398 int8 rssi; /* RSSI on current channel */ 19399 uint8 cca; /* CCA on current channel */ 19400 uint8 channel; /* current channel */ 19401 uint8 num_of_attempts; /* (bss_retries) up to 5 */ 19402 uint8 oui[3]; /* the first three octets of the AP's address */ 19403 uint8 reserved; /* padding to get 32 bits alignment */ 19404 uint32 time_duration; /* time duration of current attempt (ms) */ 19405 } join_target_classification_info_v1_t; 19406 19407 /* ETD_ASSOC_STATE 12 */ 19408 typedef struct { 19409 uint8 assoc_state; /* assoc type */ 19410 uint8 reserved [3]; /* padding to get 32 bits alignment */ 19411 } join_assoc_state_v1_t; 19412 19413 /* ETD_CHANNEL 13 tag */ 19414 typedef struct { 19415 uint8 channel; /* last attempt channel */ 19416 uint8 reserved [3]; /* padding to get 32 bits alignment */ 19417 } join_channel_v1_t; 19418 19419 /* ETD_TOTAL_NUM_OF_JOIN_ATTEMPTS 14 */ 19420 typedef struct { 19421 uint8 total_attempts_num; /* total number of join attempts (bss_retries) */ 19422 uint8 reserved [3]; /* padding to get 32 bits alignment */ 19423 } join_total_attempts_num_v1_t; 19424 19425 /* IOV_ROAM_CACHE structures */ 19426 19427 enum wl_rmc_report_cmd_id { 19428 WL_RMC_RPT_CMD_VER = 0, 19429 WL_RMC_RPT_CMD_DATA = 1, 19430 WL_RMC_RPT_CMD_LAST 19431 }; 19432 19433 enum wl_rmc_report_xtlv_id { 19434 WL_RMC_RPT_XTLV_VER = 0x0, 19435 WL_RMC_RPT_XTLV_BSS_INFO = 0x1, 19436 WL_RMC_RPT_XTLV_CANDIDATE_INFO = 0x2 19437 }; 19438 19439 /* WL_RMC_RPT_XTLV_BSS_INFO */ 19440 typedef struct { 19441 int16 rssi; /* current BSS RSSI */ 19442 uint8 reason; /* reason code for last full scan */ 19443 uint8 status; /* last status code for not roaming */ 19444 uint32 fullscan_count; /* number of full scans performed on current BSS */ 19445 uint32 time_full_scan; /* delta time (in ms) between cur time and full scan timestamp */ 19446 } rmc_bss_info_v1_t; 19447 19448 /* WL_RMC_RPT_XTLV_CANDIDATE_INFO */ 19449 typedef struct { 19450 int16 rssi; /* last seen rssi */ 19451 uint16 ctl_channel; /* channel */ 19452 uint32 time_last_seen; /* delta time (in ms) between cur time and last seen timestamp */ 19453 uint16 bss_load; /* BSS load */ 19454 uint8 bssid [6]; /* padding to get 32 bits alignment */ 19455 } rmc_candidate_info_v1_t; 19456 19457 #define WL_FILTER_IE_VERSION 1 /* deprecated */ 19458 enum wl_filter_ie_options { 19459 WL_FILTER_IE_CLEAR = 0, /* allow element id in packet.For suboption */ 19460 WL_FILTER_IE_SET = 1, /* filter element id in packet.For suboption */ 19461 WL_FILTER_IE_LIST = 2, /* list element ID's.Set as option */ 19462 WL_FILTER_IE_CLEAR_ALL = 3, /* clear all the element.Set as option */ 19463 WL_FILTER_IE_CHECK_SUB_OPTION = 4 /* check for suboptions.Set only as option */ 19464 }; 19465 19466 typedef struct wl_filter_ie_tlv { 19467 uint16 id; /* elelment id [ + ext id ] */ 19468 uint16 len; /* sub option length + pattern length */ 19469 uint8 data[]; /* sub option + pattern matching(OUI,type,sub-type) */ 19470 } wl_filter_ie_tlv_t; 19471 19472 #define WL_FILTER_IE_VERSION_1 1 /* the latest version */ 19473 typedef struct wl_filter_ie_iov_v1 { 19474 uint16 version; /* Structure version */ 19475 uint16 len; /* Total length of the structure */ 19476 uint16 fixed_length; /* Total length of fixed fields */ 19477 uint8 option; /* Filter action - check for suboption */ 19478 uint8 pad[1]; /* Align to 4 bytes */ 19479 uint32 pktflag; /* frame type - FC_XXXX */ 19480 uint8 tlvs[]; /* variable data (zero in for list ,clearall) */ 19481 } wl_filter_ie_iov_v1_t; 19482 19483 /* Event aggregation config */ 19484 #define EVENT_AGGR_CFG_VERSION 1 19485 #define EVENT_AGGR_DISABLED 0x0 19486 #define EVENT_AGGR_ENABLED 0x1 19487 19488 #define EVENT_AGGR_BUFSIZE_MAX 1512 19489 #define EVENT_AGGR_BUFSIZE_MIN 512 19490 19491 #define EVENT_AGGR_FLUSH_TIMEOUT_DEFAULT 100 19492 #define EVENT_AGGR_FLUSH_TIMEOUT_MAX 2000 19493 #define EVENT_AGGR_NUM_EVENTS_FLUSH 5 19494 typedef struct event_aggr_config { 19495 uint16 version; 19496 uint16 len; 19497 uint16 flags; /* bit 0 to enable/disable the feature */ 19498 uint16 bufsize; /* Aggregate buffer size */ 19499 uint16 flush_timeout; /* Timeout for event flush */ 19500 uint16 num_events_flush; /* Number of events aggregated before flush */ 19501 } event_aggr_config_t; 19502 19503 #ifndef WL_TDMTX_TYPEDEF_HAS_ALIAS 19504 typedef tdmtx_cnt_v1_t tdmtx_cnt_t; 19505 typedef tdmtx_cnt_shm_v1_t tdmtx_cnt_shm_t; 19506 typedef wl_tdmtx_ecounters_v1_t wl_tdmtx_ecounters_t; 19507 #define WL_CNT_TDMTX_STRUCT_SZ (sizeof(tdmtx_cnt_t)) 19508 #define WL_CNT_TDMTX_SHM_SZ (sizeof(tdmtx_cnt_shm_t)) 19509 #endif // endif 19510 19511 /** chanctxt related statistics */ 19512 #define CHANCTXT_STATS_VERSION_1 1 19513 #define CHANCTXT_STATS_CURRENT_VERSION CHANCTXT_STATS_VERSION_1 19514 typedef struct wlc_chanctxt_stats { 19515 uint32 excursionq_end_miss; 19516 uint32 activeq_end_miss; 19517 uint32 no_chanctxt_count; 19518 uint32 txqueue_end_incomplete; 19519 uint32 txqueue_start_incomplete; 19520 } wlc_chanctxt_stats_core_t; 19521 19522 typedef struct chanctxt_stats { 19523 uint16 version; 19524 uint16 length; 19525 wlc_chanctxt_stats_core_t corestats[MAX_NUM_D11CORES]; 19526 } wlc_chanctxt_stats_t; 19527 19528 typedef struct wl_txdc_ioc { 19529 uint8 ver; 19530 uint8 id; /* ID of the sub-command */ 19531 uint16 len; /* total length of all data[] */ 19532 uint8 data[]; /* var len payload */ 19533 } wl_txdc_ioc_t; 19534 19535 /* 19536 * iovar subcommand ids 19537 */ 19538 enum { 19539 IOV_TXDC_ENB = 1, 19540 IOV_TXDC_MODE = 2, 19541 IOV_TXDC_DUMP = 3, 19542 IOV_TXDC_LAST 19543 }; 19544 19545 /* WL_NAN_XTLV_SLOT_STATS */ 19546 /* WL_NAN_EVENT_SLOT_START, WL_NAN_EVENT_SLOT_END */ 19547 typedef struct nan_slot_event_data { 19548 uint32 cur_slot_idx; /* current idx in channel schedule */ 19549 uint32 fw_time; /* target current time in microseconds */ 19550 uint32 band; /* current band (2G/5G) for which the event is received */ 19551 } nan_slot_event_data_t; 19552 19553 #ifndef BCMUTILS_ERR_CODES 19554 19555 /* SAE (Simultaneous Authentication of Equals) error codes. 19556 * These error codes are local. 19557 */ 19558 19559 /* SAE status codes are reserved from -3072 to -4095 (1K) */ 19560 19561 enum wl_sae_status { 19562 WL_SAE_E_AUTH_FAILURE = -3072, 19563 /* Discard silently */ 19564 WL_SAE_E_AUTH_DISCARD = -3073, 19565 /* Authentication in progress */ 19566 WL_SAE_E_AUTH_CONTINUE = -3074, 19567 /* Invalid scalar/elt */ 19568 WL_SAE_E_AUTH_COMMIT_INVALID = -3075, 19569 /* Invalid confirm token */ 19570 WL_SAE_E_AUTH_CONFIRM_INVALID = -3076, 19571 /* Peer scalar validation failure */ 19572 WL_SAE_E_CRYPTO_SCALAR_VALIDATION = -3077, 19573 /* Peer element prime validation failure */ 19574 WL_SAE_E_CRYPTO_ELE_PRIME_VALIDATION = -3078, 19575 /* Peer element is not on the curve */ 19576 WL_SAE_E_CRYPTO_ELE_NOT_ON_CURVE = -3079, 19577 /* Generic EC error (eliptic curve related) */ 19578 WL_SAE_E_CRYPTO_EC_ERROR = -3080, 19579 /* Both local and peer mac addrs are same */ 19580 WL_SAE_E_CRYPTO_EQUAL_MACADDRS = -3081, 19581 /* Loop exceeded in deriving the scalar */ 19582 WL_SAE_E_CRYPTO_SCALAR_ITER_EXCEEDED = -3082, 19583 /* ECC group is unsupported */ 19584 WL_SAE_E_CRYPTO_UNSUPPORTED_GROUP = -3083, 19585 /* Exceeded the hunting-and-pecking counter */ 19586 WL_SAE_E_CRYPTO_PWE_COUNTER_EXCEEDED = -3084, 19587 /* SAE crypto component is not initialized */ 19588 WL_SAE_E_CRYPTO_NOT_INITED = -3085, 19589 /* bn_get has failed */ 19590 WL_SAE_E_CRYPTO_BN_GET_ERROR = -3086, 19591 /* bn_set has failed */ 19592 WL_SAE_E_CRYPTO_BN_SET_ERROR = -3087, 19593 /* PMK is not computed yet */ 19594 WL_SAE_E_CRYPTO_PMK_UNAVAILABLE = -3088, 19595 /* Peer confirm did not match */ 19596 WL_SAE_E_CRYPTO_CONFIRM_MISMATCH = -3089, 19597 /* Element K is at infinity no the curve */ 19598 WL_SAE_E_CRYPTO_KEY_AT_INFINITY = -3090, 19599 /* SAE Crypto private data magic number mismatch */ 19600 WL_SAE_E_CRYPTO_PRIV_MAGIC_MISMATCH = -3091 19601 }; 19602 19603 /* PMK manager block. Event codes from -5120 to -6143 */ 19604 19605 /* PSK hashing event codes */ 19606 typedef enum wlc_pmk_psk_hash_status { 19607 WL_PMK_E_PSK_HASH_FAILED = -5120, 19608 WL_PMK_E_PSK_HASH_DONE = -5121, 19609 WL_PMK_E_PSK_HASH_RUNNING = -5122, 19610 WL_PMK_E_PSK_INVALID = -5123, 19611 WL_PMK_E_PSK_NOMEM = -5124 19612 } wlc_pmk_psk_hash_status_t; 19613 19614 #endif /* BCMUTILS_ERR_CODES */ 19615 19616 /* Block Channel */ 19617 #define WL_BLOCK_CHANNEL_VER_1 1u 19618 19619 typedef struct wl_block_ch_v1 { 19620 uint16 version; 19621 uint16 len; 19622 uint32 band; /* Band select */ 19623 uint8 channel_num; /* The number of block channels in the selected band */ 19624 uint8 padding[3]; 19625 uint8 channel[]; /* Channel to block, Variable Length */ 19626 } wl_block_ch_v1_t; 19627 19628 typedef struct dma_wl_addr_region { 19629 uint32 addr_low; 19630 uint32 addr_high; 19631 } dma_wl_addr_region_t; 19632 19633 #define WL_ROAMSTATS_IOV_VERSION 1 19634 19635 #define MAX_PREV_ROAM_EVENTS 16u 19636 19637 #define ROAMSTATS_UNKNOWN_CNT 0xFFFFu 19638 19639 /* roaming statistics counter structures */ 19640 typedef struct wlc_assoc_roamstats_event_msg_v1 { 19641 uint32 event_type; /* Message (see below) */ 19642 uint32 status; /* Status code (see below) */ 19643 uint32 reason; /* Reason code (if applicable) */ 19644 uint32 timestamp; /* Timestamp of event */ 19645 } wlc_assoc_roamstats_event_msg_v1_t; 19646 19647 enum wl_roamstats_cmd_id { 19648 WL_ROAMSTATS_XTLV_CMD_VER = 0, 19649 WL_ROAMSTATS_XTLV_CMD_RESET = 1, 19650 WL_ROAMSTATS_XTLV_CMD_STATUS = 2, 19651 WL_ROAMSTATS_XTLV_CMD_LAST /* Keep this at the end */ 19652 }; 19653 19654 enum wl_roamstats_xtlv_id { 19655 WL_ROAMSTATS_XTLV_VER = 0x0, 19656 WL_ROAMSTATS_XTLV_COUNTER_INFO = 0x1, 19657 WL_ROAMSTATS_XTLV_PREV_ROAM_EVENTS = 0x2, 19658 WL_ROAMSTATS_XTLV_REASON_INFO = 0x3 19659 }; 19660 19661 /* WL_ROAMSTATS_XTLV_COUNTER_INFO */ 19662 typedef struct { 19663 uint32 initial_assoc_time; 19664 uint32 prev_roam_time; 19665 uint32 host_access_time; 19666 uint16 roam_success_cnt; 19667 uint16 roam_fail_cnt; 19668 uint16 roam_attempt_cnt; 19669 uint16 max_roam_target_cnt; 19670 uint16 min_roam_target_cnt; 19671 uint16 max_cached_ch_cnt; 19672 uint16 min_cached_ch_cnt; 19673 uint16 partial_roam_scan_cnt; 19674 uint16 full_roam_scan_cnt; 19675 } roamstats_counter_info_v1_t; 19676 19677 /* WL_ROAMSTATS_XTLV_PREV_ROAM_EVENTS */ 19678 typedef struct { 19679 uint16 max; 19680 uint16 pos; 19681 wlc_assoc_roamstats_event_msg_v1_t roam_event[]; 19682 } roamstats_prev_roam_events_v1_t; 19683 19684 /* WL_ROAMSTATS_XTLV_REASON_INFO */ 19685 typedef struct { 19686 uint16 max; 19687 uint16 reason_cnt[]; 19688 } roamstats_reason_info_v1_t; 19689 19690 #ifdef HEALTH_CHECK_WLIOCTL 19691 /* Health check status format: 19692 * reporting status size = uint32 19693 * 8 LSB bits are reserved for: WARN (0), ERROR (1), and other levels 19694 * MSB 24 bits are reserved for client to fill in its specific status 19695 */ 19696 #define HEALTH_CHECK_STATUS_OK 0 19697 /* Bit positions. */ 19698 #define HEALTH_CHECK_STATUS_WARN 0x1 19699 #define HEALTH_CHECK_STATUS_ERROR 0x2 19700 #define HEALTH_CHECK_STATUS_TRAP 0x4 19701 #define HEALTH_CHECK_STATUS_NOEVENT 0x8 19702 19703 /* Indication that required information is populated in log buffers */ 19704 #define HEALTH_CHECK_STATUS_INFO_LOG_BUF 0x80 19705 #define HEALTH_CHECK_STATUS_MASK (0xFF) 19706 19707 #define HEALTH_CHECK_STATUS_MSB_SHIFT 8 19708 #endif /* HEALTH_CHECK_WLIOCTL */ 19709 19710 /** receive signal reporting module interface */ 19711 19712 #define WL_RXSIG_IOV_MAJOR_VER (1u) 19713 #define WL_RXSIG_IOV_MINOR_VER (1u) 19714 #define WL_RXSIG_IOV_MAJOR_VER_SHIFT (8u) 19715 #define WL_RXSIG_IOV_VERSION \ 19716 ((WL_RXSIG_IOV_MAJOR_VER << WL_RXSIG_IOV_MAJOR_VER_SHIFT) | WL_RXSIG_IOV_MINOR_VER) 19717 #define WL_RXSIG_IOV_GET_MAJOR(x) (x >> WL_RXSIG_IOV_MAJOR_VER_SHIFT) 19718 #define WL_RXSIG_IOV_GET_MINOR(x) (x & 0xFF) 19719 19720 enum wl_rxsig_cmd_rssi_mode { 19721 WL_RXSIG_MODE_DB = 0x0, 19722 WL_RXSIG_MODE_QDB = 0x1, 19723 WL_RXSIG_MODE_LAST 19724 }; 19725 19726 /* structure defs for 'wl rxsig [cmd]' iovars */ 19727 enum wl_rxsig_iov_v1 { 19728 WL_RXSIG_CMD_RSSI = 0x1, /**< combined rssi moving avg */ 19729 WL_RXSIG_CMD_SNR = 0x2, /**< combined snr moving avg */ 19730 WL_RXSIG_CMD_RSSIANT = 0x3, /**< rssi moving avg per-ant */ 19731 WL_RXSIG_CMD_SNRANT = 0x4, /**< snr moving avg per-snr */ 19732 WL_RXSIG_CMD_SMPLWIN = 0x5, /**< config for sampling window size */ 19733 WL_RXSIG_CMD_SMPLGRP = 0x7, /**< config for grouping of pkt type */ 19734 WL_RXSIG_CMD_STA_MA = 0x8, 19735 WL_RXSIG_CMD_MAMODE = 0x9, 19736 WL_RXSIG_CMD_MADIV = 0xa, 19737 WL_RXSIG_CMD_DUMP = 0xb, 19738 WL_RXSIG_CMD_DUMPWIN = 0xc, 19739 WL_RXSIG_CMD_TOTAL 19740 }; 19741 19742 struct wl_rxsig_cfg_v1 { 19743 uint16 version; 19744 chanspec_t chan; /**< chanspec info for querying stats */ 19745 uint8 pmac[ETHER_ADDR_LEN]; /**< peer(link) mac address */ 19746 }; 19747 19748 struct wl_rxsig_iov_rssi_v1 { 19749 int8 rssi; 19750 uint8 rssi_qdb; 19751 uint8 pad[2]; 19752 }; 19753 19754 struct wl_rxsig_iov_snr_v1 { 19755 int16 snr; 19756 uint16 pad; 19757 }; 19758 19759 struct wl_rxsig_iov_rssi_ant_v1 { 19760 int8 deci[WL_RSSI_ANT_MAX]; 19761 uint8 frac[WL_RSSI_ANT_MAX]; 19762 uint8 rssi_mode; /**< MODE_DB or MODE_QDB */ 19763 uint8 num_of_ant; /**< total number of ants */ 19764 uint8 pad[2]; /**< padding for 32bit align */ 19765 }; 19766 19767 #ifdef BCM_SDC 19768 19769 #define SDC_TRIGGER_CONFIG_VER_1 1 19770 typedef struct { 19771 uint16 version; 19772 uint16 type; 19773 uint8 activate; 19774 uint8 pad; 19775 } sdc_trigger_cfg_t; 19776 19777 typedef enum sdc_trigger_types { 19778 SDC_TYPE_STA_ONBOARD_DEBUG = 1, 19779 SDC_TYPE_SCAN_DEBUG = 2, 19780 #ifdef SDC_TEST 19781 /* 19782 * This is for test purpose only. Don't assign specific value. 19783 * Keep at the end 19784 */ 19785 SDC_TYPE_TEST1, 19786 SDC_TYPE_TEST2, 19787 SDC_TYPE_TEST3, 19788 #endif /* SDC_TEST */ 19789 SDC_TYPE_MAX_TRIGGER 19790 } sdc_trigger_types_t; 19791 19792 /* *** SDC_TYPE_STA_ONBOARD_DEBUG specific ******* */ 19793 19794 /* tlv IDs uniquely identifies tx and rx stats component */ 19795 enum wl_slice_hist_stats_xtlv_id { 19796 WL_STATE_HIST_TX_TOSS_REASONS = 0x1, 19797 WL_STATE_HIST_RX_TOSS_REASONS = 0x2 19798 }; 19799 19800 #ifndef WLC_HIST_TOSS_LEN 19801 #define WLC_HIST_TOSS_LEN (8u) 19802 #endif // endif 19803 #define WL_HIST_COMPACT_TOSS_STATS_TX_VER_1 (1u) 19804 #define WL_HIST_COMPACT_TOSS_STATS_RX_VER_1 (1u) 19805 19806 /* Format of running toss reasons with seq 19807 * [see HIST_TOSS_xxxx macros] 19808 * bits [7..0] : 8 bits : toss sts. 19809 * [11..8] : cfgidx 19810 * [15..12]: ac 19811 * [31..16]: seq 19812 */ 19813 #define HIST_TOSS_STS_POS (0u) 19814 #define HIST_TOSS_STS_MASK (0x000000ffu) 19815 #define HIST_TOSS_CFGIDX_POS (8u) 19816 #define HIST_TOSS_CFGIDX_MASK (0x00000f00u) 19817 #define HIST_TOSS_AC_POS (12u) 19818 #define HIST_TOSS_AC_MASK (0x0000f000u) 19819 #define HIST_TOSS_SEQ_POS (16u) 19820 #define HIST_TOSS_SEQ_MASK (0xffff0000u) 19821 19822 /* Format of toss reasons with count 19823 * bits [15..0] : 16 bits : toss reason 19824 * bits [31..16]: 16 bits : count 19825 */ 19826 #define HIST_TOSS_RC_REASON_POS (0u) 19827 #define HIST_TOSS_RC_REASON_MASK (0xffffu) 19828 #define HIST_TOSS_RC_COUNT_POS (16u) 19829 #define HIST_TOSS_RC_COUNT_MASK (0xffff0000u) 19830 19831 typedef struct { 19832 uint16 version; 19833 uint8 hist_toss_type; /* from wl_slice_hist_XX_stats_xtlv_id */ 19834 uint8 hist_toss_num; /* number of elements in hist_toss_xxx */ 19835 uint32 hist_toss_cur_idx; /* latest data is in this index */ 19836 uint32 hist_toss_reasons[WLC_HIST_TOSS_LEN]; /* last 8 reasons along with seq, etc as 19837 * per HIST_TOSS_xxx format 19838 */ 19839 uint32 hist_toss_counts[WLC_HIST_TOSS_LEN]; /* toss counts corr to reasons */ 19840 } wl_hist_compact_toss_stats_v1_t; 19841 19842 #define WL_HIST_COMPACT_TOSS_STATS_TX_VER_2 (2u) 19843 #define WL_HIST_COMPACT_TOSS_STATS_RX_VER_2 (2u) 19844 19845 typedef struct { 19846 uint16 version; 19847 uint8 htr_type; /* from wl_slice_hist_XX_stats_xtlv_id */ 19848 uint8 htr_num; /* number of elements in htr_running or htr_rc */ 19849 uint16 htr_rnidx; /* htr_running[rnidx-1] has latest data */ 19850 uint16 htr_rcidx; /* htr_rc[rcidx-1] has latest data */ 19851 uint32 htr_running[WLC_HIST_TOSS_LEN]; /* last 8 reasons along with seq, etc as 19852 * per WLC_SDC_COMPACT_TOSS_REASON() format 19853 */ 19854 uint32 htr_rn_ts[WLC_HIST_TOSS_LEN]; /* time stamps corr to htr_running data */ 19855 uint32 htr_rc[WLC_HIST_TOSS_LEN]; /* last 8 toss reasons and counts in 19856 * WLC_SDC_COMPACT_TOSS_RC() format 19857 */ 19858 uint32 htr_rc_ts[WLC_HIST_TOSS_LEN]; /* time stamps corr to htr_rc */ 19859 } wl_hist_compact_toss_stats_v2_t; 19860 19861 /* ***END of SDC_TYPE_STA_ONBOARD_DEBUG specific ******* */ 19862 19863 #endif /* BCM_SDC */ 19864 19865 typedef struct wl_avs_info_v1 { 19866 uint16 version; /* Structure version */ 19867 uint16 equ_version; /* Equation Version */ 19868 uint32 RO; /* RO in OTP */ 19869 uint32 equ_csr; /* Equated CSR */ 19870 uint32 read_csr; /* Read Back CSR */ 19871 uint32 aging; /* aging setting in nvram */ 19872 } wl_avs_info_v1_t; 19873 19874 #define WL_AVS_INFO_VER_1 1 19875 19876 /* bitmap for clm_flags iovar */ 19877 #define WL_CLM_TXBF 0x01 /**< Flag for Tx beam forming */ 19878 #define WL_CLM_RED_EU 0x02 /* Flag for EU RED */ 19879 #define WL_CLM_EDCRS_EU 0x04 /**< Use EU post-2015 energy detect */ 19880 #define WL_CLM_DFS_TPC 0x08 /**< Flag for DFS TPC */ 19881 #define WL_CLM_RADAR_TYPE_EU 0x10 /**< Flag for EU */ 19882 #define WL_CLM_DFS_FCC WL_CLM_DFS_TPC /**< Flag for DFS FCC */ 19883 #define WL_CLM_DFS_EU (WL_CLM_DFS_TPC | WL_CLM_RADAR_TYPE_EU) /**< Flag for DFS EU */ 19884 19885 /* SC (scan core) command IDs */ 19886 enum wl_sc_cmd { 19887 WL_SC_CMD_DBG = 0, 19888 WL_SC_CMD_CNX = 1, 19889 WL_SC_CMD_CAP = 2, 19890 WL_SC_CMD_CONFIG = 3, 19891 WL_SC_CMD_LAST 19892 }; 19893 19894 typedef struct wl_ext_auth_evt { 19895 wlc_ssid_t ssid; 19896 struct ether_addr bssid; 19897 unsigned int key_mgmt_suite; 19898 int status; 19899 } wl_ext_auth_evt_t; 19900 19901 /* WBUS sub-command IDs for unit test */ 19902 #define WL_WBUS_INA_SLOT_START 0x01u /**< Inactive slot start sub command ID. */ 19903 #define WL_WBUS_INA_SLOT_STOP 0x02u /**< Inactive slot stop sub command ID. */ 19904 19905 /* WBUS (WiFi BT uniform scheduler) command IDs */ 19906 enum wl_wbus_cmd { 19907 WL_WBUS_CMD_VER = 0, 19908 WL_WBUS_CMD_STATS = 1, 19909 WL_WBUS_CMD_UNIT_TEST = 2, 19910 WL_WBUS_CMD_BT_TEST = 3, 19911 WL_WBUS_CMD_CAP = 4, 19912 WL_WBUS_CMD_LAST 19913 }; 19914 19915 #define WBUS_BT_SCHED_TEST_PARAMS_VER_1 1 19916 19917 typedef struct wbus_bt_sched_test_params_v1 { 19918 uint16 version; 19919 uint16 pad; 19920 uint32 flags; 19921 uint32 action; 19922 uint32 duration; 19923 uint32 interval; 19924 } wbus_bt_sched_test_params_v1_t; 19925 19926 #define WBUS_BT_SCHED_ADD 0u 19927 #define WBUS_BT_SCHED_REMOVE 1u 19928 #define WBUS_BT_SCHED_INVALID 0xFFu 19929 19930 #define KEY_UPDATE_INFO_VER_V1 1 19931 typedef struct key_update_info_v1 19932 { 19933 uint16 ver; 19934 uint8 pad; 19935 uint8 flags; 19936 uint32 timestamp; 19937 uint32 algo; 19938 uint32 key_flags; 19939 struct ether_addr ea; 19940 struct ether_addr sa; 19941 } key_update_info_v1_t; 19942 19943 /* Key update flag bit field */ 19944 #define KEY_UPD_FLAG_ADD_KEY 0x1 /* 0 - Removal, 1 - Add key */ 19945 19946 #ifdef WLLLW 19947 /* LLW Session */ 19948 #define LLW_VERSION 1 19949 #define LLW_STATS_VERSION 1 19950 19951 /* LLW roles */ 19952 #define LLW_ROLE_SCHEDULER 0 19953 #define LLW_ROLE_CLIENT 1 19954 19955 /* LLW modes */ 19956 #define LLW_MODE_GAPS 0 19957 #define LLW_MODE_BACK_TO_BACK 1 19958 19959 /* LLW session max values */ 19960 #define LLW_MAX_SESSION_ID 10 19961 #define LLW_MAX_FLOW_ID 40 19962 #define LLW_MAX_CLIENT_NUM 15 19963 #define LLW_MAX_GAPS_PERIOD 20 19964 #define LLW_MAX_GAPS_VAR 3 19965 #define LLW_MAX_RETX_CNT 10 19966 #define LLW_MAX_AIFSN EDCF_AIFSN_MAX 19967 #define LLW_MAX_CWMIN EDCF_ECW_MAX 19968 #define LLW_MAX_CWMAX EDCF_ECW_MAX 19969 #define LLW_MAX_PER_NUMERATOR 100 19970 #define LLW_MAX_PER_DENOM 10000 19971 #define LLW_MAX_CLIENT_ID 15 19972 #define LLW_MAX_PKT_SIZE 1500 19973 #define LLW_MAX_PKT_NUM 10 19974 #define LLW_MAX_MCS 9 19975 #define LLW_MAX_NUM_STREAMS 8 19976 #define LLW_MAX_IBS 32 19977 19978 /* Per LLW session config */ 19979 /* WL_LLW_CMD_SESSION_CREATE, WL_LLW_CMD_SESSION_UPDATE */ 19980 typedef struct wl_llw_session_cfg { 19981 uint8 session_id; 19982 uint8 role; 19983 uint8 mode; 19984 uint8 client_id; 19985 uint8 gaps_period; 19986 uint8 gaps_var; 19987 uint8 aifsn; 19988 uint8 ecwmin; /* exponent value for minimum contention window */ 19989 uint8 ecwmax; /* exponent value for maximum contention window */ 19990 uint8 mcs; 19991 uint8 num_streams; 19992 uint8 ibs; /* interblock spacing in usecs, for spacing between Transaction Blocks */ 19993 uint16 ul_pkt_size; 19994 uint16 dl_pkt_size; 19995 uint16 per_denom; /* denominator for target PER */ 19996 uint8 per_numerator; /* this value divided by per_denom gives the target PER */ 19997 uint8 dl_pkt_num; 19998 uint8 client_num; 19999 uint8 retx_cnt; 20000 uint8 pwr_save; 20001 uint8 auto_ba; /* automatic RX/TX BA session setup (no negotiation needed) */ 20002 uint8 if_index; 20003 uint8 padding[3]; 20004 struct ether_addr multicast_addr; 20005 struct ether_addr scheduler_addr; 20006 } wl_llw_session_cfg_t; 20007 20008 /* WL_LLW_CMD_SESSION_DELETE, WL_LLW_CMD_SESSION_ENABLE, WL_LLW_CMD_SESSION_DISABLE, */ 20009 /* WL_LLW_CMD_SESSION_GET */ 20010 typedef struct wl_llw_session_cmd { 20011 uint8 session_id; 20012 uint8 padding[3]; 20013 } wl_llw_session_cmd_t; 20014 20015 /* LLW client config */ 20016 /* WL_LLW_CMD_CLIENT_ADD, WL_LLW_CMD_CLIENT_DELETE, WL_LLW_CMD_CLIENT_GET */ 20017 typedef struct wl_llw_client_cfg { 20018 uint8 session_id; 20019 uint8 client_id; 20020 struct ether_addr mac; 20021 } wl_llw_client_cfg_t; 20022 20023 /* Get list of session IDs from FW */ 20024 /* WL_LLW_CMD_SESSION_ID */ 20025 typedef struct llw_session_id_list { 20026 uint8 id_count; /* Number of session IDs */ 20027 uint8 list[]; /* list of session IDs */ 20028 } llw_session_id_list_t; 20029 20030 /* LLW XTLV structures */ 20031 typedef struct wl_llw_iov_cmd { 20032 uint16 version; 20033 uint8 cmd_cnt; 20034 uint8 pad; 20035 uint8 cmds[]; 20036 } wl_llw_iov_cmd_t; 20037 20038 typedef struct wl_llw_iov_sub_cmd { 20039 uint16 type; 20040 uint16 len; 20041 union { 20042 int32 status; /* Processed status - Set by FW */ 20043 uint32 options; /* Command Process Options - Set by Host */ 20044 } u; 20045 uint8 data[]; 20046 } wl_llw_iov_sub_cmd_t; 20047 20048 /* to be used in type field of wl_llw_iov_sub_cmd_t structure while issuing LLW commands */ 20049 typedef enum wl_llw_sub_cmd_xtlv_id { 20050 WL_LLW_CMD_SESSION_ID, 20051 WL_LLW_CMD_SESSION_CREATE, 20052 WL_LLW_CMD_SESSION_DELETE, 20053 WL_LLW_CMD_SESSION_UPDATE, 20054 WL_LLW_CMD_SESSION_ENABLE, 20055 WL_LLW_CMD_SESSION_DISABLE, 20056 WL_LLW_CMD_SESSION_GET, 20057 WL_LLW_CMD_CLIENT_ADD, 20058 WL_LLW_CMD_CLIENT_DELETE, 20059 WL_LLW_CMD_CLIENT_GET, 20060 WL_LLW_CMD_FLOW_ADD, 20061 WL_LLW_CMD_FLOW_DELETE, 20062 WL_LLW_CMD_FLOW_GET, 20063 WL_LLW_CMD_STATS 20064 } wl_llw_sub_cmd_xtlv_id_t; 20065 20066 /* LLW stats */ 20067 typedef enum wl_llw_xtlv { 20068 WL_LLW_XTLV_STATS 20069 } wl_llw_xtlv_t; 20070 20071 typedef struct wl_llw_stats { 20072 uint32 txpackets; 20073 uint32 txbytes; 20074 uint32 txrts; 20075 uint32 txnocts; 20076 uint32 txnoack; 20077 uint32 txfail; 20078 uint32 txretry; 20079 uint32 txdropped; 20080 uint32 tx_avg_q_time; 20081 uint32 tx_min_q_time; 20082 uint32 tx_max_q_time; 20083 uint32 tx_avg_rem_lifetime; 20084 uint32 tx_min_rem_lifetime; 20085 uint32 tx_max_rem_lifetime; 20086 uint32 rxpackets; 20087 uint32 rxbytes; 20088 uint32 rxfail; 20089 uint32 rxretry; 20090 uint32 txschedfrm; 20091 uint32 retxschedfrm; 20092 } wl_llw_stats_t; 20093 20094 typedef struct wl_llw_stats_hdr { 20095 uint16 version; 20096 uint16 stats_cnt; 20097 uint32 tot_len; 20098 uint8 stat_xtlvs[]; 20099 } wl_llw_stats_hdr_t; 20100 20101 /* WL_LLW_XTLV_STATS */ 20102 typedef struct wl_llw_stats_xtlv { 20103 uint16 type; 20104 uint16 len; 20105 uint8 stats[]; 20106 } wl_llw_stats_xtlv_t; 20107 20108 /* WL_LLW_CMD_STATS */ 20109 typedef struct wl_llw_stats_cmd { 20110 uint8 session_id; 20111 uint8 client_id; 20112 uint16 padding; 20113 } wl_llw_stats_cmd_t; 20114 20115 /* LLW flow ring ID config */ 20116 /* WL_LLW_CMD_FLOW_ADD, WL_LLW_CMD_FLOW_DELETE, WL_LLW_CMD_FLOW_GET */ 20117 typedef struct wl_llw_flow_cfg { 20118 uint8 session_id; 20119 uint8 flow_id; 20120 uint16 padding; 20121 } wl_llw_flow_cfg_t; 20122 #endif /* End of LLW Session */ 20123 20124 #define WL_OMI_CONFIG_VERSION_1 1u 20125 20126 /* values for valid_bm */ 20127 #define OMI_CONFIG_VALID_BMP_RXNSS 0x0001u 20128 #define OMI_CONFIG_VALID_BMP_BW 0x0002u 20129 #define OMI_CONFIG_VALID_BMP_ULMU_DISABLE 0x0004u 20130 #define OMI_CONFIG_VALID_BMP_TXNSTS 0x0008u 20131 #define OMI_CONFIG_VALID_BMP_ERSU_DISABLE 0x0010u 20132 #define OMI_CONFIG_VALID_BMP_DLMU_RSD_RCM 0x0020u 20133 #define OMI_CONFIG_VALID_BMP_ULMU_DATA_DISABLE 0x0040u 20134 #define OMI_CONFIG_VALID_BMP_ALL 0x0FFFu 20135 20136 #define OMI_CONFIG_BW_MAX 3u 20137 20138 typedef struct wl_omi_config { 20139 uint16 valid_bm; /* validity bitmask for each config */ 20140 uint8 rxnss; 20141 uint8 bw; 20142 uint8 ulmu_disable; 20143 uint8 txnsts; 20144 uint8 ersu_disable; 20145 uint8 dlmu_resound_rec; 20146 uint8 ulmu_data_disable; 20147 uint8 pad[3]; 20148 } wl_omi_config_t; 20149 20150 typedef struct wl_omi_req { 20151 uint16 version; 20152 uint16 len; 20153 wl_omi_config_t config; 20154 } wl_omi_req_v1_t; 20155 20156 /* Bits for ULMU disable reason */ 20157 #define OMI_ULMU_DISABLED_HOST 0x01u /* Host has disabled through he omi */ 20158 #define OMI_ULMU_DISABLED_NAN 0x04u /* Disabled due to NAN enabled */ 20159 #define OMI_ULMU_DISABLED_BTCOEX 0x08u /* Disabled while in BT Coex activity */ 20160 #define OMI_ULMU_DISABLED_LTECOEX 0x10u /* Disabled due to LTE Coex activity */ 20161 #define OMI_ULMU_DISABLED_NON11AX_CONN 0x20u /* Disabled due to not associated to 11ax AP */ 20162 #define OMI_ULMU_DISABLED_THROTTLE_ENABLE 0x40u /* Disabled due to throttle timer running */ 20163 #define OMI_ULMU_DISABLED_TXCHAIN_DOWNGRADE 0x80u /* Disabled due to Txchain downgrade */ 20164 #define OMI_ULMU_DISABLED_TX_DUTY_CYCLE 0x100u /* Disabled due to tx duty cycle */ 20165 20166 /* Bits for DLMU Resound Recommendation reason */ 20167 #define OMI_DLMU_RSD_RCM_HOST (0x1u << 0u) /* Host directly set the bit */ 20168 #define OMI_DLMU_RSD_RCM_MPF (0x1u << 1u) /* Set on MPF state change */ 20169 20170 #define WL_OMI_STATUS_VERSION_1 1u 20171 typedef struct wl_omi_status { 20172 uint16 version; 20173 uint16 len; 20174 wl_omi_config_t omi_pending; /* OMI requests pending */ 20175 uint16 omi_data; /* current OM Control field for completed OMI requests */ 20176 uint16 ulmu_disable_reason; /* Bits representing UL OFDMA disable reasons */ 20177 uint32 ulmu_disable_duration; /* Duration (ms) for which UL OFDMA is disabled */ 20178 } wl_omi_status_v1_t; 20179 20180 #define WL_OMI_STATUS_VERSION_2 2u 20181 typedef struct wl_omi_status_v2 { 20182 uint16 version; 20183 uint16 len; 20184 wl_omi_config_t omi_pending; /* OMI requests pending */ 20185 uint16 omi_data; /* Current OM Control field for completed OMI requests */ 20186 uint16 ulmu_disable_reason; /* Bits representing UL OFDMA disable reasons */ 20187 uint32 ulmu_disable_duration; /* Duration (ms) for which UL OFDMA is disabled */ 20188 uint32 dlmu_rsd_rcm_duration; /* Dur (ms) for which ResoundRecommentation is set */ 20189 uint16 dlmu_rsd_rcm_mpf_state; /* The MPF state value */ 20190 uint16 dlmu_rsd_rcm_reason; /* DL MU-MIMO recommendation reasons bitmap */ 20191 } wl_omi_status_v2_t; 20192 20193 #define WL_ULMU_DISABLE_STATS_VERSION_1 1u 20194 typedef struct wl_ulmu_disable_stats { 20195 uint16 version; 20196 uint16 len; 20197 uint32 ulmu_disable_ts; /* UL OFDMA disabled timestamp (ms) */ 20198 uint16 ulmu_disable_reason; /* Bits representing UL OFDMA disable reasons */ 20199 uint16 ulmu_disable_count; /* UL MU disable count during current infra association */ 20200 uint32 last_trig_rx_ts; /* Last trigger frame received timestamp (ms) */ 20201 uint16 trig_rx_count; /* No of trigger frames received after last UL OFDMA disable */ 20202 uint16 max_latency; /* Max latency by AP to re-act for UL OFDMA disable request (ms) */ 20203 uint16 min_latency; /* Min latency by AP to re-act for UL OFDMA disable request (ms) */ 20204 uint16 avg_latency; /* Avg latency by AP to re-act for UL OFDMA disable request (ms) */ 20205 } wl_ulmu_disable_stats_v1_t; 20206 20207 /* sub-xtlv IDs within WL_STATS_XTLV_WL_SLICE_TX_HISTOGRAMS */ 20208 enum wl_tx_histogram_id { 20209 WL_TX_HIST_TXQ_ID = 1, 20210 WL_TX_HIST_LOW_TXQ_ID = 2, 20211 WL_TX_HIST_SCBQ_ID = 3, 20212 WL_TX_HIST_EXCUR_TXQ_ID = 4, 20213 WL_TX_HIST_EXCUR_LOW_TXQ_ID = 5 20214 }; 20215 20216 /* common tx histogram structure */ 20217 typedef struct wl_tx_hist { 20218 uint16 hist_bmap; /* bit N indicates histogram follows for priority or fifo N */ 20219 uint16 hist_count; /* count of histograms in var len array */ 20220 uint32 hist[1]; /* var len array of histograms each prefix by hist length */ 20221 } wl_tx_hist_t; 20222 20223 #define WL_TX_HIST_FIXED_LEN (OFFSETOF(wl_tx_hist_t, hist)) 20224 #define WL_TX_HIST_FULL_LEN(num_hist, max_hist_size) \ 20225 (WL_TX_HIST_FIXED_LEN + (num_hist) * \ 20226 (max_hist_size + 1) * sizeof(uint32)) 20227 20228 /* structure for WL_TX_HIST_TXQ, WL_TX_HIST_EXCUR_TXQ_ID */ 20229 typedef struct wl_tx_hist_txq { 20230 uint32 bsscfg_bmap; /* bitmap of bsscfg indexes associated with this queue */ 20231 wl_tx_hist_t tx_hist; /* tx histograms */ 20232 } wl_tx_hist_txq_t; 20233 20234 #define WL_TX_HIST_TXQ_FIXED_LEN \ 20235 (OFFSETOF(wl_tx_hist_txq_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 20236 #define WL_TX_HIST_TXQ_FULL_LEN(num_hist, max_hist_size) \ 20237 (OFFSETOF(wl_tx_hist_txq_t, tx_hist) + \ 20238 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 20239 20240 /* sub-xtlv IDs within WL_STATS_XTLV_WL_SLICE_TX_HISTOGRAMS */ 20241 enum wl_txq_stop_histogram_id { 20242 WL_TXQ_STOP_HIST_SW = 1, 20243 WL_TXQ_STOP_HIST_HW = 2, 20244 WL_TXQ_STOP_HIST_PKTS_SW = 3, 20245 WL_TXQ_STOP_HIST_PKTS_HW = 4, 20246 WL_TXQ_STOP_HIST_MAX = WL_TXQ_STOP_HIST_PKTS_HW 20247 }; 20248 20249 /* common tx histogram structure */ 20250 typedef struct wl_txq_stop_hist { 20251 wl_tx_hist_t tx_hist; /* tx histograms */ 20252 } wl_txq_stop_hist_t; 20253 20254 #define WL_TXQ_STOP_HIST_FIXED_LEN \ 20255 (OFFSETOF(wl_txq_stop_hist_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 20256 #define WL_TXQ_STOP_HIST_FULL_LEN(num_hist, max_hist_size) \ 20257 (OFFSETOF(wl_txq_stop_hist_t, tx_hist) + \ 20258 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 20259 20260 /* structure for WL_TX_HIST_LOW_TXQ, WL_TX_HIST_EXCUR_LOW_TXQ_ID */ 20261 typedef struct wl_tx_hist_low_txq { 20262 wl_tx_hist_t tx_hist; /* tx histograms */ 20263 } wl_tx_hist_low_txq_t; 20264 20265 #define WL_TX_HIST_LOW_TXQ_FIXED_LEN \ 20266 (OFFSETOF(wl_tx_hist_low_txq_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 20267 #define WL_TX_HIST_LOW_TXQ_FULL_LEN(num_hist, max_hist_size) \ 20268 (OFFSETOF(wl_tx_hist_low_txq_t, tx_hist) + \ 20269 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 20270 20271 /* structure for WL_TX_HIST_SCBQ */ 20272 typedef struct wl_tx_hist_scbq { 20273 struct ether_addr ea; /* ether addr of peer */ 20274 uint16 bsscfg_idx; /* bsscfg index */ 20275 wl_tx_hist_t tx_hist; /* tx histograms */ 20276 } wl_tx_hist_scbq_t; 20277 20278 #define WL_TX_HIST_SCBQ_FIXED_LEN \ 20279 (OFFSETOF(wl_tx_hist_scbq_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 20280 #define WL_TX_HIST_SCBQ_FULL_LEN(num_hist, max_hist_size) \ 20281 (OFFSETOF(wl_tx_hist_scbq_t, tx_hist) + \ 20282 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 20283 20284 /* sub-xtlv IDs within WL_STATS_XTLV_WL_SLICE_TX_QUEUE_DEPTH */ 20285 enum wl_tx_queue_depth_id { 20286 WL_TX_QUEUE_DEPTH_TXQ_ID = 1, 20287 WL_TX_QUEUE_DEPTH_LOW_TXQ_ID = 2, 20288 WL_TX_QUEUE_DEPTH_SCBQ_ID = 3, 20289 WL_TX_QUEUE_DEPTH_EXCUR_TXQ_ID = 4, 20290 WL_TX_QUEUE_DEPTH_EXCUR_LOW_TXQ_ID = 5 20291 }; 20292 20293 /* common tx queue depth structure */ 20294 typedef struct wl_tx_queue_depth { 20295 uint16 queue_depth_bmap; /* bitmap of queue depth in var len array */ 20296 uint16 queue_depth_count; /* count of queue depth in var len array */ 20297 uint16 queue_depth[1]; /* var len array of queue depth */ 20298 } wl_tx_queue_depth_t; 20299 20300 #define WL_TX_QUEUE_DEPTH_FIXED_LEN (OFFSETOF(wl_tx_queue_depth_t, queue_depth)) 20301 #define WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth) \ 20302 (WL_TX_QUEUE_DEPTH_FIXED_LEN + (num_queue_depth) * \ 20303 sizeof(uint16)) 20304 20305 /* structure for WL_TX_QUEUE_DEPTH_TXQ_ID, WL_TX_QUEUE_DEPTH_EXCUR_TXQ_ID */ 20306 typedef struct wl_tx_queue_depth_txq { 20307 uint32 bsscfg_map; /* bitmap of bsscfg indexes associated with this queue */ 20308 wl_tx_queue_depth_t tx_queue_depth; /* queue depth */ 20309 } wl_tx_queue_depth_txq_t; 20310 20311 #define WL_TX_QUEUE_DEPTH_TXQ_FIXED_LEN \ 20312 (OFFSETOF(wl_tx_queue_depth_txq_t, tx_queue_depth) + WL_TX_QUEUE_DEPTH_FIXED_LEN) 20313 #define WL_TX_QUEUE_DEPTH_TXQ_FULL_LEN(num_queue_depth) \ 20314 (OFFSETOF(wl_tx_queue_depth_txq_t, tx_queue_depth) + \ 20315 WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth)) 20316 20317 /* structure for WL_TX_QUEUE_DEPTH_LOW_TXQ_ID, WL_TX_QUEUE_DEPTH_EXCUR_LOW_TXQ_ID */ 20318 typedef struct wl_tx_queue_depth_low_txq { 20319 wl_tx_queue_depth_t tx_queue_depth; /* queue depth */ 20320 } wl_tx_queue_depth_low_txq_t; 20321 20322 #define WL_TX_QUEUE_DEPTH_LOW_TXQ_FIXED_LEN \ 20323 (OFFSETOF(wl_tx_queue_depth_low_txq_t, tx_queue_depth) + WL_TX_QUEUE_DEPTH_FIXED_LEN) 20324 #define WL_TX_QUEUE_DEPTH_LOW_TXQ_FULL_LEN(num_queue_depth) \ 20325 (OFFSETOF(wl_tx_queue_depth_low_txq_t, tx_queue_depth) + \ 20326 WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth)) 20327 20328 /* structure for WL_TX_QUEUE_DEPTH_SCBQ_ID */ 20329 typedef struct wl_tx_queue_depth_scbq { 20330 struct ether_addr ea; /* ether addr of peer */ 20331 uint16 bsscfg_idx; /* bsscfg index */ 20332 wl_tx_queue_depth_t tx_queue_depth; /* queue depth */ 20333 } wl_tx_queue_depth_scbq_t; 20334 20335 #define WL_TX_QUEUE_DEPTH_SCBQ_FIXED_LEN \ 20336 (OFFSETOF(wl_tx_queue_depth_scbq_t, tx_queue_depth) + WL_TX_QUEUE_DEPTH_FIXED_LEN) 20337 #define WL_TX_QUEUE_DEPTH_SCBQ_FULL_LEN(num_queue_depth) \ 20338 (OFFSETOF(wl_tx_queue_depth_scbq_t, tx_queue_depth) + \ 20339 WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth)) 20340 20341 /* sub-xtlv IDs within WL_STATS_XTLV_BUS_PCIE_TX_HISTOGRAMS */ 20342 enum wl_pcie_tx_histogram_id { 20343 WL_PCIE_TX_HIST_ID = 1 20344 }; 20345 20346 /* structure for PCIE_TX_HIST_ID */ 20347 typedef struct wl_pcie_tx_hist { 20348 uint16 ring_id; /* PCIe ring id */ 20349 uint16 pad; /* 4-byte alignment */ 20350 wl_tx_hist_t tx_hist; /* hist_bmap: 20351 * 0x1=tx histogram 20352 * 0x2=tx status pending histogram 20353 */ 20354 } wl_pcie_tx_hist_t; 20355 20356 #define WL_PCIE_TX_HIST_FIXED_LEN \ 20357 (OFFSETOF(wl_pcie_tx_hist_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 20358 #define WL_PCIE_TX_HIST_FULL_LEN(num_hist, max_hist_size) \ 20359 (OFFSETOF(wl_pcie_tx_hist_t, tx_hist) + \ 20360 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 20361 20362 /* sub-xtlv IDs within WL_STATS_XTLV_BUS_PCIE_TX_QUEUE_DEPTH */ 20363 enum wl_pcie_tx_queue_depth_id { 20364 WL_PCIE_TX_QUEUE_DEPTH_ID = 1 20365 }; 20366 20367 /* structure for WL_PCIE_TX_QUEUE_DEPTH_ID */ 20368 typedef struct wl_pcie_tx_queue_depth { 20369 uint16 ring_id; /* PCIe ring id */ 20370 uint16 queue_depth; /* queue depth of ring id */ 20371 uint16 tx_status_pend; /* tx status pending of ring id */ 20372 uint16 pad; /* 4-byte alignment */ 20373 } wl_pcie_tx_queue_depth_t; 20374 20375 #define WL_PCIE_TX_QUEUE_DEPTH_FIXED_LEN sizeof(wl_pcie_tx_queue_depth_t) 20376 20377 #define WL_WSEC_DEL_PMK_VER_V1 1u 20378 /* tlv ids for del pmk */ 20379 #define WL_DEL_PMK_TLV_ID 1u 20380 #define WL_DEL_PMKID_TLV_ID 2u 20381 #define WL_DEL_PEER_ADDR_TLV_ID 3u 20382 typedef struct wl_wsec_del_pmk { 20383 uint16 version; 20384 uint16 length; 20385 uint8 xtlvs[]; 20386 } wl_wsec_del_pmk_t; 20387 #define WL_WSEC_DEL_PMK_FIXED_LEN_V1 OFFSETOF(wl_wsec_del_pmk_t, xtlvs) 20388 20389 #define WLC_RC_ROAM_VER_1 1 20390 20391 typedef struct wlc_rcroam { 20392 uint16 ver; 20393 uint16 len; 20394 uint8 data[]; 20395 } wlc_rcroam_t; 20396 20397 typedef struct wlc_rcroam_info_v1 { 20398 uint16 inactivity_period; /* inactivty monitor period */ 20399 uint16 roam_scan_timeout; 20400 uint16 periodic_roam_scan_timeout; 20401 uint8 roam_trig_step; /* roaming trigger step value */ 20402 } wlc_rcroam_info_v1_t; 20403 20404 #define WLC_RC_ROAM_CUR_VER WLC_RC_ROAM_VER_1 20405 #define RCROAM_HDRLEN 4u 20406 #define MAX_RCSCAN_TIMER 300u 20407 20408 #define WLC_SILENT_ROAM_VER_1 1 20409 /* silent roam information struct */ 20410 typedef struct wlc_sroam_info_v1 { 20411 /* Silent roam Set/Get value */ 20412 uint8 sroam_on; /* sroam on/off */ 20413 int8 sroam_min_rssi; /* minimum rssi threshold to activate the feature */ 20414 uint8 sroam_rssi_range; /* rssi tolerance to determine stationary status */ 20415 uint8 sroam_score_delta; /* roam score delta value to prune candidate ap */ 20416 uint8 sroam_period_time; /* required monitoring period to trigger roaming scan */ 20417 uint8 sroam_band; /* band setting of roaming scan (all, 5g, 2g) */ 20418 uint8 sroam_inact_cnt; /* tx/rx frame count threshold for checking inactivity */ 20419 /* Silent roam monitor value */ 20420 int8 sroam_ref_rssi; /* reference rssi which is picked when monitoring is 20421 * started. it is updated to current rssi when it's 20422 * out from rssi range 20423 */ 20424 uint8 sroam_time_since; /* elapsed time since start monitoring */ 20425 uint8 pad[3]; 20426 uint32 sroam_txfrm_prev; /* save current tx frame counts */ 20427 uint32 sroam_rxfrm_prev; /* save current rx frame counts */ 20428 } wlc_sroam_info_v1_t; 20429 20430 typedef struct wlc_sroam { 20431 uint16 ver; 20432 uint16 len; 20433 uint8 data[]; 20434 } wlc_sroam_t; 20435 20436 #define WLC_SILENT_ROAM_CUR_VER WLC_SILENT_ROAM_VER_1 20437 #define SROAM_HDRLEN 4u 20438 20439 #define DEF_SROAM_OFF 0 20440 #define DEF_SROAM_MIN_RSSI -65 20441 #define DEF_SROAM_RSSI_RANGE 3u 20442 #define DEF_SROAM_SCORE_DELTA 1u 20443 #define DEF_SROAM_PERIOD_TIME 10u 20444 #define DEF_SROAM_INACT_CNT 5u 20445 #define MAX_SROAM_RSSI -70 20446 #define MAX_SROAM_RSSI_RANGE 5u 20447 #define MAX_SROAM_SCORE_DELTA 10u 20448 #define MAX_SROAM_PERIOD_TIME 250u 20449 #define SROAM_BAND_AUTO 3u 20450 20451 /* MACSMPL IOVAR parameters */ 20452 typedef enum wl_macdbg_macsmpl_iovar_id { 20453 WL_MACSMPL_START = 0, 20454 WL_MACSMPL_STOP = 1, 20455 WL_MACSMPL_DUMP = 2, 20456 WL_MACSMPL_STATUS = 3, 20457 WL_MACSMPL_SIZE = 4 20458 } wl_macdbg_macsmpl_iovar_id_t; 20459 20460 /* WL_MACSMPL_STATUS values */ 20461 typedef enum wl_macdbg_macsmpl_status { 20462 WL_MACSMPL_STATUS_IDLE = 0, 20463 WL_MACSMPL_STATUS_ACTIVE = 1, 20464 WL_MACSMPL_STATUS_WAIT_FOR_TRIG = 2, 20465 WL_MACSMPL_STATUS_TRIGGERED = 3 20466 } wl_macdbg_macsmpl_status_t; 20467 20468 /* WL_MACSMPL_START_PARAM subcommand data */ 20469 typedef struct wl_macsmpl_start_param { 20470 uint32 trig_condition; /* trigger condition */ 20471 uint16 gpio_mux; /* MACControl1 GPIOSel field */ 20472 uint8 pad[2]; /* 4-byte struct alignment */ 20473 } wl_macsmpl_param_start_t; 20474 20475 /* MAC SC fragment request data */ 20476 typedef struct wl_macsmpl_frag_req_param { 20477 uint32 offset; /* requested MAC SC fragment offset */ 20478 uint32 size; /* requested MAC SC fragment size, bytes */ 20479 } wl_macsmpl_frag_req_param_t; 20480 20481 /* MAC SC fragment response data */ 20482 typedef struct wl_macsmpl_frag_resp_param { 20483 uint32 offset; /* MAC SC response fragment offset */ 20484 uint32 size; /* MAC SC reponse fragment size, bytes */ 20485 uint8 data[]; /* MAC SC response fragment data, flexible array */ 20486 } wl_macsmpl_frag_resp_param_t; 20487 20488 /* MAC SC status data */ 20489 typedef struct wl_macsmpl_status { 20490 uint32 maccontrol1; /* MACControl1 register value */ 20491 uint32 macsc_flags; /* M_MACSC_FLAGS SHM register value */ 20492 uint16 sc_play_ctrl; /* TXE SampleCollectPlayCtrl register value */ 20493 uint16 sc_cur_ptr; /* TXE SampleCollectCurPtr register value */ 20494 uint16 sc_start_ptr; /* TXE SampleCollectStartPtr register value */ 20495 uint16 sc_stop_ptr; /* TXE SampleCollectStopPtr register value */ 20496 } wl_macsmpl_status_t; 20497 20498 /* WL_MACSMPL parameters data */ 20499 typedef struct wl_macsmpl_param { 20500 wl_macdbg_macsmpl_iovar_id_t subcmd_id; 20501 union { 20502 wl_macsmpl_param_start_t start; 20503 wl_macsmpl_frag_req_param_t frag_req; 20504 } u; 20505 } wl_macsmpl_param_t; 20506 20507 /* High priority P2P */ 20508 #define WL_HP2P_COUNTERS_VER 2u 20509 typedef struct hp2p_counters { 20510 uint16 frames_queued; 20511 uint16 frames_processed; 20512 uint16 frames_exp; 20513 uint16 frames_preempt; 20514 uint16 frames_retried; 20515 uint16 reserved; /* reserved, rsvd2 and rsvd3 are experimental counters */ 20516 uint16 rsvd2; 20517 uint16 rsvd3; 20518 } hp2p_counters_t; 20519 20520 typedef struct hp2p_counters_v2 { 20521 uint32 frames_queued; /* Number of AMPDUs processed */ 20522 uint16 frames_exp; /* Number of Lifetime expiries */ 20523 uint16 edt_retry; /* Exceed due to - retry */ 20524 uint16 mpif_reconf; /* MPIF Reconfigure */ 20525 uint16 exceed_delay; /* Exceed delay threshold */ 20526 uint16 edt_nav_thresh; /* Exceed due to - NAV threshold */ 20527 uint16 edt_dc_def; /* Exceed due to - DC based deferral */ 20528 uint16 edt_tx_fifo_full; /* Exceed due to - Tx FIFO full */ 20529 uint16 edt_cts_thresh; /* Exceed due to - CTS threshold */ 20530 uint16 dbg1; /* dbgX are for internal debugging */ 20531 uint16 dbg2; 20532 uint16 dbg3; 20533 uint16 dbg4; 20534 uint16 dbg5; 20535 uint16 dbg6; 20536 uint16 dbg7; 20537 uint16 dbg8; 20538 uint16 dbg9; 20539 uint16 dbg10; 20540 } hp2p_counters_v2_t; 20541 20542 typedef struct hp2p_counters_hdr { 20543 uint16 version; /* version of hp2p_counters_t structure */ 20544 uint16 len; 20545 uint16 slice_idx; 20546 uint16 pad; 20547 uint8 counters[]; 20548 } hp2p_counters_hdr_t; 20549 20550 /* TX enable flags */ 20551 #define WL_HP2P_TX_AMPDU 0x0001u 20552 #define WL_HP2P_TX_AMSDU 0x0002u 20553 #define WL_HP2P_TX_RDG 0x0004u 20554 20555 /* RX enable flags */ 20556 #define WL_HP2P_RX_AMPDU 0x0001u 20557 #define WL_HP2P_RX_AMSDU 0x0002u 20558 #define WL_HP2P_RX_RDG 0x0004u 20559 #define WL_HP2P_RX_AMPDU_REORDER 0x0008u 20560 20561 /* Max/min values for configuration parameters to check validity */ 20562 #define WL_HP2P_MAX_RETRY_MAX 14u 20563 #define WL_HP2P_MAX_RETRY_MIN 6u 20564 #define WL_HP2P_LATENCY_TARGET_MAX 30u 20565 #define WL_HP2P_BURST_INTERVAL_MAX 64u 20566 #define WL_HP2P_MAX_FIFO 5u 20567 #define WL_HP2P_MAX_UCODE_LATENCY_THR 500u 20568 #define WL_HP2P_MAX_UCODE_RECOV_TO 500u 20569 #define WL_HP2P_MAX_UCODE_NAV_THR 50000u 20570 20571 #define WL_HP2P_VERSION 1u 20572 typedef struct hp2p_tx_config { 20573 struct ether_addr peer_addr; 20574 uint16 max_burst; 20575 uint16 txop; /* stored in network order (ls octet first) */ 20576 uint16 flags; /* flags to enable/disable AMPDU, AMSDU, RDG */ 20577 uint8 aci; 20578 uint8 ecw; 20579 uint8 fifo; 20580 uint8 tid; 20581 uint8 burst_interval; 20582 uint8 latency_target; 20583 uint8 max_retry; 20584 uint8 pad; 20585 } hp2p_tx_config_t; 20586 20587 typedef struct hp2p_rx_config { 20588 struct ether_addr peer_addr; 20589 uint16 flags; /* flags to enable/disable AMPDU, AMSDU, RDG, AMPDU Reorder */ 20590 uint8 tid; 20591 uint8 pad[3]; 20592 } hp2p_rx_config_t; 20593 20594 typedef struct hp2p_udbg_config { 20595 uint16 recovery_timeout; /* multiples of 256 usecs */ 20596 uint16 latency_thresh; /* multiples of 256 usecs */ 20597 uint16 enable_trap; /* trap if ucode delay exceeds latency_thresh */ 20598 uint16 nav_thresh; /* in usec */ 20599 } hp2p_udbg_config_t; 20600 20601 typedef struct hp2p_cmd { 20602 uint16 type; 20603 uint16 len; 20604 uint8 data[]; 20605 } hp2p_cmd_t; 20606 20607 typedef struct hp2p_cmd_hdr { 20608 uint16 version; 20609 uint16 slice_idx; 20610 uint8 cmd[]; 20611 } hp2p_cmd_hdr_t; 20612 20613 /* to be used in type field of hp2p_cmd_t structure while issuing HP2P commands */ 20614 typedef enum hp2p_cmd_id { 20615 WL_HP2P_CMD_ENABLE = 0, 20616 WL_HP2P_CMD_TX_CONFIG = 1, 20617 WL_HP2P_CMD_RX_CONFIG = 2, 20618 WL_HP2P_CMD_COUNTERS = 3, 20619 WL_HP2P_CMD_UDBG_CONFIG = 4 20620 } hp2p_cmd_id_t; 20621 20622 typedef enum wl_rffe_cmd_type { 20623 WL_RFFE_CMD_DEBUG_MODE = 0, 20624 WL_RFFE_CMD_ELNABYP_MODE = 1, 20625 WL_RFFE_CMD_REG = 2, 20626 WL_RFFE_CMD_LAST 20627 } wl_rffe_cmd_type_t; 20628 20629 /** RFFE struct passed through ioctl */ 20630 typedef struct { 20631 uint32 regaddr; /**< rFEM_RegAddr */ 20632 uint32 antnum; /**< rFEM AntNum */ 20633 uint32 slaveid; /**< rFEM SlaveID */ 20634 uint32 value; /**< read/write value */ 20635 } rffe_reg_t; 20636 20637 #ifndef BCMUTILS_ERR_CODES 20638 20639 /* 20640 * SOE (Security Offload Engine) status codes. 20641 */ 20642 20643 /* SOE status codes are reserved from -6144 to -7167 (1K) */ 20644 20645 enum wl_soe_status { 20646 /* Invalid operational context */ 20647 WL_SOE_E_BAD_OP_CONTEXT = -6144, 20648 20649 /* Invalid operational type */ 20650 WL_SOE_E_BAD_OP_TYPE = -6145, 20651 20652 /* Failure to get NAF3 encoded scalar */ 20653 WL_SOE_E_BN_GET_NAF3_ERROR = -6146, 20654 20655 /* Failure to get NAF3 params */ 20656 WL_SOE_E_ECG_GET_NAF3_PARAMS_ERROR = -6147, 20657 20658 /* FAILURE to get Montgomery params */ 20659 WL_SOE_E_MONT_PARAMS_GET_ERROR = -6148, 20660 20661 /* Invalid OSL handle */ 20662 WL_SOE_E_BAD_SI_OSH = -6149, 20663 20664 /* Invalid ECG group */ 20665 WL_SOE_E_BAD_ECG_GROUP = -6150, 20666 20667 /* Invalid BN context */ 20668 WL_SOE_E_BAD_BN_CTX = -6151, 20669 20670 /* Invalid SOE core register base address */ 20671 WL_SOE_E_BAD_SOE_REGBASE = -6152, 20672 20673 /* Invalid SOE context */ 20674 WL_SOE_E_BAD_SOE_CONTXT = -6153, 20675 20676 /* Number of words are too short (i.e., not enough 20677 * room to encode the PKA sequence) 20678 */ 20679 WL_SOE_E_PKA_SEQUENCE_WORDS_TOO_SHORT = -6154, 20680 20681 /* Generic bn_get error */ 20682 WL_SOE_E_PKA_BN_GET_ERROR = -6155, 20683 20684 /* Sequence buf too short for BN */ 20685 WL_SOE_E_PKA_BN_BUF_TOO_SHORT_BN = -6156, 20686 20687 /* Sequence buf too short for ECG prime */ 20688 WL_SOE_E_PKA_BN_BUF_TOO_SHORT_ECG_PRIME = -6157, 20689 20690 /* Sequence buf too short for Montgomery N' */ 20691 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_MONT_PRIME = -6158, 20692 20693 /* Sequence buf too short for Accumulator registers */ 20694 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_ACCM_REG = -6159, 20695 20696 /* Sequence buf too short for the point P */ 20697 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_P = -6160, 20698 20699 /* Sequence buf too short for -P */ 20700 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_PN = -6161, 20701 20702 /* Sequence buf too short for 3P */ 20703 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_3P = -6162, 20704 20705 /* Sequence buf too short for -3P */ 20706 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_3PN = -6163, 20707 20708 /* Sequence buf too short for NAF3 scalar */ 20709 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_NAF3_SCALAR = -6164, 20710 20711 /* Sequence buf too short for load shift count */ 20712 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_PRE_JMP = -6165, 20713 20714 /* SOE engine(SHA/PKA) failed to complete the operation */ 20715 WL_SOE_E_ENGINE_UNABLE_TO_COMPLETE = -6166, 20716 20717 /* Wrong LIR (Long Integer Register) type */ 20718 WL_SOE_E_PKA_BAD_LIR_TYPE = -6167, 20719 20720 /* Reference count has reached maximum */ 20721 WL_SOE_E_MAX_REF_COUNT_REACHED = -6168, 20722 20723 /* Failed to get the SOE context reference */ 20724 WL_SOE_E_GET_REF_FAILED = -6169, 20725 20726 /* Incoming digest length is invalid */ 20727 WL_SOE_E_SHA_WRONG_DIGEST_LEN = -6170 20728 }; 20729 20730 #endif /* BCMUTILS_ERR_CODES */ 20731 20732 #define NR5GCX_STATUS_VER_1 1 20733 /* NR coex status structures */ 20734 typedef struct wlc_nr5gcx_status_v1 { 20735 uint16 version; /* version info */ 20736 uint16 len; /* status length */ 20737 uint32 mode; /* NR coex status */ 20738 uint32 nr_req_cnt; /* NR req number since last read */ 20739 uint32 nr_dur; /* NR duration since last read, us */ 20740 uint32 nr_duty_cycle; /* NR duty cycle since last read */ 20741 uint32 nr_max_dur; /* NR max duration in a single request */ 20742 uint32 wlan_crit_cnt; /* aggregated # of WLAN critical events */ 20743 uint32 wlan_crit_dur; /* aggregated WLAN critical event duration, ms */ 20744 uint32 wlan_crit_max_dur; /* Duration of the WLAN critical events whose dur is max */ 20745 uint16 wlan_crit_evt_bitmap; /* WLAN critical event occurrence bitmap, 20746 * 1 event per bit. 20747 */ 20748 uint16 wlan_crit_max_evt_type; /* The event type of the WLAN critical 20749 * event whose dur is max 20750 */ 20751 } wlc_nr5gcx_status_v1_t; 20752 #endif /* _wlioctl_h_ */ 20753