Lines Matching +full:lines +full:- +full:initial +full:- +full:states
26 #. Increase code-reuse
27 #. Increase overall code-maintainability
67 for one of the users. (e.g. "git grep fsl,.*-mdio arch/powerpc/boot/dts/")
72 The Reduced Gigabit Medium Independent Interface (RGMII) is a 12-pin
74 data lines. Due to this design decision, a 1.5ns to 2ns delay must be added
75 between the clock line (RXC or TXC) and the data lines to let the PHY (clock
76 sink) have a large enough setup and hold time to sample the data lines correctly. The
84 or the PCB traces) insert the correct 1.5-2ns delay
87 for the transmit data lines (TXD[3:0]) processed by the PHY device
90 for the receive data lines (RXD[3:0]) processed by the PHY device
93 both transmit AND receive data lines from/to the PHY device
97 * PHY devices may offer sub-nanosecond granularity in how they allow a
115 PHY_INTERFACE_MODE_RGMII, it should make sure that the MAC-level delays are
130 -----------------------------------------
135 1 or 0 states and reconstruct the data being transmitted/received. Typical
197 PHY-specific flags should be set in phydev->dev_flags prior to the call
208 Now just make sure that phydev->supported and phydev->advertising have any
219 also handles PHY status changes, just set phydev->irq to PHY_IGNORE_INTERRUPT
221 driver. If you don't want to use interrupts, set phydev->irq to PHY_POLL.
233 defines the initial operating mode of the PHY interface. This is not
241 This defines the 1000BASE-X single-lane serdes link as defined by the
244 data rate of 1Gbps. Embedded in the data stream is a 16-bit control
246 remote end. This does not include "up-clocked" variants such as 2.5Gbps
250 This defines a variant of 1000BASE-X which is clocked 2.5 times as fast
254 This is used for Cisco SGMII, which is a modification of 1000BASE-X
259 The 802.3 control word is re-purposed to send the negotiated speed and
261 receipt. This does not include "up-clocked" variants such as 2.5Gbps
264 Note: mismatched SGMII vs 1000BASE-X configuration on a link can
265 successfully pass data in some circumstances, but the 16-bit control
271 This is the IEEE 802.3 Clause 49 defined 10GBASE-R protocol used with
275 Note: 10GBASE-R is just one protocol that can be used with XFI and SFI.
282 This is the IEEE 802.3 Clause 49 defined 10GBASE-R with Clause 73
286 Note: due to legacy usage, some 10GBASE-R usage incorrectly makes
306 It is possible that the PAL's built-in state machine needs a little help to
321 There's a remote chance that the PAL's built-in state machine cannot track
324 phy_prepare_link(). This will mean that phydev->state is entirely yours to
325 handle (phy_start and phy_stop toggle between some of the states, so you
329 accessed without the state-machine running, and most of these functions are
330 descended from functions which did not interact with a complex state-machine.
369 Fills the phydev structure with up-to-date information about the current
392 many PHYs require a little hand-holding to get up-and-running.
395 ------------------
403 --------------------
465 field) and the bus identifier (contained in phydev->dev.bus_id). Both must
504 http://standards.ieee.org/getieee802/download/802.3-2008_section2.pdf