Lines Matching +full:snvs +full:- +full:rtc
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
19 * pre-existing /chosen node to be available to insert the
55 #address-cells = <1>;
56 #size-cells = <0>;
58 idle-states {
59 entry-method = "psci";
61 cpu_sleep_wait: cpu-sleep-wait {
62 compatible = "arm,idle-state";
63 arm,psci-suspend-param = <0x0010000>;
64 local-timer-stop;
65 entry-latency-us = <100>;
66 exit-latency-us = <50>;
67 min-residency-us = <1000>;
72 compatible = "arm,cortex-a7";
75 clock-frequency = <792000000>;
76 clock-latency = <61036>; /* two CLK32 periods */
78 cpu-idle-states = <&cpu_sleep_wait>;
82 ckil: clock-cki {
83 compatible = "fixed-clock";
84 #clock-cells = <0>;
85 clock-frequency = <32768>;
86 clock-output-names = "ckil";
89 osc: clock-osc {
90 compatible = "fixed-clock";
91 #clock-cells = <0>;
92 clock-frequency = <24000000>;
93 clock-output-names = "osc";
97 compatible = "usb-nop-xceiv";
99 clock-names = "main_clk";
100 #phy-cells = <0>;
104 compatible = "usb-nop-xceiv";
106 clock-names = "main_clk";
107 power-domains = <&pgc_hsic_phy>;
108 #phy-cells = <0>;
112 compatible = "arm,cortex-a7-pmu";
113 interrupt-parent = <&gpc>;
115 interrupt-affinity = <&cpu0>;
120 * non-configurable replicators don't show up on the
123 compatible = "arm,coresight-static-replicator";
125 out-ports {
126 #address-cells = <1>;
127 #size-cells = <0>;
132 remote-endpoint = <&tpiu_in_port>;
139 remote-endpoint = <&etr_in_port>;
144 in-ports {
147 remote-endpoint = <&etf_out_port>;
154 compatible = "arm,armv7-timer";
155 interrupt-parent = <&intc>;
163 #address-cells = <1>;
164 #size-cells = <1>;
165 compatible = "simple-bus";
166 interrupt-parent = <&gpc>;
170 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
173 clock-names = "apb_pclk";
175 ca_funnel_in_ports: in-ports {
176 #address-cells = <1>;
177 #size-cells = <0>;
182 remote-endpoint = <&etm0_out_port>;
189 out-ports {
192 remote-endpoint = <&hugo_funnel_in_port0>;
200 compatible = "arm,coresight-etm3x", "arm,primecell";
204 clock-names = "apb_pclk";
206 out-ports {
209 remote-endpoint = <&ca_funnel_in_port0>;
216 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
219 clock-names = "apb_pclk";
221 in-ports {
222 #address-cells = <1>;
223 #size-cells = <0>;
228 remote-endpoint = <&ca_funnel_out_port0>;
241 out-ports {
244 remote-endpoint = <&etf_in_port>;
251 compatible = "arm,coresight-tmc", "arm,primecell";
254 clock-names = "apb_pclk";
256 in-ports {
259 remote-endpoint = <&hugo_funnel_out_port0>;
264 out-ports {
267 remote-endpoint = <&replicator_in_port0>;
274 compatible = "arm,coresight-tmc", "arm,primecell";
277 clock-names = "apb_pclk";
279 in-ports {
282 remote-endpoint = <&replicator_out_port1>;
289 compatible = "arm,coresight-tpiu", "arm,primecell";
292 clock-names = "apb_pclk";
294 in-ports {
297 remote-endpoint = <&replicator_out_port0>;
303 intc: interrupt-controller@31001000 {
304 compatible = "arm,cortex-a7-gic";
306 #interrupt-cells = <3>;
307 interrupt-controller;
308 interrupt-parent = <&intc>;
316 compatible = "fsl,aips-bus", "simple-bus";
317 #address-cells = <1>;
318 #size-cells = <1>;
323 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
327 gpio-controller;
328 #gpio-cells = <2>;
329 interrupt-controller;
330 #interrupt-cells = <2>;
331 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
335 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
339 gpio-controller;
340 #gpio-cells = <2>;
341 interrupt-controller;
342 #interrupt-cells = <2>;
343 gpio-ranges = <&iomuxc 0 13 32>;
347 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
351 gpio-controller;
352 #gpio-cells = <2>;
353 interrupt-controller;
354 #interrupt-cells = <2>;
355 gpio-ranges = <&iomuxc 0 45 29>;
359 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
363 gpio-controller;
364 #gpio-cells = <2>;
365 interrupt-controller;
366 #interrupt-cells = <2>;
367 gpio-ranges = <&iomuxc 0 74 24>;
371 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
375 gpio-controller;
376 #gpio-cells = <2>;
377 interrupt-controller;
378 #interrupt-cells = <2>;
379 gpio-ranges = <&iomuxc 0 98 18>;
383 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
387 gpio-controller;
388 #gpio-cells = <2>;
389 interrupt-controller;
390 #interrupt-cells = <2>;
391 gpio-ranges = <&iomuxc 0 116 23>;
395 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
399 gpio-controller;
400 #gpio-cells = <2>;
401 interrupt-controller;
402 #interrupt-cells = <2>;
403 gpio-ranges = <&iomuxc 0 139 16>;
407 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
414 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
422 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
430 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
437 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
438 compatible = "fsl,imx7d-iomuxc-lpsr";
440 fsl,input-sel = <&iomuxc>;
444 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
449 clock-names = "ipg", "per";
453 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
458 clock-names = "ipg", "per";
463 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
468 clock-names = "ipg", "per";
473 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
478 clock-names = "ipg", "per";
483 compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
491 compatible = "fsl,imx7d-iomuxc";
495 gpr: iomuxc-gpr@30340000 {
496 compatible = "fsl,imx7d-iomuxc-gpr",
497 "fsl,imx6q-iomuxc-gpr", "syscon",
498 "simple-mfd";
501 mux: mux-controller {
502 compatible = "mmio-mux";
503 #mux-control-cells = <1>;
504 mux-reg-masks = <0x14 0x00000010>;
507 video_mux: csi-mux {
508 compatible = "video-mux";
509 mux-controls = <&mux 0>;
510 #address-cells = <1>;
511 #size-cells = <0>;
522 remote-endpoint = <&mipi_vc0_to_csi_mux>;
530 remote-endpoint = <&csi_from_csi_mux>;
537 #address-cells = <1>;
538 #size-cells = <1>;
539 compatible = "fsl,imx7d-ocotp", "syscon";
547 fuse_grade: fuse-grade@10 {
553 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
554 "syscon", "simple-mfd";
559 reg_1p0d: regulator-vdd1p0d {
560 compatible = "fsl,anatop-regulator";
561 regulator-name = "vdd1p0d";
562 regulator-min-microvolt = <800000>;
563 regulator-max-microvolt = <1200000>;
564 anatop-reg-offset = <0x210>;
565 anatop-vol-bit-shift = <8>;
566 anatop-vol-bit-width = <5>;
567 anatop-min-bit-val = <8>;
568 anatop-min-voltage = <800000>;
569 anatop-max-voltage = <1200000>;
570 anatop-enable-bit = <0>;
573 reg_1p2: regulator-vdd1p2 {
574 compatible = "fsl,anatop-regulator";
575 regulator-name = "vdd1p2";
576 regulator-min-microvolt = <1100000>;
577 regulator-max-microvolt = <1300000>;
578 anatop-reg-offset = <0x220>;
579 anatop-vol-bit-shift = <8>;
580 anatop-vol-bit-width = <5>;
581 anatop-min-bit-val = <0x14>;
582 anatop-min-voltage = <1100000>;
583 anatop-max-voltage = <1300000>;
584 anatop-enable-bit = <0>;
588 compatible = "fsl,imx7d-tempmon";
589 interrupt-parent = <&gpc>;
592 nvmem-cells = <&tempmon_calib>, <&fuse_grade>;
593 nvmem-cell-names = "calib", "temp_grade";
598 snvs: snvs@30370000 { label
599 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
602 snvs_rtc: snvs-rtc-lp {
603 compatible = "fsl,sec-v4.0-mon-rtc-lp";
604 regmap = <&snvs>;
609 clock-names = "snvs-rtc";
612 snvs_pwrkey: snvs-powerkey {
613 compatible = "fsl,sec-v4.0-pwrkey";
614 regmap = <&snvs>;
617 clock-names = "snvs-pwrkey";
619 wakeup-source;
624 clks: clock-controller@30380000 {
625 compatible = "fsl,imx7d-ccm";
629 #clock-cells = <1>;
631 clock-names = "ckil", "osc";
634 src: reset-controller@30390000 {
635 compatible = "fsl,imx7d-src", "syscon";
638 #reset-cells = <1>;
642 compatible = "fsl,imx7d-gpc";
644 interrupt-controller;
646 #interrupt-cells = <3>;
647 interrupt-parent = <&intc>;
648 #power-domain-cells = <1>;
651 #address-cells = <1>;
652 #size-cells = <0>;
654 pgc_mipi_phy: power-domain@0 {
655 #power-domain-cells = <0>;
657 power-supply = <®_1p0d>;
660 pgc_pcie_phy: power-domain@1 {
661 #power-domain-cells = <0>;
663 power-supply = <®_1p0d>;
666 pgc_hsic_phy: power-domain@2 {
667 #power-domain-cells = <0>;
669 power-supply = <®_1p2>;
676 compatible = "fsl,aips-bus", "simple-bus";
677 #address-cells = <1>;
678 #size-cells = <1>;
683 compatible = "fsl,imx7d-adc";
687 clock-names = "adc";
688 #io-channel-cells = <1>;
693 compatible = "fsl,imx7d-adc";
697 clock-names = "adc";
698 #io-channel-cells = <1>;
703 #address-cells = <1>;
704 #size-cells = <0>;
705 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
710 clock-names = "ipg", "per";
715 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
720 clock-names = "ipg", "per";
721 #pwm-cells = <3>;
726 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
731 clock-names = "ipg", "per";
732 #pwm-cells = <3>;
737 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
742 clock-names = "ipg", "per";
743 #pwm-cells = <3>;
748 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
753 clock-names = "ipg", "per";
754 #pwm-cells = <3>;
759 compatible = "fsl,imx7-csi";
765 clock-names = "axi", "mclk", "dcic";
770 remote-endpoint = <&csi_mux_to_csi>;
776 compatible = "fsl,imx7d-lcdif", "fsl,imx6sx-lcdif";
781 clock-names = "pix", "axi";
785 mipi_csi: mipi-csi@30750000 {
786 compatible = "fsl,imx7-mipi-csi2";
788 #address-cells = <1>;
789 #size-cells = <0>;
794 clock-names = "pclk", "wrap", "phy";
795 power-domains = <&pgc_mipi_phy>;
796 phy-supply = <®_1p0d>;
798 reset-names = "mrst";
809 remote-endpoint = <&csi_mux_from_mipi_vc0>;
816 compatible = "fsl,aips-bus", "simple-bus";
817 #address-cells = <1>;
818 #size-cells = <1>;
822 spba-bus@30800000 {
823 compatible = "fsl,spba-bus", "simple-bus";
824 #address-cells = <1>;
825 #size-cells = <1>;
830 #address-cells = <1>;
831 #size-cells = <0>;
832 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
837 clock-names = "ipg", "per";
842 #address-cells = <1>;
843 #size-cells = <0>;
844 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
849 clock-names = "ipg", "per";
854 #address-cells = <1>;
855 #size-cells = <0>;
856 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
861 clock-names = "ipg", "per";
866 compatible = "fsl,imx7d-uart",
867 "fsl,imx6q-uart";
872 clock-names = "ipg", "per";
877 compatible = "fsl,imx7d-uart",
878 "fsl,imx6q-uart";
883 clock-names = "ipg", "per";
888 compatible = "fsl,imx7d-uart",
889 "fsl,imx6q-uart";
894 clock-names = "ipg", "per";
899 #sound-dai-cells = <0>;
900 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
907 clock-names = "bus", "mclk1", "mclk2", "mclk3";
908 dma-names = "rx", "tx";
914 #sound-dai-cells = <0>;
915 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
922 clock-names = "bus", "mclk1", "mclk2", "mclk3";
923 dma-names = "rx", "tx";
929 #sound-dai-cells = <0>;
930 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
937 clock-names = "bus", "mclk1", "mclk2", "mclk3";
938 dma-names = "rx", "tx";
945 compatible = "fsl,sec-v4.0";
946 #address-cells = <1>;
947 #size-cells = <1>;
953 clock-names = "ipg", "aclk";
956 compatible = "fsl,sec-v4.0-job-ring";
962 compatible = "fsl,sec-v4.0-job-ring";
968 compatible = "fsl,sec-v4.0-job-ring";
975 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
980 clock-names = "ipg", "per";
981 fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
986 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
991 clock-names = "ipg", "per";
992 fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
997 #address-cells = <1>;
998 #size-cells = <0>;
999 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1007 #address-cells = <1>;
1008 #size-cells = <0>;
1009 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1017 #address-cells = <1>;
1018 #size-cells = <0>;
1019 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1027 #address-cells = <1>;
1028 #size-cells = <0>;
1029 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1037 compatible = "fsl,imx7d-uart",
1038 "fsl,imx6q-uart";
1043 clock-names = "ipg", "per";
1048 compatible = "fsl,imx7d-uart",
1049 "fsl,imx6q-uart";
1054 clock-names = "ipg", "per";
1059 compatible = "fsl,imx7d-uart",
1060 "fsl,imx6q-uart";
1065 clock-names = "ipg", "per";
1070 compatible = "fsl,imx7d-uart",
1071 "fsl,imx6q-uart";
1076 clock-names = "ipg", "per";
1081 compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1085 #mbox-cells = <2>;
1090 compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1094 #mbox-cells = <2>;
1095 fsl,mu-side-b;
1100 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1106 phy-clkgate-delay-us = <400>;
1111 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1119 phy-clkgate-delay-us = <400>;
1124 #index-cells = <1>;
1125 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1130 #index-cells = <1>;
1131 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1136 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1142 clock-names = "ipg", "ahb", "per";
1143 bus-width = <4>;
1144 fsl,tuning-step = <2>;
1145 fsl,tuning-start-tap = <20>;
1150 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1156 clock-names = "ipg", "ahb", "per";
1157 bus-width = <4>;
1158 fsl,tuning-step = <2>;
1159 fsl,tuning-start-tap = <20>;
1164 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1170 clock-names = "ipg", "ahb", "per";
1171 bus-width = <4>;
1172 fsl,tuning-step = <2>;
1173 fsl,tuning-start-tap = <20>;
1178 compatible = "fsl,imx7d-qspi";
1180 reg-names = "QuadSPI", "QuadSPI-memory";
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1186 clock-names = "qspi_en", "qspi";
1190 sdma: dma-controller@30bd0000 {
1191 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
1196 clock-names = "ipg", "ahb";
1197 #dma-cells = <3>;
1198 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1202 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
1204 interrupt-names = "int0", "int1", "int2", "pps";
1214 clock-names = "ipg", "ahb", "ptp",
1216 fsl,num-tx-queues = <3>;
1217 fsl,num-rx-queues = <3>;
1218 fsl,stop-mode = <&gpr 0x10 3>;
1223 dma_apbh: dma-controller@33000000 {
1224 compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
1230 #dma-cells = <1>;
1231 dma-channels = <4>;
1235 gpmi: nand-controller@33002000{
1236 compatible = "fsl,imx7d-gpmi-nand";
1237 #address-cells = <1>;
1238 #size-cells = <0>;
1240 reg-names = "gpmi-nand", "bch";
1242 interrupt-names = "bch";
1245 clock-names = "gpmi_io", "gpmi_bch_apb";
1247 dma-names = "rx-tx";
1249 assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;
1250 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;