Lines Matching +full:bl +full:- +full:code +full:- +full:offset
1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1994-2002 Russell King
9 * Kernel startup code for all 32-bit CPUs
19 #include <asm/asm-offsets.h>
72 * ---------------------------
74 * This is normally called from the decompressor code. The requirements
75 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
78 * This code is mostly position independent, so if you link the kernel at
81 * See linux/arch/arm/tools/mach-types for the complete list of machine
85 * crap here - that's what the boot loader (or in extreme, well justified
92 .equ swapper_pg_dir, . - PG_DIR_SIZE
95 mov r3, #0 @ normal entry point - clear r3
99 THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
104 str_l r3, __kaslr_offset, r9 @ offset in r3 if entered via kaslr ep
109 .long 0 @ will be wiped before entering C code
114 bl __hyp_stub_install
120 bl __lookup_processor_type @ r5=procinfo r9=cpuid
122 THUMB( it eq ) @ force fixup-able long branch encoding
128 cmp r3, #5 @ long-descriptor translation table format?
129 THUMB( it lo ) @ force fixup-able long branch encoding
145 bl __vet_atags
147 bl __fixup_smp
150 bl __fixup_pv_table
152 bl __create_page_tables
155 * The following calls CPU specific code in a position independent
156 * manner. See arch/arm/mm/proc-*.S for details. r10 = base of
161 * r1 - machine type
162 * r2 - boot data (atags/dt) pointer
163 * r4 - translation table base (low word)
164 * r5 - translation table base (high word, if LPAE)
165 * r8 - translation table base 1 (pfn if LPAE)
166 * r9 - cpuid
167 * r13 - virtual address for __enable_mmu -> __turn_mmu_on
193 * generally means mapping in the kernel code.
198 * r0, r3, r5-r7 corrupted
220 * entry is 64-bit wide.
226 mov r7, #1 << (55 - 32) @ L_PGD_SWAPPER
267 add r0, r4, r0, lsr #(SECTION_SHIFT - PMD_ORDER)
268 adr_l r6, _end - 1
273 add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)
287 add r0, r4, #(XIP_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER)
289 ldr r6, =(_edata_loc - 1)
291 add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)
304 ldrne r3, =FDT_FIXED_BASE >> (SECTION_SHIFT - PMD_ORDER)
313 @ for 64-bit descriptors
333 mov r7, #1 << (54 - 32) @ XN
354 * in the 16550-type serial port for the debug messages
356 add r0, r4, #0xff000000 >> (SECTION_SHIFT - PMD_ORDER)
363 * Similar reasons here - for debug. This is
366 add r0, r4, #0x02000000 >> (SECTION_SHIFT - PMD_ORDER)
369 add r0, r4, #0xd8000000 >> (SECTION_SHIFT - PMD_ORDER)
385 THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
393 * the processor type - there is no need to check the machine type
400 bl __hyp_stub_install_secondary
405 bl __lookup_processor_type
408 THUMB( it eq ) @ force fixup-able long branch encoding
453 * r12 = KASLR offset
484 * If you have an enquiry about this, *please* check the linux-arm-kernel
491 * r12 = KASLR offset
525 sub r3, r3, r7 @ offset of __stubs_start
535 addgt r7, r7, r3 @ fix up VA offset
575 @ Cortex-A9 CPU is present but SMP operations fault.
579 teq r3, r4 @ Check for ARM Cortex-A9
580 retne lr @ Not ARM Cortex-A9,
618 THUMB( mov r6, r6, ror #16 ) @ Convert word order for big-endian.
620 THUMB( strh r6, [r0], #2 ) @ For Thumb-2, store as two halfwords
627 stmfd sp!, {r4 - r6, lr}
630 bl __do_fixup_smp_on_up
631 ldmfd sp!, {r4 - r6, pc}
634 #include "head-common.S"