Lines Matching full:lr
36 * We need 2 extra registers for this loop - use r8 and the LR
38 stmfd sp!, {r8, lr}
41 UNWIND( .save {r8, lr} )
43 mov lr, r3
46 stmiage ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
47 stmiage ip!, {r1, r3, r8, lr}
48 stmiage ip!, {r1, r3, r8, lr}
49 stmiage ip!, {r1, r3, r8, lr}
56 stmiane ip!, {r1, r3, r8, lr}
57 stmiane ip!, {r1, r3, r8, lr}
59 stmiane ip!, {r1, r3, r8, lr}
60 ldmfd sp!, {r8, lr}
70 stmfd sp!, {r4-r8, lr}
73 UNWIND( .save {r4-r8, lr} )
79 mov lr, r3
96 stmiage ip!, {r1, r3-r8, lr}
97 stmiage ip!, {r1, r3-r8, lr}
102 stmiane ip!, {r1, r3-r8, lr}
105 ldmfd sp!, {r4-r8, lr}
124 ret lr