1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * arch/arm/mach-at91/pm.c
4  * AT91 Power Management
56 	{ AT91_PM_ULP0_FAST,    "ulp0-fast" },
58 	{ AT91_PM_BACKUP,	"backup" },
59 	{ -1, NULL },
106 	{ .compatible = "atmel,sama5d2-gem",		.data = &ws_info[0] },
107 	{ .compatible = "atmel,sama5d2-rtc",		.data = &ws_info[1] },
108 	{ .compatible = "atmel,sama5d3-udc",		.data = &ws_info[2] },
109 	{ .compatible = "atmel,at91rm9200-ohci",	.data = &ws_info[2] },
110 	{ .compatible = "usb-ohci",			.data = &ws_info[2] },
111 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &ws_info[2] },
112 	{ .compatible = "usb-ehci",			.data = &ws_info[2] },
113 	{ .compatible = "atmel,sama5d2-sdhci",		.data = &ws_info[3] },
118 	{ .compatible = "microchip,sam9x60-rtc",	.data = &ws_info[1] },
119 	{ .compatible = "atmel,at91rm9200-ohci",	.data = &ws_info[2] },
120 	{ .compatible = "usb-ohci",			.data = &ws_info[2] },
121 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &ws_info[2] },
122 	{ .compatible = "usb-ehci",			.data = &ws_info[2] },
123 	{ .compatible = "microchip,sam9x60-rtt",	.data = &ws_info[4] },
124 	{ .compatible = "cdns,sam9x60-macb",		.data = &ws_info[5] },
140 		return -EPERM;  in at91_pm_config_ws()
159 		if (device_may_wakeup(&pdev->dev)) {  in at91_pm_config_ws()
160 			wsi = match->data;  in at91_pm_config_ws()
163 			if (wsi->shdwc_mr_bit && !(val & wsi->shdwc_mr_bit))  in at91_pm_config_ws()
166 			mode |= wsi->pmc_fsmr_bit;  in at91_pm_config_ws()
167 			if (wsi->set_polarity)  in at91_pm_config_ws()
168 				polarity |= wsi->pmc_fsmr_bit;  in at91_pm_config_ws()
172 		put_device(&pdev->dev);  in at91_pm_config_ws()
182 	return mode ? 0 : -EPERM;  in at91_pm_config_ws()
228 		soc_pm.data.mode = -1;  in at91_pm_begin()
236  * slow-clock mode.
247 		pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");  in at91_pm_verify_clocks()
259 			pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);  in at91_pm_verify_clocks()
275  * to add one generic API rather than lots of platform-specific ones.
300 		pm_bu->suspended = 1;  in at91_pm_suspend()
317  * event sources; and reduces DRAM power.  But otherwise it's identical to
324  * AT91_PM_BACKUP turns off the whole SoC after placing the DDR in self refresh
351 		pr_debug("AT91: PM - bogus suspend state %d\n", state);  in at91_pm_enter()
379 	.name = "cpuidle-at91",
383  * The AT91RM9200 goes into self-refresh mode with this command, and will
384  * terminate self-refresh automatically on the next SDRAM access.
386  * Self-refresh mode is exited as soon as a memory access is made, but we don't
387  * know for sure when that happens. However, we need to restore the low-power
388  * mode if it was enabled before going idle. Restoring low-power mode while
389  * still in self-refresh is "not recommended", but seems to work.
409 	/* Those two values allow us to delay self-refresh activation  in at91_ddr_standby()
415 	/* LPDDR1 --> force DDR2 mode during self-refresh */  in at91_ddr_standby()
439 	/* self-refresh mode now */  in at91_ddr_standby()
488 	/* self-refresh mode now */  in at91sam9_sdram_standby()
513 	{ .compatible = "atmel,at91rm9200-sdramc", .data = &ramc_infos[0] },
514 	{ .compatible = "atmel,at91sam9260-sdramc", .data = &ramc_infos[1] },
515 	{ .compatible = "atmel,at91sam9g45-ddramc", .data = &ramc_infos[2] },
516 	{ .compatible = "atmel,sama5d3-ddramc", .data = &ramc_infos[3] },
533 			ret = -ENOMEM;  in at91_dt_ramc()
537 		ramc = of_id->data;  in at91_dt_ramc()
539 			standby = ramc->idle;  in at91_dt_ramc()
540 		soc_pm.data.memctrl = ramc->memctrl;  in at91_dt_ramc()
547 		ret = -ENODEV;  in at91_dt_ramc()
562 		iounmap(soc_pm.data.ramc[--idx]);  in at91_dt_ramc()
571 	 * re-enabled by an interrupt or by a reset.  in at91rm9200_idle()
590 	for_each_compatible_node(node, NULL, "mmio-sram") {  in at91_pm_sram_init()
603 	sram_pool = gen_pool_get(&pdev->dev, NULL);  in at91_pm_sram_init()
629 	put_device(&pdev->dev);  in at91_pm_sram_init()
644 	int ret = -ENODEV;  in at91_pm_backup_init()
647 		return -EPERM;  in at91_pm_backup_init()
652 	np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-sfrbu");  in at91_pm_backup_init()
661 	np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-securam");  in at91_pm_backup_init()
672 	sram_pool = gen_pool_get(&pdev->dev, NULL);  in at91_pm_backup_init()
681 		ret = -ENOMEM;  in at91_pm_backup_init()
685 	pm_bu->suspended = 0;  in at91_pm_backup_init()
686 	pm_bu->canary = __pa_symbol(&canary);  in at91_pm_backup_init()
687 	pm_bu->resume = __pa_symbol(cpu_resume);  in at91_pm_backup_init()
692 	put_device(&pdev->dev);  in at91_pm_backup_init()
711 	{ .compatible = "atmel,sama5d2-shdwc" },
712 	{ .compatible = "microchip,sam9x60-shdwc" },
788 	{ .compatible = "atmel,at91rm9200-pmc", .data = &pmc_infos[0] },
789 	{ .compatible = "atmel,at91sam9260-pmc", .data = &pmc_infos[1] },
790 	{ .compatible = "atmel,at91sam9261-pmc", .data = &pmc_infos[1] },
791 	{ .compatible = "atmel,at91sam9263-pmc", .data = &pmc_infos[1] },
792 	{ .compatible = "atmel,at91sam9g45-pmc", .data = &pmc_infos[2] },
793 	{ .compatible = "atmel,at91sam9n12-pmc", .data = &pmc_infos[1] },
794 	{ .compatible = "atmel,at91sam9rl-pmc", .data = &pmc_infos[3] },
795 	{ .compatible = "atmel,at91sam9x5-pmc", .data = &pmc_infos[1] },
796 	{ .compatible = "atmel,sama5d3-pmc", .data = &pmc_infos[1] },
797 	{ .compatible = "atmel,sama5d4-pmc", .data = &pmc_infos[1] },
798 	{ .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] },
799 	{ .compatible = "microchip,sam9x60-pmc", .data = &pmc_infos[4] },
865 	pmc = of_id->data;  in at91_pm_init()
866 	soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask;  in at91_pm_init()
867 	soc_pm.data.pmc_mckr_offset = pmc->mckr;  in at91_pm_init()
868 	soc_pm.data.pmc_version = pmc->version;  in at91_pm_init()
905 	 * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.  in at91rm9200_pm_init()