Lines Matching +full:dsp +full:- +full:config +full:- +full:name
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com>
10 #include <linux/clk-provider.h>
13 #include <linux/dma-map-ops.h>
103 .name = "serial8250",
110 .name = "serial8250",
117 .name = "serial8250",
131 {-1, -1}
137 {-1, -1}
152 .name = "edma3_cc",
154 .end = DA8XX_TPCC_BASE + SZ_32K - 1,
158 .name = "edma3_tc0",
160 .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
164 .name = "edma3_tc1",
166 .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
170 .name = "edma3_ccint",
175 .name = "edma3_ccerrint",
183 .name = "edma3_cc",
185 .end = DA850_TPCC1_BASE + SZ_32K - 1,
189 .name = "edma3_tc0",
191 .end = DA850_TPTC2_BASE + SZ_1K - 1,
195 .name = "edma3_ccint",
200 .name = "edma3_ccerrint",
207 .name = "edma",
217 .name = "edma",
227 { "davinci-mcasp.0", "rx", EDMA_FILTER_PARAM(0, 0) },
228 { "davinci-mcasp.0", "tx", EDMA_FILTER_PARAM(0, 1) },
229 { "davinci-mcasp.1", "rx", EDMA_FILTER_PARAM(0, 2) },
230 { "davinci-mcasp.1", "tx", EDMA_FILTER_PARAM(0, 3) },
231 { "davinci-mcasp.2", "rx", EDMA_FILTER_PARAM(0, 4) },
232 { "davinci-mcasp.2", "tx", EDMA_FILTER_PARAM(0, 5) },
235 { "da830-mmc.0", "rx", EDMA_FILTER_PARAM(0, 16) },
236 { "da830-mmc.0", "tx", EDMA_FILTER_PARAM(0, 17) },
255 { "davinci-mcasp.0", "rx", EDMA_FILTER_PARAM(0, 0) },
256 { "davinci-mcasp.0", "tx", EDMA_FILTER_PARAM(0, 1) },
257 { "davinci-mcbsp.0", "rx", EDMA_FILTER_PARAM(0, 2) },
258 { "davinci-mcbsp.0", "tx", EDMA_FILTER_PARAM(0, 3) },
259 { "davinci-mcbsp.1", "rx", EDMA_FILTER_PARAM(0, 4) },
260 { "davinci-mcbsp.1", "tx", EDMA_FILTER_PARAM(0, 5) },
263 { "da830-mmc.0", "rx", EDMA_FILTER_PARAM(0, 16) },
264 { "da830-mmc.0", "tx", EDMA_FILTER_PARAM(0, 17) },
270 { "da830-mmc.1", "rx", EDMA_FILTER_PARAM(1, 28) },
271 { "da830-mmc.1", "tx", EDMA_FILTER_PARAM(1, 29) },
302 .end = DA8XX_I2C0_BASE + SZ_4K - 1,
313 .name = "i2c_davinci",
322 .end = DA8XX_I2C1_BASE + SZ_4K - 1,
333 .name = "i2c_davinci",
349 return -EINVAL; in da8xx_register_i2c()
351 pdev->dev.platform_data = pdata; in da8xx_register_i2c()
358 .end = DA8XX_WDOG_BASE + SZ_4K - 1,
364 .name = "davinci-wdt",
365 .id = -1,
378 .end = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1,
412 .name = "davinci_emac",
424 .end = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
430 .name = "davinci_mdio",
449 .name = "mpu",
451 .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
456 .name = "tx",
463 .name = "rx",
469 .name = "common",
476 .name = "davinci-mcasp",
484 .name = "mpu",
486 .end = DAVINCI_DA830_MCASP2_REG_BASE + (SZ_1K * 12) - 1,
491 .name = "tx",
498 .name = "rx",
504 .name = "common",
511 .name = "davinci-mcasp",
519 .name = "mpu",
521 .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
526 .name = "tx",
533 .name = "rx",
539 .name = "common",
546 .name = "davinci-mcasp",
558 /* Valid for DA830/OMAP-L137 or DA850/OMAP-L138 */ in da8xx_register_mcasp()
562 /* Valid for DA830/OMAP-L137 only */ in da8xx_register_mcasp()
568 /* Valid for DA830/OMAP-L137 only */ in da8xx_register_mcasp()
577 pdev->dev.platform_data = pdata; in da8xx_register_mcasp()
634 .name = "pruss_uio",
635 .id = -1,
670 .end = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
681 .name = "da8xx_lcdc",
699 .end = DA8XX_GPIO_BASE + SZ_4K - 1,
750 .name = "davinci_gpio",
751 .id = -1,
765 .end = DA8XX_MMCSD0_BASE + SZ_4K - 1,
776 .name = "da830-mmc",
782 int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config) in da8xx_register_mmcsd0() argument
784 da8xx_mmcsd0_device.dev.platform_data = config; in da8xx_register_mmcsd0()
792 .end = DA850_MMCSD1_BASE + SZ_4K - 1,
803 .name = "da830-mmc",
809 int __init da850_register_mmcsd1(struct davinci_mmc_config *config) in da850_register_mmcsd1() argument
811 da850_mmcsd1_device.dev.platform_data = config; in da850_register_mmcsd1()
817 { /* DSP boot address */
818 .name = "host1cfg",
823 { /* DSP interrupt registers */
824 .name = "chipsig",
829 { /* DSP L2 RAM */
830 .name = "l2sram",
832 .end = DA8XX_DSP_L2_RAM_BASE + SZ_256K - 1,
835 { /* DSP L1P RAM */
836 .name = "l1pram",
838 .end = DA8XX_DSP_L1P_RAM_BASE + SZ_32K - 1,
841 { /* DSP L1D RAM */
842 .name = "l1dram",
844 .end = DA8XX_DSP_L1D_RAM_BASE + SZ_32K - 1,
847 { /* dsp irq */
855 .name = "davinci-rproc",
892 " 'nn' and 'address' must both be non-zero\n", in da8xx_rproc_reserve_cma()
924 pr_warn("%s: memory not reserved for DSP, not registering DSP device\n", in da8xx_register_rproc()
926 return -ENOMEM; in da8xx_register_rproc()
931 pr_err("%s: can't register DSP device: %d\n", __func__, ret); in da8xx_register_rproc()
939 .end = DA8XX_RTC_BASE + SZ_4K - 1,
955 .name = "da830-rtc",
956 .id = -1,
982 .end = DA8XX_DDR2_CTL_BASE + SZ_32K - 1,
994 .name = "cpuidle-davinci",
1012 .end = DA8XX_SPI0_BASE + SZ_4K - 1,
1025 .end = DA830_SPI1_BASE + SZ_4K - 1,
1052 .name = "spi_davinci",
1061 .name = "spi_davinci",
1074 return -EINVAL; in da8xx_register_spi_bus()
1080 da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1; in da8xx_register_spi_bus()
1118 .name = "ahci_da850",
1119 .id = -1,
1143 .name = "cfgchip",
1147 .max_register = DA8XX_CFGCHIP4_REG - DA8XX_CFGCHIP0_REG,
1151 * da8xx_get_cfgchip - Lazy gets CFGCHIP as regmap
1153 * This is for use on non-DT boards only. For DT boards, use
1154 * syscon_regmap_lookup_by_compatible("ti,da830-cfgchip")