Lines Matching +full:parent +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-omap1/clock_data.c
5 * Copyright (C) 2004 - 2005, 2009-2010 Nokia Corporation
10 * - Clocks that are only available on some chips should be marked with the
16 #include <linux/clk.h>
20 #include <asm/mach-types.h> /* for machine_is_* */
31 /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */
42 /* Some MOD_CONF_CTRL_0 bit shifts - used in struct clk.enable_bit */
49 /* Some MOD_CONF_CTRL_1 bit shifts - used in struct clk.enable_bit */
52 /* Some OTG_SYSCON_2-specific bit fields */
55 /* Some SOFT_REQ_REG bit fields - used in struct clk.enable_bit */
75 static struct clk ck_ref = {
81 static struct clk ck_dpll1 = {
84 .parent = &ck_ref,
88 * FIXME: This clock seems to be necessary but no-one has asked for its
92 .clk = {
95 .parent = &ck_dpll1,
105 static struct clk sossi_ck = {
108 .parent = &ck_dpll1out.clk,
116 static struct clk arm_ck = {
119 .parent = &ck_dpll1,
127 .clk = {
130 .parent = &ck_dpll1,
143 * FIXME: This clock seems to be necessary but no-one has asked for its
146 static struct clk arm_gpio_ck = {
149 .parent = &ck_dpll1,
157 .clk = {
160 .parent = &ck_ref,
170 .clk = {
173 .parent = &ck_ref,
183 .clk = {
186 .parent = &ck_ref,
196 static struct clk arminth_ck16xx = {
199 .parent = &arm_ck,
208 static struct clk dsp_ck = {
211 .parent = &ck_dpll1,
220 static struct clk dspmmu_ck = {
223 .parent = &ck_dpll1,
230 static struct clk dspper_ck = {
233 .parent = &ck_dpll1,
242 static struct clk dspxor_ck = {
245 .parent = &ck_ref,
251 static struct clk dsptim_ck = {
254 .parent = &ck_ref,
261 .clk = {
264 .parent = &ck_dpll1,
274 static struct clk arminth_ck1510 = {
277 .parent = &tc_ck.clk,
285 static struct clk tipb_ck = {
286 /* No-idle controlled by "tc_ck" */
289 .parent = &tc_ck.clk,
293 static struct clk l3_ocpi_ck = {
294 /* No-idle controlled by "tc_ck" */
297 .parent = &tc_ck.clk,
303 static struct clk tc1_ck = {
306 .parent = &tc_ck.clk,
313 * FIXME: This clock seems to be necessary but no-one has asked for its
316 static struct clk tc2_ck = {
319 .parent = &tc_ck.clk,
326 static struct clk dma_ck = {
327 /* No-idle controlled by "tc_ck" */
330 .parent = &tc_ck.clk,
334 static struct clk dma_lcdfree_ck = {
337 .parent = &tc_ck.clk,
342 .clk = {
345 .parent = &tc_ck.clk,
355 .clk = {
358 .parent = &tc_ck.clk,
367 static struct clk rhea1_ck = {
370 .parent = &tc_ck.clk,
374 static struct clk rhea2_ck = {
377 .parent = &tc_ck.clk,
381 static struct clk lcd_ck_16xx = {
384 .parent = &ck_dpll1,
394 .clk = {
397 .parent = &ck_dpll1,
410 * XXX The enable_bit here is misused - it simply switches between 12MHz
415 static struct clk uart1_1510 = {
418 /* Direct from ULPD, no real parent */
419 .parent = &armper_ck.clk,
429 * XXX The enable_bit here is misused - it simply switches between 12MHz
435 .clk = {
438 /* Direct from ULPD, no real parent */
439 .parent = &armper_ck.clk,
449 * XXX The enable_bit here is misused - it simply switches between 12MHz
454 static struct clk uart2_ck = {
457 /* Direct from ULPD, no real parent */
458 .parent = &armper_ck.clk,
468 * XXX The enable_bit here is misused - it simply switches between 12MHz
473 static struct clk uart3_1510 = {
476 /* Direct from ULPD, no real parent */
477 .parent = &armper_ck.clk,
487 * XXX The enable_bit here is misused - it simply switches between 12MHz
493 .clk = {
496 /* Direct from ULPD, no real parent */
497 .parent = &armper_ck.clk,
506 static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
509 /* Direct from ULPD, no parent */
516 static struct clk usb_hhc_ck1510 = {
519 /* Direct from ULPD, no parent */
526 static struct clk usb_hhc_ck16xx = {
529 /* Direct from ULPD, no parent */
531 /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
537 static struct clk usb_dc_ck = {
540 /* Direct from ULPD, no parent */
546 static struct clk uart1_7xx = {
549 /* Direct from ULPD, no parent */
555 static struct clk uart2_7xx = {
558 /* Direct from ULPD, no parent */
564 static struct clk mclk_1510 = {
567 /* Direct from ULPD, no parent. May be enabled by ext hardware. */
573 static struct clk mclk_16xx = {
576 /* Direct from ULPD, no parent. May be enabled by ext hardware. */
584 static struct clk bclk_1510 = {
587 /* Direct from ULPD, no parent. May be enabled by ext hardware. */
591 static struct clk bclk_16xx = {
594 /* Direct from ULPD, no parent. May be enabled by ext hardware. */
602 static struct clk mmc1_ck = {
606 .parent = &armper_ck.clk,
617 static struct clk mmc2_ck = {
621 .parent = &armper_ck.clk,
628 static struct clk mmc3_ck = {
632 .parent = &armper_ck.clk,
639 static struct clk virtual_ck_mpu = {
642 .parent = &arm_ck, /* Is smarter alias for */
650 static struct clk i2c_fck = {
654 .parent = &armxor_ck.clk,
658 static struct clk i2c_ick = {
662 .parent = &armper_ck.clk,
671 /* non-ULPD clocks */
672 CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX),
673 CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310 | CK_7XX),
675 CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX),
676 CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX),
677 CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310),
678 CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
679 CLK("omap_gpio.0", "ick", &arm_gpio_ck, CK_1510 | CK_310),
680 CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
681 CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310),
682 CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310),
683 CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX),
684 CLK("omap_wdt", "ick", &dummy_ck, CK_1510 | CK_310),
685 CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310),
686 CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX),
688 CLK(NULL, "dsp_ck", &dsp_ck, CK_16XX | CK_1510 | CK_310),
689 CLK(NULL, "dspmmu_ck", &dspmmu_ck, CK_16XX | CK_1510 | CK_310),
690 CLK(NULL, "dspper_ck", &dspper_ck, CK_16XX | CK_1510 | CK_310),
691 CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310),
692 CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310),
694 CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
695 CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310),
696 CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX | CK_7XX),
697 CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX),
698 CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX),
699 CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310),
700 CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX),
701 CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
702 CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310),
703 CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX),
704 CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX),
705 CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_7XX),
706 CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310),
708 CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310),
709 CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX),
710 CLK(NULL, "uart1_ck", &uart1_7xx, CK_7XX),
711 CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310),
712 CLK(NULL, "uart2_ck", &uart2_7xx, CK_7XX),
713 CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310),
714 CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX),
715 CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310),
716 CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310),
717 CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX),
718 CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX | CK_7XX),
719 CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310),
720 CLK(NULL, "mclk", &mclk_16xx, CK_16XX),
721 CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310),
722 CLK(NULL, "bclk", &bclk_16xx, CK_16XX),
723 CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310),
724 CLK("mmci-omap.0", "fck", &mmc3_ck, CK_7XX),
725 CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
726 CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX),
727 CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX),
729 CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
730 CLK("omap_i2c.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX),
731 CLK("omap_i2c.1", "ick", &i2c_ick, CK_16XX),
732 CLK("omap_i2c.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX),
733 CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX),
734 CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX),
735 CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX),
736 CLK("omap1_spi100k.2", "ick", &dummy_ck, CK_7XX),
737 CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
738 CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX),
739 CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310),
740 CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX),
741 CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_1510 | CK_310),
742 CLK("omap-mcbsp.3", "ick", &dspper_ck, CK_16XX),
743 CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_1510 | CK_310),
744 CLK("omap-mcbsp.1", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310),
745 CLK("omap-mcbsp.2", "fck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
746 CLK("omap-mcbsp.3", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310),
787 clk_preinit(c->lk.clk); in omap1_clk_init()
802 if (c->cpu & cpu_mask) { in omap1_clk_init()
803 clkdev_add(&c->lk); in omap1_clk_init()
804 clk_register(c->lk.clk); in omap1_clk_init()
884 * of the ARM_IDLECT2 register must be set to zero. The power-on in omap1_clk_init()
893 clk_enable(&armper_ck.clk); in omap1_clk_init()
894 clk_enable(&armxor_ck.clk); in omap1_clk_init()
895 clk_enable(&armtim_ck.clk); /* This should be done by timer code */ in omap1_clk_init()