1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <asm/mach-ar7/ar7.h>
44 	u32 ctrl;  member
63 	struct tnetd7300_clock dsp;  member
67 	u32 ctrl;  member
83 	struct tnetd7200_clock dsp;  member
105 				freq = abs(base / j * i / k - target);  in approximate()
164 	u32 ctrl = readl(&clock->ctrl);  in tnetd7300_get_clock()  local
165 	u32 pll = readl(&clock->pll);  in tnetd7300_get_clock()
166 	int prediv = ((ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1;  in tnetd7300_get_clock()
167 	int postdiv = (ctrl & POSTDIV_MASK) + 1;  in tnetd7300_get_clock()
195 			(base_clock * (mul - 1)) >> 2;  in tnetd7300_get_clock()
228 	writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl);  in tnetd7300_set_clock()
230 	writel(4, &clock->pll);  in tnetd7300_set_clock()
231 	while (readl(&clock->pll) & PLL_STATUS)  in tnetd7300_set_clock()
233 	writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll);  in tnetd7300_set_clock()
245 		&clocks->bus, bootcr, AR7_AFE_CLOCK);  in tnetd7300_init_clocks()
249 			&clocks->cpu, bootcr, AR7_AFE_CLOCK);  in tnetd7300_init_clocks()
254 		tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp,  in tnetd7300_init_clocks()
269 	writel(0, &clock->ctrl);  in tnetd7200_set_clock()
270 	writel(DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F), &clock->prediv);  in tnetd7200_set_clock()
271 	writel((mul - 1) & 0xF, &clock->mul);  in tnetd7200_set_clock()
273 	while (readl(&clock->status) & 0x1)  in tnetd7200_set_clock()
276 	writel(DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F), &clock->postdiv);  in tnetd7200_set_clock()
278 	writel(readl(&clock->cmden) | 1, &clock->cmden);  in tnetd7200_set_clock()
279 	writel(readl(&clock->cmd) | 1, &clock->cmd);  in tnetd7200_set_clock()
281 	while (readl(&clock->status) & 0x1)  in tnetd7200_set_clock()
284 	writel(DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F), &clock->postdiv2);  in tnetd7200_set_clock()
286 	writel(readl(&clock->cmden) | 1, &clock->cmden);  in tnetd7200_set_clock()
287 	writel(readl(&clock->cmd) | 1, &clock->cmd);  in tnetd7200_set_clock()
289 	while (readl(&clock->status) & 0x1)  in tnetd7200_set_clock()
292 	writel(readl(&clock->ctrl) | 1, &clock->ctrl);  in tnetd7200_set_clock()
337 		printk(KERN_INFO "Clocks: Setting DSP clock\n");  in tnetd7200_init_clocks()
342 		tnetd7200_set_clock(dsp_base, &clocks->dsp,  in tnetd7200_init_clocks()
351 		tnetd7200_set_clock(cpu_base, &clocks->cpu,  in tnetd7200_init_clocks()
352 			cpu_prediv, cpu_postdiv, -1, cpu_mul,  in tnetd7200_init_clocks()
364 			tnetd7200_set_clock(cpu_base, &clocks->cpu,  in tnetd7200_init_clocks()
365 				cpu_prediv, cpu_postdiv, -1, cpu_mul,  in tnetd7200_init_clocks()
368 			printk(KERN_INFO "Clocks: Setting DSP clock\n");  in tnetd7200_init_clocks()
372 			tnetd7200_set_clock(dsp_base, &clocks->dsp,  in tnetd7200_init_clocks()
378 			printk(KERN_INFO "Clocks: Setting DSP clock\n");  in tnetd7200_init_clocks()
383 			tnetd7200_set_clock(dsp_base, &clocks->dsp,  in tnetd7200_init_clocks()
394 	tnetd7200_set_clock(usb_base, &clocks->usb,  in tnetd7200_init_clocks()
395 		usb_prediv, usb_postdiv, -1, usb_mul,  in tnetd7200_init_clocks()
423 	return clk->rate;  in clk_get_rate()
436 	if (!strcmp(id, "dsp"))  in clk_get()
440 	return ERR_PTR(-ENOENT);  in clk_get()