28 	u32 v;  in pic32_conf_get_reg_field()  local
30 	v = readl(pic32_conf_base + offset);  in pic32_conf_get_reg_field()
31 	v >>= rshift;  in pic32_conf_get_reg_field()
32 	v &= mask;  in pic32_conf_get_reg_field()
34 	return v;  in pic32_conf_get_reg_field()
39 	u32 v;  in pic32_conf_modify_atomic()  local
43 	v = readl(pic32_conf_base + offset);  in pic32_conf_modify_atomic()
44 	v &= ~mask;  in pic32_conf_modify_atomic()
45 	v |= (set & mask);  in pic32_conf_modify_atomic()
46 	writel(v, pic32_conf_base + offset);  in pic32_conf_modify_atomic()
64 	u32 mask = mode ? BIT(30) : 0;  in pic32_set_lcd_mode()
66 	return pic32_conf_modify_atomic(PIC32_CFGCON2, BIT(30), mask);  in pic32_set_lcd_mode()