Lines Matching +full:flags +full:- +full:mask
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2001-2002 MontaVista Software Inc.
7 * Copyright (C) 2003-2006 Yoichi Yuasa <yuasa@linux-mips.org>
12 * - New creation, NEC VR4122 and VR4131 are supported.
13 * - Added support for NEC VR4111 and VR4121.
15 * Yoichi Yuasa <yuasa@linux-mips.org>
16 * - Coped with INTASSIGN of NEC VR4133.
84 #define SYSINT1_IRQ_TO_PIN(x) ((x) - SYSINT1_IRQ_BASE) /* Pin 0-15 */
85 #define SYSINT2_IRQ_TO_PIN(x) ((x) - SYSINT2_IRQ_BASE) /* Pin 0-15 */
87 #define INT_TO_IRQ(x) ((x) + 2) /* Int0-4 -> IRQ2-6 */
142 void vr41xx_enable_piuint(uint16_t mask) in vr41xx_enable_piuint() argument
145 unsigned long flags; in vr41xx_enable_piuint() local
149 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_enable_piuint()
150 icu1_set(MPIUINTREG, mask); in vr41xx_enable_piuint()
151 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_enable_piuint()
157 void vr41xx_disable_piuint(uint16_t mask) in vr41xx_disable_piuint() argument
160 unsigned long flags; in vr41xx_disable_piuint() local
164 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_disable_piuint()
165 icu1_clear(MPIUINTREG, mask); in vr41xx_disable_piuint()
166 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_disable_piuint()
172 void vr41xx_enable_aiuint(uint16_t mask) in vr41xx_enable_aiuint() argument
175 unsigned long flags; in vr41xx_enable_aiuint() local
179 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_enable_aiuint()
180 icu1_set(MAIUINTREG, mask); in vr41xx_enable_aiuint()
181 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_enable_aiuint()
187 void vr41xx_disable_aiuint(uint16_t mask) in vr41xx_disable_aiuint() argument
190 unsigned long flags; in vr41xx_disable_aiuint() local
194 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_disable_aiuint()
195 icu1_clear(MAIUINTREG, mask); in vr41xx_disable_aiuint()
196 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_disable_aiuint()
202 void vr41xx_enable_kiuint(uint16_t mask) in vr41xx_enable_kiuint() argument
205 unsigned long flags; in vr41xx_enable_kiuint() local
209 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_enable_kiuint()
210 icu1_set(MKIUINTREG, mask); in vr41xx_enable_kiuint()
211 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_enable_kiuint()
217 void vr41xx_disable_kiuint(uint16_t mask) in vr41xx_disable_kiuint() argument
220 unsigned long flags; in vr41xx_disable_kiuint() local
224 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_disable_kiuint()
225 icu1_clear(MKIUINTREG, mask); in vr41xx_disable_kiuint()
226 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_disable_kiuint()
232 void vr41xx_enable_macint(uint16_t mask) in vr41xx_enable_macint() argument
235 unsigned long flags; in vr41xx_enable_macint() local
237 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_enable_macint()
238 icu1_set(MMACINTREG, mask); in vr41xx_enable_macint()
239 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_enable_macint()
244 void vr41xx_disable_macint(uint16_t mask) in vr41xx_disable_macint() argument
247 unsigned long flags; in vr41xx_disable_macint() local
249 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_disable_macint()
250 icu1_clear(MMACINTREG, mask); in vr41xx_disable_macint()
251 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_disable_macint()
256 void vr41xx_enable_dsiuint(uint16_t mask) in vr41xx_enable_dsiuint() argument
259 unsigned long flags; in vr41xx_enable_dsiuint() local
261 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_enable_dsiuint()
262 icu1_set(MDSIUINTREG, mask); in vr41xx_enable_dsiuint()
263 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_enable_dsiuint()
268 void vr41xx_disable_dsiuint(uint16_t mask) in vr41xx_disable_dsiuint() argument
271 unsigned long flags; in vr41xx_disable_dsiuint() local
273 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_disable_dsiuint()
274 icu1_clear(MDSIUINTREG, mask); in vr41xx_disable_dsiuint()
275 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_disable_dsiuint()
280 void vr41xx_enable_firint(uint16_t mask) in vr41xx_enable_firint() argument
283 unsigned long flags; in vr41xx_enable_firint() local
285 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_enable_firint()
286 icu2_set(MFIRINTREG, mask); in vr41xx_enable_firint()
287 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_enable_firint()
292 void vr41xx_disable_firint(uint16_t mask) in vr41xx_disable_firint() argument
295 unsigned long flags; in vr41xx_disable_firint() local
297 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_disable_firint()
298 icu2_clear(MFIRINTREG, mask); in vr41xx_disable_firint()
299 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_disable_firint()
307 unsigned long flags; in vr41xx_enable_pciint() local
312 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_enable_pciint()
314 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_enable_pciint()
323 unsigned long flags; in vr41xx_disable_pciint() local
328 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_disable_pciint()
330 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_disable_pciint()
339 unsigned long flags; in vr41xx_enable_scuint() local
344 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_enable_scuint()
346 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_enable_scuint()
355 unsigned long flags; in vr41xx_disable_scuint() local
360 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_disable_scuint()
362 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_disable_scuint()
368 void vr41xx_enable_csiint(uint16_t mask) in vr41xx_enable_csiint() argument
371 unsigned long flags; in vr41xx_enable_csiint() local
376 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_enable_csiint()
377 icu2_set(MCSIINTREG, mask); in vr41xx_enable_csiint()
378 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_enable_csiint()
384 void vr41xx_disable_csiint(uint16_t mask) in vr41xx_disable_csiint() argument
387 unsigned long flags; in vr41xx_disable_csiint() local
392 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_disable_csiint()
393 icu2_clear(MCSIINTREG, mask); in vr41xx_disable_csiint()
394 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_disable_csiint()
403 unsigned long flags; in vr41xx_enable_bcuint() local
408 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_enable_bcuint()
410 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_enable_bcuint()
419 unsigned long flags; in vr41xx_disable_bcuint() local
424 raw_spin_lock_irqsave(&desc->lock, flags); in vr41xx_disable_bcuint()
426 raw_spin_unlock_irqrestore(&desc->lock, flags); in vr41xx_disable_bcuint()
434 icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(d->irq)); in disable_sysint1_irq()
439 icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(d->irq)); in enable_sysint1_irq()
450 icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(d->irq)); in disable_sysint2_irq()
455 icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(d->irq)); in enable_sysint2_irq()
472 raw_spin_lock_irq(&desc->lock); in set_sysint1_assign()
511 raw_spin_unlock_irq(&desc->lock); in set_sysint1_assign()
512 return -EINVAL; in set_sysint1_assign()
519 raw_spin_unlock_irq(&desc->lock); in set_sysint1_assign()
532 raw_spin_lock_irq(&desc->lock); in set_sysint2_assign()
579 raw_spin_unlock_irq(&desc->lock); in set_sysint2_assign()
580 return -EINVAL; in set_sysint2_assign()
587 raw_spin_unlock_irq(&desc->lock); in set_sysint2_assign()
594 int retval = -EINVAL; in vr41xx_set_intassign()
597 return -EINVAL; in vr41xx_set_intassign()
600 return -EINVAL; in vr41xx_set_intassign()
643 return -1; in icu_get_irq()
665 return -ENODEV; in vr41xx_icu_init()
669 return -EBUSY; in vr41xx_icu_init()
673 return -EBUSY; in vr41xx_icu_init()
680 return -ENOMEM; in vr41xx_icu_init()
688 return -ENOMEM; in vr41xx_icu_init()