1 // SPDX-License-Identifier: GPL-2.0-or-later
7  *  -- paulus
10  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
29 #include <asm/code-patching.h>
57 			return bat_addrs[b].phys + (va - bat_addrs[b].start);  in v_block_mapped()
69 	    	    && pa < (bat_addrs[b].limit-bat_addrs[b].start)  in p_block_mapped()
71 			return bat_addrs[b].start+(pa-bat_addrs[b].phys);  in p_block_mapped()
86 	return -1;  in find_free_bat()
92  * - max block size is 256 on 6xx.
93  * - base address must be aligned to the block size. So the maximum block size
94  *   is identified by the lowest bit set to 1 in the base address (for instance
96  * - block size has to be a power of two. This is calculated by finding the
97  *   highest bit set to 1.
99 unsigned int bat_block_size(unsigned long base, unsigned long top)  in bat_block_size()  argument
102 	unsigned int base_shift = (ffs(base) - 1) & 31;  in bat_block_size()
103 	unsigned int block_shift = (fls(top - base) - 1) & 31;  in bat_block_size()
109  * Set up one of the IBAT (block address translation) register pairs.
116 	unsigned int bl = (size >> 17) - 1;  in setibat()
139 static unsigned long __init __mmu_mapin_ram(unsigned long base, unsigned long top)  in __mmu_mapin_ram()  argument
143 	while ((idx = find_free_bat()) != -1 && base != top) {  in __mmu_mapin_ram()
144 		unsigned int size = bat_block_size(base, top);  in __mmu_mapin_ram()
155 unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)  in mmu_mapin_ram()  argument
158 	unsigned long border = (unsigned long)__init_begin - PAGE_OFFSET;  in mmu_mapin_ram()
167 		if (top >= border)  in mmu_mapin_ram()
168 			top = border;  in mmu_mapin_ram()
171 	if (!strict_kernel_rwx_enabled() || base >= border || top <= border)  in mmu_mapin_ram()
172 		return __mmu_mapin_ram(base, top);  in mmu_mapin_ram()
178 	return __mmu_mapin_ram(border, top);  in mmu_mapin_ram()
188 	if (addr > ALIGN(MODULES_END, SZ_256M) - 1)  in is_module_segment()
193 	if (addr > ALIGN(VMALLOC_END, SZ_256M) - 1)  in is_module_segment()
203 	unsigned long base = (unsigned long)_stext - PAGE_OFFSET;  in mmu_mark_initmem_nx()
204 	unsigned long top = ALIGN((unsigned long)_etext - PAGE_OFFSET, SZ_128K);  in mmu_mark_initmem_nx()  local
205 	unsigned long border = (unsigned long)__init_begin - PAGE_OFFSET;  in mmu_mark_initmem_nx()
208 	for (i = 0; i < nb - 1 && base < top;) {  in mmu_mark_initmem_nx()
209 		size = bat_block_size(base, top);  in mmu_mark_initmem_nx()
213 	if (base < top) {  in mmu_mark_initmem_nx()
214 		size = bat_block_size(base, top);  in mmu_mark_initmem_nx()
215 		if ((top - base) > size) {  in mmu_mark_initmem_nx()
230 		/* Do not set NX on VM space for modules */  in mmu_mark_initmem_nx()
254  * Set up one of the I/D BAT (block address translation) register pairs.
257  * On 603+, only set IBAT when _PAGE_EXEC is set
267 	if (index == -1)  in setbat()
269 	if (index == -1) {  in setbat()
280 	bl = (size >> 17) - 1;  in setbat()
299 	bat_addrs[index].limit = virt + ((bl + 1) << 17) - 1;  in setbat()
314 		add_hash_page(mm->context.id, ea, pmd_val(*pmd));  in hash_preload()
332 	 * called with either mm->page_table_lock held or ptl lock held  in update_mmu_cache()
335 	/* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */  in update_mmu_cache()
340 	if (!current->thread.regs)  in update_mmu_cache()
344 	if (TRAP(current->thread.regs) != 0x300 && TRAP(current->thread.regs) != 0x400)  in update_mmu_cache()
347 	hash_preload(vma->vm_mm, address);  in update_mmu_cache()
363 #define SDR1_LOW_BITS	((n_hpteg - 1) >> 10)  in MMU_init_hw()
375 	if (n_hpteg & (n_hpteg - 1)) {  in MMU_init_hw()
395 	Hash_mask = n_hpteg - 1;  in MMU_init_hw()
396 	hash_mb2 = hash_mb = 32 - LG_HPTEG_SIZE - lg_n_hpteg;  in MMU_init_hw()
398 		hash_mb2 = 16 - LG_HPTEG_SIZE;  in MMU_init_hw()
403 	unsigned int hmask = Hash_mask >> (16 - LG_HPTEG_SIZE);  in MMU_init_hw_patch()
404 	unsigned int hash = (unsigned int)Hash - PAGE_OFFSET;  in MMU_init_hw_patch()