Lines Matching +full:free +full:- +full:flowing
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * In-Memory Collection (IMC) Performance Monitor counter support.
12 #include <asm/imc-pmu.h>
21 * Used to avoid races in counting the nest-pmu units during hotplug
50 * core and trace-imc
60 return container_of(event->pmu, struct imc_pmu, pmu); in imc_event_to_pmu()
63 PMU_FORMAT_ATTR(event, "config:0-61");
64 PMU_FORMAT_ATTR(offset, "config:0-31");
66 PMU_FORMAT_ATTR(mode, "config:33-40");
80 /* Format attribute for imc trace-mode */
81 PMU_FORMAT_ATTR(cpmc_reserved, "config:0-19");
82 PMU_FORMAT_ATTR(cpmc_event, "config:20-27");
83 PMU_FORMAT_ATTR(cpmc_samplesel, "config:28-29");
84 PMU_FORMAT_ATTR(cpmc_load, "config:30-61");
108 switch(imc_pmu->domain){ in imc_pmu_cpumask_get_attr()
141 sysfs_attr_init(&attr->attr.attr); in device_str_attr_create()
143 attr->event_str = str; in device_str_attr_create()
144 attr->attr.attr.name = name; in device_str_attr_create()
145 attr->attr.attr.mode = 0444; in device_str_attr_create()
146 attr->attr.show = perf_event_sysfs_show; in device_str_attr_create()
148 return &attr->attr.attr; in device_str_attr_create()
161 event->value = base + reg; in imc_parse_event()
163 if (of_property_read_string(np, "event-name", &s)) in imc_parse_event()
166 event->name = kasprintf(GFP_KERNEL, "%s%s", prefix, s); in imc_parse_event()
167 if (!event->name) in imc_parse_event()
174 event->scale = kstrdup(s, GFP_KERNEL); in imc_parse_event()
175 if (!event->scale) in imc_parse_event()
183 event->unit = kstrdup(s, GFP_KERNEL); in imc_parse_event()
184 if (!event->unit) in imc_parse_event()
190 kfree(event->unit); in imc_parse_event()
191 kfree(event->scale); in imc_parse_event()
192 kfree(event->name); in imc_parse_event()
193 return -EINVAL; in imc_parse_event()
243 if (of_property_read_string(node, "events-prefix", &prefix)) in update_events_in_group()
257 pmu->events = kcalloc(ct, sizeof(struct imc_events), GFP_KERNEL); in update_events_in_group()
258 if (!pmu->events) in update_events_in_group()
259 return -ENOMEM; in update_events_in_group()
264 ret = imc_parse_event(np, g_scale, g_unit, prefix, base_reg, &pmu->events[ct]); in update_events_in_group()
272 imc_free_events(pmu->events, ct); in update_events_in_group()
273 return -ENOMEM; in update_events_in_group()
280 * "ct" has the total event structs added from the events-parent node. in update_events_in_group()
287 imc_free_events(pmu->events, ct); in update_events_in_group()
288 return -ENOMEM; in update_events_in_group()
291 attr_group->name = "events"; in update_events_in_group()
292 attr_group->attrs = attrs; in update_events_in_group()
294 ev_val_str = kasprintf(GFP_KERNEL, "event=0x%x", pmu->events[i].value); in update_events_in_group()
297 dev_str = device_str_attr_create(pmu->events[i].name, ev_val_str); in update_events_in_group()
302 if (pmu->events[i].scale) { in update_events_in_group()
303 ev_scale_str = kasprintf(GFP_KERNEL, "%s.scale", pmu->events[i].name); in update_events_in_group()
306 dev_str = device_str_attr_create(ev_scale_str, pmu->events[i].scale); in update_events_in_group()
313 if (pmu->events[i].unit) { in update_events_in_group()
314 ev_unit_str = kasprintf(GFP_KERNEL, "%s.unit", pmu->events[i].name); in update_events_in_group()
317 dev_str = device_str_attr_create(ev_unit_str, pmu->events[i].unit); in update_events_in_group()
326 pmu->attr_groups[IMC_EVENT_ATTR] = attr_group; in update_events_in_group()
345 perf_pmu_migrate_context(&(*pn)->pmu, old_cpu, new_cpu); in nest_change_cpu_context()
352 int nid, target = -1; in ppc_nest_imc_cpu_offline()
407 return -EINVAL; in ppc_nest_imc_cpu_offline()
409 ref->refc = 0; in ppc_nest_imc_cpu_offline()
457 if (event->cpu < 0) in nest_imc_counters_release()
460 node_id = cpu_to_node(event->cpu); in nest_imc_counters_release()
468 ref = get_nest_pmu_ref(event->cpu); in nest_imc_counters_release()
473 spin_lock(&ref->lock); in nest_imc_counters_release()
474 if (ref->refc == 0) { in nest_imc_counters_release()
480 * function set the ref->count to zero, if the cpu which is in nest_imc_counters_release()
485 spin_unlock(&ref->lock); in nest_imc_counters_release()
488 ref->refc--; in nest_imc_counters_release()
489 if (ref->refc == 0) { in nest_imc_counters_release()
491 get_hard_smp_processor_id(event->cpu)); in nest_imc_counters_release()
493 spin_unlock(&ref->lock); in nest_imc_counters_release()
494 pr_err("nest-imc: Unable to stop the counters for core %d\n", node_id); in nest_imc_counters_release()
497 } else if (ref->refc < 0) { in nest_imc_counters_release()
498 WARN(1, "nest-imc: Invalid event reference count\n"); in nest_imc_counters_release()
499 ref->refc = 0; in nest_imc_counters_release()
501 spin_unlock(&ref->lock); in nest_imc_counters_release()
507 u32 l_config, config = event->attr.config; in nest_imc_event_init()
513 if (event->attr.type != event->pmu->type) in nest_imc_event_init()
514 return -ENOENT; in nest_imc_event_init()
517 if (event->hw.sample_period) in nest_imc_event_init()
518 return -EINVAL; in nest_imc_event_init()
520 if (event->cpu < 0) in nest_imc_event_init()
521 return -EINVAL; in nest_imc_event_init()
526 if ((config & IMC_EVENT_OFFSET_MASK) > pmu->counter_mem_size) in nest_imc_event_init()
527 return -EINVAL; in nest_imc_event_init()
530 * Nest HW counter memory resides in a per-chip reserve-memory (HOMER). in nest_imc_event_init()
533 chip_id = cpu_to_chip_id(event->cpu); in nest_imc_event_init()
537 return -ENODEV; in nest_imc_event_init()
539 pcni = pmu->mem_info; in nest_imc_event_init()
541 if (pcni->id == chip_id) { in nest_imc_event_init()
546 } while (pcni->vbase != 0); in nest_imc_event_init()
549 return -ENODEV; in nest_imc_event_init()
555 event->hw.event_base = (u64)pcni->vbase + l_config; in nest_imc_event_init()
556 node_id = cpu_to_node(event->cpu); in nest_imc_event_init()
562 ref = get_nest_pmu_ref(event->cpu); in nest_imc_event_init()
564 return -EINVAL; in nest_imc_event_init()
566 spin_lock(&ref->lock); in nest_imc_event_init()
567 if (ref->refc == 0) { in nest_imc_event_init()
569 get_hard_smp_processor_id(event->cpu)); in nest_imc_event_init()
571 spin_unlock(&ref->lock); in nest_imc_event_init()
572 pr_err("nest-imc: Unable to start the counters for node %d\n", in nest_imc_event_init()
577 ++ref->refc; in nest_imc_event_init()
578 spin_unlock(&ref->lock); in nest_imc_event_init()
580 event->destroy = nest_imc_counters_release; in nest_imc_event_init()
603 mem_info = &core_imc_pmu->mem_info[core_id]; in core_imc_mem_init()
604 mem_info->id = core_id; in core_imc_mem_init()
611 return -ENOMEM; in core_imc_mem_init()
612 mem_info->vbase = page_address(page); in core_imc_mem_init()
618 __pa((void *)mem_info->vbase), in core_imc_mem_init()
621 free_pages((u64)mem_info->vbase, get_order(size)); in core_imc_mem_init()
622 mem_info->vbase = NULL; in core_imc_mem_init()
633 mem_info = &core_imc_pmu->mem_info[core_id]; in is_core_imc_mem_inited()
634 if (!mem_info->vbase) in is_core_imc_mem_inited()
654 ret = core_imc_mem_init(cpu, core_imc_pmu->counter_mem_size); in ppc_core_imc_cpu_online()
690 if (!core_imc_pmu->pmu.event_init) in ppc_core_imc_cpu_offline()
701 perf_pmu_migrate_context(&core_imc_pmu->pmu, cpu, ncpu); in ppc_core_imc_cpu_offline()
712 return -EINVAL; in ppc_core_imc_cpu_offline()
714 ref->refc = 0; in ppc_core_imc_cpu_offline()
717 * last cpu in this core and core-imc event running in ppc_core_imc_cpu_offline()
722 imc_global_refc.refc--; in ppc_core_imc_cpu_offline()
740 imc_global_refc.refc--; in reset_global_refc()
759 if (event->cpu < 0) in core_imc_counters_release()
767 core_id = event->cpu / threads_per_core; in core_imc_counters_release()
774 spin_lock(&ref->lock); in core_imc_counters_release()
775 if (ref->refc == 0) { in core_imc_counters_release()
781 * function set the ref->count to zero, if the cpu which is in core_imc_counters_release()
786 spin_unlock(&ref->lock); in core_imc_counters_release()
789 ref->refc--; in core_imc_counters_release()
790 if (ref->refc == 0) { in core_imc_counters_release()
792 get_hard_smp_processor_id(event->cpu)); in core_imc_counters_release()
794 spin_unlock(&ref->lock); in core_imc_counters_release()
798 } else if (ref->refc < 0) { in core_imc_counters_release()
799 WARN(1, "core-imc: Invalid event reference count\n"); in core_imc_counters_release()
800 ref->refc = 0; in core_imc_counters_release()
802 spin_unlock(&ref->lock); in core_imc_counters_release()
810 u64 config = event->attr.config; in core_imc_event_init()
815 if (event->attr.type != event->pmu->type) in core_imc_event_init()
816 return -ENOENT; in core_imc_event_init()
819 if (event->hw.sample_period) in core_imc_event_init()
820 return -EINVAL; in core_imc_event_init()
822 if (event->cpu < 0) in core_imc_event_init()
823 return -EINVAL; in core_imc_event_init()
825 event->hw.idx = -1; in core_imc_event_init()
829 if (((config & IMC_EVENT_OFFSET_MASK) > pmu->counter_mem_size)) in core_imc_event_init()
830 return -EINVAL; in core_imc_event_init()
832 if (!is_core_imc_mem_inited(event->cpu)) in core_imc_event_init()
833 return -ENODEV; in core_imc_event_init()
835 core_id = event->cpu / threads_per_core; in core_imc_event_init()
836 pcmi = &core_imc_pmu->mem_info[core_id]; in core_imc_event_init()
837 if ((!pcmi->vbase)) in core_imc_event_init()
838 return -ENODEV; in core_imc_event_init()
842 return -EINVAL; in core_imc_event_init()
850 spin_lock(&ref->lock); in core_imc_event_init()
851 if (ref->refc == 0) { in core_imc_event_init()
853 get_hard_smp_processor_id(event->cpu)); in core_imc_event_init()
855 spin_unlock(&ref->lock); in core_imc_event_init()
856 pr_err("core-imc: Unable to start the counters for core %d\n", in core_imc_event_init()
861 ++ref->refc; in core_imc_event_init()
862 spin_unlock(&ref->lock); in core_imc_event_init()
865 * Since the system can run either in accumulation or trace-mode in core_imc_event_init()
866 * of IMC at a time, core-imc events are allowed only if no other in core_imc_event_init()
877 * the system, so set the refc.id to core-imc. in core_imc_event_init()
883 return -EBUSY; in core_imc_event_init()
887 event->hw.event_base = (u64)pcmi->vbase + (config & IMC_EVENT_OFFSET_MASK); in core_imc_event_init()
888 event->destroy = core_imc_counters_release; in core_imc_event_init()
896 * written to the LDBAR for that cpu, when the thread-imc event
902 * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - |
909 * | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - | - - - - |
922 * free the memory in cpu offline path. in thread_imc_mem_alloc()
928 return -ENOMEM; in thread_imc_mem_alloc()
950 * For thread-imc, bit 0 of LDBAR will be set to 1 in the in ppc_thread_imc_cpu_offline()
956 /* Reduce the refc if thread-imc event running on this cpu */ in ppc_thread_imc_cpu_offline()
959 imc_global_refc.refc--; in ppc_thread_imc_cpu_offline()
975 u32 config = event->attr.config; in thread_imc_event_init()
979 if (event->attr.type != event->pmu->type) in thread_imc_event_init()
980 return -ENOENT; in thread_imc_event_init()
983 return -EACCES; in thread_imc_event_init()
986 if (event->hw.sample_period) in thread_imc_event_init()
987 return -EINVAL; in thread_imc_event_init()
989 event->hw.idx = -1; in thread_imc_event_init()
993 if (((config & IMC_EVENT_OFFSET_MASK) > pmu->counter_mem_size)) in thread_imc_event_init()
994 return -EINVAL; in thread_imc_event_init()
996 target = event->hw.target; in thread_imc_event_init()
998 return -EINVAL; in thread_imc_event_init()
1003 * system, if not set the global id to thread-imc. in thread_imc_event_init()
1010 return -EBUSY; in thread_imc_event_init()
1014 event->pmu->task_ctx_nr = perf_sw_context; in thread_imc_event_init()
1015 event->destroy = reset_global_refc; in thread_imc_event_init()
1021 if (!strncmp(event->pmu->name, "thread_imc", strlen("thread_imc"))) in is_thread_imc_pmu()
1033 return (u64 *)(addr + (event->attr.config & IMC_EVENT_OFFSET_MASK)); in get_event_base_addr()
1036 return (u64 *)event->hw.event_base; in get_event_base_addr()
1063 * In-Memory Collection (IMC) counters are free flowing counters. in imc_read_counter()
1070 local64_set(&event->hw.prev_count, data); in imc_read_counter()
1079 counter_prev = local64_read(&event->hw.prev_count); in imc_event_update()
1081 final_count = counter_new - counter_prev; in imc_event_update()
1084 local64_add(final_count, &event->count); in imc_event_update()
1090 * In Memory Counters are free flowing counters. HW or the microcode in imc_event_start()
1125 return -EINVAL; in thread_imc_event_add()
1139 return -EINVAL; in thread_imc_event_add()
1141 spin_lock(&ref->lock); in thread_imc_event_add()
1142 if (ref->refc == 0) { in thread_imc_event_add()
1145 spin_unlock(&ref->lock); in thread_imc_event_add()
1146 pr_err("thread-imc: Unable to start the counter\ in thread_imc_event_add()
1148 return -EINVAL; in thread_imc_event_add()
1151 ++ref->refc; in thread_imc_event_add()
1152 spin_unlock(&ref->lock); in thread_imc_event_add()
1169 spin_lock(&ref->lock); in thread_imc_event_del()
1170 ref->refc--; in thread_imc_event_del()
1171 if (ref->refc == 0) { in thread_imc_event_del()
1174 spin_unlock(&ref->lock); in thread_imc_event_del()
1175 pr_err("thread-imc: Unable to stop the counters\ in thread_imc_event_del()
1179 } else if (ref->refc < 0) { in thread_imc_event_del()
1180 ref->refc = 0; in thread_imc_event_del()
1182 spin_unlock(&ref->lock); in thread_imc_event_del()
1210 return -ENOMEM; in trace_imc_mem_alloc()
1239 * it is set to zero for imc trace-mode in ppc_trace_imc_cpu_offline()
1241 * Reduce the refc if any trace-imc event running in ppc_trace_imc_cpu_offline()
1246 imc_global_refc.refc--; in ppc_trace_imc_cpu_offline()
1266 * Function to parse trace-imc data obtained
1276 if (be64_to_cpu(READ_ONCE(mem->tb1)) > *prev_tb) in trace_imc_prepare_sample()
1277 *prev_tb = be64_to_cpu(READ_ONCE(mem->tb1)); in trace_imc_prepare_sample()
1279 return -EINVAL; in trace_imc_prepare_sample()
1281 if ((be64_to_cpu(READ_ONCE(mem->tb1)) & IMC_TRACE_RECORD_TB1_MASK) != in trace_imc_prepare_sample()
1282 be64_to_cpu(READ_ONCE(mem->tb2))) in trace_imc_prepare_sample()
1283 return -EINVAL; in trace_imc_prepare_sample()
1286 data->ip = be64_to_cpu(READ_ONCE(mem->ip)); in trace_imc_prepare_sample()
1287 data->period = event->hw.last_period; in trace_imc_prepare_sample()
1289 header->type = PERF_RECORD_SAMPLE; in trace_imc_prepare_sample()
1290 header->size = sizeof(*header) + event->header_size; in trace_imc_prepare_sample()
1291 header->misc = 0; in trace_imc_prepare_sample()
1294 switch (IMC_TRACE_RECORD_VAL_HVPR(be64_to_cpu(READ_ONCE(mem->val)))) { in trace_imc_prepare_sample()
1295 case 0:/* when MSR HV and PR not set in the trace-record */ in trace_imc_prepare_sample()
1296 header->misc |= PERF_RECORD_MISC_GUEST_KERNEL; in trace_imc_prepare_sample()
1299 header->misc |= PERF_RECORD_MISC_GUEST_USER; in trace_imc_prepare_sample()
1302 header->misc |= PERF_RECORD_MISC_KERNEL; in trace_imc_prepare_sample()
1305 header->misc |= PERF_RECORD_MISC_USER; in trace_imc_prepare_sample()
1312 if (is_kernel_addr(data->ip)) in trace_imc_prepare_sample()
1313 header->misc |= PERF_RECORD_MISC_KERNEL; in trace_imc_prepare_sample()
1315 header->misc |= PERF_RECORD_MISC_USER; in trace_imc_prepare_sample()
1356 /* Set trace-imc bit in ldbar and load ldbar with per-thread memory address */ in trace_imc_event_add()
1360 /* trace-imc reference count */ in trace_imc_event_add()
1365 return -EINVAL; in trace_imc_event_add()
1369 spin_lock(&ref->lock); in trace_imc_event_add()
1370 if (ref->refc == 0) { in trace_imc_event_add()
1373 spin_unlock(&ref->lock); in trace_imc_event_add()
1374 pr_err("trace-imc: Unable to start the counters for core %d\n", core_id); in trace_imc_event_add()
1375 return -EINVAL; in trace_imc_event_add()
1378 ++ref->refc; in trace_imc_event_add()
1379 spin_unlock(&ref->lock); in trace_imc_event_add()
1412 spin_lock(&ref->lock); in trace_imc_event_del()
1413 ref->refc--; in trace_imc_event_del()
1414 if (ref->refc == 0) { in trace_imc_event_del()
1417 spin_unlock(&ref->lock); in trace_imc_event_del()
1418 pr_err("trace-imc: Unable to stop the counters for core %d\n", core_id); in trace_imc_event_del()
1421 } else if (ref->refc < 0) { in trace_imc_event_del()
1422 ref->refc = 0; in trace_imc_event_del()
1424 spin_unlock(&ref->lock); in trace_imc_event_del()
1431 if (event->attr.type != event->pmu->type) in trace_imc_event_init()
1432 return -ENOENT; in trace_imc_event_init()
1435 return -EACCES; in trace_imc_event_init()
1438 if (event->attr.sample_period == 0) in trace_imc_event_init()
1439 return -ENOENT; in trace_imc_event_init()
1450 * system, so set the refc.id to trace-imc. in trace_imc_event_init()
1456 return -EBUSY; in trace_imc_event_init()
1460 event->hw.idx = -1; in trace_imc_event_init()
1466 event->pmu->task_ctx_nr = perf_sw_context; in trace_imc_event_init()
1467 event->destroy = reset_global_refc; in trace_imc_event_init()
1474 pmu->pmu.task_ctx_nr = perf_invalid_context; in update_pmu_ops()
1475 pmu->pmu.add = imc_event_add; in update_pmu_ops()
1476 pmu->pmu.del = imc_event_stop; in update_pmu_ops()
1477 pmu->pmu.start = imc_event_start; in update_pmu_ops()
1478 pmu->pmu.stop = imc_event_stop; in update_pmu_ops()
1479 pmu->pmu.read = imc_event_update; in update_pmu_ops()
1480 pmu->pmu.attr_groups = pmu->attr_groups; in update_pmu_ops()
1481 pmu->pmu.capabilities = PERF_PMU_CAP_NO_EXCLUDE; in update_pmu_ops()
1482 pmu->attr_groups[IMC_FORMAT_ATTR] = &imc_format_group; in update_pmu_ops()
1484 switch (pmu->domain) { in update_pmu_ops()
1486 pmu->pmu.event_init = nest_imc_event_init; in update_pmu_ops()
1487 pmu->attr_groups[IMC_CPUMASK_ATTR] = &imc_pmu_cpumask_attr_group; in update_pmu_ops()
1490 pmu->pmu.event_init = core_imc_event_init; in update_pmu_ops()
1491 pmu->attr_groups[IMC_CPUMASK_ATTR] = &imc_pmu_cpumask_attr_group; in update_pmu_ops()
1494 pmu->pmu.event_init = thread_imc_event_init; in update_pmu_ops()
1495 pmu->pmu.add = thread_imc_event_add; in update_pmu_ops()
1496 pmu->pmu.del = thread_imc_event_del; in update_pmu_ops()
1497 pmu->pmu.start_txn = thread_imc_pmu_start_txn; in update_pmu_ops()
1498 pmu->pmu.cancel_txn = thread_imc_pmu_cancel_txn; in update_pmu_ops()
1499 pmu->pmu.commit_txn = thread_imc_pmu_commit_txn; in update_pmu_ops()
1502 pmu->pmu.event_init = trace_imc_event_init; in update_pmu_ops()
1503 pmu->pmu.add = trace_imc_event_add; in update_pmu_ops()
1504 pmu->pmu.del = trace_imc_event_del; in update_pmu_ops()
1505 pmu->pmu.start = trace_imc_event_start; in update_pmu_ops()
1506 pmu->pmu.stop = trace_imc_event_stop; in update_pmu_ops()
1507 pmu->pmu.read = trace_imc_event_read; in update_pmu_ops()
1508 pmu->attr_groups[IMC_FORMAT_ATTR] = &trace_imc_format_group; in update_pmu_ops()
1525 return -ENOMEM; in init_nest_pmu_ref()
1563 struct imc_mem_info *ptr = core_imc_pmu->mem_info; in cleanup_all_core_imc_memory()
1564 int size = core_imc_pmu->counter_mem_size; in cleanup_all_core_imc_memory()
1579 * By setting 0th bit of LDBAR to zero, we disable thread-imc in thread_imc_ldbar_disable()
1613 /* Function to free the attr_groups which are dynamically allocated */
1616 if (pmu_ptr->attr_groups[IMC_EVENT_ATTR]) in imc_common_mem_free()
1617 kfree(pmu_ptr->attr_groups[IMC_EVENT_ATTR]->attrs); in imc_common_mem_free()
1618 kfree(pmu_ptr->attr_groups[IMC_EVENT_ATTR]); in imc_common_mem_free()
1623 * free the memory.
1629 if (pmu_ptr->domain == IMC_DOMAIN_NEST) { in imc_common_cpuhp_mem_free()
1639 nest_pmus--; in imc_common_cpuhp_mem_free()
1643 /* Free core_imc memory */ in imc_common_cpuhp_mem_free()
1644 if (pmu_ptr->domain == IMC_DOMAIN_CORE) { in imc_common_cpuhp_mem_free()
1649 /* Free thread_imc memory */ in imc_common_cpuhp_mem_free()
1650 if (pmu_ptr->domain == IMC_DOMAIN_THREAD) { in imc_common_cpuhp_mem_free()
1655 if (pmu_ptr->domain == IMC_DOMAIN_TRACE) { in imc_common_cpuhp_mem_free()
1662 * Function to unregister thread-imc if core-imc
1669 perf_pmu_unregister(&thread_imc_pmu->pmu); in unregister_thread_imc()
1679 int nr_cores, cpu, res = -ENOMEM; in imc_mem_init()
1682 return -ENODEV; in imc_mem_init()
1684 switch (pmu_ptr->domain) { in imc_mem_init()
1687 pmu_ptr->pmu.name = kasprintf(GFP_KERNEL, "%s%s_imc", "nest_", s); in imc_mem_init()
1688 if (!pmu_ptr->pmu.name) in imc_mem_init()
1703 pmu_ptr->pmu.name = kasprintf(GFP_KERNEL, "%s%s", s, "_imc"); in imc_mem_init()
1704 if (!pmu_ptr->pmu.name) in imc_mem_init()
1708 pmu_ptr->mem_info = kcalloc(nr_cores, sizeof(struct imc_mem_info), in imc_mem_init()
1711 if (!pmu_ptr->mem_info) in imc_mem_init()
1718 kfree(pmu_ptr->mem_info); in imc_mem_init()
1726 pmu_ptr->pmu.name = kasprintf(GFP_KERNEL, "%s%s", s, "_imc"); in imc_mem_init()
1727 if (!pmu_ptr->pmu.name) in imc_mem_init()
1730 thread_imc_mem_size = pmu_ptr->counter_mem_size; in imc_mem_init()
1732 res = thread_imc_mem_alloc(cpu, pmu_ptr->counter_mem_size); in imc_mem_init()
1743 pmu_ptr->pmu.name = kasprintf(GFP_KERNEL, "%s%s", s, "_imc"); in imc_mem_init()
1744 if (!pmu_ptr->pmu.name) in imc_mem_init()
1745 return -ENOMEM; in imc_mem_init()
1751 return -ENOMEM; in imc_mem_init()
1753 trace_imc_mem_size = pmu_ptr->counter_mem_size; in imc_mem_init()
1763 return -EINVAL; in imc_mem_init()
1789 switch (pmu_ptr->domain) { in init_imc_pmu()
1844 return -EINVAL; /* Unknown domain */ in init_imc_pmu()
1855 ret = perf_pmu_register(&pmu_ptr->pmu, pmu_ptr->pmu.name, -1); in init_imc_pmu()
1860 pmu_ptr->pmu.name); in init_imc_pmu()