Lines Matching full:dpl
1691 u8 dpl, rpl; in __load_segment_descriptor() local
1715 seg_desc.dpl = 3; in __load_segment_descriptor()
1736 * SS.DPL, so fake an expand-up 32-bit data segment. in __load_segment_descriptor()
1741 seg_desc.dpl = cpl; in __load_segment_descriptor()
1765 dpl = seg_desc.dpl; in __load_segment_descriptor()
1773 if (rpl != cpl || (seg_desc.type & 0xa) != 0x2 || dpl != cpl) in __load_segment_descriptor()
1782 if (dpl > cpl) in __load_segment_descriptor()
1786 if (rpl > cpl || dpl != cpl) in __load_segment_descriptor()
1813 * and (both RPL and CPL > DPL)) in __load_segment_descriptor()
1817 (rpl > dpl && cpl > dpl))) in __load_segment_descriptor()
1872 * However, the Intel manual says that putting IST=1/DPL=3 in in load_segment_descriptor()
2444 desc->dpl = (flags >> 13) & 3; in rsm_set_desc_flags()
2762 cs->dpl = 0; /* will be adjusted later */ in setup_syscalls_segments()
2773 ss->dpl = 0; in setup_syscalls_segments()
2958 cs.dpl = 3; in em_sysexit()
2959 ss.dpl = 3; in em_sysexit()
3372 * 1. jmp/call/int to task gate: Check against DPL of the task gate in emulator_do_task_switch()
3381 int dpl; in emulator_do_task_switch() local
3388 dpl = task_gate_desc.dpl; in emulator_do_task_switch()
3389 if ((tss_selector & 3) > dpl || ops->cpl(ctxt) > dpl) in emulator_do_task_switch()