Lines Matching +full:pio +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
15 * as Documentation/driver-api/libata.rst
82 { 0xfb, 0x2b, 0xac }, /* PIO mode 0 */
83 { 0x46, 0x29, 0xa4 }, /* PIO mode 1 */
84 { 0x23, 0x26, 0x64 }, /* PIO mode 2 */
85 { 0x27, 0x0d, 0x35 }, /* PIO mode 3, IORDY on, Prefetch off */
86 { 0x23, 0x09, 0x25 }, /* PIO mode 4, IORDY on, Prefetch off */
92 { 0xdf, 0x5f }, /* MDMA mode 0 */
93 { 0x6b, 0x27 }, /* MDMA mode 1 */
94 { 0x69, 0x25 }, /* MDMA mode 2 */
100 { 0x4a, 0x0f, 0xd5 }, /* UDMA mode 0 */
101 { 0x3a, 0x0a, 0xd0 }, /* UDMA mode 1 */
102 { 0x2a, 0x07, 0xcd }, /* UDMA mode 2 */
103 { 0x1a, 0x05, 0xcd }, /* UDMA mode 3 */
104 { 0x1a, 0x03, 0xcd }, /* UDMA mode 4 */
105 { 0x1a, 0x02, 0xcb }, /* UDMA mode 5 */
106 { 0x1a, 0x01, 0xcb }, /* UDMA mode 6 */
177 * port_mmio - Get the MMIO address of PDC2027x extended registers
183 return ap->host->iomap[PDC_MMIO_BAR] + ap->port_no * 0x100 + offset; in port_mmio()
187 * dev_mmio - Get the MMIO address of PDC2027x extended registers
194 u8 adj = (adev->devno) ? 0x08 : 0x00; in dev_mmio()
199 * pdc2027x_pata_cable_detect - Probe host controller cable detect info
217 PDPRINTK("No cable or 80-conductor cable on port %d\n", ap->port_no); in pdc2027x_cable_detect()
221 printk(KERN_INFO DRV_NAME ": 40-conductor cable detected on port %d\n", ap->port_no); in pdc2027x_cable_detect()
226 * pdc2027x_port_enabled - Check PDC ATA control register to see whether the port is enabled.
235 * pdc2027x_prereset - prereset for PATA host controller
248 if (!pdc2027x_port_enabled(link->ap)) in pdc2027x_prereset()
249 return -ENOENT; in pdc2027x_prereset()
254 * pdc2720x_mode_filter - mode selection filter
266 if (adev->class != ATA_DEV_ATA || adev->devno == 0 || pair == NULL) in pdc2027x_mode_filter()
270 ata_id_c_string(pair->id, model_num, ATA_ID_PROD, in pdc2027x_mode_filter()
273 if (strstr(model_num, "Maxtor") == NULL && pair->dma_mode == XFER_UDMA_6) in pdc2027x_mode_filter()
280 * pdc2027x_set_piomode - Initialize host controller PATA PIO timings
284 * Set PIO mode for device.
292 unsigned int pio = adev->pio_mode - XFER_PIO_0; in pdc2027x_set_piomode() local
295 PDPRINTK("adev->pio_mode[%X]\n", adev->pio_mode); in pdc2027x_set_piomode()
298 if (pio > 4) { in pdc2027x_set_piomode()
299 printk(KERN_ERR DRV_NAME ": Unknown pio mode [%d] ignored\n", pio); in pdc2027x_set_piomode()
304 /* Set the PIO timing registers using value table for 133MHz */ in pdc2027x_set_piomode()
305 PDPRINTK("Set pio regs... \n"); in pdc2027x_set_piomode()
309 ctcr0 |= pdc2027x_pio_timing_tbl[pio].value0 | in pdc2027x_set_piomode()
310 (pdc2027x_pio_timing_tbl[pio].value1 << 8); in pdc2027x_set_piomode()
315 ctcr1 |= (pdc2027x_pio_timing_tbl[pio].value2 << 24); in pdc2027x_set_piomode()
318 PDPRINTK("Set pio regs done\n"); in pdc2027x_set_piomode()
320 PDPRINTK("Set to pio mode[%u] \n", pio); in pdc2027x_set_piomode()
324 * pdc2027x_set_dmamode - Initialize host controller PATA UDMA timings
328 * Set UDMA mode for device.
335 unsigned int dma_mode = adev->dma_mode; in pdc2027x_set_dmamode()
364 PDPRINTK("Set to udma mode[%u] \n", udma_mode); in pdc2027x_set_dmamode()
381 PDPRINTK("Set to mdma mode[%u] \n", mdma_mode); in pdc2027x_set_dmamode()
383 printk(KERN_ERR DRV_NAME ": Unknown dma mode [%u] ignored\n", dma_mode); in pdc2027x_set_dmamode()
388 * pdc2027x_set_mode - Set the timing registers back to correct values.
398 struct ata_port *ap = link->ap; in pdc2027x_set_mode()
410 * Enable prefetch if the device support PIO only. in pdc2027x_set_mode()
412 if (dev->xfer_shift == ATA_SHIFT_PIO) { in pdc2027x_set_mode()
426 * pdc2027x_check_atapi_dma - Check whether ATAPI DMA can be supported for this command
437 struct scsi_cmnd *cmd = qc->scsicmd; in pdc2027x_check_atapi_dma()
438 u8 *scsicmd = cmd->cmnd; in pdc2027x_check_atapi_dma()
467 * pdc_read_counter - Read the ctr counter
473 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; in pdc_read_counter()
492 * The 30-bit decreasing counter are read by 2 pieces. in pdc_read_counter()
497 retry--; in pdc_read_counter()
506 * adjust_pll - Adjust the PLL input clock in Hz.
514 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; in pdc_adjust_pll()
559 F = (ratio * (R+2)) / 1000 - 2; in pdc_adjust_pll()
593 * detect_pll_input_clock - Detect the PLL input clock in Hz.
600 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; in pdc_detect_pll_input_clock()
606 /* Start the test mode */ in pdc_detect_pll_input_clock()
623 /* Stop the test mode */ in pdc_detect_pll_input_clock()
632 pll_clock = ((start_count - end_count) & 0x3fffffff) / 100 * in pdc_detect_pll_input_clock()
642 * pdc_hardware_init - Initialize the hardware.
652 * On some system, where PCI bus is running at non-standard clock rate. in pdc_hardware_init()
658 dev_info(host->dev, "PLL input clock %ld kHz\n", pll_clock/1000); in pdc_hardware_init()
665 * pdc_ata_setup_port - setup the mmio address
671 port->cmd_addr = in pdc_ata_setup_port()
672 port->data_addr = base; in pdc_ata_setup_port()
673 port->feature_addr = in pdc_ata_setup_port()
674 port->error_addr = base + 0x05; in pdc_ata_setup_port()
675 port->nsect_addr = base + 0x0a; in pdc_ata_setup_port()
676 port->lbal_addr = base + 0x0f; in pdc_ata_setup_port()
677 port->lbam_addr = base + 0x10; in pdc_ata_setup_port()
678 port->lbah_addr = base + 0x15; in pdc_ata_setup_port()
679 port->device_addr = base + 0x1a; in pdc_ata_setup_port()
680 port->command_addr = in pdc_ata_setup_port()
681 port->status_addr = base + 0x1f; in pdc_ata_setup_port()
682 port->altstatus_addr = in pdc_ata_setup_port()
683 port->ctl_addr = base + 0x81a; in pdc_ata_setup_port()
687 * pdc2027x_init_one - PCI probe function
701 unsigned int board_idx = (unsigned int) ent->driver_data; in pdc2027x_init_one()
708 ata_print_version_once(&pdev->dev, DRV_VERSION); in pdc2027x_init_one()
711 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2); in pdc2027x_init_one()
713 return -ENOMEM; in pdc2027x_init_one()
723 host->iomap = pcim_iomap_table(pdev); in pdc2027x_init_one()
725 rc = dma_set_mask_and_coherent(&pdev->dev, ATA_DMA_MASK); in pdc2027x_init_one()
729 mmio_base = host->iomap[PDC_MMIO_BAR]; in pdc2027x_init_one()
732 struct ata_port *ap = host->ports[i]; in pdc2027x_init_one()
734 pdc_ata_setup_port(&ap->ioaddr, mmio_base + cmd_offset[i]); in pdc2027x_init_one()
735 ap->ioaddr.bmdma_addr = mmio_base + bmdma_offset[i]; in pdc2027x_init_one()
737 ata_port_pbar_desc(ap, PDC_MMIO_BAR, -1, "mmio"); in pdc2027x_init_one()
747 return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt, in pdc2027x_init_one()
762 if (pdev->device == PCI_DEVICE_ID_PROMISE_20268 || in pdc2027x_reinit_one()
763 pdev->device == PCI_DEVICE_ID_PROMISE_20270) in pdc2027x_reinit_one()