Lines Matching +full:0 +full:d
57 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); in regmap_irq_lock() local
59 mutex_lock(&d->lock); in regmap_irq_lock()
62 static int regmap_irq_update_bits(struct regmap_irq_chip_data *d, in regmap_irq_update_bits() argument
66 if (d->chip->mask_writeonly) in regmap_irq_update_bits()
67 return regmap_write_bits(d->map, reg, mask, val); in regmap_irq_update_bits()
69 return regmap_update_bits(d->map, reg, mask, val); in regmap_irq_update_bits()
74 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); in regmap_irq_sync_unlock() local
75 struct regmap *map = d->map; in regmap_irq_sync_unlock()
81 if (d->chip->runtime_pm) { in regmap_irq_sync_unlock()
83 if (ret < 0) in regmap_irq_sync_unlock()
84 dev_err(map->dev, "IRQ sync failed to resume: %d\n", in regmap_irq_sync_unlock()
88 if (d->clear_status) { in regmap_irq_sync_unlock()
89 for (i = 0; i < d->chip->num_regs; i++) { in regmap_irq_sync_unlock()
90 reg = d->chip->status_base + in regmap_irq_sync_unlock()
91 (i * map->reg_stride * d->irq_reg_stride); in regmap_irq_sync_unlock()
95 dev_err(d->map->dev, in regmap_irq_sync_unlock()
99 d->clear_status = false; in regmap_irq_sync_unlock()
107 for (i = 0; i < d->chip->num_regs; i++) { in regmap_irq_sync_unlock()
108 if (!d->chip->mask_base) in regmap_irq_sync_unlock()
111 reg = d->chip->mask_base + in regmap_irq_sync_unlock()
112 (i * map->reg_stride * d->irq_reg_stride); in regmap_irq_sync_unlock()
113 if (d->chip->mask_invert) { in regmap_irq_sync_unlock()
114 ret = regmap_irq_update_bits(d, reg, in regmap_irq_sync_unlock()
115 d->mask_buf_def[i], ~d->mask_buf[i]); in regmap_irq_sync_unlock()
116 } else if (d->chip->unmask_base) { in regmap_irq_sync_unlock()
118 ret = regmap_irq_update_bits(d, reg, in regmap_irq_sync_unlock()
119 d->mask_buf_def[i], ~d->mask_buf[i]); in regmap_irq_sync_unlock()
120 if (ret < 0) in regmap_irq_sync_unlock()
121 dev_err(d->map->dev, in regmap_irq_sync_unlock()
124 unmask_offset = d->chip->unmask_base - in regmap_irq_sync_unlock()
125 d->chip->mask_base; in regmap_irq_sync_unlock()
127 ret = regmap_irq_update_bits(d, in regmap_irq_sync_unlock()
129 d->mask_buf_def[i], in regmap_irq_sync_unlock()
130 d->mask_buf[i]); in regmap_irq_sync_unlock()
132 ret = regmap_irq_update_bits(d, reg, in regmap_irq_sync_unlock()
133 d->mask_buf_def[i], d->mask_buf[i]); in regmap_irq_sync_unlock()
135 if (ret != 0) in regmap_irq_sync_unlock()
136 dev_err(d->map->dev, "Failed to sync masks in %x\n", in regmap_irq_sync_unlock()
139 reg = d->chip->wake_base + in regmap_irq_sync_unlock()
140 (i * map->reg_stride * d->irq_reg_stride); in regmap_irq_sync_unlock()
141 if (d->wake_buf) { in regmap_irq_sync_unlock()
142 if (d->chip->wake_invert) in regmap_irq_sync_unlock()
143 ret = regmap_irq_update_bits(d, reg, in regmap_irq_sync_unlock()
144 d->mask_buf_def[i], in regmap_irq_sync_unlock()
145 ~d->wake_buf[i]); in regmap_irq_sync_unlock()
147 ret = regmap_irq_update_bits(d, reg, in regmap_irq_sync_unlock()
148 d->mask_buf_def[i], in regmap_irq_sync_unlock()
149 d->wake_buf[i]); in regmap_irq_sync_unlock()
150 if (ret != 0) in regmap_irq_sync_unlock()
151 dev_err(d->map->dev, in regmap_irq_sync_unlock()
152 "Failed to sync wakes in %x: %d\n", in regmap_irq_sync_unlock()
156 if (!d->chip->init_ack_masked) in regmap_irq_sync_unlock()
163 if (d->mask_buf[i] && (d->chip->ack_base || d->chip->use_ack)) { in regmap_irq_sync_unlock()
164 reg = d->chip->ack_base + in regmap_irq_sync_unlock()
165 (i * map->reg_stride * d->irq_reg_stride); in regmap_irq_sync_unlock()
166 /* some chips ack by write 0 */ in regmap_irq_sync_unlock()
167 if (d->chip->ack_invert) in regmap_irq_sync_unlock()
168 ret = regmap_write(map, reg, ~d->mask_buf[i]); in regmap_irq_sync_unlock()
170 ret = regmap_write(map, reg, d->mask_buf[i]); in regmap_irq_sync_unlock()
171 if (d->chip->clear_ack) { in regmap_irq_sync_unlock()
172 if (d->chip->ack_invert && !ret) in regmap_irq_sync_unlock()
175 ret = regmap_write(map, reg, 0); in regmap_irq_sync_unlock()
177 if (ret != 0) in regmap_irq_sync_unlock()
178 dev_err(d->map->dev, "Failed to ack 0x%x: %d\n", in regmap_irq_sync_unlock()
184 if (!d->chip->type_in_mask) { in regmap_irq_sync_unlock()
185 for (i = 0; i < d->chip->num_type_reg; i++) { in regmap_irq_sync_unlock()
186 if (!d->type_buf_def[i]) in regmap_irq_sync_unlock()
188 reg = d->chip->type_base + in regmap_irq_sync_unlock()
189 (i * map->reg_stride * d->type_reg_stride); in regmap_irq_sync_unlock()
190 if (d->chip->type_invert) in regmap_irq_sync_unlock()
191 ret = regmap_irq_update_bits(d, reg, in regmap_irq_sync_unlock()
192 d->type_buf_def[i], ~d->type_buf[i]); in regmap_irq_sync_unlock()
194 ret = regmap_irq_update_bits(d, reg, in regmap_irq_sync_unlock()
195 d->type_buf_def[i], d->type_buf[i]); in regmap_irq_sync_unlock()
196 if (ret != 0) in regmap_irq_sync_unlock()
197 dev_err(d->map->dev, "Failed to sync type in %x\n", in regmap_irq_sync_unlock()
202 if (d->chip->runtime_pm) in regmap_irq_sync_unlock()
206 if (d->wake_count < 0) in regmap_irq_sync_unlock()
207 for (i = d->wake_count; i < 0; i++) in regmap_irq_sync_unlock()
208 irq_set_irq_wake(d->irq, 0); in regmap_irq_sync_unlock()
209 else if (d->wake_count > 0) in regmap_irq_sync_unlock()
210 for (i = 0; i < d->wake_count; i++) in regmap_irq_sync_unlock()
211 irq_set_irq_wake(d->irq, 1); in regmap_irq_sync_unlock()
213 d->wake_count = 0; in regmap_irq_sync_unlock()
215 mutex_unlock(&d->lock); in regmap_irq_sync_unlock()
220 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); in regmap_irq_enable() local
221 struct regmap *map = d->map; in regmap_irq_enable()
222 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_enable()
239 if (d->chip->type_in_mask && type) in regmap_irq_enable()
240 mask = d->type_buf[reg] & irq_data->mask; in regmap_irq_enable()
244 if (d->chip->clear_on_unmask) in regmap_irq_enable()
245 d->clear_status = true; in regmap_irq_enable()
247 d->mask_buf[reg] &= ~mask; in regmap_irq_enable()
252 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); in regmap_irq_disable() local
253 struct regmap *map = d->map; in regmap_irq_disable()
254 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_disable()
256 d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask; in regmap_irq_disable()
261 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); in regmap_irq_set_type() local
262 struct regmap *map = d->map; in regmap_irq_set_type()
263 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_set_type()
268 return 0; in regmap_irq_set_type()
273 d->type_buf[reg] &= ~t->type_reg_mask; in regmap_irq_set_type()
275 d->type_buf[reg] &= ~(t->type_falling_val | in regmap_irq_set_type()
281 d->type_buf[reg] |= t->type_falling_val; in regmap_irq_set_type()
285 d->type_buf[reg] |= t->type_rising_val; in regmap_irq_set_type()
289 d->type_buf[reg] |= (t->type_falling_val | in regmap_irq_set_type()
294 d->type_buf[reg] |= t->type_level_high_val; in regmap_irq_set_type()
298 d->type_buf[reg] |= t->type_level_low_val; in regmap_irq_set_type()
303 return 0; in regmap_irq_set_type()
308 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); in regmap_irq_set_wake() local
309 struct regmap *map = d->map; in regmap_irq_set_wake()
310 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_set_wake()
313 if (d->wake_buf) in regmap_irq_set_wake()
314 d->wake_buf[irq_data->reg_offset / map->reg_stride] in regmap_irq_set_wake()
316 d->wake_count++; in regmap_irq_set_wake()
318 if (d->wake_buf) in regmap_irq_set_wake()
319 d->wake_buf[irq_data->reg_offset / map->reg_stride] in regmap_irq_set_wake()
321 d->wake_count--; in regmap_irq_set_wake()
324 return 0; in regmap_irq_set_wake()
342 int i, ret = 0; in read_sub_irq_data()
351 for (i = 0; i < subreg->num_regs; i++) { in read_sub_irq_data()
363 static irqreturn_t regmap_irq_thread(int irq, void *d) in regmap_irq_thread() argument
365 struct regmap_irq_chip_data *data = d; in regmap_irq_thread()
377 if (ret < 0) { in regmap_irq_thread()
378 dev_err(map->dev, "IRQ thread failed to resume: %d\n", in regmap_irq_thread()
399 memset(data->status_buf, 0, size); in regmap_irq_thread()
406 for (i = 0; i < chip->num_main_regs; i++) { in regmap_irq_thread()
413 "Failed to read IRQ status %d\n", in regmap_irq_thread()
420 for (i = 0; i < chip->num_main_regs; i++) { in regmap_irq_thread()
430 if (ret != 0) { in regmap_irq_thread()
432 "Failed to read IRQ status %d\n", in regmap_irq_thread()
451 if (ret != 0) { in regmap_irq_thread()
452 dev_err(map->dev, "Failed to read IRQ status: %d\n", in regmap_irq_thread()
457 for (i = 0; i < data->chip->num_regs; i++) { in regmap_irq_thread()
475 for (i = 0; i < data->chip->num_regs; i++) { in regmap_irq_thread()
481 if (ret != 0) { in regmap_irq_thread()
483 "Failed to read IRQ status: %d\n", in regmap_irq_thread()
497 for (i = 0; i < data->chip->num_regs; i++) { in regmap_irq_thread()
513 ret = regmap_write(map, reg, 0); in regmap_irq_thread()
515 if (ret != 0) in regmap_irq_thread()
516 dev_err(map->dev, "Failed to ack 0x%x: %d\n", in regmap_irq_thread()
521 for (i = 0; i < chip->num_irqs; i++) { in regmap_irq_thread()
553 return 0; in regmap_irq_map()
568 * @irq_base: Allocate at specific IRQ number if irq_base > 0.
572 * Returns 0 on success or an errno on failure.
584 struct regmap_irq_chip_data *d; in regmap_add_irq_chip_fwnode() local
591 if (chip->num_regs <= 0) in regmap_add_irq_chip_fwnode()
597 for (i = 0; i < chip->num_irqs; i++) { in regmap_add_irq_chip_fwnode()
606 irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0); in regmap_add_irq_chip_fwnode()
607 if (irq_base < 0) { in regmap_add_irq_chip_fwnode()
608 dev_warn(map->dev, "Failed to allocate IRQs: %d\n", in regmap_add_irq_chip_fwnode()
614 d = kzalloc(sizeof(*d), GFP_KERNEL); in regmap_add_irq_chip_fwnode()
615 if (!d) in regmap_add_irq_chip_fwnode()
619 d->main_status_buf = kcalloc(chip->num_main_regs, in regmap_add_irq_chip_fwnode()
623 if (!d->main_status_buf) in regmap_add_irq_chip_fwnode()
627 d->status_buf = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip_fwnode()
629 if (!d->status_buf) in regmap_add_irq_chip_fwnode()
632 d->mask_buf = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip_fwnode()
634 if (!d->mask_buf) in regmap_add_irq_chip_fwnode()
637 d->mask_buf_def = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip_fwnode()
639 if (!d->mask_buf_def) in regmap_add_irq_chip_fwnode()
643 d->wake_buf = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip_fwnode()
645 if (!d->wake_buf) in regmap_add_irq_chip_fwnode()
651 d->type_buf_def = kcalloc(num_type_reg, in regmap_add_irq_chip_fwnode()
653 if (!d->type_buf_def) in regmap_add_irq_chip_fwnode()
656 d->type_buf = kcalloc(num_type_reg, sizeof(unsigned int), in regmap_add_irq_chip_fwnode()
658 if (!d->type_buf) in regmap_add_irq_chip_fwnode()
662 d->irq_chip = regmap_irq_chip; in regmap_add_irq_chip_fwnode()
663 d->irq_chip.name = chip->name; in regmap_add_irq_chip_fwnode()
664 d->irq = irq; in regmap_add_irq_chip_fwnode()
665 d->map = map; in regmap_add_irq_chip_fwnode()
666 d->chip = chip; in regmap_add_irq_chip_fwnode()
667 d->irq_base = irq_base; in regmap_add_irq_chip_fwnode()
670 d->irq_reg_stride = chip->irq_reg_stride; in regmap_add_irq_chip_fwnode()
672 d->irq_reg_stride = 1; in regmap_add_irq_chip_fwnode()
675 d->type_reg_stride = chip->type_reg_stride; in regmap_add_irq_chip_fwnode()
677 d->type_reg_stride = 1; in regmap_add_irq_chip_fwnode()
680 d->irq_reg_stride == 1) { in regmap_add_irq_chip_fwnode()
681 d->status_reg_buf = kmalloc_array(chip->num_regs, in regmap_add_irq_chip_fwnode()
684 if (!d->status_reg_buf) in regmap_add_irq_chip_fwnode()
688 mutex_init(&d->lock); in regmap_add_irq_chip_fwnode()
690 for (i = 0; i < chip->num_irqs; i++) in regmap_add_irq_chip_fwnode()
691 d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride] in regmap_add_irq_chip_fwnode()
695 for (i = 0; i < chip->num_regs; i++) { in regmap_add_irq_chip_fwnode()
696 d->mask_buf[i] = d->mask_buf_def[i]; in regmap_add_irq_chip_fwnode()
701 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip_fwnode()
703 ret = regmap_irq_update_bits(d, reg, in regmap_add_irq_chip_fwnode()
704 d->mask_buf[i], ~d->mask_buf[i]); in regmap_add_irq_chip_fwnode()
705 else if (d->chip->unmask_base) { in regmap_add_irq_chip_fwnode()
706 unmask_offset = d->chip->unmask_base - in regmap_add_irq_chip_fwnode()
707 d->chip->mask_base; in regmap_add_irq_chip_fwnode()
708 ret = regmap_irq_update_bits(d, in regmap_add_irq_chip_fwnode()
710 d->mask_buf[i], in regmap_add_irq_chip_fwnode()
711 d->mask_buf[i]); in regmap_add_irq_chip_fwnode()
713 ret = regmap_irq_update_bits(d, reg, in regmap_add_irq_chip_fwnode()
714 d->mask_buf[i], d->mask_buf[i]); in regmap_add_irq_chip_fwnode()
715 if (ret != 0) { in regmap_add_irq_chip_fwnode()
716 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", in regmap_add_irq_chip_fwnode()
726 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip_fwnode()
727 ret = regmap_read(map, reg, &d->status_buf[i]); in regmap_add_irq_chip_fwnode()
728 if (ret != 0) { in regmap_add_irq_chip_fwnode()
729 dev_err(map->dev, "Failed to read IRQ status: %d\n", in regmap_add_irq_chip_fwnode()
734 if (d->status_buf[i] && (chip->ack_base || chip->use_ack)) { in regmap_add_irq_chip_fwnode()
736 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip_fwnode()
739 ~(d->status_buf[i] & d->mask_buf[i])); in regmap_add_irq_chip_fwnode()
742 d->status_buf[i] & d->mask_buf[i]); in regmap_add_irq_chip_fwnode()
747 ret = regmap_write(map, reg, 0); in regmap_add_irq_chip_fwnode()
749 if (ret != 0) { in regmap_add_irq_chip_fwnode()
750 dev_err(map->dev, "Failed to ack 0x%x: %d\n", in regmap_add_irq_chip_fwnode()
758 if (d->wake_buf) { in regmap_add_irq_chip_fwnode()
759 for (i = 0; i < chip->num_regs; i++) { in regmap_add_irq_chip_fwnode()
760 d->wake_buf[i] = d->mask_buf_def[i]; in regmap_add_irq_chip_fwnode()
762 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip_fwnode()
765 ret = regmap_irq_update_bits(d, reg, in regmap_add_irq_chip_fwnode()
766 d->mask_buf_def[i], in regmap_add_irq_chip_fwnode()
767 0); in regmap_add_irq_chip_fwnode()
769 ret = regmap_irq_update_bits(d, reg, in regmap_add_irq_chip_fwnode()
770 d->mask_buf_def[i], in regmap_add_irq_chip_fwnode()
771 d->wake_buf[i]); in regmap_add_irq_chip_fwnode()
772 if (ret != 0) { in regmap_add_irq_chip_fwnode()
773 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", in regmap_add_irq_chip_fwnode()
781 for (i = 0; i < chip->num_type_reg; ++i) { in regmap_add_irq_chip_fwnode()
783 (i * map->reg_stride * d->type_reg_stride); in regmap_add_irq_chip_fwnode()
785 ret = regmap_read(map, reg, &d->type_buf_def[i]); in regmap_add_irq_chip_fwnode()
787 if (d->chip->type_invert) in regmap_add_irq_chip_fwnode()
788 d->type_buf_def[i] = ~d->type_buf_def[i]; in regmap_add_irq_chip_fwnode()
791 dev_err(map->dev, "Failed to get type defaults at 0x%x: %d\n", in regmap_add_irq_chip_fwnode()
799 d->domain = irq_domain_add_legacy(to_of_node(fwnode), in regmap_add_irq_chip_fwnode()
801 0, ®map_domain_ops, d); in regmap_add_irq_chip_fwnode()
803 d->domain = irq_domain_add_linear(to_of_node(fwnode), in regmap_add_irq_chip_fwnode()
805 ®map_domain_ops, d); in regmap_add_irq_chip_fwnode()
806 if (!d->domain) { in regmap_add_irq_chip_fwnode()
814 chip->name, d); in regmap_add_irq_chip_fwnode()
815 if (ret != 0) { in regmap_add_irq_chip_fwnode()
816 dev_err(map->dev, "Failed to request IRQ %d for %s: %d\n", in regmap_add_irq_chip_fwnode()
821 *data = d; in regmap_add_irq_chip_fwnode()
823 return 0; in regmap_add_irq_chip_fwnode()
828 kfree(d->type_buf); in regmap_add_irq_chip_fwnode()
829 kfree(d->type_buf_def); in regmap_add_irq_chip_fwnode()
830 kfree(d->wake_buf); in regmap_add_irq_chip_fwnode()
831 kfree(d->mask_buf_def); in regmap_add_irq_chip_fwnode()
832 kfree(d->mask_buf); in regmap_add_irq_chip_fwnode()
833 kfree(d->status_buf); in regmap_add_irq_chip_fwnode()
834 kfree(d->status_reg_buf); in regmap_add_irq_chip_fwnode()
835 kfree(d); in regmap_add_irq_chip_fwnode()
846 * @irq_base: Allocate at specific IRQ number if irq_base > 0.
850 * Returns 0 on success or an errno on failure.
868 * @d: ®map_irq_chip_data allocated by regmap_add_irq_chip()
872 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d) in regmap_del_irq_chip() argument
877 if (!d) in regmap_del_irq_chip()
880 free_irq(irq, d); in regmap_del_irq_chip()
883 for (hwirq = 0; hwirq < d->chip->num_irqs; hwirq++) { in regmap_del_irq_chip()
885 if (!d->chip->irqs[hwirq].mask) in regmap_del_irq_chip()
892 virq = irq_find_mapping(d->domain, hwirq); in regmap_del_irq_chip()
897 irq_domain_remove(d->domain); in regmap_del_irq_chip()
898 kfree(d->type_buf); in regmap_del_irq_chip()
899 kfree(d->type_buf_def); in regmap_del_irq_chip()
900 kfree(d->wake_buf); in regmap_del_irq_chip()
901 kfree(d->mask_buf_def); in regmap_del_irq_chip()
902 kfree(d->mask_buf); in regmap_del_irq_chip()
903 kfree(d->status_reg_buf); in regmap_del_irq_chip()
904 kfree(d->status_buf); in regmap_del_irq_chip()
905 kfree(d); in regmap_del_irq_chip()
911 struct regmap_irq_chip_data *d = *(struct regmap_irq_chip_data **)res; in devm_regmap_irq_chip_release() local
913 regmap_del_irq_chip(d->irq, d); in devm_regmap_irq_chip_release()
923 return 0; in devm_regmap_irq_chip_match()
936 * @irq_base: Allocate at specific IRQ number if irq_base > 0.
940 * Returns 0 on success or an errno on failure.
952 struct regmap_irq_chip_data **ptr, *d; in devm_regmap_add_irq_chip_fwnode() local
961 chip, &d); in devm_regmap_add_irq_chip_fwnode()
962 if (ret < 0) { in devm_regmap_add_irq_chip_fwnode()
967 *ptr = d; in devm_regmap_add_irq_chip_fwnode()
969 *data = d; in devm_regmap_add_irq_chip_fwnode()
970 return 0; in devm_regmap_add_irq_chip_fwnode()
981 * @irq_base: Allocate at specific IRQ number if irq_base > 0.
985 * Returns 0 on success or an errno on failure.
1019 if (rc != 0) in devm_regmap_del_irq_chip()