Lines Matching +full:clk +full:- +full:provider
6 * Tero Kristo <t-kristo@ti.com>
18 #include <linux/clk-provider.h>
22 #include <linux/clk/ti.h>
57 struct clk_hw *clk; member
101 * one is during suspend-resume cycle while timekeeping is in _omap4_is_timeout()
110 if (time->cycles++ < timeout) { in _omap4_is_timeout()
115 if (!ktime_to_ns(time->start)) { in _omap4_is_timeout()
116 time->start = ktime_get(); in _omap4_is_timeout()
120 if (ktime_us_delta(ktime_get(), time->start) < timeout) { in _omap4_is_timeout()
139 struct clk_hw_omap *clk = to_clk_hw_omap(hw); in _omap4_clkctrl_clk_enable() local
144 if (clk->clkdm) { in _omap4_clkctrl_clk_enable()
145 ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk); in _omap4_clkctrl_clk_enable()
150 clk->clkdm_name, ret); in _omap4_clkctrl_clk_enable()
155 if (!clk->enable_bit) in _omap4_clkctrl_clk_enable()
158 val = ti_clk_ll_ops->clk_readl(&clk->enable_reg); in _omap4_clkctrl_clk_enable()
161 val |= clk->enable_bit; in _omap4_clkctrl_clk_enable()
163 ti_clk_ll_ops->clk_writel(val, &clk->enable_reg); in _omap4_clkctrl_clk_enable()
165 if (test_bit(NO_IDLEST, &clk->flags)) in _omap4_clkctrl_clk_enable()
169 while (!_omap4_is_ready(ti_clk_ll_ops->clk_readl(&clk->enable_reg))) { in _omap4_clkctrl_clk_enable()
172 return -EBUSY; in _omap4_clkctrl_clk_enable()
181 struct clk_hw_omap *clk = to_clk_hw_omap(hw); in _omap4_clkctrl_clk_disable() local
185 if (!clk->enable_bit) in _omap4_clkctrl_clk_disable()
188 val = ti_clk_ll_ops->clk_readl(&clk->enable_reg); in _omap4_clkctrl_clk_disable()
192 ti_clk_ll_ops->clk_writel(val, &clk->enable_reg); in _omap4_clkctrl_clk_disable()
194 if (test_bit(NO_IDLEST, &clk->flags)) in _omap4_clkctrl_clk_disable()
198 while (!_omap4_is_idle(ti_clk_ll_ops->clk_readl(&clk->enable_reg))) { in _omap4_clkctrl_clk_disable()
207 if (clk->clkdm) in _omap4_clkctrl_clk_disable()
208 ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk); in _omap4_clkctrl_clk_disable()
213 struct clk_hw_omap *clk = to_clk_hw_omap(hw); in _omap4_clkctrl_clk_is_enabled() local
216 val = ti_clk_ll_ops->clk_readl(&clk->enable_reg); in _omap4_clkctrl_clk_is_enabled()
218 if (val & clk->enable_bit) in _omap4_clkctrl_clk_is_enabled()
234 struct omap_clkctrl_provider *provider = data; in _ti_omap4_clkctrl_xlate() local
238 if (clkspec->args_count != 2) in _ti_omap4_clkctrl_xlate()
239 return ERR_PTR(-EINVAL); in _ti_omap4_clkctrl_xlate()
242 clkspec->args[0], clkspec->args[1]); in _ti_omap4_clkctrl_xlate()
244 list_for_each_entry(entry, &provider->clocks, node) { in _ti_omap4_clkctrl_xlate()
245 if (entry->reg_offset == clkspec->args[0] && in _ti_omap4_clkctrl_xlate()
246 entry->bit_offset == clkspec->args[1]) { in _ti_omap4_clkctrl_xlate()
253 return ERR_PTR(-EINVAL); in _ti_omap4_clkctrl_xlate()
255 return entry->clk; in _ti_omap4_clkctrl_xlate()
266 /* l4per-clkctrl:1234:0 style naming based on clkctrl_name */ in clkctrl_get_clock_name()
268 clock_name = kasprintf(GFP_KERNEL, "%s-clkctrl:%04x:%d", in clkctrl_get_clock_name()
273 strreplace(clock_name, '_', '-'); in clkctrl_get_clock_name()
280 return kasprintf(GFP_KERNEL, "%s_cm:clk:%04x:%d", in clkctrl_get_clock_name()
285 return kasprintf(GFP_KERNEL, "%pOFn:clk:%04x:%d", in clkctrl_get_clock_name()
286 np->parent, offset, index); in clkctrl_get_clock_name()
288 /* l4per-clkctrl:1234:0 style naming based on node name */ in clkctrl_get_clock_name()
293 _ti_clkctrl_clk_register(struct omap_clkctrl_provider *provider, in _ti_clkctrl_clk_register() argument
300 struct clk *clk; in _ti_clkctrl_clk_register() local
305 ti_clk_get_features()->flags & in _ti_clkctrl_clk_register()
310 ret = -ENOMEM; in _ti_clkctrl_clk_register()
314 clk_hw->init = &init; in _ti_clkctrl_clk_register()
320 clk = of_ti_clk_register(node, clk_hw, init.name); in _ti_clkctrl_clk_register()
321 if (IS_ERR_OR_NULL(clk)) { in _ti_clkctrl_clk_register()
322 ret = -EINVAL; in _ti_clkctrl_clk_register()
326 clkctrl_clk->reg_offset = offset; in _ti_clkctrl_clk_register()
327 clkctrl_clk->bit_offset = bit; in _ti_clkctrl_clk_register()
328 clkctrl_clk->clk = clk_hw; in _ti_clkctrl_clk_register()
330 list_add(&clkctrl_clk->node, &provider->clocks); in _ti_clkctrl_clk_register()
341 _ti_clkctrl_setup_gate(struct omap_clkctrl_provider *provider, in _ti_clkctrl_setup_gate() argument
352 clk_hw->enable_bit = data->bit; in _ti_clkctrl_setup_gate()
353 clk_hw->enable_reg.ptr = reg; in _ti_clkctrl_setup_gate()
355 if (_ti_clkctrl_clk_register(provider, node, &clk_hw->hw, offset, in _ti_clkctrl_setup_gate()
356 data->bit, data->parents, 1, in _ti_clkctrl_setup_gate()
362 _ti_clkctrl_setup_mux(struct omap_clkctrl_provider *provider, in _ti_clkctrl_setup_mux() argument
375 pname = data->parents; in _ti_clkctrl_setup_mux()
381 mux->mask = num_parents; in _ti_clkctrl_setup_mux()
382 if (!(mux->flags & CLK_MUX_INDEX_ONE)) in _ti_clkctrl_setup_mux()
383 mux->mask--; in _ti_clkctrl_setup_mux()
385 mux->mask = (1 << fls(mux->mask)) - 1; in _ti_clkctrl_setup_mux()
387 mux->shift = data->bit; in _ti_clkctrl_setup_mux()
388 mux->reg.ptr = reg; in _ti_clkctrl_setup_mux()
390 if (_ti_clkctrl_clk_register(provider, node, &mux->hw, offset, in _ti_clkctrl_setup_mux()
391 data->bit, data->parents, num_parents, in _ti_clkctrl_setup_mux()
397 _ti_clkctrl_setup_div(struct omap_clkctrl_provider *provider, in _ti_clkctrl_setup_div() argument
403 const struct omap_clkctrl_div_data *div_data = data->data; in _ti_clkctrl_setup_div()
410 div->reg.ptr = reg; in _ti_clkctrl_setup_div()
411 div->shift = data->bit; in _ti_clkctrl_setup_div()
412 div->flags = div_data->flags; in _ti_clkctrl_setup_div()
414 if (div->flags & CLK_DIVIDER_POWER_OF_TWO) in _ti_clkctrl_setup_div()
417 if (ti_clk_parse_divider_data((int *)div_data->dividers, 0, in _ti_clkctrl_setup_div()
418 div_data->max_div, div_flags, in _ti_clkctrl_setup_div()
421 node, offset, data->bit); in _ti_clkctrl_setup_div()
426 if (_ti_clkctrl_clk_register(provider, node, &div->hw, offset, in _ti_clkctrl_setup_div()
427 data->bit, data->parents, 1, in _ti_clkctrl_setup_div()
433 _ti_clkctrl_setup_subclks(struct omap_clkctrl_provider *provider, in _ti_clkctrl_setup_subclks() argument
438 const struct omap_clkctrl_bit_data *bits = data->bit_data; in _ti_clkctrl_setup_subclks()
443 while (bits->bit) { in _ti_clkctrl_setup_subclks()
444 switch (bits->type) { in _ti_clkctrl_setup_subclks()
446 _ti_clkctrl_setup_gate(provider, node, data->offset, in _ti_clkctrl_setup_subclks()
451 _ti_clkctrl_setup_div(provider, node, data->offset, in _ti_clkctrl_setup_subclks()
456 _ti_clkctrl_setup_mux(provider, node, data->offset, in _ti_clkctrl_setup_subclks()
462 bits->type); in _ti_clkctrl_setup_subclks()
484 if (!strncmp("ti,clkctrl-", compat, prefix_len)) { in clkctrl_get_name()
491 strreplace(name, '-', '_'); in clkctrl_get_name()
502 struct omap_clkctrl_provider *provider; in _ti_omap4_clkctrl_setup() local
507 struct clk *clk; in _ti_omap4_clkctrl_setup() local
517 if (!(ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT) && in _ti_omap4_clkctrl_setup()
518 of_node_name_eq(node, "clk")) in _ti_omap4_clkctrl_setup()
534 if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT) in _ti_omap4_clkctrl_setup()
549 if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT) in _ti_omap4_clkctrl_setup()
557 if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT) in _ti_omap4_clkctrl_setup()
564 if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT) in _ti_omap4_clkctrl_setup()
578 if (ti_clk_get_features()->flags & TI_CLK_DEVICE_TYPE_GP) in _ti_omap4_clkctrl_setup()
581 while (data->addr) { in _ti_omap4_clkctrl_setup()
582 if (addr == data->addr) in _ti_omap4_clkctrl_setup()
588 if (!data->addr) { in _ti_omap4_clkctrl_setup()
593 provider = kzalloc(sizeof(*provider), GFP_KERNEL); in _ti_omap4_clkctrl_setup()
594 if (!provider) in _ti_omap4_clkctrl_setup()
597 provider->base = of_iomap(node, 0); in _ti_omap4_clkctrl_setup()
599 legacy_naming = ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT; in _ti_omap4_clkctrl_setup()
602 provider->clkdm_name = kasprintf(GFP_KERNEL, in _ti_omap4_clkctrl_setup()
604 if (!provider->clkdm_name) { in _ti_omap4_clkctrl_setup()
605 kfree(provider); in _ti_omap4_clkctrl_setup()
616 provider->clkdm_name = kasprintf(GFP_KERNEL, "%pOFnxxx", node->parent); in _ti_omap4_clkctrl_setup()
617 if (!provider->clkdm_name) { in _ti_omap4_clkctrl_setup()
618 kfree(provider); in _ti_omap4_clkctrl_setup()
626 provider->clkdm_name[strlen(provider->clkdm_name) - 2] = 0; in _ti_omap4_clkctrl_setup()
628 provider->clkdm_name = kasprintf(GFP_KERNEL, "%pOFn", node); in _ti_omap4_clkctrl_setup()
629 if (!provider->clkdm_name) { in _ti_omap4_clkctrl_setup()
630 kfree(provider); in _ti_omap4_clkctrl_setup()
638 provider->clkdm_name[strlen(provider->clkdm_name) - 7] = 0; in _ti_omap4_clkctrl_setup()
641 strcat(provider->clkdm_name, "clkdm"); in _ti_omap4_clkctrl_setup()
644 c = provider->clkdm_name; in _ti_omap4_clkctrl_setup()
647 if (*c == '-') in _ti_omap4_clkctrl_setup()
652 INIT_LIST_HEAD(&provider->clocks); in _ti_omap4_clkctrl_setup()
655 reg_data = data->regs; in _ti_omap4_clkctrl_setup()
657 while (reg_data->parent) { in _ti_omap4_clkctrl_setup()
658 if ((reg_data->flags & CLKF_SOC_MASK) && in _ti_omap4_clkctrl_setup()
659 (reg_data->flags & soc_mask) == 0) { in _ti_omap4_clkctrl_setup()
668 hw->enable_reg.ptr = provider->base + reg_data->offset; in _ti_omap4_clkctrl_setup()
670 _ti_clkctrl_setup_subclks(provider, node, reg_data, in _ti_omap4_clkctrl_setup()
671 hw->enable_reg.ptr, clkctrl_name); in _ti_omap4_clkctrl_setup()
673 if (reg_data->flags & CLKF_SW_SUP) in _ti_omap4_clkctrl_setup()
674 hw->enable_bit = MODULEMODE_SWCTRL; in _ti_omap4_clkctrl_setup()
675 if (reg_data->flags & CLKF_HW_SUP) in _ti_omap4_clkctrl_setup()
676 hw->enable_bit = MODULEMODE_HWCTRL; in _ti_omap4_clkctrl_setup()
677 if (reg_data->flags & CLKF_NO_IDLEST) in _ti_omap4_clkctrl_setup()
678 set_bit(NO_IDLEST, &hw->flags); in _ti_omap4_clkctrl_setup()
680 if (reg_data->clkdm_name) in _ti_omap4_clkctrl_setup()
681 hw->clkdm_name = reg_data->clkdm_name; in _ti_omap4_clkctrl_setup()
683 hw->clkdm_name = provider->clkdm_name; in _ti_omap4_clkctrl_setup()
685 init.parent_names = ®_data->parent; in _ti_omap4_clkctrl_setup()
688 if (reg_data->flags & CLKF_SET_RATE_PARENT) in _ti_omap4_clkctrl_setup()
692 reg_data->offset, 0, in _ti_omap4_clkctrl_setup()
702 hw->hw.init = &init; in _ti_omap4_clkctrl_setup()
704 clk = of_ti_clk_register_omap_hw(node, &hw->hw, init.name); in _ti_omap4_clkctrl_setup()
705 if (IS_ERR_OR_NULL(clk)) in _ti_omap4_clkctrl_setup()
708 clkctrl_clk->reg_offset = reg_data->offset; in _ti_omap4_clkctrl_setup()
709 clkctrl_clk->clk = &hw->hw; in _ti_omap4_clkctrl_setup()
711 list_add(&clkctrl_clk->node, &provider->clocks); in _ti_omap4_clkctrl_setup()
716 ret = of_clk_add_hw_provider(node, _ti_omap4_clkctrl_xlate, provider); in _ti_omap4_clkctrl_setup()
717 if (ret == -EPROBE_DEFER) in _ti_omap4_clkctrl_setup()
718 ti_clk_retry_init(node, provider, _clkctrl_add_provider); in _ti_omap4_clkctrl_setup()
734 * ti_clk_is_in_standby - Check if clkctrl clock is in standby or not
735 * @clk: clock to check standby status for
741 bool ti_clk_is_in_standby(struct clk *clk) in ti_clk_is_in_standby() argument
747 hw = __clk_get_hw(clk); in ti_clk_is_in_standby()
754 val = ti_clk_ll_ops->clk_readl(&hwclk->enable_reg); in ti_clk_is_in_standby()