Lines Matching +full:clock +full:- +full:error +full:- +full:detect
1 // SPDX-License-Identifier: GPL-2.0+
15 #include <linux/clk/clk-conf.h>
17 #include <clocksource/timer-ti-dm.h>
18 #include <dt-bindings/bus/ti-sysc.h>
20 /* For type1, set SYSC_OMAP2_CLOCKACTIVITY for fck off on idle, l4 clock on */
68 u32 tidr = readl_relaxed(t->base); in dmtimer_systimer_revision1()
82 writel_relaxed(val, t->base + t->sysc); in dmtimer_systimer_enable()
90 writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc); in dmtimer_systimer_disable()
95 void __iomem *syss = t->base + OMAP_TIMER_V1_SYS_STAT_OFFSET; in dmtimer_systimer_type1_reset()
100 writel_relaxed(BIT(1) | BIT(2), t->base + t->ifctrl); in dmtimer_systimer_type1_reset()
110 void __iomem *sysc = t->base + t->sysc; in dmtimer_systimer_type2_reset()
140 { .compatible = "ti,omap-counter32k" },
146 * counter is handled by timer-ti-32k, but we need to detect it as it
160 counter_32k = -ENODEV; in dmtimer_systimer_check_counter32k()
168 counter_32k = -ENODEV; in dmtimer_systimer_check_counter32k()
174 { .compatible = "ti,omap2420-timer", },
175 { .compatible = "ti,omap3430-timer", },
176 { .compatible = "ti,omap4430-timer", },
177 { .compatible = "ti,omap5430-timer", },
178 { .compatible = "ti,am335x-timer", },
179 { .compatible = "ti,am335x-timer-1ms", },
180 { .compatible = "ti,dm814-timer", },
181 { .compatible = "ti,dm816-timer", },
187 * the generic timer-ti-dm device driver probe. And that the system timer
196 if (!of_property_read_bool(np->parent, in dmtimer_is_preferred()
197 "ti,no-reset-on-init")) in dmtimer_is_preferred()
200 if (!of_property_read_bool(np->parent, "ti,no-idle")) in dmtimer_is_preferred()
204 if (!of_property_read_bool(np, "ti,timer-secure")) { in dmtimer_is_preferred()
205 if (!of_property_read_bool(np, "assigned-clocks")) in dmtimer_is_preferred()
208 if (!of_property_read_bool(np, "assigned-clock-parents")) in dmtimer_is_preferred()
212 if (of_property_read_bool(np, "ti,timer-dsp")) in dmtimer_is_preferred()
215 if (of_property_read_bool(np, "ti,timer-pwm")) in dmtimer_is_preferred()
222 * Finds the first available usable always-on timer, and assigns it to either
229 * ti,always-on property, but let's not count on it. For these quirky cases,
230 * we prefer using the always-on secure dmtimer12 with the internal 32 KiHz
231 * clock as the clocksource, and any available dmtimer as clockevent.
244 if (of_machine_is_compatible("ti,omap3-beagle-ab4")) { in dmtimer_systimer_assign_alwon()
246 counter_32k = -ENODEV; in dmtimer_systimer_assign_alwon()
251 counter_32k = -ENODEV; in dmtimer_systimer_assign_alwon()
257 if (of_property_read_bool(np, "ti,timer-alwon")) { in dmtimer_systimer_assign_alwon()
330 struct clk *clock; in dmtimer_systimer_init_clock() local
333 int error; in dmtimer_systimer_init_clock() local
337 clock = of_clk_get_by_name(np, name); in dmtimer_systimer_init_clock()
338 if ((PTR_ERR(clock) == -EINVAL) && is_ick) in dmtimer_systimer_init_clock()
340 else if (IS_ERR(clock)) in dmtimer_systimer_init_clock()
341 return PTR_ERR(clock); in dmtimer_systimer_init_clock()
343 error = clk_prepare_enable(clock); in dmtimer_systimer_init_clock()
344 if (error) in dmtimer_systimer_init_clock()
345 return error; in dmtimer_systimer_init_clock()
347 r = clk_get_rate(clock); in dmtimer_systimer_init_clock()
349 clk_disable_unprepare(clock); in dmtimer_systimer_init_clock()
350 return -ENODEV; in dmtimer_systimer_init_clock()
354 t->ick = clock; in dmtimer_systimer_init_clock()
356 t->fck = clock; in dmtimer_systimer_init_clock()
368 int error; in dmtimer_systimer_setup() local
370 if (!of_device_is_compatible(np->parent, "ti,sysc")) in dmtimer_systimer_setup()
371 return -EINVAL; in dmtimer_systimer_setup()
373 t->base = of_iomap(np, 0); in dmtimer_systimer_setup()
374 if (!t->base) in dmtimer_systimer_setup()
375 return -ENXIO; in dmtimer_systimer_setup()
378 * Enable optional assigned-clock-parents configured at the timer in dmtimer_systimer_setup()
382 error = of_clk_set_defaults(np, false); in dmtimer_systimer_setup()
383 if (error < 0) in dmtimer_systimer_setup()
384 pr_err("%s: clock source init failed: %i\n", __func__, error); in dmtimer_systimer_setup()
386 /* For ti-sysc, we have timer clocks at the parent module level */ in dmtimer_systimer_setup()
387 error = dmtimer_systimer_init_clock(t, np->parent, "fck", &rate); in dmtimer_systimer_setup()
388 if (error) in dmtimer_systimer_setup()
391 t->rate = rate; in dmtimer_systimer_setup()
393 error = dmtimer_systimer_init_clock(t, np->parent, "ick", &rate); in dmtimer_systimer_setup()
394 if (error) in dmtimer_systimer_setup()
398 t->irq_stat = OMAP_TIMER_V1_STAT_OFFSET; in dmtimer_systimer_setup()
399 t->irq_ena = OMAP_TIMER_V1_INT_EN_OFFSET; in dmtimer_systimer_setup()
400 t->pend = _OMAP_TIMER_WRITE_PEND_OFFSET; in dmtimer_systimer_setup()
403 t->irq_stat = OMAP_TIMER_V2_IRQSTATUS; in dmtimer_systimer_setup()
404 t->irq_ena = OMAP_TIMER_V2_IRQENABLE_SET; in dmtimer_systimer_setup()
406 t->pend = regbase + _OMAP_TIMER_WRITE_PEND_OFFSET; in dmtimer_systimer_setup()
409 t->sysc = OMAP_TIMER_OCP_CFG_OFFSET; in dmtimer_systimer_setup()
410 t->load = regbase + _OMAP_TIMER_LOAD_OFFSET; in dmtimer_systimer_setup()
411 t->counter = regbase + _OMAP_TIMER_COUNTER_OFFSET; in dmtimer_systimer_setup()
412 t->ctrl = regbase + _OMAP_TIMER_CTRL_OFFSET; in dmtimer_systimer_setup()
413 t->wakeup = regbase + _OMAP_TIMER_WAKEUP_EN_OFFSET; in dmtimer_systimer_setup()
414 t->ifctrl = regbase + _OMAP_TIMER_IF_CTRL_OFFSET; in dmtimer_systimer_setup()
418 pr_debug("dmtimer rev %08x sysc %08x\n", readl_relaxed(t->base), in dmtimer_systimer_setup()
419 readl_relaxed(t->base + t->sysc)); in dmtimer_systimer_setup()
424 iounmap(t->base); in dmtimer_systimer_setup()
426 return error; in dmtimer_systimer_setup()
439 struct dmtimer_systimer *t = &clkevt->t; in dmtimer_clockevent_interrupt()
441 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_stat); in dmtimer_clockevent_interrupt()
442 clkevt->dev.event_handler(&clkevt->dev); in dmtimer_clockevent_interrupt()
451 struct dmtimer_systimer *t = &clkevt->t; in dmtimer_set_next_event()
452 void __iomem *pend = t->base + t->pend; in dmtimer_set_next_event()
456 writel_relaxed(0xffffffff - cycles, t->base + t->counter); in dmtimer_set_next_event()
460 writel_relaxed(OMAP_TIMER_CTRL_ST, t->base + t->ctrl); in dmtimer_set_next_event()
468 struct dmtimer_systimer *t = &clkevt->t; in dmtimer_clockevent_shutdown()
469 void __iomem *ctrl = t->base + t->ctrl; in dmtimer_clockevent_shutdown()
478 /* Wait for functional clock period x 3.5 */ in dmtimer_clockevent_shutdown()
479 udelay(3500000 / t->rate + 1); in dmtimer_clockevent_shutdown()
481 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_stat); in dmtimer_clockevent_shutdown()
489 struct dmtimer_systimer *t = &clkevt->t; in dmtimer_set_periodic()
490 void __iomem *pend = t->base + t->pend; in dmtimer_set_periodic()
497 writel_relaxed(clkevt->period, t->base + t->load); in dmtimer_set_periodic()
501 writel_relaxed(clkevt->period, t->base + t->counter); in dmtimer_set_periodic()
506 t->base + t->ctrl); in dmtimer_set_periodic()
514 struct dmtimer_systimer *t = &clkevt->t; in omap_clockevent_idle()
517 clk_disable(t->fck); in omap_clockevent_idle()
523 struct dmtimer_systimer *t = &clkevt->t; in omap_clockevent_unidle()
524 int error; in omap_clockevent_unidle() local
526 error = clk_enable(t->fck); in omap_clockevent_unidle()
527 if (error) in omap_clockevent_unidle()
528 pr_err("could not enable timer fck on resume: %i\n", error); in omap_clockevent_unidle()
531 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_ena); in omap_clockevent_unidle()
532 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->wakeup); in omap_clockevent_unidle()
544 int error; in dmtimer_clkevt_init_common() local
546 t = &clkevt->t; in dmtimer_clkevt_init_common()
547 dev = &clkevt->dev; in dmtimer_clkevt_init_common()
553 dev->features = features; in dmtimer_clkevt_init_common()
554 dev->rating = rating; in dmtimer_clkevt_init_common()
555 dev->set_next_event = dmtimer_set_next_event; in dmtimer_clkevt_init_common()
556 dev->set_state_shutdown = dmtimer_clockevent_shutdown; in dmtimer_clkevt_init_common()
557 dev->set_state_periodic = dmtimer_set_periodic; in dmtimer_clkevt_init_common()
558 dev->set_state_oneshot = dmtimer_clockevent_shutdown; in dmtimer_clkevt_init_common()
559 dev->set_state_oneshot_stopped = dmtimer_clockevent_shutdown; in dmtimer_clkevt_init_common()
560 dev->tick_resume = dmtimer_clockevent_shutdown; in dmtimer_clkevt_init_common()
561 dev->cpumask = cpumask; in dmtimer_clkevt_init_common()
563 dev->irq = irq_of_parse_and_map(np, 0); in dmtimer_clkevt_init_common()
564 if (!dev->irq) in dmtimer_clkevt_init_common()
565 return -ENXIO; in dmtimer_clkevt_init_common()
567 error = dmtimer_systimer_setup(np, &clkevt->t); in dmtimer_clkevt_init_common()
568 if (error) in dmtimer_clkevt_init_common()
569 return error; in dmtimer_clkevt_init_common()
571 clkevt->period = 0xffffffff - DIV_ROUND_CLOSEST(t->rate, HZ); in dmtimer_clkevt_init_common()
574 * For clock-event timers we never read the timer counter and in dmtimer_clkevt_init_common()
576 * we can safely ignore this errata for clock-event timers. in dmtimer_clkevt_init_common()
578 writel_relaxed(OMAP_TIMER_CTRL_POSTED, t->base + t->ifctrl); in dmtimer_clkevt_init_common()
580 error = request_irq(dev->irq, dmtimer_clockevent_interrupt, in dmtimer_clkevt_init_common()
582 if (error) in dmtimer_clkevt_init_common()
585 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_ena); in dmtimer_clkevt_init_common()
586 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->wakeup); in dmtimer_clkevt_init_common()
589 name, of_find_property(np, "ti,timer-alwon", NULL) ? in dmtimer_clkevt_init_common()
590 "always-on " : "", t->rate, np->parent); in dmtimer_clkevt_init_common()
595 iounmap(t->base); in dmtimer_clkevt_init_common()
597 return error; in dmtimer_clkevt_init_common()
603 int error; in dmtimer_clockevent_init() local
607 return -ENOMEM; in dmtimer_clockevent_init()
609 error = dmtimer_clkevt_init_common(clkevt, np, in dmtimer_clockevent_init()
614 if (error) in dmtimer_clockevent_init()
617 clockevents_config_and_register(&clkevt->dev, clkevt->t.rate, in dmtimer_clockevent_init()
623 clkevt->dev.suspend = omap_clockevent_idle; in dmtimer_clockevent_init()
624 clkevt->dev.resume = omap_clockevent_unidle; in dmtimer_clockevent_init()
632 return error; in dmtimer_clockevent_init()
641 int error; in dmtimer_percpu_timer_init() local
644 return -EINVAL; in dmtimer_percpu_timer_init()
646 if (!of_property_read_bool(np->parent, "ti,no-reset-on-init") || in dmtimer_percpu_timer_init()
647 !of_property_read_bool(np->parent, "ti,no-idle")) in dmtimer_percpu_timer_init()
648 pr_warn("Incomplete dtb for percpu dmtimer %pOF\n", np->parent); in dmtimer_percpu_timer_init()
652 error = dmtimer_clkevt_init_common(clkevt, np, CLOCK_EVT_FEAT_ONESHOT, in dmtimer_percpu_timer_init()
653 cpumask_of(cpu), "percpu-dmtimer", in dmtimer_percpu_timer_init()
655 if (error) in dmtimer_percpu_timer_init()
656 return error; in dmtimer_percpu_timer_init()
665 struct clock_event_device *dev = &clkevt->dev; in omap_dmtimer_starting_cpu()
666 struct dmtimer_systimer *t = &clkevt->t; in omap_dmtimer_starting_cpu()
668 clockevents_config_and_register(dev, t->rate, 3, ULONG_MAX); in omap_dmtimer_starting_cpu()
669 irq_force_affinity(dev->irq, cpumask_of(cpu)); in omap_dmtimer_starting_cpu()
677 struct dmtimer_systimer *t = &clkevt->t; in dmtimer_percpu_timer_startup()
679 if (t->sysc) { in dmtimer_percpu_timer_startup()
693 arm_timer = of_find_compatible_node(NULL, NULL, "arm,armv7-timer"); in dmtimer_percpu_quirk_init()
717 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_read_cycles()
719 return (u64)readl_relaxed(t->base + t->counter); in dmtimer_clocksource_read_cycles()
732 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_suspend()
734 clksrc->loadval = readl_relaxed(t->base + t->counter); in dmtimer_clocksource_suspend()
736 clk_disable(t->fck); in dmtimer_clocksource_suspend()
742 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_resume()
743 int error; in dmtimer_clocksource_resume() local
745 error = clk_enable(t->fck); in dmtimer_clocksource_resume()
746 if (error) in dmtimer_clocksource_resume()
747 pr_err("could not enable timer fck on resume: %i\n", error); in dmtimer_clocksource_resume()
750 writel_relaxed(clksrc->loadval, t->base + t->counter); in dmtimer_clocksource_resume()
752 t->base + t->ctrl); in dmtimer_clocksource_resume()
760 int error; in dmtimer_clocksource_init() local
764 return -ENOMEM; in dmtimer_clocksource_init()
766 dev = &clksrc->dev; in dmtimer_clocksource_init()
767 t = &clksrc->t; in dmtimer_clocksource_init()
769 error = dmtimer_systimer_setup(np, t); in dmtimer_clocksource_init()
770 if (error) in dmtimer_clocksource_init()
773 dev->name = "dmtimer"; in dmtimer_clocksource_init()
774 dev->rating = 300; in dmtimer_clocksource_init()
775 dev->read = dmtimer_clocksource_read_cycles; in dmtimer_clocksource_init()
776 dev->mask = CLOCKSOURCE_MASK(32); in dmtimer_clocksource_init()
777 dev->flags = CLOCK_SOURCE_IS_CONTINUOUS; in dmtimer_clocksource_init()
781 dev->suspend = dmtimer_clocksource_suspend; in dmtimer_clocksource_init()
782 dev->resume = dmtimer_clocksource_resume; in dmtimer_clocksource_init()
785 writel_relaxed(0, t->base + t->counter); in dmtimer_clocksource_init()
787 t->base + t->ctrl); in dmtimer_clocksource_init()
790 of_find_property(np, "ti,timer-alwon", NULL) ? in dmtimer_clocksource_init()
791 "always-on " : "", np->parent); in dmtimer_clocksource_init()
794 dmtimer_sched_clock_counter = t->base + t->counter; in dmtimer_clocksource_init()
795 sched_clock_register(dmtimer_read_sched_clock, 32, t->rate); in dmtimer_clocksource_init()
798 if (clocksource_register_hz(dev, t->rate)) in dmtimer_clocksource_init()
806 return -ENODEV; in dmtimer_clocksource_init()
810 * To detect between a clocksource and clockevent, we assume the device tree
823 pr_err("%s: unable to detect system timers, update dtb?\n", in dmtimer_systimer_init()
826 return -EINVAL; in dmtimer_systimer_init()
832 return -EINVAL; in dmtimer_systimer_init()
846 TIMER_OF_DECLARE(systimer_omap2, "ti,omap2420-timer", dmtimer_systimer_init);
847 TIMER_OF_DECLARE(systimer_omap3, "ti,omap3430-timer", dmtimer_systimer_init);
848 TIMER_OF_DECLARE(systimer_omap4, "ti,omap4430-timer", dmtimer_systimer_init);
849 TIMER_OF_DECLARE(systimer_omap5, "ti,omap5430-timer", dmtimer_systimer_init);
850 TIMER_OF_DECLARE(systimer_am33x, "ti,am335x-timer", dmtimer_systimer_init);
851 TIMER_OF_DECLARE(systimer_am3ms, "ti,am335x-timer-1ms", dmtimer_systimer_init);
852 TIMER_OF_DECLARE(systimer_dm814, "ti,dm814-timer", dmtimer_systimer_init);
853 TIMER_OF_DECLARE(systimer_dm816, "ti,dm816-timer", dmtimer_systimer_init);