1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (c) 2013-2014 Freescale Semiconductor, Inc
10 #include <linux/platform_data/dma-mcf-edma.h>
12 #include "fsl-edma-common.h"
20 	struct edma_regs *regs = &mcf_edma->regs;  in mcf_edma_tx_handler()
25 	intmap = ioread32(regs->inth);  in mcf_edma_tx_handler()
27 	intmap |= ioread32(regs->intl);  in mcf_edma_tx_handler()
31 	for (ch = 0; ch < mcf_edma->n_chans; ch++) {  in mcf_edma_tx_handler()
33 			iowrite8(EDMA_MASK_CH(ch), regs->cint);  in mcf_edma_tx_handler()
35 			mcf_chan = &mcf_edma->chans[ch];  in mcf_edma_tx_handler()
37 			spin_lock(&mcf_chan->vchan.lock);  in mcf_edma_tx_handler()
39 			if (!mcf_chan->edesc) {  in mcf_edma_tx_handler()
41 				spin_unlock(&mcf_chan->vchan.lock);  in mcf_edma_tx_handler()
45 			if (!mcf_chan->edesc->iscyclic) {  in mcf_edma_tx_handler()
46 				list_del(&mcf_chan->edesc->vdesc.node);  in mcf_edma_tx_handler()
47 				vchan_cookie_complete(&mcf_chan->edesc->vdesc);  in mcf_edma_tx_handler()
48 				mcf_chan->edesc = NULL;  in mcf_edma_tx_handler()
49 				mcf_chan->status = DMA_COMPLETE;  in mcf_edma_tx_handler()
50 				mcf_chan->idle = true;  in mcf_edma_tx_handler()
52 				vchan_cyclic_callback(&mcf_chan->edesc->vdesc);  in mcf_edma_tx_handler()
55 			if (!mcf_chan->edesc)  in mcf_edma_tx_handler()
58 			spin_unlock(&mcf_chan->vchan.lock);  in mcf_edma_tx_handler()
68 	struct edma_regs *regs = &mcf_edma->regs;  in mcf_edma_err_handler()
69 	unsigned int err, ch;  in mcf_edma_err_handler()  local
71 	err = ioread32(regs->errl);  in mcf_edma_err_handler()
72 	if (!err)  in mcf_edma_err_handler()
76 		if (err & BIT(ch)) {  in mcf_edma_err_handler()
77 			fsl_edma_disable_request(&mcf_edma->chans[ch]);  in mcf_edma_err_handler()
78 			iowrite8(EDMA_CERR_CERR(ch), regs->cerr);  in mcf_edma_err_handler()
79 			mcf_edma->chans[ch].status = DMA_ERROR;  in mcf_edma_err_handler()
80 			mcf_edma->chans[ch].idle = true;  in mcf_edma_err_handler()
84 	err = ioread32(regs->errh);  in mcf_edma_err_handler()
85 	if (!err)  in mcf_edma_err_handler()
89 		if (err & (BIT(ch - (EDMA_CHANNELS / 2)))) {  in mcf_edma_err_handler()
90 			fsl_edma_disable_request(&mcf_edma->chans[ch]);  in mcf_edma_err_handler()
91 			iowrite8(EDMA_CERR_CERR(ch), regs->cerr);  in mcf_edma_err_handler()
92 			mcf_edma->chans[ch].status = DMA_ERROR;  in mcf_edma_err_handler()
93 			mcf_edma->chans[ch].idle = true;  in mcf_edma_err_handler()
107 				IORESOURCE_IRQ, "edma-tx-00-15");  in mcf_edma_irq_init()
109 		return -1;  in mcf_edma_irq_init()
111 	for (ret = 0, i = res->start; i <= res->end; ++i)  in mcf_edma_irq_init()
112 		ret |= request_irq(i, mcf_edma_tx_handler, 0, "eDMA", mcf_edma);  in mcf_edma_irq_init()
117 			IORESOURCE_IRQ, "edma-tx-16-55");  in mcf_edma_irq_init()
119 		return -1;  in mcf_edma_irq_init()
121 	for (ret = 0, i = res->start; i <= res->end; ++i)  in mcf_edma_irq_init()
122 		ret |= request_irq(i, mcf_edma_tx_handler, 0, "eDMA", mcf_edma);  in mcf_edma_irq_init()
126 	ret = platform_get_irq_byname(pdev, "edma-tx-56-63");  in mcf_edma_irq_init()
127 	if (ret != -ENXIO) {  in mcf_edma_irq_init()
129 				  0, "eDMA", mcf_edma);  in mcf_edma_irq_init()
134 	ret = platform_get_irq_byname(pdev, "edma-err");  in mcf_edma_irq_init()
135 	if (ret != -ENXIO) {  in mcf_edma_irq_init()
137 				  0, "eDMA", mcf_edma);  in mcf_edma_irq_init()
152 			IORESOURCE_IRQ, "edma-tx-00-15");  in mcf_edma_irq_free()
154 		for (irq = res->start; irq <= res->end; irq++)  in mcf_edma_irq_free()
159 			IORESOURCE_IRQ, "edma-tx-16-55");  in mcf_edma_irq_free()
161 		for (irq = res->start; irq <= res->end; irq++)  in mcf_edma_irq_free()
165 	irq = platform_get_irq_byname(pdev, "edma-tx-56-63");  in mcf_edma_irq_free()
166 	if (irq != -ENXIO)  in mcf_edma_irq_free()
169 	irq = platform_get_irq_byname(pdev, "edma-err");  in mcf_edma_irq_free()
170 	if (irq != -ENXIO)  in mcf_edma_irq_free()
188 	pdata = dev_get_platdata(&pdev->dev);  in mcf_edma_probe()
190 		dev_err(&pdev->dev, "no platform data supplied\n");  in mcf_edma_probe()
191 		return -EINVAL;  in mcf_edma_probe()
194 	if (!pdata->dma_channels) {  in mcf_edma_probe()
195 		dev_info(&pdev->dev, "setting default channel number to 64");  in mcf_edma_probe()
198 		chans = pdata->dma_channels;  in mcf_edma_probe()
202 	mcf_edma = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);  in mcf_edma_probe()
204 		return -ENOMEM;  in mcf_edma_probe()
206 	mcf_edma->n_chans = chans;  in mcf_edma_probe()
208 	/* Set up drvdata for ColdFire edma */  in mcf_edma_probe()
209 	mcf_edma->drvdata = &mcf_data;  in mcf_edma_probe()
210 	mcf_edma->big_endian = 1;  in mcf_edma_probe()
212 	mutex_init(&mcf_edma->fsl_edma_mutex);  in mcf_edma_probe()
216 	mcf_edma->membase = devm_ioremap_resource(&pdev->dev, res);  in mcf_edma_probe()
217 	if (IS_ERR(mcf_edma->membase))  in mcf_edma_probe()
218 		return PTR_ERR(mcf_edma->membase);  in mcf_edma_probe()
221 	regs = &mcf_edma->regs;  in mcf_edma_probe()
223 	INIT_LIST_HEAD(&mcf_edma->dma_dev.channels);  in mcf_edma_probe()
224 	for (i = 0; i < mcf_edma->n_chans; i++) {  in mcf_edma_probe()
225 		struct fsl_edma_chan *mcf_chan = &mcf_edma->chans[i];  in mcf_edma_probe()
227 		mcf_chan->edma = mcf_edma;  in mcf_edma_probe()
228 		mcf_chan->slave_id = i;  in mcf_edma_probe()
229 		mcf_chan->idle = true;  in mcf_edma_probe()
230 		mcf_chan->dma_dir = DMA_NONE;  in mcf_edma_probe()
231 		mcf_chan->vchan.desc_free = fsl_edma_free_desc;  in mcf_edma_probe()
232 		vchan_init(&mcf_chan->vchan, &mcf_edma->dma_dev);  in mcf_edma_probe()
233 		iowrite32(0x0, &regs->tcd[i].csr);  in mcf_edma_probe()
236 	iowrite32(~0, regs->inth);  in mcf_edma_probe()
237 	iowrite32(~0, regs->intl);  in mcf_edma_probe()
239 	ret = mcf_edma->drvdata->setup_irq(pdev, mcf_edma);  in mcf_edma_probe()
243 	dma_cap_set(DMA_PRIVATE, mcf_edma->dma_dev.cap_mask);  in mcf_edma_probe()
244 	dma_cap_set(DMA_SLAVE, mcf_edma->dma_dev.cap_mask);  in mcf_edma_probe()
245 	dma_cap_set(DMA_CYCLIC, mcf_edma->dma_dev.cap_mask);  in mcf_edma_probe()
247 	mcf_edma->dma_dev.dev = &pdev->dev;  in mcf_edma_probe()
248 	mcf_edma->dma_dev.device_alloc_chan_resources =  in mcf_edma_probe()
250 	mcf_edma->dma_dev.device_free_chan_resources =  in mcf_edma_probe()
252 	mcf_edma->dma_dev.device_config = fsl_edma_slave_config;  in mcf_edma_probe()
253 	mcf_edma->dma_dev.device_prep_dma_cyclic =  in mcf_edma_probe()
255 	mcf_edma->dma_dev.device_prep_slave_sg = fsl_edma_prep_slave_sg;  in mcf_edma_probe()
256 	mcf_edma->dma_dev.device_tx_status = fsl_edma_tx_status;  in mcf_edma_probe()
257 	mcf_edma->dma_dev.device_pause = fsl_edma_pause;  in mcf_edma_probe()
258 	mcf_edma->dma_dev.device_resume = fsl_edma_resume;  in mcf_edma_probe()
259 	mcf_edma->dma_dev.device_terminate_all = fsl_edma_terminate_all;  in mcf_edma_probe()
260 	mcf_edma->dma_dev.device_issue_pending = fsl_edma_issue_pending;  in mcf_edma_probe()
262 	mcf_edma->dma_dev.src_addr_widths = FSL_EDMA_BUSWIDTHS;  in mcf_edma_probe()
263 	mcf_edma->dma_dev.dst_addr_widths = FSL_EDMA_BUSWIDTHS;  in mcf_edma_probe()
264 	mcf_edma->dma_dev.directions =  in mcf_edma_probe()
267 	mcf_edma->dma_dev.filter.fn = mcf_edma_filter_fn;  in mcf_edma_probe()
268 	mcf_edma->dma_dev.filter.map = pdata->slave_map;  in mcf_edma_probe()
269 	mcf_edma->dma_dev.filter.mapcnt = pdata->slavecnt;  in mcf_edma_probe()
273 	ret = dma_async_device_register(&mcf_edma->dma_dev);  in mcf_edma_probe()
275 		dev_err(&pdev->dev,  in mcf_edma_probe()
276 			"Can't register Freescale eDMA engine. (%d)\n", ret);  in mcf_edma_probe()
281 	iowrite32(EDMA_CR_ERGA | EDMA_CR_ERCA, regs->cr);  in mcf_edma_probe()
291 	fsl_edma_cleanup_vchan(&mcf_edma->dma_dev);  in mcf_edma_remove()
292 	dma_async_device_unregister(&mcf_edma->dma_dev);  in mcf_edma_remove()
299 		.name	= "mcf-edma",
307 	if (chan->device->dev->driver == &mcf_edma_driver.driver) {  in mcf_edma_filter_fn()
310 		return (mcf_chan->slave_id == (uintptr_t)param);  in mcf_edma_filter_fn()
329 MODULE_ALIAS("platform:mcf-edma");
330 MODULE_DESCRIPTION("Freescale eDMA engine driver, ColdFire family");