Lines Matching +full:pd +full:- +full:idle +full:- +full:ns
1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <linux/dma-mapping.h>
46 CCTRL6, /* Cacheable write-through, allocate on writes only */
47 CCTRL7, /* Cacheable write-back, allocate on writes only */
245 * at 1byte/burst for P<->M and M<->M respectively.
247 * should be enough for P<->M and M<->M respectively.
382 /* Index of the last submitted request or -1 if the DMA is stopped */
423 /* DMA-Engine Channel */
449 /* For D-to-M and M-to-D channels */
453 /* DMA-mapped view of the FIFO; may differ if an IOMMU is present */
466 /* DMA-Engine Device */
514 .quirk = "arm,pl330-broken-no-flushp",
518 .quirk = "arm,pl330-periph-burst",
561 return thrd->req[0].desc != NULL && thrd->req[1].desc != NULL; in _queue_full()
566 return thrd->dmac->manager == thrd; in is_manager()
569 /* If manager of the thread is in Non-Secure mode */
572 return (thrd->dmac->pcfg.mode & DMAC_MODE_NS) ? true : false; in _manager_ns()
658 cnt--; /* DMAC increments by 1 internally */ in _emit_LP()
676 enum pl330_cond cond = arg->cond; in _emit_LPEND()
677 bool forever = arg->forever; in _emit_LPEND()
678 unsigned loop = arg->loop; in _emit_LPEND()
679 u8 bjump = arg->bjump; in _emit_LPEND()
844 unsigned ns; member
850 u8 chan = arg->chan; in _emit_GO()
851 u32 addr = arg->addr; in _emit_GO()
852 unsigned ns = arg->ns; in _emit_GO() local
858 buf[0] |= (ns << 1); in _emit_GO()
870 /* Returns Time-Out */
873 void __iomem *regs = thrd->dmac->base; in _until_dmac_idle()
877 /* Until Manager is Idle */ in _until_dmac_idle()
882 } while (--loops); in _until_dmac_idle()
893 void __iomem *regs = thrd->dmac->base; in _execute_DBGINSN()
896 /* If timed out due to halted state-machine */ in _execute_DBGINSN()
898 dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n"); in _execute_DBGINSN()
905 val |= (thrd->id << 8); /* Channel Number */ in _execute_DBGINSN()
918 void __iomem *regs = thrd->dmac->base; in _state()
924 val = readl(regs + CS(thrd->id)) & 0xf; in _state()
976 void __iomem *regs = thrd->dmac->base; in _stop()
994 if (inten & (1 << thrd->ev)) in _stop()
995 writel(1 << thrd->ev, regs + INTCLR); in _stop()
997 writel(inten & ~(1 << thrd->ev), regs + INTEN); in _stop()
1003 void __iomem *regs = thrd->dmac->base; in _trigger()
1007 unsigned ns; in _trigger() local
1015 idx = 1 - thrd->lstenq; in _trigger()
1016 if (thrd->req[idx].desc != NULL) { in _trigger()
1017 req = &thrd->req[idx]; in _trigger()
1019 idx = thrd->lstenq; in _trigger()
1020 if (thrd->req[idx].desc != NULL) in _trigger()
1021 req = &thrd->req[idx]; in _trigger()
1031 if (idx == thrd->req_running) in _trigger()
1034 desc = req->desc; in _trigger()
1036 ns = desc->rqcfg.nonsecure ? 1 : 0; in _trigger()
1038 /* See 'Abort Sources' point-4 at Page 2-25 */ in _trigger()
1039 if (_manager_ns(thrd) && !ns) in _trigger()
1040 dev_info(thrd->dmac->ddma.dev, "%s:%d Recipe for ABORT!\n", in _trigger()
1043 go.chan = thrd->id; in _trigger()
1044 go.addr = req->mc_bus; in _trigger()
1045 go.ns = ns; in _trigger()
1049 writel(readl(regs + INTEN) | (1 << thrd->ev), regs + INTEN); in _trigger()
1054 thrd->req_running = idx; in _trigger()
1099 struct pl330_config *pcfg = pxs->desc->rqcfg.pcfg; in _ldst_memtomem()
1101 /* check lock-up free version */ in _ldst_memtomem()
1102 if (get_revision(pcfg->periph_id) >= PERIPH_REV_R1P0) { in _ldst_memtomem()
1103 while (cyc--) { in _ldst_memtomem()
1108 while (cyc--) { in _ldst_memtomem()
1196 if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) in _ldst_peripheral()
1197 off += _emit_FLUSHP(dry_run, &buf[off], pxs->desc->peri); in _ldst_peripheral()
1198 while (cyc--) { in _ldst_peripheral()
1199 off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); in _ldst_peripheral()
1200 off += _emit_load(dry_run, &buf[off], cond, pxs->desc->rqtype, in _ldst_peripheral()
1201 pxs->desc->peri); in _ldst_peripheral()
1202 off += _emit_store(dry_run, &buf[off], cond, pxs->desc->rqtype, in _ldst_peripheral()
1203 pxs->desc->peri); in _ldst_peripheral()
1213 enum pl330_cond cond = BRST_LEN(pxs->ccr) > 1 ? BURST : SINGLE; in _bursts()
1215 if (pl330->quirks & PL330_QUIRK_PERIPH_BURST) in _bursts()
1218 switch (pxs->desc->rqtype) { in _bursts()
1241 * for mem-to-mem, mem-to-dev or dev-to-mem.
1253 * dregs_len = (total bytes - BURST_TO_BYTE(bursts, ccr)) / in _dregs()
1259 dregs_ccr = pxs->ccr; in _dregs()
1262 dregs_ccr |= (((transfer_length - 1) & 0xf) << in _dregs()
1264 dregs_ccr |= (((transfer_length - 1) & 0xf) << in _dregs()
1267 switch (pxs->desc->rqtype) { in _dregs()
1332 * which is 8-bits and hence 255 in _loop()
1334 cycmax = (255 - (szlp + szlpend)) / szbrst; in _loop()
1353 lpend.bjump = off - ljmp1; in _loop()
1360 lpend.bjump = off - ljmp0; in _loop()
1375 struct pl330_xfer *x = &pxs->desc->px; in _setup_loops()
1376 u32 ccr = pxs->ccr; in _setup_loops()
1377 unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr); in _setup_loops()
1378 int num_dregs = (x->bytes - BURST_TO_BYTE(bursts, ccr)) / in _setup_loops()
1385 bursts -= c; in _setup_loops()
1396 struct pl330_xfer *x = &pxs->desc->px; in _setup_xfer()
1399 /* DMAMOV SAR, x->src_addr */ in _setup_xfer()
1400 off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); in _setup_xfer()
1401 /* DMAMOV DAR, x->dst_addr */ in _setup_xfer()
1402 off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); in _setup_xfer()
1418 struct _pl330_req *req = &thrd->req[index]; in _setup_req()
1419 u8 *buf = req->mc_cpu; in _setup_req()
1422 PL330_DBGMC_START(req->mc_bus); in _setup_req()
1425 off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr); in _setup_req()
1430 off += _emit_SEV(dry_run, &buf[off], thrd->ev); in _setup_req()
1441 if (rqc->src_inc) in _prepare_ccr()
1444 if (rqc->dst_inc) in _prepare_ccr()
1448 if (rqc->privileged) in _prepare_ccr()
1450 if (rqc->nonsecure) in _prepare_ccr()
1452 if (rqc->insnaccess) in _prepare_ccr()
1455 ccr |= (((rqc->brst_len - 1) & 0xf) << CC_SRCBRSTLEN_SHFT); in _prepare_ccr()
1456 ccr |= (((rqc->brst_len - 1) & 0xf) << CC_DSTBRSTLEN_SHFT); in _prepare_ccr()
1458 ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT); in _prepare_ccr()
1459 ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT); in _prepare_ccr()
1461 ccr |= (rqc->scctl << CC_SRCCCTRL_SHFT); in _prepare_ccr()
1462 ccr |= (rqc->dcctl << CC_DSTCCTRL_SHFT); in _prepare_ccr()
1464 ccr |= (rqc->swap << CC_SWAP_SHFT); in _prepare_ccr()
1477 struct pl330_dmac *pl330 = thrd->dmac; in pl330_submit_req()
1484 switch (desc->rqtype) { in pl330_submit_req()
1495 return -ENOTSUPP; in pl330_submit_req()
1498 if (pl330->state == DYING in pl330_submit_req()
1499 || pl330->dmac_tbd.reset_chan & (1 << thrd->id)) { in pl330_submit_req()
1500 dev_info(thrd->dmac->ddma.dev, "%s:%d\n", in pl330_submit_req()
1502 return -EAGAIN; in pl330_submit_req()
1505 /* If request for non-existing peripheral */ in pl330_submit_req()
1506 if (desc->rqtype != DMA_MEM_TO_MEM && in pl330_submit_req()
1507 desc->peri >= pl330->pcfg.num_peri) { in pl330_submit_req()
1508 dev_info(thrd->dmac->ddma.dev, in pl330_submit_req()
1510 __func__, __LINE__, desc->peri); in pl330_submit_req()
1511 return -EINVAL; in pl330_submit_req()
1514 spin_lock_irqsave(&pl330->lock, flags); in pl330_submit_req()
1517 ret = -EAGAIN; in pl330_submit_req()
1523 desc->rqcfg.nonsecure = 0; in pl330_submit_req()
1525 desc->rqcfg.nonsecure = 1; in pl330_submit_req()
1527 ccr = _prepare_ccr(&desc->rqcfg); in pl330_submit_req()
1529 idx = thrd->req[0].desc == NULL ? 0 : 1; in pl330_submit_req()
1539 if (ret > pl330->mcbufsz / 2) { in pl330_submit_req()
1540 dev_info(pl330->ddma.dev, "%s:%d Try increasing mcbufsz (%i/%i)\n", in pl330_submit_req()
1541 __func__, __LINE__, ret, pl330->mcbufsz / 2); in pl330_submit_req()
1542 ret = -ENOMEM; in pl330_submit_req()
1547 thrd->lstenq = idx; in pl330_submit_req()
1548 thrd->req[idx].desc = desc; in pl330_submit_req()
1554 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_submit_req()
1567 pch = desc->pchan; in dma_pl330_rqcb()
1573 spin_lock_irqsave(&pch->lock, flags); in dma_pl330_rqcb()
1575 desc->status = DONE; in dma_pl330_rqcb()
1577 spin_unlock_irqrestore(&pch->lock, flags); in dma_pl330_rqcb()
1579 tasklet_schedule(&pch->task); in dma_pl330_rqcb()
1588 spin_lock_irqsave(&pl330->lock, flags); in pl330_dotask()
1591 if (pl330->dmac_tbd.reset_dmac) { in pl330_dotask()
1592 pl330->state = DYING; in pl330_dotask()
1594 pl330->dmac_tbd.reset_mngr = true; in pl330_dotask()
1596 pl330->dmac_tbd.reset_dmac = false; in pl330_dotask()
1599 if (pl330->dmac_tbd.reset_mngr) { in pl330_dotask()
1600 _stop(pl330->manager); in pl330_dotask()
1602 pl330->dmac_tbd.reset_chan = (1 << pl330->pcfg.num_chan) - 1; in pl330_dotask()
1604 pl330->dmac_tbd.reset_mngr = false; in pl330_dotask()
1607 for (i = 0; i < pl330->pcfg.num_chan; i++) { in pl330_dotask()
1609 if (pl330->dmac_tbd.reset_chan & (1 << i)) { in pl330_dotask()
1610 struct pl330_thread *thrd = &pl330->channels[i]; in pl330_dotask()
1611 void __iomem *regs = pl330->base; in pl330_dotask()
1616 if (readl(regs + FSC) & (1 << thrd->id)) in pl330_dotask()
1621 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_dotask()
1622 dma_pl330_rqcb(thrd->req[1 - thrd->lstenq].desc, err); in pl330_dotask()
1623 dma_pl330_rqcb(thrd->req[thrd->lstenq].desc, err); in pl330_dotask()
1624 spin_lock_irqsave(&pl330->lock, flags); in pl330_dotask()
1626 thrd->req[0].desc = NULL; in pl330_dotask()
1627 thrd->req[1].desc = NULL; in pl330_dotask()
1628 thrd->req_running = -1; in pl330_dotask()
1631 pl330->dmac_tbd.reset_chan &= ~(1 << i); in pl330_dotask()
1635 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_dotask()
1649 regs = pl330->base; in pl330_update()
1651 spin_lock_irqsave(&pl330->lock, flags); in pl330_update()
1655 pl330->dmac_tbd.reset_mngr = true; in pl330_update()
1657 pl330->dmac_tbd.reset_mngr = false; in pl330_update()
1659 val = readl(regs + FSC) & ((1 << pl330->pcfg.num_chan) - 1); in pl330_update()
1660 pl330->dmac_tbd.reset_chan |= val; in pl330_update()
1663 while (i < pl330->pcfg.num_chan) { in pl330_update()
1665 dev_info(pl330->ddma.dev, in pl330_update()
1666 "Reset Channel-%d\t CS-%x FTC-%x\n", in pl330_update()
1669 _stop(&pl330->channels[i]); in pl330_update()
1677 if (pl330->pcfg.num_events < 32 in pl330_update()
1678 && val & ~((1 << pl330->pcfg.num_events) - 1)) { in pl330_update()
1679 pl330->dmac_tbd.reset_dmac = true; in pl330_update()
1680 dev_err(pl330->ddma.dev, "%s:%d Unexpected!\n", __func__, in pl330_update()
1686 for (ev = 0; ev < pl330->pcfg.num_events; ev++) { in pl330_update()
1698 id = pl330->events[ev]; in pl330_update()
1700 thrd = &pl330->channels[id]; in pl330_update()
1702 active = thrd->req_running; in pl330_update()
1703 if (active == -1) /* Aborted */ in pl330_update()
1707 descdone = thrd->req[active].desc; in pl330_update()
1708 thrd->req[active].desc = NULL; in pl330_update()
1710 thrd->req_running = -1; in pl330_update()
1716 list_add_tail(&descdone->rqd, &pl330->req_done); in pl330_update()
1721 while (!list_empty(&pl330->req_done)) { in pl330_update()
1722 descdone = list_first_entry(&pl330->req_done, in pl330_update()
1724 list_del(&descdone->rqd); in pl330_update()
1725 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_update()
1727 spin_lock_irqsave(&pl330->lock, flags); in pl330_update()
1731 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_update()
1733 if (pl330->dmac_tbd.reset_dmac in pl330_update()
1734 || pl330->dmac_tbd.reset_mngr in pl330_update()
1735 || pl330->dmac_tbd.reset_chan) { in pl330_update()
1737 tasklet_schedule(&pl330->tasks); in pl330_update()
1746 struct pl330_dmac *pl330 = thrd->dmac; in _alloc_event()
1749 for (ev = 0; ev < pl330->pcfg.num_events; ev++) in _alloc_event()
1750 if (pl330->events[ev] == -1) { in _alloc_event()
1751 pl330->events[ev] = thrd->id; in _alloc_event()
1755 return -1; in _alloc_event()
1760 return pl330->pcfg.irq_ns & (1 << i); in _chan_ns()
1771 if (pl330->state == DYING) in pl330_request_channel()
1774 chans = pl330->pcfg.num_chan; in pl330_request_channel()
1777 thrd = &pl330->channels[i]; in pl330_request_channel()
1778 if ((thrd->free) && (!_manager_ns(thrd) || in pl330_request_channel()
1780 thrd->ev = _alloc_event(thrd); in pl330_request_channel()
1781 if (thrd->ev >= 0) { in pl330_request_channel()
1782 thrd->free = false; in pl330_request_channel()
1783 thrd->lstenq = 1; in pl330_request_channel()
1784 thrd->req[0].desc = NULL; in pl330_request_channel()
1785 thrd->req[1].desc = NULL; in pl330_request_channel()
1786 thrd->req_running = -1; in pl330_request_channel()
1799 struct pl330_dmac *pl330 = thrd->dmac; in _free_event()
1802 if (ev >= 0 && ev < pl330->pcfg.num_events in _free_event()
1803 && pl330->events[ev] == thrd->id) in _free_event()
1804 pl330->events[ev] = -1; in _free_event()
1809 if (!thrd || thrd->free) in pl330_release_channel()
1814 dma_pl330_rqcb(thrd->req[1 - thrd->lstenq].desc, PL330_ERR_ABORT); in pl330_release_channel()
1815 dma_pl330_rqcb(thrd->req[thrd->lstenq].desc, PL330_ERR_ABORT); in pl330_release_channel()
1817 _free_event(thrd, thrd->ev); in pl330_release_channel()
1818 thrd->free = true; in pl330_release_channel()
1826 void __iomem *regs = pl330->base; in read_dmac_config()
1831 pl330->pcfg.data_bus_width = 8 * (1 << val); in read_dmac_config()
1835 pl330->pcfg.data_buf_dep = val + 1; in read_dmac_config()
1840 pl330->pcfg.num_chan = val; in read_dmac_config()
1846 pl330->pcfg.num_peri = val; in read_dmac_config()
1847 pl330->pcfg.peri_ns = readl(regs + CR4); in read_dmac_config()
1849 pl330->pcfg.num_peri = 0; in read_dmac_config()
1854 pl330->pcfg.mode |= DMAC_MODE_NS; in read_dmac_config()
1856 pl330->pcfg.mode &= ~DMAC_MODE_NS; in read_dmac_config()
1861 pl330->pcfg.num_events = val; in read_dmac_config()
1863 pl330->pcfg.irq_ns = readl(regs + CR3); in read_dmac_config()
1868 struct pl330_dmac *pl330 = thrd->dmac; in _reset_thread()
1870 thrd->req[0].mc_cpu = pl330->mcode_cpu in _reset_thread()
1871 + (thrd->id * pl330->mcbufsz); in _reset_thread()
1872 thrd->req[0].mc_bus = pl330->mcode_bus in _reset_thread()
1873 + (thrd->id * pl330->mcbufsz); in _reset_thread()
1874 thrd->req[0].desc = NULL; in _reset_thread()
1876 thrd->req[1].mc_cpu = thrd->req[0].mc_cpu in _reset_thread()
1877 + pl330->mcbufsz / 2; in _reset_thread()
1878 thrd->req[1].mc_bus = thrd->req[0].mc_bus in _reset_thread()
1879 + pl330->mcbufsz / 2; in _reset_thread()
1880 thrd->req[1].desc = NULL; in _reset_thread()
1882 thrd->req_running = -1; in _reset_thread()
1887 int chans = pl330->pcfg.num_chan; in dmac_alloc_threads()
1892 pl330->channels = kcalloc(1 + chans, sizeof(*thrd), in dmac_alloc_threads()
1894 if (!pl330->channels) in dmac_alloc_threads()
1895 return -ENOMEM; in dmac_alloc_threads()
1899 thrd = &pl330->channels[i]; in dmac_alloc_threads()
1900 thrd->id = i; in dmac_alloc_threads()
1901 thrd->dmac = pl330; in dmac_alloc_threads()
1903 thrd->free = true; in dmac_alloc_threads()
1907 thrd = &pl330->channels[chans]; in dmac_alloc_threads()
1908 thrd->id = chans; in dmac_alloc_threads()
1909 thrd->dmac = pl330; in dmac_alloc_threads()
1910 thrd->free = false; in dmac_alloc_threads()
1911 pl330->manager = thrd; in dmac_alloc_threads()
1918 int chans = pl330->pcfg.num_chan; in dmac_alloc_resources()
1925 pl330->mcode_cpu = dma_alloc_attrs(pl330->ddma.dev, in dmac_alloc_resources()
1926 chans * pl330->mcbufsz, in dmac_alloc_resources()
1927 &pl330->mcode_bus, GFP_KERNEL, in dmac_alloc_resources()
1929 if (!pl330->mcode_cpu) { in dmac_alloc_resources()
1930 dev_err(pl330->ddma.dev, "%s:%d Can't allocate memory!\n", in dmac_alloc_resources()
1932 return -ENOMEM; in dmac_alloc_resources()
1937 dev_err(pl330->ddma.dev, "%s:%d Can't to create channels for DMAC!\n", in dmac_alloc_resources()
1939 dma_free_attrs(pl330->ddma.dev, in dmac_alloc_resources()
1940 chans * pl330->mcbufsz, in dmac_alloc_resources()
1941 pl330->mcode_cpu, pl330->mcode_bus, in dmac_alloc_resources()
1954 if ((pl330->pcfg.periph_id & 0xfffff) != PERIPH_ID_VAL) { in pl330_add()
1955 dev_err(pl330->ddma.dev, "PERIPH_ID 0x%x !\n", in pl330_add()
1956 pl330->pcfg.periph_id); in pl330_add()
1957 return -EINVAL; in pl330_add()
1963 if (pl330->pcfg.num_events == 0) { in pl330_add()
1964 dev_err(pl330->ddma.dev, "%s:%d Can't work without events!\n", in pl330_add()
1966 return -EINVAL; in pl330_add()
1969 spin_lock_init(&pl330->lock); in pl330_add()
1971 INIT_LIST_HEAD(&pl330->req_done); in pl330_add()
1974 if (!pl330->mcbufsz) in pl330_add()
1975 pl330->mcbufsz = MCODE_BUFF_PER_REQ * 2; in pl330_add()
1978 for (i = 0; i < pl330->pcfg.num_events; i++) in pl330_add()
1979 pl330->events[i] = -1; in pl330_add()
1984 dev_err(pl330->ddma.dev, "Unable to create channels for DMAC\n"); in pl330_add()
1988 tasklet_setup(&pl330->tasks, pl330_dotask); in pl330_add()
1990 pl330->state = INIT; in pl330_add()
2001 for (i = 0; i < pl330->pcfg.num_chan; i++) { in dmac_free_threads()
2002 thrd = &pl330->channels[i]; in dmac_free_threads()
2007 kfree(pl330->channels); in dmac_free_threads()
2014 pl330->state = UNINIT; in pl330_del()
2016 tasklet_kill(&pl330->tasks); in pl330_del()
2021 dma_free_attrs(pl330->ddma.dev, in pl330_del()
2022 pl330->pcfg.num_chan * pl330->mcbufsz, pl330->mcode_cpu, in pl330_del()
2023 pl330->mcode_bus, DMA_ATTR_PRIVILEGED); in pl330_del()
2049 list_for_each_entry(desc, &pch->work_list, node) { in fill_queue()
2052 if (desc->status == BUSY || desc->status == PAUSED) in fill_queue()
2055 ret = pl330_submit_req(pch->thread, desc); in fill_queue()
2057 desc->status = BUSY; in fill_queue()
2058 } else if (ret == -EAGAIN) { in fill_queue()
2063 desc->status = DONE; in fill_queue()
2064 dev_err(pch->dmac->ddma.dev, "%s:%d Bad Desc(%d)\n", in fill_queue()
2065 __func__, __LINE__, desc->txd.cookie); in fill_queue()
2066 tasklet_schedule(&pch->task); in fill_queue()
2078 spin_lock_irqsave(&pch->lock, flags); in pl330_tasklet()
2081 list_for_each_entry_safe(desc, _dt, &pch->work_list, node) in pl330_tasklet()
2082 if (desc->status == DONE) { in pl330_tasklet()
2083 if (!pch->cyclic) in pl330_tasklet()
2084 dma_cookie_complete(&desc->txd); in pl330_tasklet()
2085 list_move_tail(&desc->node, &pch->completed_list); in pl330_tasklet()
2091 if (list_empty(&pch->work_list)) { in pl330_tasklet()
2092 spin_lock(&pch->thread->dmac->lock); in pl330_tasklet()
2093 _stop(pch->thread); in pl330_tasklet()
2094 spin_unlock(&pch->thread->dmac->lock); in pl330_tasklet()
2096 pch->active = false; in pl330_tasklet()
2099 spin_lock(&pch->thread->dmac->lock); in pl330_tasklet()
2100 pl330_start_thread(pch->thread); in pl330_tasklet()
2101 spin_unlock(&pch->thread->dmac->lock); in pl330_tasklet()
2104 while (!list_empty(&pch->completed_list)) { in pl330_tasklet()
2107 desc = list_first_entry(&pch->completed_list, in pl330_tasklet()
2110 dmaengine_desc_get_callback(&desc->txd, &cb); in pl330_tasklet()
2112 if (pch->cyclic) { in pl330_tasklet()
2113 desc->status = PREP; in pl330_tasklet()
2114 list_move_tail(&desc->node, &pch->work_list); in pl330_tasklet()
2116 pch->active = true; in pl330_tasklet()
2117 spin_lock(&pch->thread->dmac->lock); in pl330_tasklet()
2118 pl330_start_thread(pch->thread); in pl330_tasklet()
2119 spin_unlock(&pch->thread->dmac->lock); in pl330_tasklet()
2123 desc->status = FREE; in pl330_tasklet()
2124 list_move_tail(&desc->node, &pch->dmac->desc_pool); in pl330_tasklet()
2127 dma_descriptor_unmap(&desc->txd); in pl330_tasklet()
2130 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tasklet()
2132 spin_lock_irqsave(&pch->lock, flags); in pl330_tasklet()
2135 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tasklet()
2139 pm_runtime_mark_last_busy(pch->dmac->ddma.dev); in pl330_tasklet()
2140 pm_runtime_put_autosuspend(pch->dmac->ddma.dev); in pl330_tasklet()
2147 int count = dma_spec->args_count; in of_dma_pl330_xlate()
2148 struct pl330_dmac *pl330 = ofdma->of_dma_data; in of_dma_pl330_xlate()
2157 chan_id = dma_spec->args[0]; in of_dma_pl330_xlate()
2158 if (chan_id >= pl330->num_peripherals) in of_dma_pl330_xlate()
2161 return dma_get_slave_channel(&pl330->peripherals[chan_id].chan); in of_dma_pl330_xlate()
2167 struct pl330_dmac *pl330 = pch->dmac; in pl330_alloc_chan_resources()
2170 spin_lock_irqsave(&pl330->lock, flags); in pl330_alloc_chan_resources()
2173 pch->cyclic = false; in pl330_alloc_chan_resources()
2175 pch->thread = pl330_request_channel(pl330); in pl330_alloc_chan_resources()
2176 if (!pch->thread) { in pl330_alloc_chan_resources()
2177 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_alloc_chan_resources()
2178 return -ENOMEM; in pl330_alloc_chan_resources()
2181 tasklet_setup(&pch->task, pl330_tasklet); in pl330_alloc_chan_resources()
2183 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_alloc_chan_resources()
2189 * We need the data direction between the DMAC (the dma-mapping "device") and
2209 if (pch->dir != DMA_NONE) in pl330_unprep_slave_fifo()
2210 dma_unmap_resource(pch->chan.device->dev, pch->fifo_dma, in pl330_unprep_slave_fifo()
2211 1 << pch->burst_sz, pch->dir, 0); in pl330_unprep_slave_fifo()
2212 pch->dir = DMA_NONE; in pl330_unprep_slave_fifo()
2219 struct device *dev = pch->chan.device->dev; in pl330_prep_slave_fifo()
2223 if (pch->dir == dma_dir) in pl330_prep_slave_fifo()
2227 pch->fifo_dma = dma_map_resource(dev, pch->fifo_addr, in pl330_prep_slave_fifo()
2228 1 << pch->burst_sz, dma_dir, 0); in pl330_prep_slave_fifo()
2229 if (dma_mapping_error(dev, pch->fifo_dma)) in pl330_prep_slave_fifo()
2232 pch->dir = dma_dir; in pl330_prep_slave_fifo()
2254 if (slave_config->dst_addr) in pl330_config_write()
2255 pch->fifo_addr = slave_config->dst_addr; in pl330_config_write()
2256 if (slave_config->dst_addr_width) in pl330_config_write()
2257 pch->burst_sz = __ffs(slave_config->dst_addr_width); in pl330_config_write()
2258 pch->burst_len = fixup_burst_len(slave_config->dst_maxburst, in pl330_config_write()
2259 pch->dmac->quirks); in pl330_config_write()
2261 if (slave_config->src_addr) in pl330_config_write()
2262 pch->fifo_addr = slave_config->src_addr; in pl330_config_write()
2263 if (slave_config->src_addr_width) in pl330_config_write()
2264 pch->burst_sz = __ffs(slave_config->src_addr_width); in pl330_config_write()
2265 pch->burst_len = fixup_burst_len(slave_config->src_maxburst, in pl330_config_write()
2266 pch->dmac->quirks); in pl330_config_write()
2277 memcpy(&pch->slave_config, slave_config, sizeof(*slave_config)); in pl330_config()
2287 struct pl330_dmac *pl330 = pch->dmac; in pl330_terminate_all()
2290 pm_runtime_get_sync(pl330->ddma.dev); in pl330_terminate_all()
2291 spin_lock_irqsave(&pch->lock, flags); in pl330_terminate_all()
2293 spin_lock(&pl330->lock); in pl330_terminate_all()
2294 _stop(pch->thread); in pl330_terminate_all()
2295 pch->thread->req[0].desc = NULL; in pl330_terminate_all()
2296 pch->thread->req[1].desc = NULL; in pl330_terminate_all()
2297 pch->thread->req_running = -1; in pl330_terminate_all()
2298 spin_unlock(&pl330->lock); in pl330_terminate_all()
2300 power_down = pch->active; in pl330_terminate_all()
2301 pch->active = false; in pl330_terminate_all()
2304 list_for_each_entry(desc, &pch->submitted_list, node) { in pl330_terminate_all()
2305 desc->status = FREE; in pl330_terminate_all()
2306 dma_cookie_complete(&desc->txd); in pl330_terminate_all()
2309 list_for_each_entry(desc, &pch->work_list , node) { in pl330_terminate_all()
2310 desc->status = FREE; in pl330_terminate_all()
2311 dma_cookie_complete(&desc->txd); in pl330_terminate_all()
2314 list_splice_tail_init(&pch->submitted_list, &pl330->desc_pool); in pl330_terminate_all()
2315 list_splice_tail_init(&pch->work_list, &pl330->desc_pool); in pl330_terminate_all()
2316 list_splice_tail_init(&pch->completed_list, &pl330->desc_pool); in pl330_terminate_all()
2317 spin_unlock_irqrestore(&pch->lock, flags); in pl330_terminate_all()
2318 pm_runtime_mark_last_busy(pl330->ddma.dev); in pl330_terminate_all()
2320 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_terminate_all()
2321 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_terminate_all()
2336 struct pl330_dmac *pl330 = pch->dmac; in pl330_pause()
2340 pm_runtime_get_sync(pl330->ddma.dev); in pl330_pause()
2341 spin_lock_irqsave(&pch->lock, flags); in pl330_pause()
2343 spin_lock(&pl330->lock); in pl330_pause()
2344 _stop(pch->thread); in pl330_pause()
2345 spin_unlock(&pl330->lock); in pl330_pause()
2347 list_for_each_entry(desc, &pch->work_list, node) { in pl330_pause()
2348 if (desc->status == BUSY) in pl330_pause()
2349 desc->status = PAUSED; in pl330_pause()
2351 spin_unlock_irqrestore(&pch->lock, flags); in pl330_pause()
2352 pm_runtime_mark_last_busy(pl330->ddma.dev); in pl330_pause()
2353 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_pause()
2361 struct pl330_dmac *pl330 = pch->dmac; in pl330_free_chan_resources()
2364 tasklet_kill(&pch->task); in pl330_free_chan_resources()
2366 pm_runtime_get_sync(pch->dmac->ddma.dev); in pl330_free_chan_resources()
2367 spin_lock_irqsave(&pl330->lock, flags); in pl330_free_chan_resources()
2369 pl330_release_channel(pch->thread); in pl330_free_chan_resources()
2370 pch->thread = NULL; in pl330_free_chan_resources()
2372 if (pch->cyclic) in pl330_free_chan_resources()
2373 list_splice_tail_init(&pch->work_list, &pch->dmac->desc_pool); in pl330_free_chan_resources()
2375 spin_unlock_irqrestore(&pl330->lock, flags); in pl330_free_chan_resources()
2376 pm_runtime_mark_last_busy(pch->dmac->ddma.dev); in pl330_free_chan_resources()
2377 pm_runtime_put_autosuspend(pch->dmac->ddma.dev); in pl330_free_chan_resources()
2384 struct pl330_thread *thrd = pch->thread; in pl330_get_current_xferred_count()
2385 struct pl330_dmac *pl330 = pch->dmac; in pl330_get_current_xferred_count()
2386 void __iomem *regs = thrd->dmac->base; in pl330_get_current_xferred_count()
2389 pm_runtime_get_sync(pl330->ddma.dev); in pl330_get_current_xferred_count()
2391 if (desc->rqcfg.src_inc) { in pl330_get_current_xferred_count()
2392 val = readl(regs + SA(thrd->id)); in pl330_get_current_xferred_count()
2393 addr = desc->px.src_addr; in pl330_get_current_xferred_count()
2395 val = readl(regs + DA(thrd->id)); in pl330_get_current_xferred_count()
2396 addr = desc->px.dst_addr; in pl330_get_current_xferred_count()
2398 pm_runtime_mark_last_busy(pch->dmac->ddma.dev); in pl330_get_current_xferred_count()
2399 pm_runtime_put_autosuspend(pl330->ddma.dev); in pl330_get_current_xferred_count()
2405 return val - addr; in pl330_get_current_xferred_count()
2426 spin_lock_irqsave(&pch->lock, flags); in pl330_tx_status()
2427 spin_lock(&pch->thread->dmac->lock); in pl330_tx_status()
2429 if (pch->thread->req_running != -1) in pl330_tx_status()
2430 running = pch->thread->req[pch->thread->req_running].desc; in pl330_tx_status()
2432 last_enq = pch->thread->req[pch->thread->lstenq].desc; in pl330_tx_status()
2435 list_for_each_entry(desc, &pch->work_list, node) { in pl330_tx_status()
2436 if (desc->status == DONE) in pl330_tx_status()
2437 transferred = desc->bytes_requested; in pl330_tx_status()
2441 else if (desc->status == BUSY || desc->status == PAUSED) in pl330_tx_status()
2449 transferred = desc->bytes_requested; in pl330_tx_status()
2452 residual += desc->bytes_requested - transferred; in pl330_tx_status()
2453 if (desc->txd.cookie == cookie) { in pl330_tx_status()
2454 switch (desc->status) { in pl330_tx_status()
2470 if (desc->last) in pl330_tx_status()
2473 spin_unlock(&pch->thread->dmac->lock); in pl330_tx_status()
2474 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tx_status()
2487 spin_lock_irqsave(&pch->lock, flags); in pl330_issue_pending()
2488 if (list_empty(&pch->work_list)) { in pl330_issue_pending()
2494 WARN_ON(list_empty(&pch->submitted_list)); in pl330_issue_pending()
2495 pch->active = true; in pl330_issue_pending()
2496 pm_runtime_get_sync(pch->dmac->ddma.dev); in pl330_issue_pending()
2498 list_splice_tail_init(&pch->submitted_list, &pch->work_list); in pl330_issue_pending()
2499 spin_unlock_irqrestore(&pch->lock, flags); in pl330_issue_pending()
2501 pl330_tasklet(&pch->task); in pl330_issue_pending()
2512 struct dma_pl330_chan *pch = to_pchan(tx->chan); in pl330_tx_submit()
2516 spin_lock_irqsave(&pch->lock, flags); in pl330_tx_submit()
2519 while (!list_empty(&last->node)) { in pl330_tx_submit()
2520 desc = list_entry(last->node.next, struct dma_pl330_desc, node); in pl330_tx_submit()
2521 if (pch->cyclic) { in pl330_tx_submit()
2522 desc->txd.callback = last->txd.callback; in pl330_tx_submit()
2523 desc->txd.callback_param = last->txd.callback_param; in pl330_tx_submit()
2525 desc->last = false; in pl330_tx_submit()
2527 dma_cookie_assign(&desc->txd); in pl330_tx_submit()
2529 list_move_tail(&desc->node, &pch->submitted_list); in pl330_tx_submit()
2532 last->last = true; in pl330_tx_submit()
2533 cookie = dma_cookie_assign(&last->txd); in pl330_tx_submit()
2534 list_add_tail(&last->node, &pch->submitted_list); in pl330_tx_submit()
2535 spin_unlock_irqrestore(&pch->lock, flags); in pl330_tx_submit()
2542 desc->rqcfg.swap = SWAP_NO; in _init_desc()
2543 desc->rqcfg.scctl = CCTRL0; in _init_desc()
2544 desc->rqcfg.dcctl = CCTRL0; in _init_desc()
2545 desc->txd.tx_submit = pl330_tx_submit; in _init_desc()
2547 INIT_LIST_HEAD(&desc->node); in _init_desc()
2583 desc = list_entry(pool->next, in pluck_desc()
2586 list_del_init(&desc->node); in pluck_desc()
2588 desc->status = PREP; in pluck_desc()
2589 desc->txd.callback = NULL; in pluck_desc()
2599 struct pl330_dmac *pl330 = pch->dmac; in pl330_get_desc()
2600 u8 *peri_id = pch->chan.private; in pl330_get_desc()
2604 desc = pluck_desc(&pl330->desc_pool, &pl330->pool_lock); in pl330_get_desc()
2619 desc->pchan = pch; in pl330_get_desc()
2620 desc->txd.cookie = 0; in pl330_get_desc()
2621 async_tx_ack(&desc->txd); in pl330_get_desc()
2623 desc->peri = peri_id ? pch->chan.chan_id : 0; in pl330_get_desc()
2624 desc->rqcfg.pcfg = &pch->dmac->pcfg; in pl330_get_desc()
2626 dma_async_tx_descriptor_init(&desc->txd, &pch->chan); in pl330_get_desc()
2634 px->bytes = len; in fill_px()
2635 px->dst_addr = dst; in fill_px()
2636 px->src_addr = src; in fill_px()
2646 dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n", in __pl330_prep_dma_memcpy()
2655 * going to be word-unaligned and more than 200MB, in __pl330_prep_dma_memcpy()
2661 fill_px(&desc->px, dst, src, len); in __pl330_prep_dma_memcpy()
2669 struct dma_pl330_chan *pch = desc->pchan; in get_burst_len()
2670 struct pl330_dmac *pl330 = pch->dmac; in get_burst_len()
2673 burst_len = pl330->pcfg.data_bus_width / 8; in get_burst_len()
2674 burst_len *= pl330->pcfg.data_buf_dep / pl330->pcfg.num_chan; in get_burst_len()
2675 burst_len >>= desc->rqcfg.brst_size; in get_burst_len()
2691 struct pl330_dmac *pl330 = pch->dmac; in pl330_prep_dma_cyclic()
2700 dev_err(pch->dmac->ddma.dev, "%s:%d Invalid dma direction\n", in pl330_prep_dma_cyclic()
2705 pl330_config_write(chan, &pch->slave_config, direction); in pl330_prep_dma_cyclic()
2715 dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n", in pl330_prep_dma_cyclic()
2721 spin_lock_irqsave(&pl330->pool_lock, iflags); in pl330_prep_dma_cyclic()
2723 while (!list_empty(&first->node)) { in pl330_prep_dma_cyclic()
2724 desc = list_entry(first->node.next, in pl330_prep_dma_cyclic()
2726 list_move_tail(&desc->node, &pl330->desc_pool); in pl330_prep_dma_cyclic()
2729 list_move_tail(&first->node, &pl330->desc_pool); in pl330_prep_dma_cyclic()
2731 spin_unlock_irqrestore(&pl330->pool_lock, iflags); in pl330_prep_dma_cyclic()
2738 desc->rqcfg.src_inc = 1; in pl330_prep_dma_cyclic()
2739 desc->rqcfg.dst_inc = 0; in pl330_prep_dma_cyclic()
2741 dst = pch->fifo_dma; in pl330_prep_dma_cyclic()
2744 desc->rqcfg.src_inc = 0; in pl330_prep_dma_cyclic()
2745 desc->rqcfg.dst_inc = 1; in pl330_prep_dma_cyclic()
2746 src = pch->fifo_dma; in pl330_prep_dma_cyclic()
2753 desc->rqtype = direction; in pl330_prep_dma_cyclic()
2754 desc->rqcfg.brst_size = pch->burst_sz; in pl330_prep_dma_cyclic()
2755 desc->rqcfg.brst_len = pch->burst_len; in pl330_prep_dma_cyclic()
2756 desc->bytes_requested = period_len; in pl330_prep_dma_cyclic()
2757 fill_px(&desc->px, dst, src, period_len); in pl330_prep_dma_cyclic()
2762 list_add_tail(&desc->node, &first->node); in pl330_prep_dma_cyclic()
2770 pch->cyclic = true; in pl330_prep_dma_cyclic()
2771 desc->txd.flags = flags; in pl330_prep_dma_cyclic()
2773 return &desc->txd; in pl330_prep_dma_cyclic()
2788 pl330 = pch->dmac; in pl330_prep_dma_memcpy()
2794 desc->rqcfg.src_inc = 1; in pl330_prep_dma_memcpy()
2795 desc->rqcfg.dst_inc = 1; in pl330_prep_dma_memcpy()
2796 desc->rqtype = DMA_MEM_TO_MEM; in pl330_prep_dma_memcpy()
2799 burst = pl330->pcfg.data_bus_width / 8; in pl330_prep_dma_memcpy()
2806 while ((src | dst | len) & (burst - 1)) in pl330_prep_dma_memcpy()
2809 desc->rqcfg.brst_size = 0; in pl330_prep_dma_memcpy()
2810 while (burst != (1 << desc->rqcfg.brst_size)) in pl330_prep_dma_memcpy()
2811 desc->rqcfg.brst_size++; in pl330_prep_dma_memcpy()
2813 desc->rqcfg.brst_len = get_burst_len(desc, len); in pl330_prep_dma_memcpy()
2818 if (burst * 8 < pl330->pcfg.data_bus_width) in pl330_prep_dma_memcpy()
2819 desc->rqcfg.brst_len = 1; in pl330_prep_dma_memcpy()
2821 desc->bytes_requested = len; in pl330_prep_dma_memcpy()
2823 desc->txd.flags = flags; in pl330_prep_dma_memcpy()
2825 return &desc->txd; in pl330_prep_dma_memcpy()
2837 spin_lock_irqsave(&pl330->pool_lock, flags); in __pl330_giveback_desc()
2839 while (!list_empty(&first->node)) { in __pl330_giveback_desc()
2840 desc = list_entry(first->node.next, in __pl330_giveback_desc()
2842 list_move_tail(&desc->node, &pl330->desc_pool); in __pl330_giveback_desc()
2845 list_move_tail(&first->node, &pl330->desc_pool); in __pl330_giveback_desc()
2847 spin_unlock_irqrestore(&pl330->pool_lock, flags); in __pl330_giveback_desc()
2863 pl330_config_write(chan, &pch->slave_config, direction); in pl330_prep_slave_sg()
2874 struct pl330_dmac *pl330 = pch->dmac; in pl330_prep_slave_sg()
2876 dev_err(pch->dmac->ddma.dev, in pl330_prep_slave_sg()
2887 list_add_tail(&desc->node, &first->node); in pl330_prep_slave_sg()
2890 desc->rqcfg.src_inc = 1; in pl330_prep_slave_sg()
2891 desc->rqcfg.dst_inc = 0; in pl330_prep_slave_sg()
2892 fill_px(&desc->px, pch->fifo_dma, sg_dma_address(sg), in pl330_prep_slave_sg()
2895 desc->rqcfg.src_inc = 0; in pl330_prep_slave_sg()
2896 desc->rqcfg.dst_inc = 1; in pl330_prep_slave_sg()
2897 fill_px(&desc->px, sg_dma_address(sg), pch->fifo_dma, in pl330_prep_slave_sg()
2901 desc->rqcfg.brst_size = pch->burst_sz; in pl330_prep_slave_sg()
2902 desc->rqcfg.brst_len = pch->burst_len; in pl330_prep_slave_sg()
2903 desc->rqtype = direction; in pl330_prep_slave_sg()
2904 desc->bytes_requested = sg_dma_len(sg); in pl330_prep_slave_sg()
2908 desc->txd.flags = flg; in pl330_prep_slave_sg()
2909 return &desc->txd; in pl330_prep_slave_sg()
2930 struct pl330_dmac *pl330 = s->private; in pl330_debugfs_show()
2933 chans = pl330->pcfg.num_chan; in pl330_debugfs_show()
2934 pchs = pl330->num_peripherals; in pl330_debugfs_show()
2938 seq_puts(s, "--------\t-----\n"); in pl330_debugfs_show()
2940 struct pl330_thread *thrd = &pl330->channels[ch]; in pl330_debugfs_show()
2941 int found = -1; in pl330_debugfs_show()
2944 struct dma_pl330_chan *pch = &pl330->peripherals[pr]; in pl330_debugfs_show()
2946 if (!pch->thread || thrd->id != pch->thread->id) in pl330_debugfs_show()
2952 seq_printf(s, "%d\t\t", thrd->id); in pl330_debugfs_show()
2953 if (found == -1) in pl330_debugfs_show()
2954 seq_puts(s, "--\n"); in pl330_debugfs_show()
2966 debugfs_create_file(dev_name(pl330->ddma.dev), in init_pl330_debugfs()
3016 struct dma_device *pd; in pl330_probe() local
3020 struct device_node *np = adev->dev.of_node; in pl330_probe()
3022 ret = dma_set_mask_and_coherent(&adev->dev, DMA_BIT_MASK(32)); in pl330_probe()
3027 pl330 = devm_kzalloc(&adev->dev, sizeof(*pl330), GFP_KERNEL); in pl330_probe()
3029 return -ENOMEM; in pl330_probe()
3031 pd = &pl330->ddma; in pl330_probe()
3032 pd->dev = &adev->dev; in pl330_probe()
3034 pl330->mcbufsz = 0; in pl330_probe()
3039 pl330->quirks |= of_quirks[i].id; in pl330_probe()
3041 res = &adev->res; in pl330_probe()
3042 pl330->base = devm_ioremap_resource(&adev->dev, res); in pl330_probe()
3043 if (IS_ERR(pl330->base)) in pl330_probe()
3044 return PTR_ERR(pl330->base); in pl330_probe()
3048 pl330->rstc = devm_reset_control_get_optional(&adev->dev, "dma"); in pl330_probe()
3049 if (IS_ERR(pl330->rstc)) { in pl330_probe()
3050 return dev_err_probe(&adev->dev, PTR_ERR(pl330->rstc), "Failed to get reset!\n"); in pl330_probe()
3052 ret = reset_control_deassert(pl330->rstc); in pl330_probe()
3054 dev_err(&adev->dev, "Couldn't deassert the device from reset!\n"); in pl330_probe()
3059 pl330->rstc_ocp = devm_reset_control_get_optional(&adev->dev, "dma-ocp"); in pl330_probe()
3060 if (IS_ERR(pl330->rstc_ocp)) { in pl330_probe()
3061 return dev_err_probe(&adev->dev, PTR_ERR(pl330->rstc_ocp), in pl330_probe()
3064 ret = reset_control_deassert(pl330->rstc_ocp); in pl330_probe()
3066 dev_err(&adev->dev, "Couldn't deassert the device from OCP reset!\n"); in pl330_probe()
3072 irq = adev->irq[i]; in pl330_probe()
3074 ret = devm_request_irq(&adev->dev, irq, in pl330_probe()
3076 dev_name(&adev->dev), pl330); in pl330_probe()
3084 pcfg = &pl330->pcfg; in pl330_probe()
3086 pcfg->periph_id = adev->periphid; in pl330_probe()
3091 INIT_LIST_HEAD(&pl330->desc_pool); in pl330_probe()
3092 spin_lock_init(&pl330->pool_lock); in pl330_probe()
3095 if (!add_desc(&pl330->desc_pool, &pl330->pool_lock, in pl330_probe()
3097 dev_warn(&adev->dev, "unable to allocate desc\n"); in pl330_probe()
3099 INIT_LIST_HEAD(&pd->channels); in pl330_probe()
3102 num_chan = max_t(int, pcfg->num_peri, pcfg->num_chan); in pl330_probe()
3104 pl330->num_peripherals = num_chan; in pl330_probe()
3106 pl330->peripherals = kcalloc(num_chan, sizeof(*pch), GFP_KERNEL); in pl330_probe()
3107 if (!pl330->peripherals) { in pl330_probe()
3108 ret = -ENOMEM; in pl330_probe()
3113 pch = &pl330->peripherals[i]; in pl330_probe()
3115 pch->chan.private = adev->dev.of_node; in pl330_probe()
3116 INIT_LIST_HEAD(&pch->submitted_list); in pl330_probe()
3117 INIT_LIST_HEAD(&pch->work_list); in pl330_probe()
3118 INIT_LIST_HEAD(&pch->completed_list); in pl330_probe()
3119 spin_lock_init(&pch->lock); in pl330_probe()
3120 pch->thread = NULL; in pl330_probe()
3121 pch->chan.device = pd; in pl330_probe()
3122 pch->dmac = pl330; in pl330_probe()
3123 pch->dir = DMA_NONE; in pl330_probe()
3126 list_add_tail(&pch->chan.device_node, &pd->channels); in pl330_probe()
3129 dma_cap_set(DMA_MEMCPY, pd->cap_mask); in pl330_probe()
3130 if (pcfg->num_peri) { in pl330_probe()
3131 dma_cap_set(DMA_SLAVE, pd->cap_mask); in pl330_probe()
3132 dma_cap_set(DMA_CYCLIC, pd->cap_mask); in pl330_probe()
3133 dma_cap_set(DMA_PRIVATE, pd->cap_mask); in pl330_probe()
3136 pd->device_alloc_chan_resources = pl330_alloc_chan_resources; in pl330_probe()
3137 pd->device_free_chan_resources = pl330_free_chan_resources; in pl330_probe()
3138 pd->device_prep_dma_memcpy = pl330_prep_dma_memcpy; in pl330_probe()
3139 pd->device_prep_dma_cyclic = pl330_prep_dma_cyclic; in pl330_probe()
3140 pd->device_tx_status = pl330_tx_status; in pl330_probe()
3141 pd->device_prep_slave_sg = pl330_prep_slave_sg; in pl330_probe()
3142 pd->device_config = pl330_config; in pl330_probe()
3143 pd->device_pause = pl330_pause; in pl330_probe()
3144 pd->device_terminate_all = pl330_terminate_all; in pl330_probe()
3145 pd->device_issue_pending = pl330_issue_pending; in pl330_probe()
3146 pd->src_addr_widths = PL330_DMA_BUSWIDTHS; in pl330_probe()
3147 pd->dst_addr_widths = PL330_DMA_BUSWIDTHS; in pl330_probe()
3148 pd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); in pl330_probe()
3149 pd->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; in pl330_probe()
3150 pd->max_burst = PL330_MAX_BURST; in pl330_probe()
3152 ret = dma_async_device_register(pd); in pl330_probe()
3154 dev_err(&adev->dev, "unable to register DMAC\n"); in pl330_probe()
3158 if (adev->dev.of_node) { in pl330_probe()
3159 ret = of_dma_controller_register(adev->dev.of_node, in pl330_probe()
3162 dev_err(&adev->dev, in pl330_probe()
3171 ret = dma_set_max_seg_size(&adev->dev, 1900800); in pl330_probe()
3173 dev_err(&adev->dev, "unable to set the seg size\n"); in pl330_probe()
3177 dev_info(&adev->dev, in pl330_probe()
3178 "Loaded driver for PL330 DMAC-%x\n", adev->periphid); in pl330_probe()
3179 dev_info(&adev->dev, in pl330_probe()
3180 "\tDBUFF-%ux%ubytes Num_Chans-%u Num_Peri-%u Num_Events-%u\n", in pl330_probe()
3181 pcfg->data_buf_dep, pcfg->data_bus_width / 8, pcfg->num_chan, in pl330_probe()
3182 pcfg->num_peri, pcfg->num_events); in pl330_probe()
3184 pm_runtime_irq_safe(&adev->dev); in pl330_probe()
3185 pm_runtime_use_autosuspend(&adev->dev); in pl330_probe()
3186 pm_runtime_set_autosuspend_delay(&adev->dev, PL330_AUTOSUSPEND_DELAY); in pl330_probe()
3187 pm_runtime_mark_last_busy(&adev->dev); in pl330_probe()
3188 pm_runtime_put_autosuspend(&adev->dev); in pl330_probe()
3192 /* Idle the DMAC */ in pl330_probe()
3193 list_for_each_entry_safe(pch, _p, &pl330->ddma.channels, in pl330_probe()
3197 list_del(&pch->chan.device_node); in pl330_probe()
3200 if (pch->thread) { in pl330_probe()
3201 pl330_terminate_all(&pch->chan); in pl330_probe()
3202 pl330_free_chan_resources(&pch->chan); in pl330_probe()
3208 if (pl330->rstc_ocp) in pl330_probe()
3209 reset_control_assert(pl330->rstc_ocp); in pl330_probe()
3211 if (pl330->rstc) in pl330_probe()
3212 reset_control_assert(pl330->rstc); in pl330_probe()
3222 pm_runtime_get_noresume(pl330->ddma.dev); in pl330_remove()
3224 if (adev->dev.of_node) in pl330_remove()
3225 of_dma_controller_free(adev->dev.of_node); in pl330_remove()
3228 irq = adev->irq[i]; in pl330_remove()
3230 devm_free_irq(&adev->dev, irq, pl330); in pl330_remove()
3233 dma_async_device_unregister(&pl330->ddma); in pl330_remove()
3235 /* Idle the DMAC */ in pl330_remove()
3236 list_for_each_entry_safe(pch, _p, &pl330->ddma.channels, in pl330_remove()
3240 list_del(&pch->chan.device_node); in pl330_remove()
3243 if (pch->thread) { in pl330_remove()
3244 pl330_terminate_all(&pch->chan); in pl330_remove()
3245 pl330_free_chan_resources(&pch->chan); in pl330_remove()
3251 if (pl330->rstc_ocp) in pl330_remove()
3252 reset_control_assert(pl330->rstc_ocp); in pl330_remove()
3254 if (pl330->rstc) in pl330_remove()
3255 reset_control_assert(pl330->rstc); in pl330_remove()
3271 .name = "dma-pl330",