Lines Matching full:vdma

10  * The AXI Video Direct Memory Access (AXI VDMA) core is a soft Xilinx IP
159 /* Axi VDMA Flush on Fsync bits */
458  * @XDMA_TYPE_VDMA: Axi vdma ip.
567  * @chan: Driver specific VDMA channel
572  * Since vdma driver is trying to write to a register offset which is not a
1094 	 * for meeting Xilinx VDMA specification requirement.  in xilinx_dma_alloc_chan_resources()
1258 		 * VDMA and simple mode do not support residue reporting, so the  in xilinx_dma_tx_status()
1329  * xilinx_vdma_start_transfer - Starts VDMA transfer
1733 	/* Reset VDMA */  in xilinx_dma_chan_reset()
2469  * xilinx_dma_channel_set_config - Configure VDMA channel
2470  * Run-time configuration for Axi VDMA, supports:
2477  * @cfg: VDMA device configuration pointer
2798 	if (of_device_is_compatible(node, "xlnx,axi-vdma-mm2s-channel") ||  in xilinx_dma_chan_probe()
2815 					   "xlnx,axi-vdma-s2mm-channel") ||  in xilinx_dma_chan_probe()
2977 	{ .compatible = "xlnx,axi-vdma-1.00.a", .data = &axivdma_config },
3156 		dev_info(&pdev->dev, "Xilinx AXI VDMA Engine Driver Probed!!\n");  in xilinx_dma_probe()
3196 		.name = "xilinx-vdma",
3206 MODULE_DESCRIPTION("Xilinx VDMA driver");