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Lines Matching +full:ddr +full:- +full:config

6 config EDAC_ATOMIC_SCRUB
9 config EDAC_SUPPORT
16 EDAC is a subsystem along with hardware-specific drivers designed to
17 report hardware errors. These are low-level errors that are reported
22 The mailing list for the EDAC project is linux-edac@vger.kernel.org.
26 config EDAC_LEGACY_SYSFS
34 config EDAC_DEBUG
40 levels are 0-4 (from low to high) and by default it is set to 2.
43 config EDAC_DECODE_MCE
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
49 occurring on your machine in human-readable form.
55 config EDAC_GHES
59 Not all machines support hardware-driven error report. Some of those
60 provide a BIOS-driven error report mechanism via ACPI, using the
64 When this option is enabled, it will disable the hardware-driven
68 It should be noticed that keeping both GHES and a hardware-driven
77 config EDAC_AMD64
84 config EDAC_AMD64_ERROR_INJECTION
96 - inject_section (0..3, 16-byte section of 64-byte cacheline),
97 - inject_word (0..8, 16-bit word of 16-byte section),
98 - inject_ecc_vector (hex ecc vector: select bits of inject word)
103 config EDAC_AL_MC
110 config EDAC_AMD76X
117 config EDAC_E7XXX
124 config EDAC_E752X
131 config EDAC_I82443BXGX
139 config EDAC_I82875P
146 config EDAC_I82975X
153 config EDAC_I3000
160 config EDAC_I3200
167 config EDAC_IE31200
172 E3-1200 based DRAM controllers.
174 config EDAC_X38
181 config EDAC_I5400
188 config EDAC_I7CORE
197 config EDAC_I82860
204 config EDAC_R82600
211 config EDAC_I5000
218 config EDAC_I5100
225 config EDAC_I7300
232 config EDAC_SBRIDGE
233 tristate "Intel Sandy-Bridge/Ivy-Bridge/Haswell Integrated MC"
239 config EDAC_SKX
248 system has non-volatile DIMMs you should also manually
251 config EDAC_I10NM
260 system has non-volatile DIMMs you should also manually
263 config EDAC_PND2
270 micro-server but may appear on others in the future.
272 config EDAC_MPC85XX
279 config EDAC_LAYERSCAPE
280 tristate "Freescale Layerscape DDR"
286 config EDAC_MV64X60
293 config EDAC_PASEMI
300 config EDAC_CELL
308 config EDAC_PPC4XX
317 config EDAC_AMD8131
318 tristate "AMD8131 HyperTransport PCI-X Tunnel"
322 AMD8131 HyperTransport PCI-X Tunnel chip.
326 config EDAC_AMD8111
335 config EDAC_CPC925
344 config EDAC_HIGHBANK_MC
351 config EDAC_HIGHBANK_L2
358 config EDAC_OCTEON_PC
365 config EDAC_OCTEON_L2C
372 config EDAC_OCTEON_LMC
379 config EDAC_OCTEON_PCI
386 config EDAC_THUNDERX
396 config EDAC_ALTERA
404 config EDAC_ALTERA_SDRAM
413 config EDAC_ALTERA_L2C
421 config EDAC_ALTERA_OCRAM
422 bool "Altera On-Chip RAM ECC"
426 Altera On-Chip RAM Memory for Altera SoCs.
428 config EDAC_ALTERA_ETHERNET
435 config EDAC_ALTERA_NAND
442 config EDAC_ALTERA_DMA
449 config EDAC_ALTERA_USB
456 config EDAC_ALTERA_QSPI
463 config EDAC_ALTERA_SDMMC
470 config EDAC_SIFIVE
476 config EDAC_ARMADA_XP
477 bool "Marvell Armada XP DDR and L2 Cache ECC"
481 DDR RAM and L2 cache controllers.
483 config EDAC_SYNOPSYS
484 tristate "Synopsys DDR Memory Controller"
487 Support for error detection and correction on the Synopsys DDR
490 config EDAC_XGENE
491 tristate "APM X-Gene SoC"
495 APM X-Gene family of SOCs.
497 config EDAC_TI
503 config EDAC_QCOM
517 config EDAC_ASPEED
526 config EDAC_BLUEFIELD
533 config EDAC_DMC520
534 tristate "ARM DMC-520 ECC"
538 SoCs with ARM DMC-520 DRAM controller.